[PATCH] D140993: [DAGCOmbine] fold (sext (sext_inreg x)) -> (sext (trunc x))

[Amaury SECHET via Phabricator via llvm-commits]

deadalnix created this revision.
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This fixes a regression introduced by D127115 <https://reviews.llvm.org/D127115> in test/CodeGen/PowerPC/store-forward-be64.ll


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D140993

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -12356,6 +12356,15 @@
   if (N0.getOpcode() == ISD::SIGN_EXTEND || N0.getOpcode() == ISD::ANY_EXTEND)
     return DAG.getNode(ISD::SIGN_EXTEND, DL, VT, N0.getOperand(0));
 
+  // fold (sext (sext_inreg x)) -> (sext (trunc x))
+  if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG) {
+    EVT ExtVT = cast<VTSDNode>(N0->getOperand(1))->getVT();
+    if (!LegalOperations || TLI.isTypeLegal(ExtVT)) {
+      SDValue T = DAG.getNode(ISD::TRUNCATE, DL, ExtVT, N0.getOperand(0));
+      return DAG.getNode(ISD::SIGN_EXTEND, DL, VT, T);
+    }
+  }
+
   if (N0.getOpcode() == ISD::TRUNCATE) {
     // fold (sext (truncate (load x))) -> (sext (smaller load x))
     // fold (sext (truncate (srl (load x), c))) -> (sext (smaller load (x+c/n)))


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