[llvm] ec48682 - [InstCombine] add more tests into select-factorize; NFC

[via llvm-commits]

Author: chenglin.bi
Date: 2023-01-04T17:49:47+08:00
New Revision: ec48682ce9f61d056361c5095f21e930b8365661

URL: https://github.com/llvm/llvm-project/commit/ec48682ce9f61d056361c5095f21e930b8365661
DIFF: https://github.com/llvm/llvm-project/commit/ec48682ce9f61d056361c5095f21e930b8365661.diff

LOG: [InstCombine] add more tests into select-factorize; NFC

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/select-factorize.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/select-factorize.ll b/llvm/test/Transforms/InstCombine/select-factorize.ll
index a7052b1be474..d9233b7aca41 100644
--- a/llvm/test/Transforms/InstCombine/select-factorize.ll
+++ b/llvm/test/Transforms/InstCombine/select-factorize.ll
@@ -211,6 +211,58 @@ define i1 @and_logic_and_logic_or_4(i1 %c, i1 %a, i1 %b) {
 ; CHECK-LABEL: @and_logic_and_logic_or_4(
 ; CHECK-NEXT:    [[AC:%.*]] = and i1 [[A:%.*]], [[C:%.*]]
 ; CHECK-NEXT:    [[BC:%.*]] = select i1 [[B:%.*]], i1 [[C]], i1 false
+; CHECK-NEXT:    [[OR:%.*]] = select i1 [[AC]], i1 true, i1 [[BC]]
+; CHECK-NEXT:    ret i1 [[OR]]
+;
+  %ac = and i1 %a, %c
+  %bc = select i1 %b, i1 %c, i1 false
+  %or = select i1 %ac, i1 true, i1 %bc
+  ret i1 %or
+}
+
+define i1 @and_logic_and_logic_or_5(i1 %c, i1 %a, i1 %b) {
+; CHECK-LABEL: @and_logic_and_logic_or_5(
+; CHECK-NEXT:    [[AC:%.*]] = and i1 [[C:%.*]], [[A:%.*]]
+; CHECK-NEXT:    [[BC:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT:    [[OR:%.*]] = select i1 [[BC]], i1 true, i1 [[AC]]
+; CHECK-NEXT:    ret i1 [[OR]]
+;
+  %ac = and i1 %c, %a
+  %bc = select i1 %c, i1 %b, i1 false
+  %or = select i1 %bc, i1 true, i1 %ac
+  ret i1 %or
+}
+
+define i1 @and_logic_and_logic_or_6(i1 %c, i1 %a, i1 %b) {
+; CHECK-LABEL: @and_logic_and_logic_or_6(
+; CHECK-NEXT:    [[AC:%.*]] = and i1 [[C:%.*]], [[A:%.*]]
+; CHECK-NEXT:    [[BC:%.*]] = select i1 [[B:%.*]], i1 [[C]], i1 false
+; CHECK-NEXT:    [[OR:%.*]] = select i1 [[BC]], i1 true, i1 [[AC]]
+; CHECK-NEXT:    ret i1 [[OR]]
+;
+  %ac = and i1 %c, %a
+  %bc = select i1 %b, i1 %c, i1 false
+  %or = select i1 %bc, i1 true, i1 %ac
+  ret i1 %or
+}
+
+define i1 @and_logic_and_logic_or_7(i1 %c, i1 %a, i1 %b) {
+; CHECK-LABEL: @and_logic_and_logic_or_7(
+; CHECK-NEXT:    [[AC:%.*]] = and i1 [[A:%.*]], [[C:%.*]]
+; CHECK-NEXT:    [[BC:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT:    [[OR:%.*]] = select i1 [[BC]], i1 true, i1 [[AC]]
+; CHECK-NEXT:    ret i1 [[OR]]
+;
+  %ac = and i1 %a, %c
+  %bc = select i1 %c, i1 %b, i1 false
+  %or = select i1 %bc, i1 true, i1 %ac
+  ret i1 %or
+}
+
+define i1 @and_logic_and_logic_or_8(i1 %c, i1 %a, i1 %b) {
+; CHECK-LABEL: @and_logic_and_logic_or_8(
+; CHECK-NEXT:    [[AC:%.*]] = and i1 [[A:%.*]], [[C:%.*]]
+; CHECK-NEXT:    [[BC:%.*]] = select i1 [[B:%.*]], i1 [[C]], i1 false
 ; CHECK-NEXT:    [[OR:%.*]] = select i1 [[BC]], i1 true, i1 [[AC]]
 ; CHECK-NEXT:    ret i1 [[OR]]
 ;
@@ -562,6 +614,58 @@ define i1 @or_logic_or_logic_and_4(i1 %c, i1 %a, i1 %b) {
   ret i1 %or
 }
 
+define i1 @or_logic_or_logic_and_5(i1 %c, i1 %a, i1 %b) {
+; CHECK-LABEL: @or_logic_or_logic_and_5(
+; CHECK-NEXT:    [[AC:%.*]] = or i1 [[A:%.*]], [[C:%.*]]
+; CHECK-NEXT:    [[BC:%.*]] = select i1 [[C]], i1 true, i1 [[B:%.*]]
+; CHECK-NEXT:    [[OR:%.*]] = select i1 [[AC]], i1 [[BC]], i1 false
+; CHECK-NEXT:    ret i1 [[OR]]
+;
+  %ac = or i1 %a, %c
+  %bc = select i1 %c, i1 true, i1 %b
+  %or = select i1 %ac, i1 %bc, i1 false
+  ret i1 %or
+}
+
+define i1 @or_logic_or_logic_and_6(i1 %c, i1 %a, i1 %b) {
+; CHECK-LABEL: @or_logic_or_logic_and_6(
+; CHECK-NEXT:    [[AC:%.*]] = or i1 [[A:%.*]], [[C:%.*]]
+; CHECK-NEXT:    [[BC:%.*]] = select i1 [[B:%.*]], i1 true, i1 [[C]]
+; CHECK-NEXT:    [[OR:%.*]] = select i1 [[AC]], i1 [[BC]], i1 false
+; CHECK-NEXT:    ret i1 [[OR]]
+;
+  %ac = or i1 %a, %c
+  %bc = select i1 %b, i1 true, i1 %c
+  %or = select i1 %ac, i1 %bc, i1 false
+  ret i1 %or
+}
+
+define i1 @or_logic_or_logic_and_7(i1 %c, i1 %a, i1 %b) {
+; CHECK-LABEL: @or_logic_or_logic_and_7(
+; CHECK-NEXT:    [[AC:%.*]] = or i1 [[A:%.*]], [[C:%.*]]
+; CHECK-NEXT:    [[BC:%.*]] = select i1 [[C]], i1 true, i1 [[B:%.*]]
+; CHECK-NEXT:    [[OR:%.*]] = select i1 [[BC]], i1 [[AC]], i1 false
+; CHECK-NEXT:    ret i1 [[OR]]
+;
+  %ac = or i1 %a, %c
+  %bc = select i1 %c, i1 true, i1 %b
+  %or = select i1 %bc, i1 %ac, i1 false
+  ret i1 %or
+}
+
+define i1 @or_logic_or_logic_and_8(i1 %c, i1 %a, i1 %b) {
+; CHECK-LABEL: @or_logic_or_logic_and_8(
+; CHECK-NEXT:    [[AC:%.*]] = or i1 [[A:%.*]], [[C:%.*]]
+; CHECK-NEXT:    [[BC:%.*]] = select i1 [[B:%.*]], i1 true, i1 [[C]]
+; CHECK-NEXT:    [[OR:%.*]] = select i1 [[BC]], i1 [[AC]], i1 false
+; CHECK-NEXT:    ret i1 [[OR]]
+;
+  %ac = or i1 %a, %c
+  %bc = select i1 %b, i1 true, i1 %c
+  %or = select i1 %bc, i1 %ac, i1 false
+  ret i1 %or
+}
+
 define <3 x i1> @or_logic_or_logic_and_vector(<3 x i1> %c, <3 x i1> %a, <3 x i1> %b) {
 ; CHECK-LABEL: @or_logic_or_logic_and_vector(
 ; CHECK-NEXT:    [[AC:%.*]] = or <3 x i1> [[C:%.*]], [[A:%.*]]