[PATCH] D140836: Do not short circuit hoistIVInc when recomputation of poison flags is needed.
Owen Anderson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 3 19:55:02 PST 2023
resistor updated this revision to Diff 486151.
resistor added a comment.
Extract poison fixup logic to a helper and apply it in the short-circuit case without
going through the rest of the hoisting process.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D140836/new/
https://reviews.llvm.org/D140836
Files:
llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
llvm/test/Transforms/IndVarSimplify/iv-poison.ll
Index: llvm/test/Transforms/IndVarSimplify/iv-poison.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/IndVarSimplify/iv-poison.ll
@@ -0,0 +1,28 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -passes=indvars -S < %s | FileCheck %s
+
+define i2 @iv_hoist_nsw_poison(i2 %0) {
+; CHECK-LABEL: @iv_hoist_nsw_poison(
+; CHECK-NEXT: br label [[TMP2:%.*]]
+; CHECK: 2:
+; CHECK-NEXT: [[DOT07:%.*]] = phi i2 [ 1, [[TMP1:%.*]] ], [ [[TMP3:%.*]], [[TMP2]] ]
+; CHECK-NEXT: [[TMP3]] = add nuw i2 [[DOT07]], 1
+; CHECK-NEXT: [[DOTNOT_NOT:%.*]] = icmp ult i2 1, [[TMP0:%.*]]
+; CHECK-NEXT: br i1 [[DOTNOT_NOT]], label [[COMMON_RET:%.*]], label [[TMP2]]
+; CHECK: common.ret:
+; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi i2 [ [[TMP3]], [[TMP2]] ]
+; CHECK-NEXT: ret i2 [[DOTLCSSA]]
+;
+ br label %2
+
+2: ; preds = %2, %1
+ %.07 = phi i2 [ 1, %1 ], [ %3, %2 ]
+ %.0 = phi i2 [ 1, %1 ], [ %4, %2 ]
+ %3 = add nsw i2 %.07, 1
+ %4 = add i2 %.0, 1
+ %.not.not = icmp ult i2 %.07, %0
+ br i1 %.not.not, label %common.ret, label %2
+
+common.ret: ; preds = %2
+ ret i2 %4
+}
Index: llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
===================================================================
--- llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
+++ llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
@@ -1026,8 +1026,24 @@
/// until we reach a value that dominates InsertPos.
bool SCEVExpander::hoistIVInc(Instruction *IncV, Instruction *InsertPos,
bool RecomputePoisonFlags) {
- if (SE.DT.dominates(IncV, InsertPos))
- return true;
+ auto FixupPoisonFlags = [this](Instruction *I) {
+ // Drop flags that are potentially inferred from old context and infer flags
+ // in new context.
+ I->dropPoisonGeneratingFlags();
+ if (auto *OBO = dyn_cast<OverflowingBinaryOperator>(I))
+ if (auto Flags = SE.getStrengthenedNoWrapFlagsFromBinOp(OBO)) {
+ auto *BO = cast<BinaryOperator>(I);
+ BO->setHasNoUnsignedWrap(
+ ScalarEvolution::maskFlags(*Flags, SCEV::FlagNUW) == SCEV::FlagNUW);
+ BO->setHasNoSignedWrap(
+ ScalarEvolution::maskFlags(*Flags, SCEV::FlagNSW) == SCEV::FlagNSW);
+ }
+ };
+
+ if (SE.DT.dominates(IncV, InsertPos)) {
+ if (RecomputePoisonFlags) FixupPoisonFlags(IncV);
+ return true;
+ }
// InsertPos must itself dominate IncV so that IncV's new position satisfies
// its existing users.
@@ -1053,19 +1069,7 @@
for (Instruction *I : llvm::reverse(IVIncs)) {
fixupInsertPoints(I);
I->moveBefore(InsertPos);
- if (!RecomputePoisonFlags)
- continue;
- // Drop flags that are potentially inferred from old context and infer flags
- // in new context.
- I->dropPoisonGeneratingFlags();
- if (auto *OBO = dyn_cast<OverflowingBinaryOperator>(I))
- if (auto Flags = SE.getStrengthenedNoWrapFlagsFromBinOp(OBO)) {
- auto *BO = cast<BinaryOperator>(I);
- BO->setHasNoUnsignedWrap(
- ScalarEvolution::maskFlags(*Flags, SCEV::FlagNUW) == SCEV::FlagNUW);
- BO->setHasNoSignedWrap(
- ScalarEvolution::maskFlags(*Flags, SCEV::FlagNSW) == SCEV::FlagNSW);
- }
+ if (RecomputePoisonFlags) FixupPoisonFlags(I);
}
return true;
}
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