[PATCH] D140782: [RISCV] Teach lowerCTLZ_CTTZ_ZERO_UNDEF to handle i32 vectors with conversion to f32 vectors.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 3 09:49:42 PST 2023


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:676
       // Lower CTLZ_ZERO_UNDEF and CTTZ_ZERO_UNDEF if we have a floating point
       // type that can represent the value exactly.
       if (VT.getVectorElementType() != MVT::i64) {
----------------
This comment needs updating. With this patch we no longer require the floating point type to represent the value exactly.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td:143
 ]>;
+def SDT_RISCVI2FPOp_RM_VL  : SDTypeProfile<1, 4, [
+  SDTCisFP<0>, SDTCisInt<1>, SDTCisSameNumEltsAs<0, 1>,
----------------
fakepaper56 wrote:
> I have tried to use similar naming as `SDT_RISCVVecCvtX2FOp_VL` `riscv_vfcvt_rm_x_f_vl` used. But I confused that `SDT_RISCVVecCvtX2FOp_VL` looks like that it's for converting x to f rather than converting f to x.
You're right. I did name that badly. I'll fix it.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140782/new/

https://reviews.llvm.org/D140782



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