[PATCH] D139943: [CodeGen][AMDGPU] EXTRACT_VECTOR_ELT: input vector element type can differ from output type

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 3 08:56:28 PST 2023


arsenm added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck -enable-var-scope %s
+;
----------------
Should drop the -verify-machineinstrs, I've been thinking we should drop most of these in tests


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Comment at: llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll:5-7
+source_filename = "test.ll"
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
+target triple = "amdgcn-amd-amdhsa"
----------------
Don't need this stuff


================
Comment at: llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll:9
+
+define amdgpu_kernel void @eggs(i1 %arg, i8* %arg1, <1 x i8>* %arg2, <1 x i8>* %arg3, <1 x i8>* %arg4, <1 x i8>* %arg5, <1 x i8>* %arg6, <1 x i8>* %arg7, <1 x i8>* %arg8, <1 x i8>* %arg9) {
+; CHECK-LABEL: eggs:
----------------
Should use opaque pointers


================
Comment at: llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll:93
+  %tmp34 = bitcast i8* %tmp33 to <1 x i8>*
+  %tmp35 = addrspacecast <1 x i8>* %tmp34 to <1 x i8> addrspace(1)*
+  %tmp36 = load <1 x i8>, <1 x i8> addrspace(1)* %tmp35
----------------
I'm sure you don't need the addrspacecasts here, should just change the address spaces of the arguments (We should have an optimization and have llvm-reduce start doing this too)


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Comment at: llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll:110
+  %tmp49 = phi <1 x i8> [ %tmp12, %bb10 ], [ zeroinitializer, %bb ]
+  store <1 x i8> %tmp49, <1 x i8>* %arg2
+  store <1 x i8> %tmp48, <1 x i8>* %arg3
----------------
Does it only happen with 1 x vectors, and do you need so many elements?


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Comment at: llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll:119
+  ret void
+}
----------------
Can you hit this with a few more vector types?


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https://reviews.llvm.org/D139943



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