[llvm] 419a216 - [NFC][AArch64] Adjust comments in tablegen file

[Lucas Prates via llvm-commits]

Author: Lucas Prates
Date: 2023-01-03T14:45:42Z
New Revision: 419a21609444aa81e335254998f24099dc4a3c1f

URL: https://github.com/llvm/llvm-project/commit/419a21609444aa81e335254998f24099dc4a3c1f
DIFF: https://github.com/llvm/llvm-project/commit/419a21609444aa81e335254998f24099dc4a3c1f.diff

LOG: [NFC][AArch64] Adjust comments in tablegen file

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64InstrFormats.td
    llvm/lib/Target/AArch64/AArch64InstrInfo.td

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
index 9e64b2121c61..0a24896433a0 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
@@ -11708,6 +11708,10 @@ multiclass MOPSMemorySetTaggingInsns<bits<2> opcode, string asm> {
   def TN : MOPSMemorySetTagging<opcode, 1, 1, asm # "tn">;
 }
 
+//----------------------------------------------------------------------------
+// 2022 Armv8.9/Armv9.4 Extensions
+//----------------------------------------------------------------------------
+
 //---
 // 2022 Architecture Extensions: General Data Processing (FEAT_CSSC)
 //---
@@ -11772,10 +11776,6 @@ multiclass ComparisonOp<bit isUnsigned, bit isMin, string asm,
                                       !not(isUnsigned) : simm8_64b), asm, OpNode>;
 }
 
-//----------------------------------------------------------------------------
-// 2022 Armv8.9/Armv9.4 Extensions
-//----------------------------------------------------------------------------
-
 //---
 // RCPC instructions (FEAT_LRCPC3)
 //---

diff  --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index 3e24bcd4d294..66b03eaae5ff 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -8571,11 +8571,15 @@ def : Pat<(AArch64AssertZExtBool GPR32:$op),
 //===----------------------------===//
 // 2022 Architecture Extensions:
 //===----------------------------===//
+
 def : InstAlias<"clrbhb",  (HINT 22), 0>;
 let Predicates = [HasCLRBHB] in {
   def : InstAlias<"clrbhb",  (HINT 22), 1>;
 }
 
+//===----------------------------------------------------------------------===//
+// Translation Hardening Extension (FEAT_THE)
+//===----------------------------------------------------------------------===//
 defm RCW     : ReadCheckWriteCompareAndSwap;
 
 defm RCWCLR  : ReadCheckWriteOperation<0b001, "clr">;