[llvm] a0b470c - [TypePromotion] Add truncate in ConvertTruncs when the original truncate type is not extend type
via llvm-commits
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Tue Jan 3 02:13:26 PST 2023
Author: chenglin.bi
Date: 2023-01-03T18:13:20+08:00
New Revision: a0b470c9848c638e86f97eca53063642e07cea67
URL: https://github.com/llvm/llvm-project/commit/a0b470c9848c638e86f97eca53063642e07cea67
DIFF: https://github.com/llvm/llvm-project/commit/a0b470c9848c638e86f97eca53063642e07cea67.diff
LOG: [TypePromotion] Add truncate in ConvertTruncs when the original truncate type is not extend type
If the src type is not extend type, after convert the truncate to and we need to truncate the and also to make sure the all user is legal.
The old fix D137613 doesn't work when the truncate convert to and have the other users. So this time I try to add the truncate after and to avoid all these potential issues.
Fix: #59554
Reviewed By: samparker
Differential Revision: https://reviews.llvm.org/D140869
Added:
Modified:
llvm/lib/CodeGen/TypePromotion.cpp
llvm/test/Transforms/TypePromotion/AArch64/trunc-zext-chain.ll
Removed:
llvm/test/Transforms/TypePromotion/AArch64/pr58843.ll
################################################################################
diff --git a/llvm/lib/CodeGen/TypePromotion.cpp b/llvm/lib/CodeGen/TypePromotion.cpp
index 6903e9f645c76..5893c2cd5bc51 100644
--- a/llvm/lib/CodeGen/TypePromotion.cpp
+++ b/llvm/lib/CodeGen/TypePromotion.cpp
@@ -579,7 +579,6 @@ void IRPromoter::Cleanup() {
LLVM_DEBUG(dbgs() << "IR Promotion: Cleanup..\n");
// Some zexts will now have become redundant, along with their trunc
// operands, so remove them.
- // Some zexts need to be replaced with truncate if src bitwidth is larger.
for (auto *V : Visited) {
if (!isa<ZExtInst>(V))
continue;
@@ -594,11 +593,6 @@ void IRPromoter::Cleanup() {
<< "\n");
ReplaceAllUsersOfWith(ZExt, Src);
continue;
- } else if (ZExt->getSrcTy()->getScalarSizeInBits() > PromotedWidth) {
- IRBuilder<> Builder{ZExt};
- Value *Trunc = Builder.CreateTrunc(Src, ZExt->getDestTy());
- ReplaceAllUsersOfWith(ZExt, Trunc);
- continue;
}
// We've inserted a trunc for a zext sink, but we already know that the
@@ -634,6 +628,8 @@ void IRPromoter::ConvertTruncs() {
ConstantInt *Mask =
ConstantInt::get(SrcTy, APInt::getMaxValue(NumBits).getZExtValue());
Value *Masked = Builder.CreateAnd(Trunc->getOperand(0), Mask);
+ if (SrcTy != ExtTy)
+ Masked = Builder.CreateTrunc(Masked, ExtTy);
if (auto *I = dyn_cast<Instruction>(Masked))
NewInsts.insert(I);
diff --git a/llvm/test/Transforms/TypePromotion/AArch64/pr58843.ll b/llvm/test/Transforms/TypePromotion/AArch64/pr58843.ll
deleted file mode 100644
index 983a32029c652..0000000000000
--- a/llvm/test/Transforms/TypePromotion/AArch64/pr58843.ll
+++ /dev/null
@@ -1,20 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=aarch64 -type-promotion -verify -S %s -o - | FileCheck %s
-target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
-
-; Check the case don't crash due to zext source type bitwidth
-; larger than dest type bitwidth.
-define i1 @test(i8 %arg) {
-; CHECK-LABEL: @test(
-; CHECK-NEXT: [[EXT1:%.*]] = zext i8 [[ARG:%.*]] to i64
-; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[EXT1]], 7
-; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP2]], 0
-; CHECK-NEXT: ret i1 [[CMP]]
-;
- %ext1 = zext i8 %arg to i64
- %trunc = trunc i64 %ext1 to i3
- %ext2 = zext i3 %trunc to i8
- %cmp = icmp ne i8 %ext2, 0
- ret i1 %cmp
-}
diff --git a/llvm/test/Transforms/TypePromotion/AArch64/trunc-zext-chain.ll b/llvm/test/Transforms/TypePromotion/AArch64/trunc-zext-chain.ll
index 0a846ba115ec3..bcf8dfdd7cb0b 100644
--- a/llvm/test/Transforms/TypePromotion/AArch64/trunc-zext-chain.ll
+++ b/llvm/test/Transforms/TypePromotion/AArch64/trunc-zext-chain.ll
@@ -177,3 +177,39 @@ latch: ; preds = %bb14, %bb9
exit:
ret i64 %var30
}
+
+; Check the case don't crash due to zext source type bitwidth
+; larger than dest type bitwidth.
+define i1 @pr58843(i8 %arg) {
+; CHECK-LABEL: @pr58843(
+; CHECK-NEXT: [[EXT1:%.*]] = zext i8 [[ARG:%.*]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[EXT1]], 7
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP2]], 0
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %ext1 = zext i8 %arg to i64
+ %trunc = trunc i64 %ext1 to i3
+ %ext2 = zext i3 %trunc to i8
+ %cmp = icmp ne i8 %ext2, 0
+ ret i1 %cmp
+}
+
+; Check the case don't crash due to xor two op have
diff erent
+; types
+define i1 @pr59554(i8 %arg) {
+; CHECK-LABEL: @pr59554(
+; CHECK-NEXT: [[ARG_EXT:%.*]] = zext i8 [[ARG:%.*]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[ARG_EXT]], 7
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
+; CHECK-NEXT: [[SWITCH_TABLEIDX:%.*]] = xor i32 [[TMP2]], 1
+; CHECK-NEXT: [[SWITCH_LOBIT:%.*]] = icmp ne i32 [[TMP2]], 0
+; CHECK-NEXT: ret i1 [[SWITCH_LOBIT]]
+;
+ %arg.ext = zext i8 %arg to i64
+ %trunc = trunc i64 %arg.ext to i3
+ %switch.tableidx = xor i3 %trunc, 1
+ %switch.maskindex = zext i3 %trunc to i8
+ %switch.lobit = icmp ne i8 %switch.maskindex, 0
+ ret i1 %switch.lobit
+}
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