[llvm] 03e8482 - [DAGCombiner] `visitFREEZE()`: fix cycle breaking

[Roman Lebedev via llvm-commits]

Author: Roman Lebedev
Date: 2022-12-23T18:16:22+03:00
New Revision: 03e848293e1ce91dee049b5ef6afdfdbdb6fe51b

URL: https://github.com/llvm/llvm-project/commit/03e848293e1ce91dee049b5ef6afdfdbdb6fe51b
DIFF: https://github.com/llvm/llvm-project/commit/03e848293e1ce91dee049b5ef6afdfdbdb6fe51b.diff

LOG: [DAGCombiner] `visitFREEZE()`: fix cycle breaking

Depending on the particular DAG, we might either create a `freeze`,
or not. And only in the former case, the cycle would be formed.
It would be nicer to have `ReplaceAllUsesOfValueWithIf()`,
like we have in IR, but we don't have that.

Fixes https://github.com/llvm/llvm-project/issues/59677

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/test/CodeGen/X86/freeze-vector.ll

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index bf1f550c23c0..d4a03ec9af25 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -14286,10 +14286,13 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
     SDValue FrozenMaybePoisonOperand = DAG.getFreeze(MaybePoisonOperand);
     // Then, change all other uses of unfrozen operand to use frozen operand.
     DAG.ReplaceAllUsesOfValueWith(MaybePoisonOperand, FrozenMaybePoisonOperand);
-    // But, that also updated the use in the freeze we just created, thus
-    // creating a cycle in a DAG. Let's undo that by mutating the freeze.
-    DAG.UpdateNodeOperands(FrozenMaybePoisonOperand.getNode(),
-                           MaybePoisonOperand);
+    if (FrozenMaybePoisonOperand.getOpcode() == ISD::FREEZE &&
+        FrozenMaybePoisonOperand.getOperand(0) == FrozenMaybePoisonOperand) {
+      // But, that also updated the use in the freeze we just created, thus
+      // creating a cycle in a DAG. Let's undo that by mutating the freeze.
+      DAG.UpdateNodeOperands(FrozenMaybePoisonOperand.getNode(),
+                             MaybePoisonOperand);
+    }
   }
 
   // Finally, recreate the node, it's operands were updated to use

diff  --git a/llvm/test/CodeGen/X86/freeze-vector.ll b/llvm/test/CodeGen/X86/freeze-vector.ll
index b1aa32914112..69f238660ea9 100644
--- a/llvm/test/CodeGen/X86/freeze-vector.ll
+++ b/llvm/test/CodeGen/X86/freeze-vector.ll
@@ -538,3 +538,51 @@ define void @freeze_buildvector_extrause(ptr %origin0, ptr %origin1, ptr %origin
   store <4 x i32> %i9, ptr %dst
   ret void
 }
+
+define void @pr59677(i32 %x, ptr %out) nounwind {
+; X86-LABEL: pr59677:
+; X86:       # %bb.0:
+; X86-NEXT:    pushl %esi
+; X86-NEXT:    pushl %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT:    vmovd %eax, %xmm0
+; X86-NEXT:    orl $1, %eax
+; X86-NEXT:    vmovd %eax, %xmm1
+; X86-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; X86-NEXT:    vmovq {{.*#+}} xmm0 = xmm0[0],zero
+; X86-NEXT:    vpaddd %xmm0, %xmm0, %xmm0
+; X86-NEXT:    vcvtdq2ps %xmm0, %xmm0
+; X86-NEXT:    vmovss %xmm0, (%esp)
+; X86-NEXT:    calll sinf
+; X86-NEXT:    fstps (%esi)
+; X86-NEXT:    addl $4, %esp
+; X86-NEXT:    popl %esi
+; X86-NEXT:    retl
+;
+; X64-LABEL: pr59677:
+; X64:       # %bb.0:
+; X64-NEXT:    pushq %rbx
+; X64-NEXT:    movq %rsi, %rbx
+; X64-NEXT:    vmovd %edi, %xmm0
+; X64-NEXT:    orl $1, %edi
+; X64-NEXT:    vmovd %edi, %xmm1
+; X64-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; X64-NEXT:    vmovq {{.*#+}} xmm0 = xmm0[0],zero
+; X64-NEXT:    vpaddd %xmm0, %xmm0, %xmm0
+; X64-NEXT:    vcvtdq2ps %xmm0, %xmm0
+; X64-NEXT:    callq sinf at PLT
+; X64-NEXT:    vmovss %xmm0, (%rbx)
+; X64-NEXT:    popq %rbx
+; X64-NEXT:    retq
+  %i0 = or i32 %x, 1
+  %i1 = insertelement <4 x i32> zeroinitializer, i32 %x, i64 0
+  %i2 = insertelement <4 x i32> %i1, i32 %i0, i64 1
+  %i3 = shl <4 x i32> %i2, <i32 1, i32 1, i32 1, i32 1>
+  %i4 = sitofp <4 x i32> %i3 to <4 x float>
+  %i5 = tail call <4 x float> @llvm.sin.v4f32(<4 x float> %i4)
+  %i6 = extractelement <4 x float> %i5, i64 0
+  store float %i6, ptr %out, align 4
+  ret void
+}
+declare <4 x float> @llvm.sin.v4f32(<4 x float>)