[llvm] d7a63a0 - [DAGCombiner] `visitFREEZE()`: restore previous behaviour on no maybe-poison operands

[Roman Lebedev via llvm-commits]

Author: Roman Lebedev
Date: 2022-12-23T17:26:05+03:00
New Revision: d7a63a0421d5dfe91eace88dda1e5b20550b771c

URL: https://github.com/llvm/llvm-project/commit/d7a63a0421d5dfe91eace88dda1e5b20550b771c
DIFF: https://github.com/llvm/llvm-project/commit/d7a63a0421d5dfe91eace88dda1e5b20550b771c.diff

LOG: [DAGCombiner] `visitFREEZE()`: restore previous behaviour on no maybe-poison operands

Lack of such operands implies that the op might be poison-producing due to
it's flags. We seem to drop them already, but the comments are confusing.

Fixes https://github.com/llvm/llvm-project/issues/59676

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/test/CodeGen/X86/freeze-binary.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 567b197de90c2..2568c2baf4714 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -14273,8 +14273,8 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
       return SDValue();
     }
   }
-  assert(!MaybePoisonOperands.empty() &&
-         "Should have found maybe-poison operands.");
+  if (MaybePoisonOperands.empty())
+    return SDValue();
 
   for (SDValue MaybePoisonOperand : MaybePoisonOperands) {
     // Don't replace every single UNDEF everywhere with frozen UNDEF, though.

diff  --git a/llvm/test/CodeGen/X86/freeze-binary.ll b/llvm/test/CodeGen/X86/freeze-binary.ll
index 339f1f9939709..d3d4eac04a181 100644
--- a/llvm/test/CodeGen/X86/freeze-binary.ll
+++ b/llvm/test/CodeGen/X86/freeze-binary.ll
@@ -793,3 +793,121 @@ define i32 @freeze_fshr(i32 %a0, i32 %a1, i32 %a2) nounwind {
   %z = call i32 @llvm.fshr.i32(i32 %y, i32 %f2, i32 31)
   ret i32 %z
 }
+
+define void @pr59676_frozen(ptr %dst, i32 %x.orig) {
+; X86-LABEL: pr59676_frozen:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    imull %eax, %eax
+; X86-NEXT:    imull $84, %eax, %eax
+; X86-NEXT:    movl $818089009, %edx # imm = 0x30C30C31
+; X86-NEXT:    imull %edx
+; X86-NEXT:    movl %edx, %eax
+; X86-NEXT:    shrl $31, %eax
+; X86-NEXT:    sarl $3, %edx
+; X86-NEXT:    addl %eax, %edx
+; X86-NEXT:    movl %edx, (%ecx)
+; X86-NEXT:    retl
+;
+; X64-LABEL: pr59676_frozen:
+; X64:       # %bb.0:
+; X64-NEXT:    imull %esi, %esi
+; X64-NEXT:    imull $84, %esi, %eax
+; X64-NEXT:    cltq
+; X64-NEXT:    imulq $818089009, %rax, %rax # imm = 0x30C30C31
+; X64-NEXT:    movq %rax, %rcx
+; X64-NEXT:    shrq $63, %rcx
+; X64-NEXT:    sarq $35, %rax
+; X64-NEXT:    addl %ecx, %eax
+; X64-NEXT:    movl %eax, (%rdi)
+; X64-NEXT:    retq
+  %x = freeze i32 %x.orig
+  %mul = mul i32 %x, 42
+  %shl = shl i32 %x, 1
+  %mul.frozen = freeze i32 %mul
+  %shl.frozen = freeze i32 %shl
+  %area = mul i32 %mul.frozen, %shl.frozen
+  %div = sdiv i32 %area, 42
+  store i32 %div, ptr %dst, align 4
+  ret void
+}
+define void @pr59676_nsw_frozen(ptr %dst, i32 %x.orig) {
+; X86-LABEL: pr59676_nsw_frozen:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT:    imull $42, %edx, %eax
+; X86-NEXT:    imull %edx, %eax
+; X86-NEXT:    addl %eax, %eax
+; X86-NEXT:    movl $818089009, %edx # imm = 0x30C30C31
+; X86-NEXT:    imull %edx
+; X86-NEXT:    movl %edx, %eax
+; X86-NEXT:    shrl $31, %eax
+; X86-NEXT:    sarl $3, %edx
+; X86-NEXT:    addl %eax, %edx
+; X86-NEXT:    movl %edx, (%ecx)
+; X86-NEXT:    retl
+;
+; X64-LABEL: pr59676_nsw_frozen:
+; X64:       # %bb.0:
+; X64-NEXT:    imull $42, %esi, %eax
+; X64-NEXT:    imull %esi, %eax
+; X64-NEXT:    addl %eax, %eax
+; X64-NEXT:    cltq
+; X64-NEXT:    imulq $818089009, %rax, %rax # imm = 0x30C30C31
+; X64-NEXT:    movq %rax, %rcx
+; X64-NEXT:    shrq $63, %rcx
+; X64-NEXT:    sarq $35, %rax
+; X64-NEXT:    addl %ecx, %eax
+; X64-NEXT:    movl %eax, (%rdi)
+; X64-NEXT:    retq
+  %x = freeze i32 %x.orig
+  %mul = mul nsw i32 %x, 42
+  %shl = shl i32 %x, 1
+  %mul.frozen = freeze i32 %mul
+  %shl.frozen = freeze i32 %shl
+  %area = mul i32 %mul.frozen, %shl.frozen
+  %div = sdiv i32 %area, 42
+  store i32 %div, ptr %dst, align 4
+  ret void
+}
+define void @pr59676_nsw(ptr %dst, i32 %x) {
+; X86-LABEL: pr59676_nsw:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    imull $42, %edx, %eax
+; X86-NEXT:    imull %edx, %eax
+; X86-NEXT:    addl %eax, %eax
+; X86-NEXT:    movl $818089009, %edx # imm = 0x30C30C31
+; X86-NEXT:    imull %edx
+; X86-NEXT:    movl %edx, %eax
+; X86-NEXT:    shrl $31, %eax
+; X86-NEXT:    sarl $3, %edx
+; X86-NEXT:    addl %eax, %edx
+; X86-NEXT:    movl %edx, (%ecx)
+; X86-NEXT:    retl
+;
+; X64-LABEL: pr59676_nsw:
+; X64:       # %bb.0:
+; X64-NEXT:    imull $42, %esi, %eax
+; X64-NEXT:    imull %esi, %eax
+; X64-NEXT:    addl %eax, %eax
+; X64-NEXT:    cltq
+; X64-NEXT:    imulq $818089009, %rax, %rax # imm = 0x30C30C31
+; X64-NEXT:    movq %rax, %rcx
+; X64-NEXT:    shrq $63, %rcx
+; X64-NEXT:    sarq $35, %rax
+; X64-NEXT:    addl %ecx, %eax
+; X64-NEXT:    movl %eax, (%rdi)
+; X64-NEXT:    retq
+  %mul = mul nsw i32 %x, 42
+  %shl = shl i32 %x, 1
+  %mul.frozen = freeze i32 %mul
+  %shl.frozen = freeze i32 %shl
+  %area = mul i32 %mul.frozen, %shl.frozen
+  %div = sdiv i32 %area, 42
+  store i32 %div, ptr %dst, align 4
+  ret void
+}