[llvm] 23abf93 - [GVN] Convert some tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 23 01:01:28 PST 2022
Author: Nikita Popov
Date: 2022-12-23T10:00:59+01:00
New Revision: 23abf931386002fb9d2c11d026846475c224c641
URL: https://github.com/llvm/llvm-project/commit/23abf931386002fb9d2c11d026846475c224c641
DIFF: https://github.com/llvm/llvm-project/commit/23abf931386002fb9d2c11d026846475c224c641.diff
LOG: [GVN] Convert some tests to opaque pointers (NFC)
Added:
Modified:
llvm/test/Transforms/GVN/2007-07-25-DominatedLoop.ll
llvm/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll
llvm/test/Transforms/GVN/2007-07-25-Loop.ll
llvm/test/Transforms/GVN/2007-07-25-NestedLoop.ll
llvm/test/Transforms/GVN/2007-07-25-SinglePredecessor.ll
llvm/test/Transforms/GVN/2007-07-26-NonRedundant.ll
llvm/test/Transforms/GVN/2007-07-26-PhiErasure.ll
llvm/test/Transforms/GVN/2007-07-30-PredIDom.ll
llvm/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
llvm/test/Transforms/GVN/2007-07-31-RedundantPhi.ll
llvm/test/Transforms/GVN/2008-02-12-UndefLoad.ll
llvm/test/Transforms/GVN/2008-02-13-NewPHI.ll
llvm/test/Transforms/GVN/2008-07-02-Unreachable.ll
llvm/test/Transforms/GVN/2008-12-09-SelfRemove.ll
llvm/test/Transforms/GVN/2008-12-12-RLE-Crash.ll
llvm/test/Transforms/GVN/2008-12-14-rle-reanalyze.ll
llvm/test/Transforms/GVN/2008-12-15-CacheVisited.ll
llvm/test/Transforms/GVN/2009-01-21-SortInvalidation.ll
llvm/test/Transforms/GVN/2009-01-22-SortInvalidation.ll
llvm/test/Transforms/GVN/2009-03-10-PREOnVoid.ll
llvm/test/Transforms/GVN/2009-07-13-MemDepSortFail.ll
llvm/test/Transforms/GVN/2009-11-12-MemDepMallocBitCast.ll
llvm/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll
llvm/test/Transforms/GVN/2010-05-08-OneBit.ll
llvm/test/Transforms/GVN/2011-04-27-phioperands.ll
llvm/test/Transforms/GVN/2011-09-07-TypeIdFor.ll
llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather-inseltpoison.ll
llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather.ll
llvm/test/Transforms/GVN/MemdepMiscompile.ll
llvm/test/Transforms/GVN/PRE/2009-02-17-LoadPRECrash.ll
llvm/test/Transforms/GVN/PRE/2009-06-17-InvalidPRE.ll
llvm/test/Transforms/GVN/PRE/2011-06-01-NonLocalMemdepMiscompile.ll
llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
llvm/test/Transforms/GVN/PRE/2017-10-16-LoadPRECrash.ll
llvm/test/Transforms/GVN/PRE/invariant-load.ll
llvm/test/Transforms/GVN/PRE/load-pre-align.ll
llvm/test/Transforms/GVN/PRE/load-pre-licm.ll
llvm/test/Transforms/GVN/PRE/load-pre-metadata-accsess-group.ll
llvm/test/Transforms/GVN/PRE/load-pre-nonlocal.ll
llvm/test/Transforms/GVN/PRE/load-pre-split-backedge.ll
llvm/test/Transforms/GVN/PRE/lpre-call-wrap-2.ll
llvm/test/Transforms/GVN/PRE/lpre-call-wrap.ll
llvm/test/Transforms/GVN/PRE/modified-status.ll
llvm/test/Transforms/GVN/PRE/nonintegral.ll
llvm/test/Transforms/GVN/PRE/phi-translate-2.ll
llvm/test/Transforms/GVN/PRE/phi-translate.ll
llvm/test/Transforms/GVN/PRE/pre-after-rle.ll
llvm/test/Transforms/GVN/PRE/pre-aliasning-path.ll
llvm/test/Transforms/GVN/PRE/pre-basic-add.ll
llvm/test/Transforms/GVN/PRE/pre-gep-load.ll
llvm/test/Transforms/GVN/PRE/pre-jt-add.ll
llvm/test/Transforms/GVN/PRE/pre-load-guards.ll
llvm/test/Transforms/GVN/PRE/pre-load-implicit-cf-updates.ll
llvm/test/Transforms/GVN/PRE/pre-load-in-loop.ll
llvm/test/Transforms/GVN/PRE/pre-load-through-select.ll
llvm/test/Transforms/GVN/PRE/pre-load.ll
llvm/test/Transforms/GVN/PRE/pre-loop-load-new-pm.ll
llvm/test/Transforms/GVN/PRE/pre-loop-load-through-select.ll
llvm/test/Transforms/GVN/PRE/pre-loop-load.ll
llvm/test/Transforms/GVN/PRE/pre-no-cost-phi.ll
llvm/test/Transforms/GVN/PRE/pre-poison-add.ll
llvm/test/Transforms/GVN/PRE/pre-single-pred.ll
llvm/test/Transforms/GVN/PRE/preserve-tbaa.ll
llvm/test/Transforms/GVN/PRE/rle-addrspace-cast.ll
llvm/test/Transforms/GVN/PRE/rle-phi-translate.ll
llvm/test/Transforms/GVN/PRE/rle-semidominated.ll
llvm/test/Transforms/GVN/PRE/rle.ll
llvm/test/Transforms/GVN/PRE/volatile.ll
llvm/test/Transforms/GVN/addrspacecast.ll
llvm/test/Transforms/GVN/assume-equal.ll
llvm/test/Transforms/GVN/basic-undef-test.ll
llvm/test/Transforms/GVN/big-endian.ll
llvm/test/Transforms/GVN/callbr-loadpre-critedge.ll
llvm/test/Transforms/GVN/callbr-scalarpre-critedge.ll
llvm/test/Transforms/GVN/calloc-load-removal.ll
llvm/test/Transforms/GVN/calls-nonlocal.ll
llvm/test/Transforms/GVN/calls-readonly.ll
llvm/test/Transforms/GVN/capture-tracking-limit.ll
llvm/test/Transforms/GVN/cond_br.ll
llvm/test/Transforms/GVN/cond_br2.ll
llvm/test/Transforms/GVN/condprop.ll
llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash-inseltpoison.ll
llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash.ll
llvm/test/Transforms/GVN/crash-no-aa.ll
llvm/test/Transforms/GVN/crash.ll
llvm/test/Transforms/GVN/critical-edge-split-failure.ll
llvm/test/Transforms/GVN/critical-edge-split-indbr-pred-in-loop.ll
llvm/test/Transforms/GVN/dbg-redundant-load.ll
llvm/test/Transforms/GVN/debugloc.ll
llvm/test/Transforms/GVN/duplicate-phis.ll
llvm/test/Transforms/GVN/edge.ll
llvm/test/Transforms/GVN/equality-assume.ll
llvm/test/Transforms/GVN/fence.ll
llvm/test/Transforms/GVN/fold-const-expr.ll
llvm/test/Transforms/GVN/funclet.ll
llvm/test/Transforms/GVN/gc_relocate.ll
llvm/test/Transforms/GVN/gvn-loop-load-pre-order.ll
llvm/test/Transforms/GVN/int_sideeffect.ll
llvm/test/Transforms/GVN/invariant.group.ll
llvm/test/Transforms/GVN/invariant.start.ll
llvm/test/Transforms/GVN/lifetime-simple.ll
llvm/test/Transforms/GVN/load-constant-mem.ll
llvm/test/Transforms/GVN/load-dead-block.ll
llvm/test/Transforms/GVN/load-from-unreachable-predecessor.ll
llvm/test/Transforms/GVN/load-of-pointer-select-available.ll
llvm/test/Transforms/GVN/loadpre-context.ll
llvm/test/Transforms/GVN/loadpre-missed-opportunity.ll
llvm/test/Transforms/GVN/malloc-load-removal.ll
llvm/test/Transforms/GVN/masked-load-store-vn-crash.ll
llvm/test/Transforms/GVN/masked-load-store.ll
llvm/test/Transforms/GVN/mssa-update-dead-def.ll
llvm/test/Transforms/GVN/no-mem-dep-info.ll
llvm/test/Transforms/GVN/noalias.ll
llvm/test/Transforms/GVN/non-integral-pointers-inseltpoison.ll
llvm/test/Transforms/GVN/non-integral-pointers.ll
llvm/test/Transforms/GVN/nonescaping-malloc.ll
llvm/test/Transforms/GVN/nonescaping.ll
llvm/test/Transforms/GVN/null-aliases-nothing.ll
llvm/test/Transforms/GVN/opt-remarks-multiple-users.ll
llvm/test/Transforms/GVN/opt-remarks-non-dominating.ll
llvm/test/Transforms/GVN/opt-remarks.ll
llvm/test/Transforms/GVN/phi-translate-partial-alias.ll
llvm/test/Transforms/GVN/pr10820.ll
llvm/test/Transforms/GVN/pr14166.ll
llvm/test/Transforms/GVN/pr17732.ll
llvm/test/Transforms/GVN/pr17852.ll
llvm/test/Transforms/GVN/pr24397.ll
llvm/test/Transforms/GVN/pr24426.ll
llvm/test/Transforms/GVN/pr25440.ll
llvm/test/Transforms/GVN/pr28562.ll
llvm/test/Transforms/GVN/pr28879.ll
llvm/test/Transforms/GVN/pr32314.ll
llvm/test/Transforms/GVN/pr33549.ll
llvm/test/Transforms/GVN/pr36063.ll
llvm/test/Transforms/GVN/pr46054-md-nonlocaldefcache-cleanup.ll
llvm/test/Transforms/GVN/pr49193.ll
llvm/test/Transforms/GVN/pre-compare.ll
llvm/test/Transforms/GVN/pre-new-inst.ll
llvm/test/Transforms/GVN/pre-skip-convergent.ll
llvm/test/Transforms/GVN/preserve-memoryssa.ll
llvm/test/Transforms/GVN/propagate-ir-flags.ll
llvm/test/Transforms/GVN/range.ll
llvm/test/Transforms/GVN/readattrs.ll
llvm/test/Transforms/GVN/rle-must-alias.ll
llvm/test/Transforms/GVN/rle-no-phi-translate.ll
llvm/test/Transforms/GVN/rle-nonlocal.ll
llvm/test/Transforms/GVN/simplify-icf-cache-invalidation.ll
llvm/test/Transforms/GVN/stale-loop-info.ll
llvm/test/Transforms/GVN/storeinvgroup.ll
llvm/test/Transforms/GVN/tbaa.ll
llvm/test/Transforms/GVN/unreachable-predecessor.ll
llvm/test/Transforms/GVN/volatile-nonvolatile.ll
llvm/test/Transforms/GVN/vscale.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/GVN/2007-07-25-DominatedLoop.ll b/llvm/test/Transforms/GVN/2007-07-25-DominatedLoop.ll
index 9bf6192744be1..a92c38ea0ec28 100644
--- a/llvm/test/Transforms/GVN/2007-07-25-DominatedLoop.ll
+++ b/llvm/test/Transforms/GVN/2007-07-25-DominatedLoop.ll
@@ -1,9 +1,9 @@
; RUN: opt < %s -passes=gvn | llvm-dis
%struct.PerlInterpreter = type { i8 }
- at PL_sv_count = external global i32 ; <i32*> [#uses=2]
+ at PL_sv_count = external global i32 ; <ptr> [#uses=2]
-define void @perl_destruct(%struct.PerlInterpreter* %sv_interp) {
+define void @perl_destruct(ptr %sv_interp) {
entry:
br i1 false, label %cond_next25, label %cond_true16
@@ -71,11 +71,11 @@ cond_true23.i: ; preds = %Perl_safefree.exit68
ret void
cond_next150: ; preds = %Perl_safefree.exit68
- %tmp16092 = load i32, i32* @PL_sv_count, align 4 ; <i32> [#uses=0]
+ %tmp16092 = load i32, ptr @PL_sv_count, align 4 ; <i32> [#uses=0]
br label %cond_next165
bb157: ; preds = %cond_next165
- %tmp158 = load i32, i32* @PL_sv_count, align 4 ; <i32> [#uses=0]
+ %tmp158 = load i32, ptr @PL_sv_count, align 4 ; <i32> [#uses=0]
br label %cond_next165
cond_next165: ; preds = %bb157, %cond_next150
diff --git a/llvm/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll b/llvm/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll
index cb31c893c4fd5..9c720049bd84a 100644
--- a/llvm/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll
+++ b/llvm/test/Transforms/GVN/2007-07-25-InfiniteLoop.ll
@@ -1,15 +1,15 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
%struct.INT2 = type { i32, i32 }
- at blkshifts = external global %struct.INT2* ; <%struct.INT2**> [#uses=2]
+ at blkshifts = external global ptr ; <ptr> [#uses=2]
define i32 @xcompact() {
entry:
- store %struct.INT2* null, %struct.INT2** @blkshifts, align 4
+ store ptr null, ptr @blkshifts, align 4
br label %bb
bb: ; preds = %bb, %entry
- %tmp10 = load %struct.INT2*, %struct.INT2** @blkshifts, align 4 ; <%struct.INT2*> [#uses=0]
+ %tmp10 = load ptr, ptr @blkshifts, align 4 ; <ptr> [#uses=0]
; CHECK-NOT: %tmp10
br label %bb
}
diff --git a/llvm/test/Transforms/GVN/2007-07-25-Loop.ll b/llvm/test/Transforms/GVN/2007-07-25-Loop.ll
index a8f1dab0dfc09..7e33bee2801ba 100644
--- a/llvm/test/Transforms/GVN/2007-07-25-Loop.ll
+++ b/llvm/test/Transforms/GVN/2007-07-25-Loop.ll
@@ -2,7 +2,7 @@
%struct.s_segment_inf = type { float, i32, i16, i16, float, float, i32, float, float }
-define void @print_arch(i8* %arch_file, i32 %route_type, i64 %det_routing_arch.0.0, i64 %det_routing_arch.0.1, i64 %det_routing_arch.0.2, i64 %det_routing_arch.0.3, i64 %det_routing_arch.0.4, %struct.s_segment_inf* %segment_inf, i64 %timing_inf.0.0, i64 %timing_inf.0.1, i64 %timing_inf.0.2, i64 %timing_inf.0.3, i64 %timing_inf.0.4, i32 %timing_inf.1) {
+define void @print_arch(ptr %arch_file, i32 %route_type, i64 %det_routing_arch.0.0, i64 %det_routing_arch.0.1, i64 %det_routing_arch.0.2, i64 %det_routing_arch.0.3, i64 %det_routing_arch.0.4, ptr %segment_inf, i64 %timing_inf.0.0, i64 %timing_inf.0.1, i64 %timing_inf.0.2, i64 %timing_inf.0.3, i64 %timing_inf.0.4, i32 %timing_inf.1) {
entry:
br i1 false, label %bb278, label %bb344
@@ -10,6 +10,6 @@ bb278: ; preds = %bb278, %entry
br i1 false, label %bb278, label %bb344
bb344: ; preds = %bb278, %entry
- %tmp38758 = load i16, i16* null, align 2 ; <i16> [#uses=0]
+ %tmp38758 = load i16, ptr null, align 2 ; <i16> [#uses=0]
ret void
}
diff --git a/llvm/test/Transforms/GVN/2007-07-25-NestedLoop.ll b/llvm/test/Transforms/GVN/2007-07-25-NestedLoop.ll
index 10a1612d8cd4e..c2e7da0366161 100644
--- a/llvm/test/Transforms/GVN/2007-07-25-NestedLoop.ll
+++ b/llvm/test/Transforms/GVN/2007-07-25-NestedLoop.ll
@@ -1,38 +1,38 @@
; RUN: opt < %s -passes=gvn | llvm-dis
- %struct.TypHeader = type { i32, %struct.TypHeader**, [3 x i8], i8 }
+ %struct.TypHeader = type { i32, ptr, [3 x i8], i8 }
-define %struct.TypHeader* @LtRec(%struct.TypHeader* %hdL, %struct.TypHeader* %hdR) {
+define ptr @LtRec(ptr %hdL, ptr %hdR) {
entry:
br i1 false, label %bb556.preheader, label %bb534.preheader
bb534.preheader: ; preds = %entry
- ret %struct.TypHeader* null
+ ret ptr null
bb556.preheader: ; preds = %entry
- %tmp56119 = getelementptr %struct.TypHeader, %struct.TypHeader* %hdR, i32 0, i32 0 ; <i32*> [#uses=1]
- %tmp56220 = load i32, i32* %tmp56119 ; <i32> [#uses=0]
+ %tmp56119 = getelementptr %struct.TypHeader, ptr %hdR, i32 0, i32 0 ; <ptr> [#uses=1]
+ %tmp56220 = load i32, ptr %tmp56119 ; <i32> [#uses=0]
br i1 false, label %bb.nph23, label %bb675.preheader
bb.nph23: ; preds = %bb556.preheader
- ret %struct.TypHeader* null
+ ret ptr null
bb656: ; preds = %bb675.outer, %bb656
- %tmp678 = load i32, i32* %tmp677 ; <i32> [#uses=0]
+ %tmp678 = load i32, ptr %tmp677 ; <i32> [#uses=0]
br i1 false, label %bb684, label %bb656
bb684: ; preds = %bb675.outer, %bb656
br i1 false, label %bb924.preheader, label %bb675.outer
bb675.outer: ; preds = %bb675.preheader, %bb684
- %tmp67812 = load i32, i32* %tmp67711 ; <i32> [#uses=0]
+ %tmp67812 = load i32, ptr %tmp67711 ; <i32> [#uses=0]
br i1 false, label %bb684, label %bb656
bb675.preheader: ; preds = %bb556.preheader
- %tmp67711 = getelementptr %struct.TypHeader, %struct.TypHeader* %hdR, i32 0, i32 0 ; <i32*> [#uses=1]
- %tmp677 = getelementptr %struct.TypHeader, %struct.TypHeader* %hdR, i32 0, i32 0 ; <i32*> [#uses=1]
+ %tmp67711 = getelementptr %struct.TypHeader, ptr %hdR, i32 0, i32 0 ; <ptr> [#uses=1]
+ %tmp677 = getelementptr %struct.TypHeader, ptr %hdR, i32 0, i32 0 ; <ptr> [#uses=1]
br label %bb675.outer
bb924.preheader: ; preds = %bb684
- ret %struct.TypHeader* null
+ ret ptr null
}
diff --git a/llvm/test/Transforms/GVN/2007-07-25-SinglePredecessor.ll b/llvm/test/Transforms/GVN/2007-07-25-SinglePredecessor.ll
index 2a3e32ae95fad..f2e1da8323522 100644
--- a/llvm/test/Transforms/GVN/2007-07-25-SinglePredecessor.ll
+++ b/llvm/test/Transforms/GVN/2007-07-25-SinglePredecessor.ll
@@ -1,8 +1,8 @@
; RUN: opt < %s -passes=gvn | llvm-dis
- %struct.ggBRDF = type { i32 (...)** }
+ %struct.ggBRDF = type { ptr }
%struct.ggBox3 = type { %struct.ggPoint3, %struct.ggPoint3 }
- %struct.ggMaterialRecord = type { %struct.ggPoint2, %struct.ggBox3, %struct.ggBox3, %struct.ggSpectrum, %struct.ggSpectrum, %struct.ggSpectrum, %struct.ggBRDF*, i32, i32, i32, i32 }
+ %struct.ggMaterialRecord = type { %struct.ggPoint2, %struct.ggBox3, %struct.ggBox3, %struct.ggSpectrum, %struct.ggSpectrum, %struct.ggSpectrum, ptr, i32, i32, i32, i32 }
%struct.ggONB3 = type { %struct.ggPoint3, %struct.ggPoint3, %struct.ggPoint3 }
%struct.ggPoint2 = type { [2 x double] }
%struct.ggPoint3 = type { [3 x double] }
@@ -10,18 +10,18 @@
%struct.mrViewingHitRecord = type { double, %struct.ggPoint3, %struct.ggONB3, %struct.ggPoint2, double, %struct.ggSpectrum, %struct.ggSpectrum, i32, i32, i32, i32 }
%struct.mrXEllipticalCylinder = type { %struct.ggBRDF, float, float, float, float, float, float }
-define i32 @_ZNK21mrZEllipticalCylinder10viewingHitERK6ggRay3dddR18mrViewingHitRecordR16ggMaterialRecord(%struct.mrXEllipticalCylinder* %this, %struct.ggBox3* %ray, double %unnamed_arg, double %tmin, double %tmax, %struct.mrViewingHitRecord* %VHR, %struct.ggMaterialRecord* %unnamed_arg2) {
+define i32 @_ZNK21mrZEllipticalCylinder10viewingHitERK6ggRay3dddR18mrViewingHitRecordR16ggMaterialRecord(ptr %this, ptr %ray, double %unnamed_arg, double %tmin, double %tmax, ptr %VHR, ptr %unnamed_arg2) {
entry:
- %tmp80.i = getelementptr %struct.mrViewingHitRecord, %struct.mrViewingHitRecord* %VHR, i32 0, i32 1, i32 0, i32 0 ; <double*> [#uses=1]
- store double 0.000000e+00, double* %tmp80.i
+ %tmp80.i = getelementptr %struct.mrViewingHitRecord, ptr %VHR, i32 0, i32 1, i32 0, i32 0 ; <ptr> [#uses=1]
+ store double 0.000000e+00, ptr %tmp80.i
br i1 false, label %return, label %cond_next.i
cond_next.i: ; preds = %entry
br i1 false, label %return, label %cond_true
cond_true: ; preds = %cond_next.i
- %tmp3.i8 = getelementptr %struct.mrViewingHitRecord, %struct.mrViewingHitRecord* %VHR, i32 0, i32 1, i32 0, i32 0 ; <double*> [#uses=1]
- %tmp46 = load double, double* %tmp3.i8 ; <double> [#uses=0]
+ %tmp3.i8 = getelementptr %struct.mrViewingHitRecord, ptr %VHR, i32 0, i32 1, i32 0, i32 0 ; <ptr> [#uses=1]
+ %tmp46 = load double, ptr %tmp3.i8 ; <double> [#uses=0]
ret i32 1
return: ; preds = %cond_next.i, %entry
diff --git a/llvm/test/Transforms/GVN/2007-07-26-NonRedundant.ll b/llvm/test/Transforms/GVN/2007-07-26-NonRedundant.ll
index 32f7a7ad7c03b..1601c6b4c45c7 100644
--- a/llvm/test/Transforms/GVN/2007-07-26-NonRedundant.ll
+++ b/llvm/test/Transforms/GVN/2007-07-26-NonRedundant.ll
@@ -1,16 +1,16 @@
; RUN: opt < %s -passes=gvn | llvm-dis
- at bsLive = external global i32 ; <i32*> [#uses=2]
+ at bsLive = external global i32 ; <ptr> [#uses=2]
define i32 @bsR(i32 %n) {
entry:
br i1 false, label %cond_next, label %bb19
cond_next: ; preds = %entry
- store i32 0, i32* @bsLive, align 4
+ store i32 0, ptr @bsLive, align 4
br label %bb19
bb19: ; preds = %cond_next, %entry
- %tmp29 = load i32, i32* @bsLive, align 4 ; <i32> [#uses=0]
+ %tmp29 = load i32, ptr @bsLive, align 4 ; <i32> [#uses=0]
ret i32 0
}
diff --git a/llvm/test/Transforms/GVN/2007-07-26-PhiErasure.ll b/llvm/test/Transforms/GVN/2007-07-26-PhiErasure.ll
index 8aa5829423d50..6abdc122cd45f 100644
--- a/llvm/test/Transforms/GVN/2007-07-26-PhiErasure.ll
+++ b/llvm/test/Transforms/GVN/2007-07-26-PhiErasure.ll
@@ -1,15 +1,15 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
%struct..0anon = type { i32 }
- %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
+ %struct.FILE = type { ptr, i32, i32, i16, i16, %struct.__sbuf, i32, ptr, ptr, ptr, ptr, ptr, %struct.__sbuf, ptr, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
%struct.__sFILEX = type opaque
- %struct.__sbuf = type { i8*, i32 }
+ %struct.__sbuf = type { ptr, i32 }
%struct.rtx_def = type { i16, i8, i8, [1 x %struct..0anon] }
- at n_spills = external global i32 ; <i32*> [#uses=2]
+ at n_spills = external global i32 ; <ptr> [#uses=2]
-define i32 @reload(%struct.rtx_def* %first, i32 %global, %struct.FILE* %dumpfile) {
+define i32 @reload(ptr %first, i32 %global, ptr %dumpfile) {
cond_next2835.1: ; preds = %cond_next2861
- %tmp2922 = load i32, i32* @n_spills, align 4 ; <i32> [#uses=0]
+ %tmp2922 = load i32, ptr @n_spills, align 4 ; <i32> [#uses=0]
br label %bb2928
bb2928: ; preds = %cond_next2835.1, %cond_next2943
@@ -22,12 +22,12 @@ cond_next2943: ; preds = %cond_true2935, %bb2928
br i1 false, label %bb2982.preheader, label %bb2928
bb2982.preheader: ; preds = %cond_next2943
- %tmp298316 = load i32, i32* @n_spills, align 4 ; <i32> [#uses=0]
+ %tmp298316 = load i32, ptr @n_spills, align 4 ; <i32> [#uses=0]
ret i32 %tmp298316
}
-; CHECK: define i32 @reload(%struct.rtx_def* %first, i32 %global, %struct.FILE* %dumpfile) {
+; CHECK: define i32 @reload(ptr %first, i32 %global, ptr %dumpfile) {
; CHECK-NEXT: cond_next2835.1:
; CHECK-NEXT: br label %bb2928
; CHECK: bb2928:
@@ -39,6 +39,6 @@ bb2982.preheader: ; preds = %cond_next2943
; CHECK: cond_next2943:
; CHECK-NEXT: br i1 false, label %bb2982.preheader, label %bb2928
; CHECK: bb2982.preheader:
-; CHECK-NEXT: %tmp298316 = load i32, i32* @n_spills, align 4
+; CHECK-NEXT: %tmp298316 = load i32, ptr @n_spills, align 4
; CHECK-NEXT: ret i32 %tmp298316
; CHECK-NEXT: }
diff --git a/llvm/test/Transforms/GVN/2007-07-30-PredIDom.ll b/llvm/test/Transforms/GVN/2007-07-30-PredIDom.ll
index a71a90df89ad5..45530a9f7dacc 100644
--- a/llvm/test/Transforms/GVN/2007-07-30-PredIDom.ll
+++ b/llvm/test/Transforms/GVN/2007-07-30-PredIDom.ll
@@ -1,14 +1,14 @@
; RUN: opt < %s -passes=gvn | llvm-dis
%"struct.Block::$_16" = type { i32 }
- %struct.Exp = type { %struct.Exp_*, i32, i32, i32, %struct.Exp*, %struct.Exp*, %"struct.Exp::$_10", %"struct.Block::$_16", %"struct.Exp::$_12" }
- %"struct.Exp::$_10" = type { %struct.Exp* }
- %"struct.Exp::$_12" = type { %struct.Exp** }
- %struct.Exp_ = type { i32, i32, i32, i32, %struct.Id* }
- %struct.Id = type { i8*, i32, i32, i32, %"struct.Id::$_13" }
+ %struct.Exp = type { ptr, i32, i32, i32, ptr, ptr, %"struct.Exp::$_10", %"struct.Block::$_16", %"struct.Exp::$_12" }
+ %"struct.Exp::$_10" = type { ptr }
+ %"struct.Exp::$_12" = type { ptr }
+ %struct.Exp_ = type { i32, i32, i32, i32, ptr }
+ %struct.Id = type { ptr, i32, i32, i32, %"struct.Id::$_13" }
%"struct.Id::$_13" = type { double }
-define i8* @_ZN3Exp8toStringEj(%struct.Exp* %this, i32 %nextpc) {
+define ptr @_ZN3Exp8toStringEj(ptr %this, i32 %nextpc) {
entry:
switch i32 0, label %bb970 [
i32 1, label %bb
@@ -23,7 +23,7 @@ entry:
]
bb: ; preds = %entry
- store i8* null, i8** null
+ store ptr null, ptr null
br label %return
bb39: ; preds = %entry
@@ -66,7 +66,7 @@ cond_true189: ; preds = %cond_next181
br label %cond_next191
cond_next191: ; preds = %cond_true189, %cond_next181
- store i8* null, i8** null
+ store ptr null, ptr null
br label %return
bb195: ; preds = %entry
@@ -85,7 +85,7 @@ cond_true265: ; preds = %cond_next252
br label %cond_next267
cond_next267: ; preds = %cond_true265, %cond_next252
- store i8* null, i8** null
+ store ptr null, ptr null
br label %return
bb270: ; preds = %entry
@@ -125,7 +125,7 @@ cond_true413: ; preds = %cond_next408
br label %cond_next415
cond_next415: ; preds = %cond_true413, %cond_next408
- store i8* null, i8** null
+ store ptr null, ptr null
br label %return
bb418: ; preds = %entry
@@ -180,7 +180,7 @@ cond_true628: ; preds = %cond_next623
br label %cond_next630
cond_next630: ; preds = %cond_true628, %cond_next623
- store i8* null, i8** null
+ store ptr null, ptr null
br label %return
bb633: ; preds = %entry
@@ -223,7 +223,7 @@ cond_true805: ; preds = %cond_next791
br label %cond_next807
cond_next807: ; preds = %cond_true805, %cond_next791
- store i8* null, i8** null
+ store ptr null, ptr null
br label %return
bb810: ; preds = %entry
@@ -239,7 +239,7 @@ cond_true877: ; preds = %cond_next872
br label %cond_next879
cond_next879: ; preds = %cond_true877, %cond_next872
- store i8* null, i8** null
+ store ptr null, ptr null
br label %return
bb882: ; preds = %entry
@@ -249,7 +249,7 @@ cond_true920: ; preds = %bb882
br label %cond_next922
cond_next922: ; preds = %cond_true920, %bb882
- store i8* null, i8** null
+ store ptr null, ptr null
br label %return
bb925: ; preds = %entry
@@ -259,16 +259,16 @@ cond_true965: ; preds = %bb925
br label %cond_next967
cond_next967: ; preds = %cond_true965, %bb925
- store i8* null, i8** null
+ store ptr null, ptr null
br label %return
bb970: ; preds = %entry
unreachable
; No predecessors!
- store i8* null, i8** null
+ store ptr null, ptr null
br label %return
return: ; preds = %0, %cond_next967, %cond_next922, %cond_next879, %cond_next807, %cond_next630, %cond_next415, %cond_next267, %cond_next191, %bb
- %retval980 = load i8*, i8** null ; <i8*> [#uses=1]
- ret i8* %retval980
+ %retval980 = load ptr, ptr null ; <ptr> [#uses=1]
+ ret ptr %retval980
}
diff --git a/llvm/test/Transforms/GVN/2007-07-31-NoDomInherit.ll b/llvm/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
index 94c0d17d7332d..b56ccc128bd6b 100644
--- a/llvm/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
+++ b/llvm/test/Transforms/GVN/2007-07-31-NoDomInherit.ll
@@ -1,68 +1,68 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
- %struct.anon = type { i32 (i32, i32, i32)*, i32, i32, [3 x i32], i8*, i8*, i8* }
- at debug = external constant i32 ; <i32*> [#uses=0]
- at counters = external constant i32 ; <i32*> [#uses=1]
- at trialx = external global [17 x i32] ; <[17 x i32]*> [#uses=1]
- at dummy1 = external global [7 x i32] ; <[7 x i32]*> [#uses=0]
- at dummy2 = external global [4 x i32] ; <[4 x i32]*> [#uses=0]
- at unacceptable = external global i32 ; <i32*> [#uses=0]
- at isa = external global [13 x %struct.anon] ; <[13 x %struct.anon]*> [#uses=3]
- at .str = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str1 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
- at .str2 = external constant [1 x i8] ; <[1 x i8]*> [#uses=0]
- at .str3 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str4 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
- at .str5 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str6 = external constant [2 x i8] ; <[2 x i8]*> [#uses=0]
- at .str7 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str8 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str9 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str10 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str11 = external constant [2 x i8] ; <[2 x i8]*> [#uses=0]
- at .str12 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str13 = external constant [2 x i8] ; <[2 x i8]*> [#uses=0]
- at .str14 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
- at .str15 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
- at .str16 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str17 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str18 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
- at .str19 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str20 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str21 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str22 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str23 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
- at .str24 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str25 = external constant [6 x i8] ; <[6 x i8]*> [#uses=0]
- at .str26 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
- at .str27 = external constant [6 x i8] ; <[6 x i8]*> [#uses=0]
- at r = external global [17 x i32] ; <[17 x i32]*> [#uses=0]
- at .str28 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
- at .str29 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
- at pgm = external global [5 x { i32, [3 x i32] }] ; <[5 x { i32, [3 x i32] }]*> [#uses=4]
- at .str30 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
- at .str31 = external constant [13 x i8] ; <[13 x i8]*> [#uses=0]
- at .str32 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
- at .str33 = external constant [4 x i8] ; <[4 x i8]*> [#uses=0]
- at .str34 = external constant [20 x i8] ; <[20 x i8]*> [#uses=0]
- at numi = external global i32 ; <i32*> [#uses=7]
- at .str35 = external constant [10 x i8] ; <[10 x i8]*> [#uses=0]
- at counter = external global [5 x i32] ; <[5 x i32]*> [#uses=2]
- at itrialx.2510 = external global i32 ; <i32*> [#uses=0]
- at .str36 = external constant [43 x i8] ; <[43 x i8]*> [#uses=0]
- at .str37 = external constant [42 x i8] ; <[42 x i8]*> [#uses=0]
- at corr_result = external global i32 ; <i32*> [#uses=0]
- at .str38 = external constant [3 x i8] ; <[3 x i8]*> [#uses=0]
- at .str39 = external constant [5 x i8] ; <[5 x i8]*> [#uses=0]
- at .str40 = external constant [47 x i8] ; <[47 x i8]*> [#uses=0]
- at correct_result = external global [17 x i32] ; <[17 x i32]*> [#uses=1]
- at .str41 = external constant [46 x i8] ; <[46 x i8]*> [#uses=0]
- at .str42 = external constant [32 x i8] ; <[32 x i8]*> [#uses=0]
- at .str43 = external constant [44 x i8] ; <[44 x i8]*> [#uses=1]
- at .str44 = external constant [21 x i8] ; <[21 x i8]*> [#uses=1]
- at .str45 = external constant [12 x i8] ; <[12 x i8]*> [#uses=1]
- at .str46 = external constant [5 x i8] ; <[5 x i8]*> [#uses=1]
- at .str47 = external constant [12 x i8] ; <[12 x i8]*> [#uses=1]
+ %struct.anon = type { ptr, i32, i32, [3 x i32], ptr, ptr, ptr }
+ at debug = external constant i32 ; <ptr> [#uses=0]
+ at counters = external constant i32 ; <ptr> [#uses=1]
+ at trialx = external global [17 x i32] ; <ptr> [#uses=1]
+ at dummy1 = external global [7 x i32] ; <ptr> [#uses=0]
+ at dummy2 = external global [4 x i32] ; <ptr> [#uses=0]
+ at unacceptable = external global i32 ; <ptr> [#uses=0]
+ at isa = external global [13 x %struct.anon] ; <ptr> [#uses=3]
+ at .str = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str1 = external constant [3 x i8] ; <ptr> [#uses=0]
+ at .str2 = external constant [1 x i8] ; <ptr> [#uses=0]
+ at .str3 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str4 = external constant [3 x i8] ; <ptr> [#uses=0]
+ at .str5 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str6 = external constant [2 x i8] ; <ptr> [#uses=0]
+ at .str7 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str8 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str9 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str10 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str11 = external constant [2 x i8] ; <ptr> [#uses=0]
+ at .str12 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str13 = external constant [2 x i8] ; <ptr> [#uses=0]
+ at .str14 = external constant [5 x i8] ; <ptr> [#uses=0]
+ at .str15 = external constant [5 x i8] ; <ptr> [#uses=0]
+ at .str16 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str17 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str18 = external constant [3 x i8] ; <ptr> [#uses=0]
+ at .str19 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str20 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str21 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str22 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str23 = external constant [5 x i8] ; <ptr> [#uses=0]
+ at .str24 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str25 = external constant [6 x i8] ; <ptr> [#uses=0]
+ at .str26 = external constant [5 x i8] ; <ptr> [#uses=0]
+ at .str27 = external constant [6 x i8] ; <ptr> [#uses=0]
+ at r = external global [17 x i32] ; <ptr> [#uses=0]
+ at .str28 = external constant [3 x i8] ; <ptr> [#uses=0]
+ at .str29 = external constant [5 x i8] ; <ptr> [#uses=0]
+ at pgm = external global [5 x { i32, [3 x i32] }] ; <ptr> [#uses=4]
+ at .str30 = external constant [3 x i8] ; <ptr> [#uses=0]
+ at .str31 = external constant [13 x i8] ; <ptr> [#uses=0]
+ at .str32 = external constant [3 x i8] ; <ptr> [#uses=0]
+ at .str33 = external constant [4 x i8] ; <ptr> [#uses=0]
+ at .str34 = external constant [20 x i8] ; <ptr> [#uses=0]
+ at numi = external global i32 ; <ptr> [#uses=7]
+ at .str35 = external constant [10 x i8] ; <ptr> [#uses=0]
+ at counter = external global [5 x i32] ; <ptr> [#uses=2]
+ at itrialx.2510 = external global i32 ; <ptr> [#uses=0]
+ at .str36 = external constant [43 x i8] ; <ptr> [#uses=0]
+ at .str37 = external constant [42 x i8] ; <ptr> [#uses=0]
+ at corr_result = external global i32 ; <ptr> [#uses=0]
+ at .str38 = external constant [3 x i8] ; <ptr> [#uses=0]
+ at .str39 = external constant [5 x i8] ; <ptr> [#uses=0]
+ at .str40 = external constant [47 x i8] ; <ptr> [#uses=0]
+ at correct_result = external global [17 x i32] ; <ptr> [#uses=1]
+ at .str41 = external constant [46 x i8] ; <ptr> [#uses=0]
+ at .str42 = external constant [32 x i8] ; <ptr> [#uses=0]
+ at .str43 = external constant [44 x i8] ; <ptr> [#uses=1]
+ at .str44 = external constant [21 x i8] ; <ptr> [#uses=1]
+ at .str45 = external constant [12 x i8] ; <ptr> [#uses=1]
+ at .str46 = external constant [5 x i8] ; <ptr> [#uses=1]
+ at .str47 = external constant [12 x i8] ; <ptr> [#uses=1]
declare i32 @neg(i32, i32, i32)
@@ -112,7 +112,7 @@ declare i32 @selle(i32, i32, i32)
declare void @print_expr(i32)
-declare i32 @printf(i8*, ...)
+declare i32 @printf(ptr, ...)
declare i32 @putchar(i32)
@@ -122,7 +122,7 @@ declare void @simulate_one_instruction(i32)
declare i32 @check(i32)
-declare i32 @puts(i8*)
+declare i32 @puts(ptr)
declare void @fix_operands(i32)
@@ -132,96 +132,96 @@ declare i32 @increment()
declare i32 @search()
-define i32 @main(i32 %argc, i8** %argv) {
+define i32 @main(i32 %argc, ptr %argv) {
entry:
- %argc_addr = alloca i32 ; <i32*> [#uses=1]
- %argv_addr = alloca i8** ; <i8***> [#uses=1]
- %retval = alloca i32, align 4 ; <i32*> [#uses=2]
- %tmp = alloca i32, align 4 ; <i32*> [#uses=2]
- %i = alloca i32, align 4 ; <i32*> [#uses=21]
- %num_sol = alloca i32, align 4 ; <i32*> [#uses=4]
- %total = alloca i32, align 4 ; <i32*> [#uses=4]
+ %argc_addr = alloca i32 ; <ptr> [#uses=1]
+ %argv_addr = alloca ptr ; <ptr> [#uses=1]
+ %retval = alloca i32, align 4 ; <ptr> [#uses=2]
+ %tmp = alloca i32, align 4 ; <ptr> [#uses=2]
+ %i = alloca i32, align 4 ; <ptr> [#uses=21]
+ %num_sol = alloca i32, align 4 ; <ptr> [#uses=4]
+ %total = alloca i32, align 4 ; <ptr> [#uses=4]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- store i32 %argc, i32* %argc_addr
- store i8** %argv, i8*** %argv_addr
- store i32 0, i32* %num_sol
- store i32 1, i32* @numi
+ store i32 %argc, ptr %argc_addr
+ store ptr %argv, ptr %argv_addr
+ store i32 0, ptr %num_sol
+ store i32 1, ptr @numi
br label %bb91
bb: ; preds = %cond_next97
- %tmp1 = load i32, i32* @numi ; <i32> [#uses=1]
- %tmp2 = getelementptr [44 x i8], [44 x i8]* @.str43, i32 0, i32 0 ; <i8*> [#uses=1]
- %tmp3 = call i32 (i8*, ...) @printf( i8* %tmp2, i32 %tmp1 ) ; <i32> [#uses=0]
- store i32 0, i32* %i
+ %tmp1 = load i32, ptr @numi ; <i32> [#uses=1]
+ %tmp2 = getelementptr [44 x i8], ptr @.str43, i32 0, i32 0 ; <ptr> [#uses=1]
+ %tmp3 = call i32 (ptr, ...) @printf( ptr %tmp2, i32 %tmp1 ) ; <i32> [#uses=0]
+ store i32 0, ptr %i
br label %bb13
bb4: ; preds = %bb13
- %tmp5 = load i32, i32* %i ; <i32> [#uses=1]
- %tmp6 = load i32, i32* %i ; <i32> [#uses=1]
- %tmp7 = getelementptr [17 x i32], [17 x i32]* @trialx, i32 0, i32 %tmp6 ; <i32*> [#uses=1]
- %tmp8 = load i32, i32* %tmp7 ; <i32> [#uses=1]
+ %tmp5 = load i32, ptr %i ; <i32> [#uses=1]
+ %tmp6 = load i32, ptr %i ; <i32> [#uses=1]
+ %tmp7 = getelementptr [17 x i32], ptr @trialx, i32 0, i32 %tmp6 ; <ptr> [#uses=1]
+ %tmp8 = load i32, ptr %tmp7 ; <i32> [#uses=1]
%tmp9 = call i32 @userfun( i32 %tmp8 ) ; <i32> [#uses=1]
- %tmp10 = getelementptr [17 x i32], [17 x i32]* @correct_result, i32 0, i32 %tmp5 ; <i32*> [#uses=1]
- store i32 %tmp9, i32* %tmp10
- %tmp11 = load i32, i32* %i ; <i32> [#uses=1]
+ %tmp10 = getelementptr [17 x i32], ptr @correct_result, i32 0, i32 %tmp5 ; <ptr> [#uses=1]
+ store i32 %tmp9, ptr %tmp10
+ %tmp11 = load i32, ptr %i ; <i32> [#uses=1]
%tmp12 = add i32 %tmp11, 1 ; <i32> [#uses=1]
- store i32 %tmp12, i32* %i
+ store i32 %tmp12, ptr %i
br label %bb13
bb13: ; preds = %bb4, %bb
- %tmp14 = load i32, i32* %i ; <i32> [#uses=1]
+ %tmp14 = load i32, ptr %i ; <i32> [#uses=1]
%tmp15 = icmp sle i32 %tmp14, 16 ; <i1> [#uses=1]
%tmp1516 = zext i1 %tmp15 to i32 ; <i32> [#uses=1]
%toBool = icmp ne i32 %tmp1516, 0 ; <i1> [#uses=1]
br i1 %toBool, label %bb4, label %bb17
bb17: ; preds = %bb13
- store i32 0, i32* %i
+ store i32 0, ptr %i
br label %bb49
bb18: ; preds = %bb49
- %tmp19 = load i32, i32* %i ; <i32> [#uses=1]
- %tmp20 = getelementptr [5 x { i32, [3 x i32] }], [5 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %tmp19 ; <{ i32, [3 x i32] }*> [#uses=1]
- %tmp21 = getelementptr { i32, [3 x i32] }, { i32, [3 x i32] }* %tmp20, i32 0, i32 0 ; <i32*> [#uses=1]
- store i32 0, i32* %tmp21
- %tmp22 = load i32, i32* %i ; <i32> [#uses=1]
- %tmp23 = getelementptr [13 x %struct.anon], [13 x %struct.anon]* @isa, i32 0, i32 0 ; <%struct.anon*> [#uses=1]
- %tmp24 = getelementptr %struct.anon, %struct.anon* %tmp23, i32 0, i32 3 ; <[3 x i32]*> [#uses=1]
- %tmp25 = getelementptr [3 x i32], [3 x i32]* %tmp24, i32 0, i32 0 ; <i32*> [#uses=1]
- %tmp26 = load i32, i32* %tmp25 ; <i32> [#uses=1]
- %tmp27 = getelementptr [5 x { i32, [3 x i32] }], [5 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %tmp22 ; <{ i32, [3 x i32] }*> [#uses=1]
- %tmp28 = getelementptr { i32, [3 x i32] }, { i32, [3 x i32] }* %tmp27, i32 0, i32 1 ; <[3 x i32]*> [#uses=1]
- %tmp29 = getelementptr [3 x i32], [3 x i32]* %tmp28, i32 0, i32 0 ; <i32*> [#uses=1]
- store i32 %tmp26, i32* %tmp29
- %tmp30 = load i32, i32* %i ; <i32> [#uses=1]
- %tmp31 = getelementptr [13 x %struct.anon], [13 x %struct.anon]* @isa, i32 0, i32 0 ; <%struct.anon*> [#uses=1]
- %tmp32 = getelementptr %struct.anon, %struct.anon* %tmp31, i32 0, i32 3 ; <[3 x i32]*> [#uses=1]
- %tmp33 = getelementptr [3 x i32], [3 x i32]* %tmp32, i32 0, i32 1 ; <i32*> [#uses=1]
- %tmp34 = load i32, i32* %tmp33 ; <i32> [#uses=1]
- %tmp35 = getelementptr [5 x { i32, [3 x i32] }], [5 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %tmp30 ; <{ i32, [3 x i32] }*> [#uses=1]
- %tmp36 = getelementptr { i32, [3 x i32] }, { i32, [3 x i32] }* %tmp35, i32 0, i32 1 ; <[3 x i32]*> [#uses=1]
- %tmp37 = getelementptr [3 x i32], [3 x i32]* %tmp36, i32 0, i32 1 ; <i32*> [#uses=1]
- store i32 %tmp34, i32* %tmp37
- %tmp38 = load i32, i32* %i ; <i32> [#uses=1]
- %tmp39 = getelementptr [13 x %struct.anon], [13 x %struct.anon]* @isa, i32 0, i32 0 ; <%struct.anon*> [#uses=1]
- %tmp40 = getelementptr %struct.anon, %struct.anon* %tmp39, i32 0, i32 3 ; <[3 x i32]*> [#uses=1]
- %tmp41 = getelementptr [3 x i32], [3 x i32]* %tmp40, i32 0, i32 2 ; <i32*> [#uses=1]
- %tmp42 = load i32, i32* %tmp41 ; <i32> [#uses=1]
- %tmp43 = getelementptr [5 x { i32, [3 x i32] }], [5 x { i32, [3 x i32] }]* @pgm, i32 0, i32 %tmp38 ; <{ i32, [3 x i32] }*> [#uses=1]
- %tmp44 = getelementptr { i32, [3 x i32] }, { i32, [3 x i32] }* %tmp43, i32 0, i32 1 ; <[3 x i32]*> [#uses=1]
- %tmp45 = getelementptr [3 x i32], [3 x i32]* %tmp44, i32 0, i32 2 ; <i32*> [#uses=1]
- store i32 %tmp42, i32* %tmp45
- %tmp46 = load i32, i32* %i ; <i32> [#uses=1]
+ %tmp19 = load i32, ptr %i ; <i32> [#uses=1]
+ %tmp20 = getelementptr [5 x { i32, [3 x i32] }], ptr @pgm, i32 0, i32 %tmp19 ; <ptr> [#uses=1]
+ %tmp21 = getelementptr { i32, [3 x i32] }, ptr %tmp20, i32 0, i32 0 ; <ptr> [#uses=1]
+ store i32 0, ptr %tmp21
+ %tmp22 = load i32, ptr %i ; <i32> [#uses=1]
+ %tmp23 = getelementptr [13 x %struct.anon], ptr @isa, i32 0, i32 0 ; <ptr> [#uses=1]
+ %tmp24 = getelementptr %struct.anon, ptr %tmp23, i32 0, i32 3 ; <ptr> [#uses=1]
+ %tmp25 = getelementptr [3 x i32], ptr %tmp24, i32 0, i32 0 ; <ptr> [#uses=1]
+ %tmp26 = load i32, ptr %tmp25 ; <i32> [#uses=1]
+ %tmp27 = getelementptr [5 x { i32, [3 x i32] }], ptr @pgm, i32 0, i32 %tmp22 ; <ptr> [#uses=1]
+ %tmp28 = getelementptr { i32, [3 x i32] }, ptr %tmp27, i32 0, i32 1 ; <ptr> [#uses=1]
+ %tmp29 = getelementptr [3 x i32], ptr %tmp28, i32 0, i32 0 ; <ptr> [#uses=1]
+ store i32 %tmp26, ptr %tmp29
+ %tmp30 = load i32, ptr %i ; <i32> [#uses=1]
+ %tmp31 = getelementptr [13 x %struct.anon], ptr @isa, i32 0, i32 0 ; <ptr> [#uses=1]
+ %tmp32 = getelementptr %struct.anon, ptr %tmp31, i32 0, i32 3 ; <ptr> [#uses=1]
+ %tmp33 = getelementptr [3 x i32], ptr %tmp32, i32 0, i32 1 ; <ptr> [#uses=1]
+ %tmp34 = load i32, ptr %tmp33 ; <i32> [#uses=1]
+ %tmp35 = getelementptr [5 x { i32, [3 x i32] }], ptr @pgm, i32 0, i32 %tmp30 ; <ptr> [#uses=1]
+ %tmp36 = getelementptr { i32, [3 x i32] }, ptr %tmp35, i32 0, i32 1 ; <ptr> [#uses=1]
+ %tmp37 = getelementptr [3 x i32], ptr %tmp36, i32 0, i32 1 ; <ptr> [#uses=1]
+ store i32 %tmp34, ptr %tmp37
+ %tmp38 = load i32, ptr %i ; <i32> [#uses=1]
+ %tmp39 = getelementptr [13 x %struct.anon], ptr @isa, i32 0, i32 0 ; <ptr> [#uses=1]
+ %tmp40 = getelementptr %struct.anon, ptr %tmp39, i32 0, i32 3 ; <ptr> [#uses=1]
+ %tmp41 = getelementptr [3 x i32], ptr %tmp40, i32 0, i32 2 ; <ptr> [#uses=1]
+ %tmp42 = load i32, ptr %tmp41 ; <i32> [#uses=1]
+ %tmp43 = getelementptr [5 x { i32, [3 x i32] }], ptr @pgm, i32 0, i32 %tmp38 ; <ptr> [#uses=1]
+ %tmp44 = getelementptr { i32, [3 x i32] }, ptr %tmp43, i32 0, i32 1 ; <ptr> [#uses=1]
+ %tmp45 = getelementptr [3 x i32], ptr %tmp44, i32 0, i32 2 ; <ptr> [#uses=1]
+ store i32 %tmp42, ptr %tmp45
+ %tmp46 = load i32, ptr %i ; <i32> [#uses=1]
call void @fix_operands( i32 %tmp46 )
- %tmp47 = load i32, i32* %i ; <i32> [#uses=1]
+ %tmp47 = load i32, ptr %i ; <i32> [#uses=1]
; CHECK: %tmp47 = phi i32 [ %tmp48, %bb18 ], [ 0, %bb17 ]
%tmp48 = add i32 %tmp47, 1 ; <i32> [#uses=1]
- store i32 %tmp48, i32* %i
+ store i32 %tmp48, ptr %i
br label %bb49
bb49: ; preds = %bb18, %bb17
- %tmp50 = load i32, i32* @numi ; <i32> [#uses=1]
- %tmp51 = load i32, i32* %i ; <i32> [#uses=1]
+ %tmp50 = load i32, ptr @numi ; <i32> [#uses=1]
+ %tmp51 = load i32, ptr %i ; <i32> [#uses=1]
%tmp52 = icmp slt i32 %tmp51, %tmp50 ; <i1> [#uses=1]
%tmp5253 = zext i1 %tmp52 to i32 ; <i32> [#uses=1]
%toBool54 = icmp ne i32 %tmp5253, 0 ; <i1> [#uses=1]
@@ -229,62 +229,62 @@ bb49: ; preds = %bb18, %bb17
bb55: ; preds = %bb49
%tmp56 = call i32 @search( ) ; <i32> [#uses=1]
- store i32 %tmp56, i32* %num_sol
- %tmp57 = getelementptr [21 x i8], [21 x i8]* @.str44, i32 0, i32 0 ; <i8*> [#uses=1]
- %tmp58 = load i32, i32* %num_sol ; <i32> [#uses=1]
- %tmp59 = call i32 (i8*, ...) @printf( i8* %tmp57, i32 %tmp58 ) ; <i32> [#uses=0]
- %tmp60 = load i32, i32* @counters ; <i32> [#uses=1]
+ store i32 %tmp56, ptr %num_sol
+ %tmp57 = getelementptr [21 x i8], ptr @.str44, i32 0, i32 0 ; <ptr> [#uses=1]
+ %tmp58 = load i32, ptr %num_sol ; <i32> [#uses=1]
+ %tmp59 = call i32 (ptr, ...) @printf( ptr %tmp57, i32 %tmp58 ) ; <i32> [#uses=0]
+ %tmp60 = load i32, ptr @counters ; <i32> [#uses=1]
%tmp61 = icmp ne i32 %tmp60, 0 ; <i1> [#uses=1]
%tmp6162 = zext i1 %tmp61 to i32 ; <i32> [#uses=1]
%toBool63 = icmp ne i32 %tmp6162, 0 ; <i1> [#uses=1]
br i1 %toBool63, label %cond_true, label %cond_next
cond_true: ; preds = %bb55
- store i32 0, i32* %total
- %tmp64 = getelementptr [12 x i8], [12 x i8]* @.str45, i32 0, i32 0 ; <i8*> [#uses=1]
- %tmp65 = call i32 (i8*, ...) @printf( i8* %tmp64 ) ; <i32> [#uses=0]
- store i32 0, i32* %i
+ store i32 0, ptr %total
+ %tmp64 = getelementptr [12 x i8], ptr @.str45, i32 0, i32 0 ; <ptr> [#uses=1]
+ %tmp65 = call i32 (ptr, ...) @printf( ptr %tmp64 ) ; <i32> [#uses=0]
+ store i32 0, ptr %i
br label %bb79
bb66: ; preds = %bb79
- %tmp67 = load i32, i32* %i ; <i32> [#uses=1]
- %tmp68 = getelementptr [5 x i32], [5 x i32]* @counter, i32 0, i32 %tmp67 ; <i32*> [#uses=1]
- %tmp69 = load i32, i32* %tmp68 ; <i32> [#uses=1]
- %tmp70 = getelementptr [5 x i8], [5 x i8]* @.str46, i32 0, i32 0 ; <i8*> [#uses=1]
- %tmp71 = call i32 (i8*, ...) @printf( i8* %tmp70, i32 %tmp69 ) ; <i32> [#uses=0]
- %tmp72 = load i32, i32* %i ; <i32> [#uses=1]
- %tmp73 = getelementptr [5 x i32], [5 x i32]* @counter, i32 0, i32 %tmp72 ; <i32*> [#uses=1]
- %tmp74 = load i32, i32* %tmp73 ; <i32> [#uses=1]
- %tmp75 = load i32, i32* %total ; <i32> [#uses=1]
+ %tmp67 = load i32, ptr %i ; <i32> [#uses=1]
+ %tmp68 = getelementptr [5 x i32], ptr @counter, i32 0, i32 %tmp67 ; <ptr> [#uses=1]
+ %tmp69 = load i32, ptr %tmp68 ; <i32> [#uses=1]
+ %tmp70 = getelementptr [5 x i8], ptr @.str46, i32 0, i32 0 ; <ptr> [#uses=1]
+ %tmp71 = call i32 (ptr, ...) @printf( ptr %tmp70, i32 %tmp69 ) ; <i32> [#uses=0]
+ %tmp72 = load i32, ptr %i ; <i32> [#uses=1]
+ %tmp73 = getelementptr [5 x i32], ptr @counter, i32 0, i32 %tmp72 ; <ptr> [#uses=1]
+ %tmp74 = load i32, ptr %tmp73 ; <i32> [#uses=1]
+ %tmp75 = load i32, ptr %total ; <i32> [#uses=1]
%tmp76 = add i32 %tmp74, %tmp75 ; <i32> [#uses=1]
- store i32 %tmp76, i32* %total
- %tmp77 = load i32, i32* %i ; <i32> [#uses=1]
+ store i32 %tmp76, ptr %total
+ %tmp77 = load i32, ptr %i ; <i32> [#uses=1]
%tmp78 = add i32 %tmp77, 1 ; <i32> [#uses=1]
- store i32 %tmp78, i32* %i
+ store i32 %tmp78, ptr %i
br label %bb79
bb79: ; preds = %bb66, %cond_true
- %tmp80 = load i32, i32* @numi ; <i32> [#uses=1]
- %tmp81 = load i32, i32* %i ; <i32> [#uses=1]
+ %tmp80 = load i32, ptr @numi ; <i32> [#uses=1]
+ %tmp81 = load i32, ptr %i ; <i32> [#uses=1]
%tmp82 = icmp slt i32 %tmp81, %tmp80 ; <i1> [#uses=1]
%tmp8283 = zext i1 %tmp82 to i32 ; <i32> [#uses=1]
%toBool84 = icmp ne i32 %tmp8283, 0 ; <i1> [#uses=1]
br i1 %toBool84, label %bb66, label %bb85
bb85: ; preds = %bb79
- %tmp86 = getelementptr [12 x i8], [12 x i8]* @.str47, i32 0, i32 0 ; <i8*> [#uses=1]
- %tmp87 = load i32, i32* %total ; <i32> [#uses=1]
- %tmp88 = call i32 (i8*, ...) @printf( i8* %tmp86, i32 %tmp87 ) ; <i32> [#uses=0]
+ %tmp86 = getelementptr [12 x i8], ptr @.str47, i32 0, i32 0 ; <ptr> [#uses=1]
+ %tmp87 = load i32, ptr %total ; <i32> [#uses=1]
+ %tmp88 = call i32 (ptr, ...) @printf( ptr %tmp86, i32 %tmp87 ) ; <i32> [#uses=0]
br label %cond_next
cond_next: ; preds = %bb85, %bb55
- %tmp89 = load i32, i32* @numi ; <i32> [#uses=1]
+ %tmp89 = load i32, ptr @numi ; <i32> [#uses=1]
%tmp90 = add i32 %tmp89, 1 ; <i32> [#uses=1]
- store i32 %tmp90, i32* @numi
+ store i32 %tmp90, ptr @numi
br label %bb91
bb91: ; preds = %cond_next, %entry
- %tmp92 = load i32, i32* @numi ; <i32> [#uses=1]
+ %tmp92 = load i32, ptr @numi ; <i32> [#uses=1]
%tmp93 = icmp sgt i32 %tmp92, 5 ; <i1> [#uses=1]
%tmp9394 = zext i1 %tmp93 to i32 ; <i32> [#uses=1]
%toBool95 = icmp ne i32 %tmp9394, 0 ; <i1> [#uses=1]
@@ -294,20 +294,20 @@ cond_true96: ; preds = %bb91
br label %bb102
cond_next97: ; preds = %bb91
- %tmp98 = load i32, i32* %num_sol ; <i32> [#uses=1]
+ %tmp98 = load i32, ptr %num_sol ; <i32> [#uses=1]
%tmp99 = icmp eq i32 %tmp98, 0 ; <i1> [#uses=1]
%tmp99100 = zext i1 %tmp99 to i32 ; <i32> [#uses=1]
%toBool101 = icmp ne i32 %tmp99100, 0 ; <i1> [#uses=1]
br i1 %toBool101, label %bb, label %bb102
bb102: ; preds = %cond_next97, %cond_true96
- store i32 0, i32* %tmp
- %tmp103 = load i32, i32* %tmp ; <i32> [#uses=1]
- store i32 %tmp103, i32* %retval
+ store i32 0, ptr %tmp
+ %tmp103 = load i32, ptr %tmp ; <i32> [#uses=1]
+ store i32 %tmp103, ptr %retval
br label %return
return: ; preds = %bb102
- %retval104 = load i32, i32* %retval ; <i32> [#uses=1]
+ %retval104 = load i32, ptr %retval ; <i32> [#uses=1]
ret i32 %retval104
}
diff --git a/llvm/test/Transforms/GVN/2007-07-31-RedundantPhi.ll b/llvm/test/Transforms/GVN/2007-07-31-RedundantPhi.ll
index 2109e91b8f0ab..b05aebfa8f451 100644
--- a/llvm/test/Transforms/GVN/2007-07-31-RedundantPhi.ll
+++ b/llvm/test/Transforms/GVN/2007-07-31-RedundantPhi.ll
@@ -1,10 +1,10 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
- at img_width = external global i16 ; <i16*> [#uses=2]
+ at img_width = external global i16 ; <ptr> [#uses=2]
-define i32 @smpUMHEXBipredIntegerPelBlockMotionSearch(i16* %cur_pic, i16 signext %ref, i32 %list, i32 %pic_pix_x, i32 %pic_pix_y, i32 %blocktype, i16 signext %pred_mv_x1, i16 signext %pred_mv_y1, i16 signext %pred_mv_x2, i16 signext %pred_mv_y2, i16* %mv_x, i16* %mv_y, i16* %s_mv_x, i16* %s_mv_y, i32 %search_range, i32 %min_mcost, i32 %lambda_factor) {
+define i32 @smpUMHEXBipredIntegerPelBlockMotionSearch(ptr %cur_pic, i16 signext %ref, i32 %list, i32 %pic_pix_x, i32 %pic_pix_y, i32 %blocktype, i16 signext %pred_mv_x1, i16 signext %pred_mv_y1, i16 signext %pred_mv_x2, i16 signext %pred_mv_y2, ptr %mv_x, ptr %mv_y, ptr %s_mv_x, ptr %s_mv_y, i32 %search_range, i32 %min_mcost, i32 %lambda_factor) {
cond_next143: ; preds = %entry
- store i16 0, i16* @img_width, align 2
+ store i16 0, ptr @img_width, align 2
br i1 false, label %cond_next449, label %cond_false434
cond_false434: ; preds = %cond_true415
@@ -17,7 +17,7 @@ cond_false470: ; preds = %cond_next449
br label %cond_next698
cond_next698: ; preds = %cond_true492
- %tmp701 = load i16, i16* @img_width, align 2 ; <i16> [#uses=0]
+ %tmp701 = load i16, ptr @img_width, align 2 ; <i16> [#uses=0]
; CHECK-NOT: %tmp701 =
ret i32 0
}
diff --git a/llvm/test/Transforms/GVN/2008-02-12-UndefLoad.ll b/llvm/test/Transforms/GVN/2008-02-12-UndefLoad.ll
index 868299a75d39a..b9ddf5e8ad184 100644
--- a/llvm/test/Transforms/GVN/2008-02-12-UndefLoad.ll
+++ b/llvm/test/Transforms/GVN/2008-02-12-UndefLoad.ll
@@ -5,15 +5,15 @@
define i32 @a() {
entry:
- %c = alloca %struct.anon ; <%struct.anon*> [#uses=2]
- %tmp = getelementptr %struct.anon, %struct.anon* %c, i32 0, i32 0 ; <i32*> [#uses=1]
- %tmp1 = getelementptr i32, i32* %tmp, i32 1 ; <i32*> [#uses=2]
- %tmp2 = load i32, i32* %tmp1, align 4 ; <i32> [#uses=1]
+ %c = alloca %struct.anon ; <ptr> [#uses=2]
+ %tmp = getelementptr %struct.anon, ptr %c, i32 0, i32 0 ; <ptr> [#uses=1]
+ %tmp1 = getelementptr i32, ptr %tmp, i32 1 ; <ptr> [#uses=2]
+ %tmp2 = load i32, ptr %tmp1, align 4 ; <i32> [#uses=1]
; CHECK-NOT: load
%tmp3 = or i32 %tmp2, 11 ; <i32> [#uses=1]
%tmp4 = and i32 %tmp3, -21 ; <i32> [#uses=1]
- store i32 %tmp4, i32* %tmp1, align 4
- %call = call i32 (...) @x( %struct.anon* %c ) ; <i32> [#uses=0]
+ store i32 %tmp4, ptr %tmp1, align 4
+ %call = call i32 (...) @x( ptr %c ) ; <i32> [#uses=0]
ret i32 undef
}
diff --git a/llvm/test/Transforms/GVN/2008-02-13-NewPHI.ll b/llvm/test/Transforms/GVN/2008-02-13-NewPHI.ll
index 859e8f4f58796..4a7032e7b1dc4 100644
--- a/llvm/test/Transforms/GVN/2008-02-13-NewPHI.ll
+++ b/llvm/test/Transforms/GVN/2008-02-13-NewPHI.ll
@@ -1,22 +1,22 @@
; RUN: opt < %s -passes=gvn
; PR2032
-define i32 @sscal(i32 %n, double %sa1, float* %sx, i32 %incx) {
+define i32 @sscal(i32 %n, double %sa1, ptr %sx, i32 %incx) {
entry:
- %sx_addr = alloca float* ; <float**> [#uses=3]
- store float* %sx, float** %sx_addr, align 4
+ %sx_addr = alloca ptr ; <ptr> [#uses=3]
+ store ptr %sx, ptr %sx_addr, align 4
br label %bb33
bb: ; preds = %bb33
- %tmp27 = load float*, float** %sx_addr, align 4 ; <float*> [#uses=1]
- store float 0.000000e+00, float* %tmp27, align 4
- store float* null, float** %sx_addr, align 4
+ %tmp27 = load ptr, ptr %sx_addr, align 4 ; <ptr> [#uses=1]
+ store float 0.000000e+00, ptr %tmp27, align 4
+ store ptr null, ptr %sx_addr, align 4
br label %bb33
bb33: ; preds = %bb, %entry
br i1 false, label %bb, label %return
return: ; preds = %bb33
- %retval59 = load i32, i32* null, align 4 ; <i32> [#uses=1]
+ %retval59 = load i32, ptr null, align 4 ; <i32> [#uses=1]
ret i32 %retval59
}
diff --git a/llvm/test/Transforms/GVN/2008-07-02-Unreachable.ll b/llvm/test/Transforms/GVN/2008-07-02-Unreachable.ll
index 3bb3cdcb4dbef..e463264c6918a 100644
--- a/llvm/test/Transforms/GVN/2008-07-02-Unreachable.ll
+++ b/llvm/test/Transforms/GVN/2008-07-02-Unreachable.ll
@@ -1,7 +1,7 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
; PR2503
- at g_3 = external global i8 ; <i8*> [#uses=2]
+ at g_3 = external global i8 ; <ptr> [#uses=2]
define i8 @func_1(i32 %x, i32 %y) nounwind {
entry:
@@ -13,8 +13,8 @@ ifthen: ; preds = %entry
br label %ifend
ifelse: ; preds = %entry
- %tmp3 = load i8, i8* @g_3 ; <i8> [#uses=0]
- store i8 %tmp3, i8* %A
+ %tmp3 = load i8, ptr @g_3 ; <i8> [#uses=0]
+ store i8 %tmp3, ptr %A
br label %afterfor
forcond: ; preds = %forinc
@@ -27,7 +27,7 @@ forinc: ; preds = %forbody
br label %forcond
afterfor: ; preds = %forcond, %forcond.thread
- %tmp10 = load i8, i8* @g_3 ; <i8> [#uses=0]
+ %tmp10 = load i8, ptr @g_3 ; <i8> [#uses=0]
ret i8 %tmp10
; CHECK: ret i8 %tmp3
diff --git a/llvm/test/Transforms/GVN/2008-12-09-SelfRemove.ll b/llvm/test/Transforms/GVN/2008-12-09-SelfRemove.ll
index ea76577c390d7..3d02d67763bd3 100644
--- a/llvm/test/Transforms/GVN/2008-12-09-SelfRemove.ll
+++ b/llvm/test/Transforms/GVN/2008-12-09-SelfRemove.ll
@@ -2,20 +2,20 @@
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
- %struct.anon = type { i8*, i32 }
- %struct.d_print_info = type { i32, i8*, i32, i32, %struct.d_print_template*, %struct.d_print_mod*, i32 }
- %struct.d_print_mod = type { %struct.d_print_mod*, %struct.demangle_component*, i32, %struct.d_print_template* }
- %struct.d_print_template = type { %struct.d_print_template*, %struct.demangle_component* }
+ %struct.anon = type { ptr, i32 }
+ %struct.d_print_info = type { i32, ptr, i32, i32, ptr, ptr, i32 }
+ %struct.d_print_mod = type { ptr, ptr, i32, ptr }
+ %struct.d_print_template = type { ptr, ptr }
%struct.demangle_component = type { i32, { %struct.anon } }
-define void @d_print_mod_list(%struct.d_print_info* %dpi, %struct.d_print_mod* %mods, i32 %suffix) nounwind {
+define void @d_print_mod_list(ptr %dpi, ptr %mods, i32 %suffix) nounwind {
entry:
- %0 = getelementptr %struct.d_print_info, %struct.d_print_info* %dpi, i32 0, i32 1 ; <i8**> [#uses=1]
+ %0 = getelementptr %struct.d_print_info, ptr %dpi, i32 0, i32 1 ; <ptr> [#uses=1]
br i1 false, label %return, label %bb
bb: ; preds = %entry
- %1 = load i8*, i8** %0, align 4 ; <i8*> [#uses=0]
- %2 = getelementptr %struct.d_print_info, %struct.d_print_info* %dpi, i32 0, i32 1 ; <i8**> [#uses=0]
+ %1 = load ptr, ptr %0, align 4 ; <ptr> [#uses=0]
+ %2 = getelementptr %struct.d_print_info, ptr %dpi, i32 0, i32 1 ; <ptr> [#uses=0]
br label %bb21
bb21: ; preds = %bb21, %bb
@@ -25,9 +25,9 @@ return: ; preds = %entry
ret void
}
-; CHECK: define void @d_print_mod_list(%struct.d_print_info* %dpi, %struct.d_print_mod* %mods, i32 %suffix) #0 {
+; CHECK: define void @d_print_mod_list(ptr %dpi, ptr %mods, i32 %suffix) #0 {
; CHECK: entry:
-; CHECK: %0 = getelementptr %struct.d_print_info, %struct.d_print_info* %dpi, i32 0, i32 1
+; CHECK: %0 = getelementptr %struct.d_print_info, ptr %dpi, i32 0, i32 1
; CHECK: br i1 false, label %return, label %bb
; CHECK: bb:
; CHECK: br label %bb21
diff --git a/llvm/test/Transforms/GVN/2008-12-12-RLE-Crash.ll b/llvm/test/Transforms/GVN/2008-12-12-RLE-Crash.ll
index 5edec11ce5aac..4a2d03987e747 100644
--- a/llvm/test/Transforms/GVN/2008-12-12-RLE-Crash.ll
+++ b/llvm/test/Transforms/GVN/2008-12-12-RLE-Crash.ll
@@ -2,13 +2,13 @@
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin7"
-define i32 @main(i32 %argc, i8** %argv) nounwind {
+define i32 @main(i32 %argc, ptr %argv) nounwind {
entry:
br label %bb84
bb41: ; preds = %bb82
- %tmp = load i8, i8* %opt.0, align 1 ; <i8> [#uses=0]
- %tmp1 = getelementptr i8, i8* %opt.0, i32 1 ; <i8*> [#uses=2]
+ %tmp = load i8, ptr %opt.0, align 1 ; <i8> [#uses=0]
+ %tmp1 = getelementptr i8, ptr %opt.0, i32 1 ; <ptr> [#uses=2]
switch i32 0, label %bb81 [
i32 102, label %bb82
i32 110, label %bb79
@@ -25,11 +25,11 @@ bb81: ; preds = %bb41
ret i32 1
bb82: ; preds = %bb84, %bb79, %bb41
- %opt.0 = phi i8* [ %tmp3, %bb84 ], [ %tmp1, %bb79 ], [ %tmp1, %bb41 ] ; <i8*> [#uses=3]
- %tmp2 = load i8, i8* %opt.0, align 1 ; <i8> [#uses=0]
+ %opt.0 = phi ptr [ %tmp3, %bb84 ], [ %tmp1, %bb79 ], [ %tmp1, %bb41 ] ; <ptr> [#uses=3]
+ %tmp2 = load i8, ptr %opt.0, align 1 ; <i8> [#uses=0]
br i1 false, label %bb84, label %bb41
bb84: ; preds = %bb82, %entry
- %tmp3 = getelementptr i8, i8* null, i32 1 ; <i8*> [#uses=1]
+ %tmp3 = getelementptr i8, ptr null, i32 1 ; <ptr> [#uses=1]
br label %bb82
}
diff --git a/llvm/test/Transforms/GVN/2008-12-14-rle-reanalyze.ll b/llvm/test/Transforms/GVN/2008-12-14-rle-reanalyze.ll
index cde2666480d0b..53e93e225547e 100644
--- a/llvm/test/Transforms/GVN/2008-12-14-rle-reanalyze.ll
+++ b/llvm/test/Transforms/GVN/2008-12-14-rle-reanalyze.ll
@@ -1,7 +1,7 @@
; RUN: opt < %s -passes=gvn | llvm-dis
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin7"
- at sort_value = external global [256 x i32], align 32 ; <[256 x i32]*> [#uses=2]
+ at sort_value = external global [256 x i32], align 32 ; <ptr> [#uses=2]
define i32 @Quiesce(i32 %alpha, i32 %beta, i32 %wtm, i32 %ply) nounwind {
entry:
@@ -11,8 +11,8 @@ bb22: ; preds = %bb23, %bb22, %entry
br i1 false, label %bb23, label %bb22
bb23: ; preds = %bb23, %bb22
- %sortv.233 = phi i32* [ getelementptr ([256 x i32], [256 x i32]* @sort_value, i32 0, i32 0), %bb22 ], [ %sortv.2, %bb23 ] ; <i32*> [#uses=1]
- %0 = load i32, i32* %sortv.233, align 4 ; <i32> [#uses=0]
- %sortv.2 = getelementptr [256 x i32], [256 x i32]* @sort_value, i32 0, i32 0 ; <i32*> [#uses=1]
+ %sortv.233 = phi ptr [ @sort_value, %bb22 ], [ %sortv.2, %bb23 ] ; <ptr> [#uses=1]
+ %0 = load i32, ptr %sortv.233, align 4 ; <i32> [#uses=0]
+ %sortv.2 = getelementptr [256 x i32], ptr @sort_value, i32 0, i32 0 ; <ptr> [#uses=1]
br i1 false, label %bb23, label %bb22
}
diff --git a/llvm/test/Transforms/GVN/2008-12-15-CacheVisited.ll b/llvm/test/Transforms/GVN/2008-12-15-CacheVisited.ll
index 9b79eefd566c6..0597b7951b052 100644
--- a/llvm/test/Transforms/GVN/2008-12-15-CacheVisited.ll
+++ b/llvm/test/Transforms/GVN/2008-12-15-CacheVisited.ll
@@ -2,7 +2,7 @@
; Cached results must be added to and verified against the visited sets.
; PR3217
-define fastcc void @gen_field_die(i32* %decl) nounwind {
+define fastcc void @gen_field_die(ptr %decl) nounwind {
entry:
br i1 false, label %bb203, label %bb202
@@ -10,19 +10,19 @@ bb202: ; preds = %entry
unreachable
bb203: ; preds = %entry
- %tmp = getelementptr i32, i32* %decl, i32 1 ; <i32*> [#uses=1]
- %tmp1 = load i32, i32* %tmp, align 4 ; <i32> [#uses=0]
+ %tmp = getelementptr i32, ptr %decl, i32 1 ; <ptr> [#uses=1]
+ %tmp1 = load i32, ptr %tmp, align 4 ; <i32> [#uses=0]
br i1 false, label %bb207, label %bb204
bb204: ; preds = %bb203
- %tmp2 = getelementptr i32, i32* %decl, i32 1 ; <i32*> [#uses=1]
+ %tmp2 = getelementptr i32, ptr %decl, i32 1 ; <ptr> [#uses=1]
br label %bb208
bb207: ; preds = %bb203
br label %bb208
bb208: ; preds = %bb207, %bb204
- %iftmp.1374.0.in = phi i32* [ null, %bb207 ], [ %tmp2, %bb204 ] ; <i32*> [#uses=1]
- %iftmp.1374.0 = load i32, i32* %iftmp.1374.0.in ; <i32> [#uses=0]
+ %iftmp.1374.0.in = phi ptr [ null, %bb207 ], [ %tmp2, %bb204 ] ; <ptr> [#uses=1]
+ %iftmp.1374.0 = load i32, ptr %iftmp.1374.0.in ; <i32> [#uses=0]
unreachable
}
diff --git a/llvm/test/Transforms/GVN/2009-01-21-SortInvalidation.ll b/llvm/test/Transforms/GVN/2009-01-21-SortInvalidation.ll
index 2f1dc10185772..db8ac78ddc9a9 100644
--- a/llvm/test/Transforms/GVN/2009-01-21-SortInvalidation.ll
+++ b/llvm/test/Transforms/GVN/2009-01-21-SortInvalidation.ll
@@ -2,10 +2,10 @@
; PR3358
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
- %struct.re_pattern_buffer = type { i8*, i64, i64, i64, i8*, i8*, i64, i8 }
- %struct.re_registers = type { i32, i32*, i32* }
+ %struct.re_pattern_buffer = type { ptr, i64, i64, i64, ptr, ptr, i64, i8 }
+ %struct.re_registers = type { i32, ptr, ptr }
-define fastcc i32 @byte_re_match_2_internal(%struct.re_pattern_buffer* nocapture %bufp, i8* %string1, i32 %size1, i8* %string2, i32 %size2, i32 %pos, %struct.re_registers* %regs, i32 %stop) nounwind {
+define fastcc i32 @byte_re_match_2_internal(ptr nocapture %bufp, ptr %string1, i32 %size1, ptr %string2, i32 %size2, i32 %pos, ptr %regs, i32 %stop) nounwind {
entry:
br label %bb159
@@ -13,7 +13,7 @@ succeed_label: ; preds = %bb159
ret i32 0
bb159: ; preds = %bb664, %bb554, %bb159, %bb159, %bb159, %entry
- %d.0 = phi i8* [ null, %entry ], [ %d.0, %bb159 ], [ %d.0, %bb554 ], [ %d.0, %bb159 ], [ %d.0, %bb159 ], [ %d.12, %bb664 ] ; <i8*> [#uses=5]
+ %d.0 = phi ptr [ null, %entry ], [ %d.0, %bb159 ], [ %d.0, %bb554 ], [ %d.0, %bb159 ], [ %d.0, %bb159 ], [ %d.12, %bb664 ] ; <ptr> [#uses=5]
switch i32 0, label %bb661 [
i32 0, label %bb159
i32 1, label %succeed_label
@@ -37,7 +37,7 @@ bb550: ; preds = %bb543
br i1 false, label %bb554, label %bb552
bb552: ; preds = %bb550
- %0 = load i8, i8* %d.0, align 8 ; <i8> [#uses=0]
+ %0 = load i8, ptr %d.0, align 8 ; <i8> [#uses=0]
br label %bb554
bb554: ; preds = %bb552, %bb550, %bb549
@@ -47,7 +47,7 @@ bb622: ; preds = %bb622, %bb159
br label %bb622
bb661: ; preds = %bb554, %bb159
- %d.12 = select i1 false, i8* null, i8* null ; <i8*> [#uses=1]
+ %d.12 = select i1 false, ptr null, ptr null ; <ptr> [#uses=1]
br label %bb664
bb664: ; preds = %bb664, %bb661
diff --git a/llvm/test/Transforms/GVN/2009-01-22-SortInvalidation.ll b/llvm/test/Transforms/GVN/2009-01-22-SortInvalidation.ll
index a477425676f34..3b8d954b0e126 100644
--- a/llvm/test/Transforms/GVN/2009-01-22-SortInvalidation.ll
+++ b/llvm/test/Transforms/GVN/2009-01-22-SortInvalidation.ll
@@ -2,76 +2,76 @@
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin7"
- %struct..4sPragmaType = type { i8*, i32 }
- %struct.AggInfo = type { i8, i8, i32, %struct.ExprList*, i32, %struct.AggInfo_col*, i32, i32, i32, %struct.AggInfo_func*, i32, i32 }
- %struct.AggInfo_col = type { %struct.Table*, i32, i32, i32, i32, %struct.Expr* }
- %struct.AggInfo_func = type { %struct.Expr*, %struct.FuncDef*, i32, i32 }
- %struct.AuxData = type { i8*, void (i8*)* }
+ %struct..4sPragmaType = type { ptr, i32 }
+ %struct.AggInfo = type { i8, i8, i32, ptr, i32, ptr, i32, i32, i32, ptr, i32, i32 }
+ %struct.AggInfo_col = type { ptr, i32, i32, i32, i32, ptr }
+ %struct.AggInfo_func = type { ptr, ptr, i32, i32 }
+ %struct.AuxData = type { ptr, ptr }
%struct.Bitvec = type { i32, i32, i32, { [125 x i32] } }
- %struct.BtCursor = type { %struct.Btree*, %struct.BtShared*, %struct.BtCursor*, %struct.BtCursor*, i32 (i8*, i32, i8*, i32, i8*)*, i8*, i32, %struct.MemPage*, i32, %struct.CellInfo, i8, i8, i8*, i64, i32, i8, i32* }
- %struct.BtLock = type { %struct.Btree*, i32, i8, %struct.BtLock* }
- %struct.BtShared = type { %struct.Pager*, %struct.sqlite3*, %struct.BtCursor*, %struct.MemPage*, i8, i8, i8, i8, i8, i8, i8, i8, i32, i16, i16, i32, i32, i32, i32, i8, i32, i8*, void (i8*)*, %struct.sqlite3_mutex*, %struct.BusyHandler, i32, %struct.BtShared*, %struct.BtLock*, %struct.Btree* }
- %struct.Btree = type { %struct.sqlite3*, %struct.BtShared*, i8, i8, i8, i32, %struct.Btree*, %struct.Btree* }
- %struct.BtreeMutexArray = type { i32, [11 x %struct.Btree*] }
- %struct.BusyHandler = type { i32 (i8*, i32)*, i8*, i32 }
- %struct.CellInfo = type { i8*, i64, i32, i32, i16, i16, i16, i16 }
- %struct.CollSeq = type { i8*, i8, i8, i8*, i32 (i8*, i32, i8*, i32, i8*)*, void (i8*)* }
- %struct.Column = type { i8*, %struct.Expr*, i8*, i8*, i8, i8, i8, i8 }
+ %struct.BtCursor = type { ptr, ptr, ptr, ptr, ptr, ptr, i32, ptr, i32, %struct.CellInfo, i8, i8, ptr, i64, i32, i8, ptr }
+ %struct.BtLock = type { ptr, i32, i8, ptr }
+ %struct.BtShared = type { ptr, ptr, ptr, ptr, i8, i8, i8, i8, i8, i8, i8, i8, i32, i16, i16, i32, i32, i32, i32, i8, i32, ptr, ptr, ptr, %struct.BusyHandler, i32, ptr, ptr, ptr }
+ %struct.Btree = type { ptr, ptr, i8, i8, i8, i32, ptr, ptr }
+ %struct.BtreeMutexArray = type { i32, [11 x ptr] }
+ %struct.BusyHandler = type { ptr, ptr, i32 }
+ %struct.CellInfo = type { ptr, i64, i32, i32, i16, i16, i16, i16 }
+ %struct.CollSeq = type { ptr, i8, i8, ptr, ptr, ptr }
+ %struct.Column = type { ptr, ptr, ptr, ptr, i8, i8, i8, i8 }
%struct.Context = type { i64, i32, %struct.Fifo }
%struct.CountCtx = type { i64 }
- %struct.Cursor = type { %struct.BtCursor*, i32, i64, i64, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i64, %struct.Btree*, i32, i8*, i64, i8*, %struct.KeyInfo*, i32, i64, %struct.sqlite3_vtab_cursor*, %struct.sqlite3_module*, i32, i32, i32*, i32*, i8* }
- %struct.Db = type { i8*, %struct.Btree*, i8, i8, i8*, void (i8*)*, %struct.Schema* }
- %struct.Expr = type { i8, i8, i16, %struct.CollSeq*, %struct.Expr*, %struct.Expr*, %struct.ExprList*, %struct..4sPragmaType, %struct..4sPragmaType, i32, i32, %struct.AggInfo*, i32, i32, %struct.Select*, %struct.Table*, i32 }
- %struct.ExprList = type { i32, i32, i32, %struct.ExprList_item* }
- %struct.ExprList_item = type { %struct.Expr*, i8*, i8, i8, i8 }
- %struct.FKey = type { %struct.Table*, %struct.FKey*, i8*, %struct.FKey*, i32, %struct.sColMap*, i8, i8, i8, i8 }
- %struct.Fifo = type { i32, %struct.FifoPage*, %struct.FifoPage* }
- %struct.FifoPage = type { i32, i32, i32, %struct.FifoPage*, [1 x i64] }
- %struct.FuncDef = type { i16, i8, i8, i8, i8*, %struct.FuncDef*, void (%struct.sqlite3_context*, i32, %struct.Mem**)*, void (%struct.sqlite3_context*, i32, %struct.Mem**)*, void (%struct.sqlite3_context*)*, [1 x i8] }
- %struct.Hash = type { i8, i8, i32, i32, %struct.HashElem*, %struct._ht* }
- %struct.HashElem = type { %struct.HashElem*, %struct.HashElem*, i8*, i8*, i32 }
- %struct.IdList = type { %struct..4sPragmaType*, i32, i32 }
- %struct.Index = type { i8*, i32, i32*, i32*, %struct.Table*, i32, i8, i8, i8*, %struct.Index*, %struct.Schema*, i8*, i8** }
- %struct.KeyInfo = type { %struct.sqlite3*, i8, i8, i8, i32, i8*, [1 x %struct.CollSeq*] }
- %struct.Mem = type { %struct.CountCtx, double, %struct.sqlite3*, i8*, i32, i16, i8, i8, void (i8*)* }
- %struct.MemPage = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, [5 x %struct._OvflCell], %struct.BtShared*, i8*, %struct.PgHdr*, i32, %struct.MemPage* }
- %struct.Module = type { %struct.sqlite3_module*, i8*, i8*, void (i8*)* }
+ %struct.Cursor = type { ptr, i32, i64, i64, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i64, ptr, i32, ptr, i64, ptr, ptr, i32, i64, ptr, ptr, i32, i32, ptr, ptr, ptr }
+ %struct.Db = type { ptr, ptr, i8, i8, ptr, ptr, ptr }
+ %struct.Expr = type { i8, i8, i16, ptr, ptr, ptr, ptr, %struct..4sPragmaType, %struct..4sPragmaType, i32, i32, ptr, i32, i32, ptr, ptr, i32 }
+ %struct.ExprList = type { i32, i32, i32, ptr }
+ %struct.ExprList_item = type { ptr, ptr, i8, i8, i8 }
+ %struct.FKey = type { ptr, ptr, ptr, ptr, i32, ptr, i8, i8, i8, i8 }
+ %struct.Fifo = type { i32, ptr, ptr }
+ %struct.FifoPage = type { i32, i32, i32, ptr, [1 x i64] }
+ %struct.FuncDef = type { i16, i8, i8, i8, ptr, ptr, ptr, ptr, ptr, [1 x i8] }
+ %struct.Hash = type { i8, i8, i32, i32, ptr, ptr }
+ %struct.HashElem = type { ptr, ptr, ptr, ptr, i32 }
+ %struct.IdList = type { ptr, i32, i32 }
+ %struct.Index = type { ptr, i32, ptr, ptr, ptr, i32, i8, i8, ptr, ptr, ptr, ptr, ptr }
+ %struct.KeyInfo = type { ptr, i8, i8, i8, i32, ptr, [1 x ptr] }
+ %struct.Mem = type { %struct.CountCtx, double, ptr, ptr, i32, i16, i8, i8, ptr }
+ %struct.MemPage = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i16, i16, i16, i16, i16, i16, [5 x %struct._OvflCell], ptr, ptr, ptr, i32, ptr }
+ %struct.Module = type { ptr, ptr, ptr, ptr }
%struct.Op = type { i8, i8, i8, i8, i32, i32, i32, { i32 } }
- %struct.Pager = type { %struct.sqlite3_vfs*, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.Bitvec*, %struct.Bitvec*, i8*, i8*, i8*, i8*, %struct.sqlite3_file*, %struct.sqlite3_file*, %struct.sqlite3_file*, %struct.BusyHandler*, %struct.PagerLruList, %struct.PgHdr*, %struct.PgHdr*, %struct.PgHdr*, i64, i64, i64, i64, i64, i32, void (%struct.PgHdr*, i32)*, void (%struct.PgHdr*, i32)*, i32, %struct.PgHdr**, i8*, [16 x i8] }
- %struct.PagerLruLink = type { %struct.PgHdr*, %struct.PgHdr* }
- %struct.PagerLruList = type { %struct.PgHdr*, %struct.PgHdr*, %struct.PgHdr* }
- %struct.Parse = type { %struct.sqlite3*, i32, i8*, %struct.Vdbe*, i8, i8, i8, i8, i8, i8, i8, [8 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [12 x i32], i32, %struct.TableLock*, i32, i32, i32, i32, i32, %struct.Expr**, i8, %struct..4sPragmaType, %struct..4sPragmaType, %struct..4sPragmaType, i8*, i8*, %struct.Table*, %struct.Trigger*, %struct.TriggerStack*, i8*, %struct..4sPragmaType, i8, %struct.Table*, i32 }
- %struct.PgHdr = type { %struct.Pager*, i32, %struct.PgHdr*, %struct.PgHdr*, %struct.PagerLruLink, %struct.PgHdr*, i8, i8, i8, i8, i8, i16, %struct.PgHdr*, %struct.PgHdr*, i8* }
- %struct.Schema = type { i32, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Table*, i8, i8, i16, i32, %struct.sqlite3* }
- %struct.Select = type { %struct.ExprList*, i8, i8, i8, i8, i8, i8, i8, %struct.SrcList*, %struct.Expr*, %struct.ExprList*, %struct.Expr*, %struct.ExprList*, %struct.Select*, %struct.Select*, %struct.Select*, %struct.Expr*, %struct.Expr*, i32, i32, [3 x i32] }
+ %struct.Pager = type { ptr, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, %struct.PagerLruList, ptr, ptr, ptr, i64, i64, i64, i64, i64, i32, ptr, ptr, i32, ptr, ptr, [16 x i8] }
+ %struct.PagerLruLink = type { ptr, ptr }
+ %struct.PagerLruList = type { ptr, ptr, ptr }
+ %struct.Parse = type { ptr, i32, ptr, ptr, i8, i8, i8, i8, i8, i8, i8, [8 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [12 x i32], i32, ptr, i32, i32, i32, i32, i32, ptr, i8, %struct..4sPragmaType, %struct..4sPragmaType, %struct..4sPragmaType, ptr, ptr, ptr, ptr, ptr, ptr, %struct..4sPragmaType, i8, ptr, i32 }
+ %struct.PgHdr = type { ptr, i32, ptr, ptr, %struct.PagerLruLink, ptr, i8, i8, i8, i8, i8, i16, ptr, ptr, ptr }
+ %struct.Schema = type { i32, %struct.Hash, %struct.Hash, %struct.Hash, %struct.Hash, ptr, i8, i8, i16, i32, ptr }
+ %struct.Select = type { ptr, i8, i8, i8, i8, i8, i8, i8, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, [3 x i32] }
%struct.SrcList = type { i16, i16, [1 x %struct.SrcList_item] }
- %struct.SrcList_item = type { i8*, i8*, i8*, %struct.Table*, %struct.Select*, i8, i8, i32, %struct.Expr*, %struct.IdList*, i64 }
- %struct.Table = type { i8*, i32, %struct.Column*, i32, %struct.Index*, i32, %struct.Select*, i32, %struct.Trigger*, %struct.FKey*, i8*, %struct.Expr*, i32, i8, i8, i8, i8, i8, i8, i8, %struct.Module*, %struct.sqlite3_vtab*, i32, i8**, %struct.Schema* }
- %struct.TableLock = type { i32, i32, i8, i8* }
- %struct.Trigger = type { i8*, i8*, i8, i8, %struct.Expr*, %struct.IdList*, %struct..4sPragmaType, %struct.Schema*, %struct.Schema*, %struct.TriggerStep*, %struct.Trigger* }
- %struct.TriggerStack = type { %struct.Table*, i32, i32, i32, i32, i32, i32, %struct.Trigger*, %struct.TriggerStack* }
- %struct.TriggerStep = type { i32, i32, %struct.Trigger*, %struct.Select*, %struct..4sPragmaType, %struct.Expr*, %struct.ExprList*, %struct.IdList*, %struct.TriggerStep*, %struct.TriggerStep* }
- %struct.Vdbe = type { %struct.sqlite3*, %struct.Vdbe*, %struct.Vdbe*, i32, i32, %struct.Op*, i32, i32, i32*, %struct.Mem**, %struct.Mem*, i32, %struct.Cursor**, i32, %struct.Mem*, i8**, i32, i32, i32, %struct.Mem*, i32, i32, %struct.Fifo, i32, i32, %struct.Context*, i32, i32, i32, i32, i32, [25 x i32], i32, i32, i8**, i8*, %struct.Mem*, i8, i8, i8, i8, i8, i8, i32, i64, i32, %struct.BtreeMutexArray, i32, i8*, i32 }
- %struct.VdbeFunc = type { %struct.FuncDef*, i32, [1 x %struct.AuxData] }
- %struct._OvflCell = type { i8*, i16 }
- %struct._ht = type { i32, %struct.HashElem* }
+ %struct.SrcList_item = type { ptr, ptr, ptr, ptr, ptr, i8, i8, i32, ptr, ptr, i64 }
+ %struct.Table = type { ptr, i32, ptr, i32, ptr, i32, ptr, i32, ptr, ptr, ptr, ptr, i32, i8, i8, i8, i8, i8, i8, i8, ptr, ptr, i32, ptr, ptr }
+ %struct.TableLock = type { i32, i32, i8, ptr }
+ %struct.Trigger = type { ptr, ptr, i8, i8, ptr, ptr, %struct..4sPragmaType, ptr, ptr, ptr, ptr }
+ %struct.TriggerStack = type { ptr, i32, i32, i32, i32, i32, i32, ptr, ptr }
+ %struct.TriggerStep = type { i32, i32, ptr, ptr, %struct..4sPragmaType, ptr, ptr, ptr, ptr, ptr }
+ %struct.Vdbe = type { ptr, ptr, ptr, i32, i32, ptr, i32, i32, ptr, ptr, ptr, i32, ptr, i32, ptr, ptr, i32, i32, i32, ptr, i32, i32, %struct.Fifo, i32, i32, ptr, i32, i32, i32, i32, i32, [25 x i32], i32, i32, ptr, ptr, ptr, i8, i8, i8, i8, i8, i8, i32, i64, i32, %struct.BtreeMutexArray, i32, ptr, i32 }
+ %struct.VdbeFunc = type { ptr, i32, [1 x %struct.AuxData] }
+ %struct._OvflCell = type { ptr, i16 }
+ %struct._ht = type { i32, ptr }
%struct.anon = type { double }
- %struct.sColMap = type { i32, i8* }
- %struct.sqlite3 = type { %struct.sqlite3_vfs*, i32, %struct.Db*, i32, i32, i32, i32, i8, i8, i8, i8, i32, %struct.CollSeq*, i64, i64, i32, i32, i32, %struct.sqlite3_mutex*, %struct.sqlite3InitInfo, i32, i8**, %struct.Vdbe*, i32, void (i8*, i8*)*, i8*, void (i8*, i8*, i64)*, i8*, i8*, i32 (i8*)*, i8*, void (i8*)*, i8*, void (i8*, i32, i8*, i8*, i64)*, void (i8*, %struct.sqlite3*, i32, i8*)*, void (i8*, %struct.sqlite3*, i32, i8*)*, i8*, %struct.Mem*, i8*, i8*, %struct.anon, i32 (i8*, i32, i8*, i8*, i8*, i8*)*, i8*, i32 (i8*)*, i8*, i32, %struct.Hash, %struct.Table*, %struct.sqlite3_vtab**, i32, %struct.Hash, %struct.Hash, %struct.BusyHandler, i32, [2 x %struct.Db], i8 }
+ %struct.sColMap = type { i32, ptr }
+ %struct.sqlite3 = type { ptr, i32, ptr, i32, i32, i32, i32, i8, i8, i8, i8, i32, ptr, i64, i64, i32, i32, i32, ptr, %struct.sqlite3InitInfo, i32, ptr, ptr, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, %struct.anon, ptr, ptr, ptr, ptr, i32, %struct.Hash, ptr, ptr, i32, %struct.Hash, %struct.Hash, %struct.BusyHandler, i32, [2 x %struct.Db], i8 }
%struct.sqlite3InitInfo = type { i32, i32, i8 }
- %struct.sqlite3_context = type { %struct.FuncDef*, %struct.VdbeFunc*, %struct.Mem, %struct.Mem*, i32, %struct.CollSeq* }
- %struct.sqlite3_file = type { %struct.sqlite3_io_methods* }
+ %struct.sqlite3_context = type { ptr, ptr, %struct.Mem, ptr, i32, ptr }
+ %struct.sqlite3_file = type { ptr }
%struct.sqlite3_index_constraint = type { i32, i8, i8, i32 }
%struct.sqlite3_index_constraint_usage = type { i32, i8 }
- %struct.sqlite3_index_info = type { i32, %struct.sqlite3_index_constraint*, i32, %struct.sqlite3_index_constraint_usage*, %struct.sqlite3_index_constraint_usage*, i32, i8*, i32, i32, double }
- %struct.sqlite3_io_methods = type { i32, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*, i8*, i32, i64)*, i32 (%struct.sqlite3_file*, i8*, i32, i64)*, i32 (%struct.sqlite3_file*, i64)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*, i64*)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*, i32)*, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*, i32, i8*)*, i32 (%struct.sqlite3_file*)*, i32 (%struct.sqlite3_file*)* }
- %struct.sqlite3_module = type { i32, i32 (%struct.sqlite3*, i8*, i32, i8**, %struct.sqlite3_vtab**, i8**)*, i32 (%struct.sqlite3*, i8*, i32, i8**, %struct.sqlite3_vtab**, i8**)*, i32 (%struct.sqlite3_vtab*, %struct.sqlite3_index_info*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*, %struct.sqlite3_vtab_cursor**)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*, i32, i8*, i32, %struct.Mem**)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*)*, i32 (%struct.sqlite3_vtab_cursor*, %struct.sqlite3_context*, i32)*, i32 (%struct.sqlite3_vtab_cursor*, i64*)*, i32 (%struct.sqlite3_vtab*, i32, %struct.Mem**, i64*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*)*, i32 (%struct.sqlite3_vtab*, i32, i8*, void (%struct.sqlite3_context*, i32, %struct.Mem**)**, i8**)*, i32 (%struct.sqlite3_vtab*, i8*)* }
+ %struct.sqlite3_index_info = type { i32, ptr, i32, ptr, ptr, i32, ptr, i32, i32, double }
+ %struct.sqlite3_io_methods = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
+ %struct.sqlite3_module = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
%struct.sqlite3_mutex = type opaque
- %struct.sqlite3_vfs = type { i32, i32, i32, %struct.sqlite3_vfs*, i8*, i8*, i32 (%struct.sqlite3_vfs*, i8*, %struct.sqlite3_file*, i32, i32*)*, i32 (%struct.sqlite3_vfs*, i8*, i32)*, i32 (%struct.sqlite3_vfs*, i8*, i32)*, i32 (%struct.sqlite3_vfs*, i32, i8*)*, i32 (%struct.sqlite3_vfs*, i8*, i32, i8*)*, i8* (%struct.sqlite3_vfs*, i8*)*, void (%struct.sqlite3_vfs*, i32, i8*)*, i8* (%struct.sqlite3_vfs*, i8*, i8*)*, void (%struct.sqlite3_vfs*, i8*)*, i32 (%struct.sqlite3_vfs*, i32, i8*)*, i32 (%struct.sqlite3_vfs*, i32)*, i32 (%struct.sqlite3_vfs*, double*)* }
- %struct.sqlite3_vtab = type { %struct.sqlite3_module*, i32, i8* }
- %struct.sqlite3_vtab_cursor = type { %struct.sqlite3_vtab* }
+ %struct.sqlite3_vfs = type { i32, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
+ %struct.sqlite3_vtab = type { ptr, i32, ptr }
+ %struct.sqlite3_vtab_cursor = type { ptr }
-define fastcc void @sqlite3Insert(%struct.Parse* %pParse, %struct.SrcList* %pTabList, %struct.ExprList* %pList, %struct.Select* %pSelect, %struct.IdList* %pColumn, i32 %onError) nounwind {
+define fastcc void @sqlite3Insert(ptr %pParse, ptr %pTabList, ptr %pList, ptr %pSelect, ptr %pColumn, i32 %onError) nounwind {
entry:
br i1 false, label %bb54, label %bb69.loopexit
@@ -79,20 +79,20 @@ bb54: ; preds = %entry
br label %bb69.loopexit
bb59: ; preds = %bb63.preheader
- %0 = load %struct..4sPragmaType*, %struct..4sPragmaType** %3, align 4 ; <%struct..4sPragmaType*> [#uses=0]
+ %0 = load ptr, ptr %3, align 4 ; <ptr> [#uses=0]
br label %bb65
bb65: ; preds = %bb63.preheader, %bb59
- %1 = load %struct..4sPragmaType*, %struct..4sPragmaType** %4, align 4 ; <%struct..4sPragmaType*> [#uses=0]
+ %1 = load ptr, ptr %4, align 4 ; <ptr> [#uses=0]
br i1 false, label %bb67, label %bb63.preheader
bb67: ; preds = %bb65
- %2 = getelementptr %struct.IdList, %struct.IdList* %pColumn, i32 0, i32 0 ; <%struct..4sPragmaType**> [#uses=0]
+ %2 = getelementptr %struct.IdList, ptr %pColumn, i32 0, i32 0 ; <ptr> [#uses=0]
unreachable
bb69.loopexit: ; preds = %bb54, %entry
- %3 = getelementptr %struct.IdList, %struct.IdList* %pColumn, i32 0, i32 0 ; <%struct..4sPragmaType**> [#uses=1]
- %4 = getelementptr %struct.IdList, %struct.IdList* %pColumn, i32 0, i32 0 ; <%struct..4sPragmaType**> [#uses=1]
+ %3 = getelementptr %struct.IdList, ptr %pColumn, i32 0, i32 0 ; <ptr> [#uses=1]
+ %4 = getelementptr %struct.IdList, ptr %pColumn, i32 0, i32 0 ; <ptr> [#uses=1]
br label %bb63.preheader
bb63.preheader: ; preds = %bb69.loopexit, %bb65
diff --git a/llvm/test/Transforms/GVN/2009-03-10-PREOnVoid.ll b/llvm/test/Transforms/GVN/2009-03-10-PREOnVoid.ll
index ca629cfb02034..c879a2c2a61a6 100644
--- a/llvm/test/Transforms/GVN/2009-03-10-PREOnVoid.ll
+++ b/llvm/test/Transforms/GVN/2009-03-10-PREOnVoid.ll
@@ -5,36 +5,36 @@
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i386-pc-linux-gnu"
%llvm.dbg.anchor.type = type { i32, i32 }
- %"struct.__gnu_cxx::hash<void*>" = type <{ i8 }>
+ %"struct.__gnu_cxx::hash<ptr>" = type <{ i8 }>
%struct.__sched_param = type { i32 }
%struct._pthread_descr_struct = type opaque
- %struct.pthread_attr_t = type { i32, i32, %struct.__sched_param, i32, i32, i32, i32, i8*, i32 }
- %struct.pthread_mutex_t = type { i32, i32, %struct._pthread_descr_struct*, i32, %llvm.dbg.anchor.type }
- %"struct.std::_Rb_tree<void*,std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<void*>,std::allocator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >" = type { %"struct.std::_Rb_tree<void*,std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<void*>,std::allocator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >::_Rb_tree_impl<std::less<void*>,false>" }
- %"struct.std::_Rb_tree<void*,std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<void*>,std::allocator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >::_Rb_tree_impl<std::less<void*>,false>" = type { %"struct.__gnu_cxx::hash<void*>", %"struct.std::_Rb_tree_node_base", i32 }
- %"struct.std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >" = type { %"struct.std::_Rb_tree_node_base"* }
- %"struct.std::_Rb_tree_node_base" = type { i32, %"struct.std::_Rb_tree_node_base"*, %"struct.std::_Rb_tree_node_base"*, %"struct.std::_Rb_tree_node_base"* }
- %"struct.std::pair<std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,bool>" = type { %"struct.std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >", i8 }
- %"struct.std::pair<void* const,void*>" = type { i8*, i8* }
-
- at _ZL20__gthrw_pthread_oncePiPFvvE = weak alias i32 (i32*, void ()*), i32 (i32*, void ()*)* @pthread_once ; <i32 (i32*, void ()*)*> [#uses=0]
- at _ZL27__gthrw_pthread_getspecificj = weak alias i8* (i32), i8* (i32)* @pthread_getspecific ; <i8* (i32)*> [#uses=0]
- at _ZL27__gthrw_pthread_setspecificjPKv = weak alias i32 (i32, i8*), i32 (i32, i8*)* @pthread_setspecific ; <i32 (i32, i8*)*> [#uses=0]
- at _ZL22__gthrw_pthread_createPmPK16__pthread_attr_sPFPvS3_ES3_ = weak alias i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*), i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)* @pthread_create ; <i32 (i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*)*> [#uses=0]
- at _ZL22__gthrw_pthread_cancelm = weak alias i32 (i32), i32 (i32)* @pthread_cancel ; <i32 (i32)*> [#uses=0]
- at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t = weak alias i32 (%struct.pthread_mutex_t*), i32 (%struct.pthread_mutex_t*)* @pthread_mutex_lock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
- at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t = weak alias i32 (%struct.pthread_mutex_t*), i32 (%struct.pthread_mutex_t*)* @pthread_mutex_trylock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
- at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t = weak alias i32 (%struct.pthread_mutex_t*), i32 (%struct.pthread_mutex_t*)* @pthread_mutex_unlock ; <i32 (%struct.pthread_mutex_t*)*> [#uses=0]
- at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t = weak alias i32 (%struct.pthread_mutex_t*, %struct.__sched_param*), i32 (%struct.pthread_mutex_t*, %struct.__sched_param*)* @pthread_mutex_init ; <i32 (%struct.pthread_mutex_t*, %struct.__sched_param*)*> [#uses=0]
- at _ZL26__gthrw_pthread_key_createPjPFvPvE = weak alias i32 (i32*, void (i8*)*), i32 (i32*, void (i8*)*)* @pthread_key_create ; <i32 (i32*, void (i8*)*)*> [#uses=0]
- at _ZL26__gthrw_pthread_key_deletej = weak alias i32 (i32), i32 (i32)* @pthread_key_delete ; <i32 (i32)*> [#uses=0]
- at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t = weak alias i32 (%struct.__sched_param*), i32 (%struct.__sched_param*)* @pthread_mutexattr_init ; <i32 (%struct.__sched_param*)*> [#uses=0]
- at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti = weak alias i32 (%struct.__sched_param*, i32), i32 (%struct.__sched_param*, i32)* @pthread_mutexattr_settype ; <i32 (%struct.__sched_param*, i32)*> [#uses=0]
- at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t = weak alias i32 (%struct.__sched_param*), i32 (%struct.__sched_param*)* @pthread_mutexattr_destroy ; <i32 (%struct.__sched_param*)*> [#uses=0]
+ %struct.pthread_attr_t = type { i32, i32, %struct.__sched_param, i32, i32, i32, i32, ptr, i32 }
+ %struct.pthread_mutex_t = type { i32, i32, ptr, i32, %llvm.dbg.anchor.type }
+ %"struct.std::_Rb_tree<ptr,std::pair<ptr const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<ptr const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<ptr>,std::allocator<std::pair<ptr const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >" = type { %"struct.std::_Rb_tree<ptr,std::pair<ptr const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<ptr const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<ptr>,std::allocator<std::pair<ptr const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >::_Rb_tree_impl<std::less<ptr>,false>" }
+ %"struct.std::_Rb_tree<ptr,std::pair<ptr const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<ptr const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<ptr>,std::allocator<std::pair<ptr const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >::_Rb_tree_impl<std::less<ptr>,false>" = type { %"struct.__gnu_cxx::hash<ptr>", %"struct.std::_Rb_tree_node_base", i32 }
+ %"struct.std::_Rb_tree_iterator<std::pair<ptr const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >" = type { ptr }
+ %"struct.std::_Rb_tree_node_base" = type { i32, ptr, ptr, ptr }
+ %"struct.std::pair<std::_Rb_tree_iterator<std::pair<ptr const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,bool>" = type { %"struct.std::_Rb_tree_iterator<std::pair<ptr const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >", i8 }
+ %"struct.std::pair<ptr const,ptr>" = type { ptr, ptr }
+
+ at _ZL20__gthrw_pthread_oncePiPFvvE = weak alias i32 (ptr, ptr), ptr @pthread_once ; <ptr> [#uses=0]
+ at _ZL27__gthrw_pthread_getspecificj = weak alias ptr (i32), ptr @pthread_getspecific ; <ptr> [#uses=0]
+ at _ZL27__gthrw_pthread_setspecificjPKv = weak alias i32 (i32, ptr), ptr @pthread_setspecific ; <ptr> [#uses=0]
+ at _ZL22__gthrw_pthread_createPmPK16__pthread_attr_sPFPvS3_ES3_ = weak alias i32 (ptr, ptr, ptr, ptr), ptr @pthread_create ; <ptr> [#uses=0]
+ at _ZL22__gthrw_pthread_cancelm = weak alias i32 (i32), ptr @pthread_cancel ; <ptr> [#uses=0]
+ at _ZL26__gthrw_pthread_mutex_lockP15pthread_mutex_t = weak alias i32 (ptr), ptr @pthread_mutex_lock ; <ptr> [#uses=0]
+ at _ZL29__gthrw_pthread_mutex_trylockP15pthread_mutex_t = weak alias i32 (ptr), ptr @pthread_mutex_trylock ; <ptr> [#uses=0]
+ at _ZL28__gthrw_pthread_mutex_unlockP15pthread_mutex_t = weak alias i32 (ptr), ptr @pthread_mutex_unlock ; <ptr> [#uses=0]
+ at _ZL26__gthrw_pthread_mutex_initP15pthread_mutex_tPK19pthread_mutexattr_t = weak alias i32 (ptr, ptr), ptr @pthread_mutex_init ; <ptr> [#uses=0]
+ at _ZL26__gthrw_pthread_key_createPjPFvPvE = weak alias i32 (ptr, ptr), ptr @pthread_key_create ; <ptr> [#uses=0]
+ at _ZL26__gthrw_pthread_key_deletej = weak alias i32 (i32), ptr @pthread_key_delete ; <ptr> [#uses=0]
+ at _ZL30__gthrw_pthread_mutexattr_initP19pthread_mutexattr_t = weak alias i32 (ptr), ptr @pthread_mutexattr_init ; <ptr> [#uses=0]
+ at _ZL33__gthrw_pthread_mutexattr_settypeP19pthread_mutexattr_ti = weak alias i32 (ptr, i32), ptr @pthread_mutexattr_settype ; <ptr> [#uses=0]
+ at _ZL33__gthrw_pthread_mutexattr_destroyP19pthread_mutexattr_t = weak alias i32 (ptr), ptr @pthread_mutexattr_destroy ; <ptr> [#uses=0]
declare fastcc void @_ZNSt10_Select1stISt4pairIKPvS1_EEC1Ev() nounwind readnone
-define fastcc void @_ZNSt8_Rb_treeIPvSt4pairIKS0_S0_ESt10_Select1stIS3_ESt4lessIS0_ESaIS3_EE16_M_insert_uniqueERKS3_(%"struct.std::pair<std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,bool>"* noalias nocapture sret(%"struct.std::pair<std::_Rb_tree_iterator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,bool>") %agg.result, %"struct.std::_Rb_tree<void*,std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > >,std::_Select1st<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,std::less<void*>,std::allocator<std::pair<void* const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > > >"* %this, %"struct.std::pair<void* const,void*>"* %__v) nounwind {
+define fastcc void @_ZNSt8_Rb_treeIPvSt4pairIKS0_S0_ESt10_Select1stIS3_ESt4lessIS0_ESaIS3_EE16_M_insert_uniqueERKS3_(ptr noalias nocapture sret(%"struct.std::pair<std::_Rb_tree_iterator<std::pair<ptr const, std::vector<ShadowInfo, std::allocator<ShadowInfo> > > >,bool>") %agg.result, ptr %this, ptr %__v) nounwind {
entry:
br i1 false, label %bb7, label %bb
@@ -53,19 +53,19 @@ bb11: ; preds = %bb7, %bb5
unreachable
}
-define i32 @pthread_once(i32*, void ()*) {
+define i32 @pthread_once(ptr, ptr) {
ret i32 0
}
-define i8* @pthread_getspecific(i32) {
- ret i8* null
+define ptr @pthread_getspecific(i32) {
+ ret ptr null
}
-define i32 @pthread_setspecific(i32, i8*) {
+define i32 @pthread_setspecific(i32, ptr) {
ret i32 0
}
-define i32 @pthread_create(i32*, %struct.pthread_attr_t*, i8* (i8*)*, i8*) {
+define i32 @pthread_create(ptr, ptr, ptr, ptr) {
ret i32 0
}
@@ -73,23 +73,23 @@ define i32 @pthread_cancel(i32) {
ret i32 0
}
-define i32 @pthread_mutex_lock(%struct.pthread_mutex_t*) {
+define i32 @pthread_mutex_lock(ptr) {
ret i32 0
}
-define i32 @pthread_mutex_trylock(%struct.pthread_mutex_t*) {
+define i32 @pthread_mutex_trylock(ptr) {
ret i32 0
}
-define i32 @pthread_mutex_unlock(%struct.pthread_mutex_t*) {
+define i32 @pthread_mutex_unlock(ptr) {
ret i32 0
}
-define i32 @pthread_mutex_init(%struct.pthread_mutex_t*, %struct.__sched_param*) {
+define i32 @pthread_mutex_init(ptr, ptr) {
ret i32 0
}
-define i32 @pthread_key_create(i32*, void (i8*)*) {
+define i32 @pthread_key_create(ptr, ptr) {
ret i32 0
}
@@ -97,14 +97,14 @@ define i32 @pthread_key_delete(i32) {
ret i32 0
}
-define i32 @pthread_mutexattr_init(%struct.__sched_param*) {
+define i32 @pthread_mutexattr_init(ptr) {
ret i32 0
}
-define i32 @pthread_mutexattr_settype(%struct.__sched_param*, i32) {
+define i32 @pthread_mutexattr_settype(ptr, i32) {
ret i32 0
}
-define i32 @pthread_mutexattr_destroy(%struct.__sched_param*) {
+define i32 @pthread_mutexattr_destroy(ptr) {
ret i32 0
}
diff --git a/llvm/test/Transforms/GVN/2009-07-13-MemDepSortFail.ll b/llvm/test/Transforms/GVN/2009-07-13-MemDepSortFail.ll
index 5c1b51eeb0e0e..9a61492feb233 100644
--- a/llvm/test/Transforms/GVN/2009-07-13-MemDepSortFail.ll
+++ b/llvm/test/Transforms/GVN/2009-07-13-MemDepSortFail.ll
@@ -3,11 +3,11 @@
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i386-pc-linux-gnu"
%llvm.dbg.anchor.type = type { i32, i32 }
- %struct.cset = type { i8*, i8, i8, i32, i8* }
- %struct.lmat = type { %struct.re_guts*, i32, %llvm.dbg.anchor.type*, i8*, i8*, i8*, i8*, i8**, i32, i8*, i8*, i8*, i8*, i8* }
- %struct.re_guts = type { i32*, %struct.cset*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8*, i32, i32, i32, i32, [1 x i8] }
+ %struct.cset = type { ptr, i8, i8, i32, ptr }
+ %struct.lmat = type { ptr, i32, ptr, ptr, ptr, ptr, ptr, ptr, i32, ptr, ptr, ptr, ptr, ptr }
+ %struct.re_guts = type { ptr, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, i32, i32, i32, i32, [1 x i8] }
-define i8* @lbackref(%struct.lmat* %m, i8* %start, i8* %stop, i32 %startst, i32 %stopst, i32 %lev, i32 %rec) nounwind {
+define ptr @lbackref(ptr %m, ptr %start, ptr %stop, i32 %startst, i32 %stopst, i32 %lev, i32 %rec) nounwind {
entry:
br label %bb63
@@ -22,26 +22,26 @@ bb2: ; preds = %bb
br label %bb62
bb9: ; preds = %bb
- %0 = load i8, i8* %sp.1, align 1 ; <i8> [#uses=0]
+ %0 = load i8, ptr %sp.1, align 1 ; <i8> [#uses=0]
br label %bb62
bb51: ; preds = %bb
- %1 = load i8, i8* %sp.1, align 1 ; <i8> [#uses=0]
- ret i8* null
+ %1 = load i8, ptr %sp.1, align 1 ; <i8> [#uses=0]
+ ret ptr null
bb62: ; preds = %bb9, %bb2, %bb
br label %bb63
bb63: ; preds = %bb84, %bb69, %bb62, %entry
- %sp.1 = phi i8* [ null, %bb62 ], [ %sp.1.lcssa, %bb84 ], [ %start, %entry ], [ %sp.1.lcssa, %bb69 ] ; <i8*> [#uses=3]
+ %sp.1 = phi ptr [ null, %bb62 ], [ %sp.1.lcssa, %bb84 ], [ %start, %entry ], [ %sp.1.lcssa, %bb69 ] ; <ptr> [#uses=3]
br i1 false, label %bb, label %bb65
bb65: ; preds = %bb63
- %sp.1.lcssa = phi i8* [ %sp.1, %bb63 ] ; <i8*> [#uses=4]
+ %sp.1.lcssa = phi ptr [ %sp.1, %bb63 ] ; <ptr> [#uses=4]
br i1 false, label %bb66, label %bb69
bb66: ; preds = %bb65
- ret i8* null
+ ret ptr null
bb69: ; preds = %bb65
switch i32 0, label %bb108.loopexit2.loopexit.loopexit [
@@ -52,16 +52,16 @@ bb69: ; preds = %bb65
]
bb84: ; preds = %bb69
- %2 = tail call i8* @lbackref(%struct.lmat* %m, i8* %sp.1.lcssa, i8* %stop, i32 0, i32 %stopst, i32 0, i32 0) nounwind ; <i8*> [#uses=0]
+ %2 = tail call ptr @lbackref(ptr %m, ptr %sp.1.lcssa, ptr %stop, i32 0, i32 %stopst, i32 0, i32 0) nounwind ; <ptr> [#uses=0]
br label %bb63
bb93: ; preds = %bb69
- ret i8* null
+ ret ptr null
bb104: ; preds = %bb69
- %sp.1.lcssa.lcssa33 = phi i8* [ %sp.1.lcssa, %bb69 ] ; <i8*> [#uses=0]
+ %sp.1.lcssa.lcssa33 = phi ptr [ %sp.1.lcssa, %bb69 ] ; <ptr> [#uses=0]
unreachable
bb108.loopexit2.loopexit.loopexit: ; preds = %bb69
- ret i8* null
+ ret ptr null
}
diff --git a/llvm/test/Transforms/GVN/2009-11-12-MemDepMallocBitCast.ll b/llvm/test/Transforms/GVN/2009-11-12-MemDepMallocBitCast.ll
index 53362608e7c09..f2d4fa9d37844 100644
--- a/llvm/test/Transforms/GVN/2009-11-12-MemDepMallocBitCast.ll
+++ b/llvm/test/Transforms/GVN/2009-11-12-MemDepMallocBitCast.ll
@@ -3,13 +3,12 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
define i64 @test() {
- %1 = tail call i8* @malloc(i64 mul (i64 4, i64 ptrtoint (i64* getelementptr (i64, i64* null, i64 1) to i64))) ; <i8*> [#uses=2]
- store i8 42, i8* %1
- %X = bitcast i8* %1 to i64* ; <i64*> [#uses=1]
- %Y = load i64, i64* %X ; <i64> [#uses=1]
+ %1 = tail call ptr @malloc(i64 mul (i64 4, i64 ptrtoint (ptr getelementptr (i64, ptr null, i64 1) to i64))) ; <ptr> [#uses=2]
+ store i8 42, ptr %1
+ %Y = load i64, ptr %1 ; <i64> [#uses=1]
ret i64 %Y
-; CHECK: %Y = load i64, i64* %X
+; CHECK: %Y = load i64, ptr %1
; CHECK: ret i64 %Y
}
-declare noalias i8* @malloc(i64)
+declare noalias ptr @malloc(i64)
diff --git a/llvm/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll b/llvm/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll
index 7aa7441108275..ca48a12ef6d9e 100644
--- a/llvm/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll
+++ b/llvm/test/Transforms/GVN/2010-03-31-RedundantPHIs.ll
@@ -3,7 +3,7 @@
; CHECK-NOT: load
; CHECK-NOT: phi
-define i8* @cat(i8* %s1, ...) nounwind {
+define ptr @cat(ptr %s1, ...) nounwind {
entry:
br i1 undef, label %bb, label %bb3
@@ -11,7 +11,7 @@ bb: ; preds = %entry
unreachable
bb3: ; preds = %entry
- store i8* undef, i8** undef, align 4
+ store ptr undef, ptr undef, align 4
br i1 undef, label %bb5, label %bb6
bb5: ; preds = %bb3
@@ -24,8 +24,8 @@ bb8: ; preds = %bb12
br i1 undef, label %bb9, label %bb10
bb9: ; preds = %bb8
- %0 = load i8*, i8** undef, align 4 ; <i8*> [#uses=0]
- %1 = load i8*, i8** undef, align 4 ; <i8*> [#uses=0]
+ %0 = load ptr, ptr undef, align 4 ; <ptr> [#uses=0]
+ %1 = load ptr, ptr undef, align 4 ; <ptr> [#uses=0]
br label %bb11
bb10: ; preds = %bb8
@@ -38,5 +38,5 @@ bb12: ; preds = %bb11, %bb6
br i1 undef, label %bb8, label %bb13
bb13: ; preds = %bb12
- ret i8* undef
+ ret ptr undef
}
diff --git a/llvm/test/Transforms/GVN/2010-05-08-OneBit.ll b/llvm/test/Transforms/GVN/2010-05-08-OneBit.ll
index e5710c0084d2c..e4b8785106e7f 100644
--- a/llvm/test/Transforms/GVN/2010-05-08-OneBit.ll
+++ b/llvm/test/Transforms/GVN/2010-05-08-OneBit.ll
@@ -4,11 +4,10 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
-define i32 @main(i32 %argc, i8** nocapture %argv) personality i32 (...)* @__gxx_personality_v0 {
+define i32 @main(i32 %argc, ptr nocapture %argv) personality ptr @__gxx_personality_v0 {
entry:
- %0 = getelementptr inbounds i8, i8* undef, i64 5 ; <i8*> [#uses=1]
- %1 = bitcast i8* %0 to i32* ; <i32*> [#uses=1]
- store i32 undef, i32* %1, align 1
+ %0 = getelementptr inbounds i8, ptr undef, i64 5 ; <ptr> [#uses=1]
+ store i32 undef, ptr %0, align 1
br i1 undef, label %k121.i.i, label %l117.i.i
l117.i.i: ; preds = %entry
@@ -29,10 +28,9 @@ l129.i.i: ; preds = %k121.i.i
unreachable
k133.i.i: ; preds = %k121.i.i
- %2 = getelementptr i8, i8* undef, i64 5 ; <i8*> [#uses=1]
- %3 = bitcast i8* %2 to i1* ; <i1*> [#uses=1]
- %4 = load i1, i1* %3 ; <i1> [#uses=1]
- br i1 %4, label %k151.i.i, label %l147.i.i
+ %1 = getelementptr i8, ptr undef, i64 5 ; <ptr> [#uses=1]
+ %2 = load i1, ptr %1 ; <i1> [#uses=1]
+ br i1 %2, label %k151.i.i, label %l147.i.i
l147.i.i: ; preds = %k133.i.i
invoke fastcc void @foo()
@@ -45,7 +43,7 @@ k151.i.i: ; preds = %k133.i.i
ret i32 0
landing_pad: ; preds = %l147.i.i, %l129.i.i, %l117.i.i
- %exn = landingpad {i8*, i32}
+ %exn = landingpad {ptr, i32}
cleanup
switch i32 undef, label %fin [
i32 1, label %catch1
diff --git a/llvm/test/Transforms/GVN/2011-04-27-phioperands.ll b/llvm/test/Transforms/GVN/2011-04-27-phioperands.ll
index 8a7be1a0e1b1b..d01d949f4883f 100644
--- a/llvm/test/Transforms/GVN/2011-04-27-phioperands.ll
+++ b/llvm/test/Transforms/GVN/2011-04-27-phioperands.ll
@@ -27,7 +27,7 @@ doemit.exit76.i:
br label %"<bb 53>.i"
"<L98>.i":
- store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @nuls, i64 0, i64 0), i8** undef, align 8
+ store ptr @nuls, ptr undef, align 8
br label %"<bb 53>.i"
"<L99>.i":
@@ -50,7 +50,7 @@ doemit.exit76.i:
"<bb 53>.i":
%wascaret_2.i = phi i32 [ 0, %"<L39>.i" ], [ 0, %"<L29>.i" ], [ 0, %"<L28>.i" ], [ 0, %"<bb 35>.i" ], [ 0, %"<L99>.i" ], [ 0, %"<L98>.i" ], [ 0, %doemit.exit76.i ], [ 1, %doemit.exit51.i ], [ 0, %"<L24>.i" ]
- %D.5496_84.i = load i8*, i8** undef, align 8
+ %D.5496_84.i = load ptr, ptr undef, align 8
br i1 undef, label %"<bb 54>.i", label %"<bb 5>"
"<bb 54>.i":
diff --git a/llvm/test/Transforms/GVN/2011-09-07-TypeIdFor.ll b/llvm/test/Transforms/GVN/2011-09-07-TypeIdFor.ll
index 77487729f0315..01cc316433a6b 100644
--- a/llvm/test/Transforms/GVN/2011-09-07-TypeIdFor.ll
+++ b/llvm/test/Transforms/GVN/2011-09-07-TypeIdFor.ll
@@ -1,6 +1,6 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
%struct.__fundamental_type_info_pseudo = type { %struct.__type_info_pseudo }
-%struct.__type_info_pseudo = type { i8*, i8* }
+%struct.__type_info_pseudo = type { ptr, ptr }
@_ZTIi = external constant %struct.__fundamental_type_info_pseudo
@_ZTIb = external constant %struct.__fundamental_type_info_pseudo
@@ -9,70 +9,70 @@ declare void @_Z4barv()
declare void @_Z7cleanupv()
-declare i32 @llvm.eh.typeid.for(i8*) nounwind readonly
+declare i32 @llvm.eh.typeid.for(ptr) nounwind readonly
-declare i8* @__cxa_begin_catch(i8*) nounwind
+declare ptr @__cxa_begin_catch(ptr) nounwind
declare void @__cxa_end_catch()
-declare i32 @__gxx_personality_v0(i32, i64, i8*, i8*)
+declare i32 @__gxx_personality_v0(i32, i64, ptr, ptr)
-define void @_Z3foov() uwtable personality i32 (i32, i64, i8*, i8*)* @__gxx_personality_v0 {
+define void @_Z3foov() uwtable personality ptr @__gxx_personality_v0 {
entry:
invoke void @_Z4barv()
to label %return unwind label %lpad
lpad: ; preds = %entry
- %0 = landingpad { i8*, i32 }
- catch %struct.__fundamental_type_info_pseudo* @_ZTIi
- catch %struct.__fundamental_type_info_pseudo* @_ZTIb
- catch %struct.__fundamental_type_info_pseudo* @_ZTIi
- catch %struct.__fundamental_type_info_pseudo* @_ZTIb
- %exc_ptr2.i = extractvalue { i8*, i32 } %0, 0
- %filter3.i = extractvalue { i8*, i32 } %0, 1
- %typeid.i = tail call i32 @llvm.eh.typeid.for(i8* bitcast (%struct.__fundamental_type_info_pseudo* @_ZTIi to i8*))
+ %0 = landingpad { ptr, i32 }
+ catch ptr @_ZTIi
+ catch ptr @_ZTIb
+ catch ptr @_ZTIi
+ catch ptr @_ZTIb
+ %exc_ptr2.i = extractvalue { ptr, i32 } %0, 0
+ %filter3.i = extractvalue { ptr, i32 } %0, 1
+ %typeid.i = tail call i32 @llvm.eh.typeid.for(ptr @_ZTIi)
; CHECK: call i32 @llvm.eh.typeid.for
%1 = icmp eq i32 %filter3.i, %typeid.i
br i1 %1, label %ppad, label %next
next: ; preds = %lpad
- %typeid1.i = tail call i32 @llvm.eh.typeid.for(i8* bitcast (%struct.__fundamental_type_info_pseudo* @_ZTIb to i8*))
+ %typeid1.i = tail call i32 @llvm.eh.typeid.for(ptr @_ZTIb)
; CHECK: call i32 @llvm.eh.typeid.for
%2 = icmp eq i32 %filter3.i, %typeid1.i
br i1 %2, label %ppad2, label %next2
ppad: ; preds = %lpad
- %3 = tail call i8* @__cxa_begin_catch(i8* %exc_ptr2.i) nounwind
+ %3 = tail call ptr @__cxa_begin_catch(ptr %exc_ptr2.i) nounwind
tail call void @__cxa_end_catch() nounwind
br label %return
ppad2: ; preds = %next
- %D.2073_5.i = tail call i8* @__cxa_begin_catch(i8* %exc_ptr2.i) nounwind
+ %D.2073_5.i = tail call ptr @__cxa_begin_catch(ptr %exc_ptr2.i) nounwind
tail call void @__cxa_end_catch() nounwind
br label %return
next2: ; preds = %next
call void @_Z7cleanupv()
- %typeid = tail call i32 @llvm.eh.typeid.for(i8* bitcast (%struct.__fundamental_type_info_pseudo* @_ZTIi to i8*))
+ %typeid = tail call i32 @llvm.eh.typeid.for(ptr @_ZTIi)
; CHECK-NOT: call i32 @llvm.eh.typeid.for
%4 = icmp eq i32 %filter3.i, %typeid
br i1 %4, label %ppad3, label %next3
next3: ; preds = %next2
- %typeid1 = tail call i32 @llvm.eh.typeid.for(i8* bitcast (%struct.__fundamental_type_info_pseudo* @_ZTIb to i8*))
+ %typeid1 = tail call i32 @llvm.eh.typeid.for(ptr @_ZTIb)
%5 = icmp eq i32 %filter3.i, %typeid1
br i1 %5, label %ppad4, label %unwind
unwind: ; preds = %next3
- resume { i8*, i32 } %0
+ resume { ptr, i32 } %0
ppad3: ; preds = %next2
- %6 = tail call i8* @__cxa_begin_catch(i8* %exc_ptr2.i) nounwind
+ %6 = tail call ptr @__cxa_begin_catch(ptr %exc_ptr2.i) nounwind
tail call void @__cxa_end_catch() nounwind
br label %return
ppad4: ; preds = %next3
- %D.2080_5 = tail call i8* @__cxa_begin_catch(i8* %exc_ptr2.i) nounwind
+ %D.2080_5 = tail call ptr @__cxa_begin_catch(ptr %exc_ptr2.i) nounwind
tail call void @__cxa_end_catch() nounwind
br label %return
diff --git a/llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather-inseltpoison.ll b/llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather-inseltpoison.ll
index dad3dfb9f71bc..c2b123bcb694a 100644
--- a/llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather-inseltpoison.ll
+++ b/llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather-inseltpoison.ll
@@ -1,7 +1,7 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
-declare void @llvm.masked.scatter.v2i32.v2p0i32(<2 x i32> , <2 x i32*> , i32 , <2 x i1> )
-declare <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*>, i32, <2 x i1>, <2 x i32>)
+declare void @llvm.masked.scatter.v2i32.v2p0(<2 x i32> , <2 x ptr> , i32 , <2 x i1> )
+declare <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr>, i32, <2 x i1>, <2 x i32>)
; This test ensures that masked scatter and gather operations, which take vectors of pointers,
; do not have pointer aliasing ignored when being processed.
@@ -12,31 +12,31 @@ declare <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*>, i32, <2 x i1>, <
; CHECK: llvm.masked.gather
; CHECK: llvm.masked.scatter
; CHECK: llvm.masked.gather
-define spir_kernel void @test(<2 x i32*> %in1, <2 x i32*> %in2, i32* %out) {
+define spir_kernel void @test(<2 x ptr> %in1, <2 x ptr> %in2, ptr %out) {
entry:
; Just some temporary storage
%tmp.0 = alloca i32
%tmp.1 = alloca i32
- %tmp.i = insertelement <2 x i32*> poison, i32* %tmp.0, i32 0
- %tmp = insertelement <2 x i32*> %tmp.i, i32* %tmp.1, i32 1
+ %tmp.i = insertelement <2 x ptr> poison, ptr %tmp.0, i32 0
+ %tmp = insertelement <2 x ptr> %tmp.i, ptr %tmp.1, i32 1
; Read from in1 and in2
- %in1.v = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> %in1, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
- %in2.v = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> %in2, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
+ %in1.v = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> %in1, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
+ %in2.v = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> %in2, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
; Store in1 to the allocas
- call void @llvm.masked.scatter.v2i32.v2p0i32(<2 x i32> %in1.v, <2 x i32*> %tmp, i32 1, <2 x i1> <i1 true, i1 true>);
+ call void @llvm.masked.scatter.v2i32.v2p0(<2 x i32> %in1.v, <2 x ptr> %tmp, i32 1, <2 x i1> <i1 true, i1 true>);
; Read in1 from the allocas
; This gather should alias the scatter we just saw
- %tmp.v.0 = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> %tmp, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
+ %tmp.v.0 = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> %tmp, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
; Store in2 to the allocas
- call void @llvm.masked.scatter.v2i32.v2p0i32(<2 x i32> %in2.v, <2 x i32*> %tmp, i32 1, <2 x i1> <i1 true, i1 true>);
+ call void @llvm.masked.scatter.v2i32.v2p0(<2 x i32> %in2.v, <2 x ptr> %tmp, i32 1, <2 x i1> <i1 true, i1 true>);
; Read in2 from the allocas
; This gather should alias the scatter we just saw, and not be eliminated
- %tmp.v.1 = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> %tmp, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
+ %tmp.v.1 = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> %tmp, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
; Store in2 to out for good measure
%tmp.v.1.0 = extractelement <2 x i32> %tmp.v.1, i32 0
%tmp.v.1.1 = extractelement <2 x i32> %tmp.v.1, i32 1
- store i32 %tmp.v.1.0, i32* %out
- %out.1 = getelementptr i32, i32* %out, i32 1
- store i32 %tmp.v.1.1, i32* %out.1
+ store i32 %tmp.v.1.0, ptr %out
+ %out.1 = getelementptr i32, ptr %out, i32 1
+ store i32 %tmp.v.1.1, ptr %out.1
ret void
}
diff --git a/llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather.ll b/llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather.ll
index 1e0cf389d216b..e18f38835e833 100644
--- a/llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather.ll
+++ b/llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather.ll
@@ -1,7 +1,7 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
-declare void @llvm.masked.scatter.v2i32.v2p0i32(<2 x i32> , <2 x i32*> , i32 , <2 x i1> )
-declare <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*>, i32, <2 x i1>, <2 x i32>)
+declare void @llvm.masked.scatter.v2i32.v2p0(<2 x i32> , <2 x ptr> , i32 , <2 x i1> )
+declare <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr>, i32, <2 x i1>, <2 x i32>)
; This test ensures that masked scatter and gather operations, which take vectors of pointers,
; do not have pointer aliasing ignored when being processed.
@@ -12,31 +12,31 @@ declare <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*>, i32, <2 x i1>, <
; CHECK: llvm.masked.gather
; CHECK: llvm.masked.scatter
; CHECK: llvm.masked.gather
-define spir_kernel void @test(<2 x i32*> %in1, <2 x i32*> %in2, i32* %out) {
+define spir_kernel void @test(<2 x ptr> %in1, <2 x ptr> %in2, ptr %out) {
entry:
; Just some temporary storage
%tmp.0 = alloca i32
%tmp.1 = alloca i32
- %tmp.i = insertelement <2 x i32*> undef, i32* %tmp.0, i32 0
- %tmp = insertelement <2 x i32*> %tmp.i, i32* %tmp.1, i32 1
+ %tmp.i = insertelement <2 x ptr> undef, ptr %tmp.0, i32 0
+ %tmp = insertelement <2 x ptr> %tmp.i, ptr %tmp.1, i32 1
; Read from in1 and in2
- %in1.v = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> %in1, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
- %in2.v = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> %in2, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
+ %in1.v = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> %in1, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
+ %in2.v = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> %in2, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
; Store in1 to the allocas
- call void @llvm.masked.scatter.v2i32.v2p0i32(<2 x i32> %in1.v, <2 x i32*> %tmp, i32 1, <2 x i1> <i1 true, i1 true>);
+ call void @llvm.masked.scatter.v2i32.v2p0(<2 x i32> %in1.v, <2 x ptr> %tmp, i32 1, <2 x i1> <i1 true, i1 true>);
; Read in1 from the allocas
; This gather should alias the scatter we just saw
- %tmp.v.0 = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> %tmp, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
+ %tmp.v.0 = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> %tmp, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
; Store in2 to the allocas
- call void @llvm.masked.scatter.v2i32.v2p0i32(<2 x i32> %in2.v, <2 x i32*> %tmp, i32 1, <2 x i1> <i1 true, i1 true>);
+ call void @llvm.masked.scatter.v2i32.v2p0(<2 x i32> %in2.v, <2 x ptr> %tmp, i32 1, <2 x i1> <i1 true, i1 true>);
; Read in2 from the allocas
; This gather should alias the scatter we just saw, and not be eliminated
- %tmp.v.1 = call <2 x i32> @llvm.masked.gather.v2i32.v2p0i32(<2 x i32*> %tmp, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
+ %tmp.v.1 = call <2 x i32> @llvm.masked.gather.v2i32.v2p0(<2 x ptr> %tmp, i32 1, <2 x i1> <i1 true, i1 true>, <2 x i32> undef) #1
; Store in2 to out for good measure
%tmp.v.1.0 = extractelement <2 x i32> %tmp.v.1, i32 0
%tmp.v.1.1 = extractelement <2 x i32> %tmp.v.1, i32 1
- store i32 %tmp.v.1.0, i32* %out
- %out.1 = getelementptr i32, i32* %out, i32 1
- store i32 %tmp.v.1.1, i32* %out.1
+ store i32 %tmp.v.1.0, ptr %out
+ %out.1 = getelementptr i32, ptr %out, i32 1
+ store i32 %tmp.v.1.1, ptr %out.1
ret void
}
diff --git a/llvm/test/Transforms/GVN/MemdepMiscompile.ll b/llvm/test/Transforms/GVN/MemdepMiscompile.ll
index 405eff009345e..cb9b01142886c 100644
--- a/llvm/test/Transforms/GVN/MemdepMiscompile.ll
+++ b/llvm/test/Transforms/GVN/MemdepMiscompile.ll
@@ -13,14 +13,14 @@ entry:
; CHECK: call void @RunInMode
; CHECK: br i1 %tobool, label %while.cond.backedge, label %if.then
; CHECK: while.cond.backedge:
-; CHECK: load i32, i32* %shouldExit
+; CHECK: load i32, ptr %shouldExit
; CHECK: br i1 %cmp, label %while.body
%shouldExit = alloca i32, align 4
%tasksIdle = alloca i32, align 4
- store i32 0, i32* %shouldExit, align 4
- store i32 0, i32* %tasksIdle, align 4
- call void @CTestInitialize(i32* %tasksIdle) nounwind
- %0 = load i32, i32* %shouldExit, align 4
+ store i32 0, ptr %shouldExit, align 4
+ store i32 0, ptr %tasksIdle, align 4
+ call void @CTestInitialize(ptr %tasksIdle) nounwind
+ %0 = load i32, ptr %shouldExit, align 4
%cmp1 = icmp eq i32 %0, 0
br i1 %cmp1, label %while.body.lr.ph, label %while.end
@@ -29,17 +29,17 @@ while.body.lr.ph:
while.body:
call void @RunInMode(i32 100) nounwind
- %1 = load i32, i32* %tasksIdle, align 4
+ %1 = load i32, ptr %tasksIdle, align 4
%tobool = icmp eq i32 %1, 0
br i1 %tobool, label %while.cond.backedge, label %if.then
if.then:
- store i32 0, i32* %tasksIdle, align 4
- call void @TimerCreate(i32* %shouldExit) nounwind
+ store i32 0, ptr %tasksIdle, align 4
+ call void @TimerCreate(ptr %shouldExit) nounwind
br label %while.cond.backedge
while.cond.backedge:
- %2 = load i32, i32* %shouldExit, align 4
+ %2 = load i32, ptr %shouldExit, align 4
%cmp = icmp eq i32 %2, 0
br i1 %cmp, label %while.body, label %while.cond.while.end_crit_edge
@@ -49,6 +49,6 @@ while.cond.while.end_crit_edge:
while.end:
ret i32 0
}
-declare void @CTestInitialize(i32*)
+declare void @CTestInitialize(ptr)
declare void @RunInMode(i32)
-declare void @TimerCreate(i32*)
+declare void @TimerCreate(ptr)
diff --git a/llvm/test/Transforms/GVN/PRE/2009-02-17-LoadPRECrash.ll b/llvm/test/Transforms/GVN/PRE/2009-02-17-LoadPRECrash.ll
index d5037ef23d7ae..a7cb53545847c 100644
--- a/llvm/test/Transforms/GVN/PRE/2009-02-17-LoadPRECrash.ll
+++ b/llvm/test/Transforms/GVN/PRE/2009-02-17-LoadPRECrash.ll
@@ -1,35 +1,35 @@
; RUN: opt < %s -passes=gvn -enable-load-pre -disable-output
- %struct.VEC_rtx_base = type { i32, i32, [1 x %struct.rtx_def*] }
+ %struct.VEC_rtx_base = type { i32, i32, [1 x ptr] }
%struct.VEC_rtx_gc = type { %struct.VEC_rtx_base }
- %struct.block_symbol = type { [3 x %struct.cgraph_rtl_info], %struct.object_block*, i64 }
+ %struct.block_symbol = type { [3 x %struct.cgraph_rtl_info], ptr, i64 }
%struct.cgraph_rtl_info = type { i32 }
- %struct.object_block = type { %struct.section*, i32, i64, %struct.VEC_rtx_gc*, %struct.VEC_rtx_gc* }
- %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
+ %struct.object_block = type { ptr, i32, i64, ptr, ptr }
+ %struct.rtvec_def = type { i32, [1 x ptr] }
%struct.rtx_def = type { i16, i8, i8, %struct.u }
%struct.section = type { %struct.unnamed_section }
%struct.u = type { %struct.block_symbol }
- %struct.unnamed_section = type { %struct.cgraph_rtl_info, void (i8*)*, i8*, %struct.section* }
+ %struct.unnamed_section = type { %struct.cgraph_rtl_info, ptr, ptr, ptr }
-declare %struct.rtvec_def* @gen_rtvec(i32, ...)
+declare ptr @gen_rtvec(i32, ...)
-declare %struct.rtx_def* @plus_constant(%struct.rtx_def*, i64)
+declare ptr @plus_constant(ptr, i64)
-declare %struct.rtx_def* @gen_rtx_fmt_Ei(i32, i32, %struct.rtvec_def*, i32)
+declare ptr @gen_rtx_fmt_Ei(i32, i32, ptr, i32)
-declare i32 @local_symbolic_operand(%struct.rtx_def*, i32)
+declare i32 @local_symbolic_operand(ptr, i32)
-define %struct.rtx_def* @legitimize_pic_address(%struct.rtx_def* %orig, %struct.rtx_def* %reg) nounwind {
+define ptr @legitimize_pic_address(ptr %orig, ptr %reg) nounwind {
entry:
- %addr = alloca %struct.rtx_def* ; <%struct.rtx_def**> [#uses=5]
- %iftmp.1532 = alloca %struct.rtx_def* ; <%struct.rtx_def**> [#uses=3]
- store %struct.rtx_def* %orig, %struct.rtx_def** null
- %0 = load %struct.rtx_def*, %struct.rtx_def** null, align 4 ; <%struct.rtx_def*> [#uses=0]
+ %addr = alloca ptr ; <ptr> [#uses=5]
+ %iftmp.1532 = alloca ptr ; <ptr> [#uses=3]
+ store ptr %orig, ptr null
+ %0 = load ptr, ptr null, align 4 ; <ptr> [#uses=0]
br i1 false, label %bb96, label %bb59
bb59: ; preds = %entry
- %1 = load %struct.rtx_def*, %struct.rtx_def** %addr, align 4 ; <%struct.rtx_def*> [#uses=1]
- %2 = call i32 @local_symbolic_operand(%struct.rtx_def* %1, i32 0) nounwind ; <i32> [#uses=0]
+ %1 = load ptr, ptr %addr, align 4 ; <ptr> [#uses=1]
+ %2 = call i32 @local_symbolic_operand(ptr %1, i32 0) nounwind ; <i32> [#uses=0]
br i1 false, label %bb96, label %bb63
bb63: ; preds = %bb59
@@ -54,7 +54,7 @@ bb76: ; preds = %bb75, %bb74
br i1 false, label %bb77, label %bb84
bb77: ; preds = %bb76
- %3 = getelementptr [1 x %struct.cgraph_rtl_info], [1 x %struct.cgraph_rtl_info]* null, i32 0, i32 0 ; <%struct.cgraph_rtl_info*> [#uses=0]
+ %3 = getelementptr [1 x %struct.cgraph_rtl_info], ptr null, i32 0, i32 0 ; <ptr> [#uses=0]
unreachable
bb84: ; preds = %bb76
@@ -67,7 +67,7 @@ bb86: ; preds = %bb84
br label %bb87
bb87: ; preds = %bb86, %bb85
- %4 = call %struct.rtx_def* @gen_rtx_fmt_Ei(i32 16, i32 0, %struct.rtvec_def* null, i32 1) nounwind ; <%struct.rtx_def*> [#uses=0]
+ %4 = call ptr @gen_rtx_fmt_Ei(i32 16, i32 0, ptr null, i32 1) nounwind ; <ptr> [#uses=0]
br i1 false, label %bb89, label %bb90
bb89: ; preds = %bb87
@@ -89,22 +89,22 @@ bb94: ; preds = %bb93, %bb92
unreachable
bb96: ; preds = %bb59, %entry
- %5 = load %struct.rtx_def*, %struct.rtx_def** %addr, align 4 ; <%struct.rtx_def*> [#uses=1]
- %6 = getelementptr %struct.rtx_def, %struct.rtx_def* %5, i32 0, i32 0 ; <i16*> [#uses=1]
- %7 = load i16, i16* %6, align 2 ; <i16> [#uses=0]
+ %5 = load ptr, ptr %addr, align 4 ; <ptr> [#uses=1]
+ %6 = getelementptr %struct.rtx_def, ptr %5, i32 0, i32 0 ; <ptr> [#uses=1]
+ %7 = load i16, ptr %6, align 2 ; <i16> [#uses=0]
br i1 false, label %bb147, label %bb97
bb97: ; preds = %bb96
- %8 = load %struct.rtx_def*, %struct.rtx_def** %addr, align 4 ; <%struct.rtx_def*> [#uses=0]
+ %8 = load ptr, ptr %addr, align 4 ; <ptr> [#uses=0]
br i1 false, label %bb147, label %bb99
bb99: ; preds = %bb97
unreachable
bb147: ; preds = %bb97, %bb96
- %9 = load %struct.rtx_def*, %struct.rtx_def** %addr, align 4 ; <%struct.rtx_def*> [#uses=1]
- %10 = getelementptr %struct.rtx_def, %struct.rtx_def* %9, i32 0, i32 0 ; <i16*> [#uses=1]
- %11 = load i16, i16* %10, align 2 ; <i16> [#uses=0]
+ %9 = load ptr, ptr %addr, align 4 ; <ptr> [#uses=1]
+ %10 = getelementptr %struct.rtx_def, ptr %9, i32 0, i32 0 ; <ptr> [#uses=1]
+ %11 = load i16, ptr %10, align 2 ; <i16> [#uses=0]
br i1 false, label %bb164, label %bb148
bb148: ; preds = %bb147
@@ -120,7 +120,7 @@ bb152: ; preds = %bb149
br label %bb164
bb164: ; preds = %bb152, %bb148, %bb147
- %12 = getelementptr [1 x %struct.cgraph_rtl_info], [1 x %struct.cgraph_rtl_info]* null, i32 0, i32 1 ; <%struct.cgraph_rtl_info*> [#uses=0]
+ %12 = getelementptr [1 x %struct.cgraph_rtl_info], ptr null, i32 0, i32 1 ; <ptr> [#uses=0]
br i1 false, label %bb165, label %bb166
bb165: ; preds = %bb164
@@ -163,31 +163,29 @@ bb180: ; preds = %bb179, %bb178
br label %bb181
bb181: ; preds = %bb180, %bb170
- %13 = call %struct.rtvec_def* (i32, ...) @gen_rtvec(i32 1, %struct.rtx_def* null) nounwind ; <%struct.rtvec_def*> [#uses=0]
+ %13 = call ptr (i32, ...) @gen_rtvec(i32 1, ptr null) nounwind ; <ptr> [#uses=0]
unreachable
bb211: ; preds = %bb168, %bb167
- %14 = load %struct.rtx_def*, %struct.rtx_def** %addr, align 4 ; <%struct.rtx_def*> [#uses=0]
- %15 = getelementptr [1 x %struct.cgraph_rtl_info], [1 x %struct.cgraph_rtl_info]* null, i32 0, i32 0 ; <%struct.cgraph_rtl_info*> [#uses=0]
- store %struct.rtx_def* null, %struct.rtx_def** null, align 4
+ %14 = load ptr, ptr %addr, align 4 ; <ptr> [#uses=0]
+ %15 = getelementptr [1 x %struct.cgraph_rtl_info], ptr null, i32 0, i32 0 ; <ptr> [#uses=0]
+ store ptr null, ptr null, align 4
br i1 false, label %bb212, label %bb213
bb212: ; preds = %bb211
- store %struct.rtx_def* null, %struct.rtx_def** %iftmp.1532, align 4
+ store ptr null, ptr %iftmp.1532, align 4
br label %bb214
bb213: ; preds = %bb211
- store %struct.rtx_def* null, %struct.rtx_def** %iftmp.1532, align 4
+ store ptr null, ptr %iftmp.1532, align 4
br label %bb214
bb214: ; preds = %bb213, %bb212
- %16 = bitcast %struct.block_symbol* null to [1 x %struct.cgraph_rtl_info]* ; <[1 x %struct.cgraph_rtl_info]*> [#uses=1]
- %17 = getelementptr [1 x %struct.cgraph_rtl_info], [1 x %struct.cgraph_rtl_info]* %16, i32 0, i32 1 ; <%struct.cgraph_rtl_info*> [#uses=0]
- %18 = load %struct.rtx_def*, %struct.rtx_def** %iftmp.1532, align 4 ; <%struct.rtx_def*> [#uses=0]
- %19 = getelementptr %struct.rtx_def, %struct.rtx_def* null, i32 0, i32 3 ; <%struct.u*> [#uses=1]
- %20 = getelementptr %struct.u, %struct.u* %19, i32 0, i32 0 ; <%struct.block_symbol*> [#uses=1]
- %21 = bitcast %struct.block_symbol* %20 to [1 x i64]* ; <[1 x i64]*> [#uses=1]
- %22 = getelementptr [1 x i64], [1 x i64]* %21, i32 0, i32 0 ; <i64*> [#uses=0]
- %23 = call %struct.rtx_def* @plus_constant(%struct.rtx_def* null, i64 0) nounwind ; <%struct.rtx_def*> [#uses=0]
+ %16 = getelementptr [1 x %struct.cgraph_rtl_info], ptr null, i32 0, i32 1 ; <ptr> [#uses=0]
+ %17 = load ptr, ptr %iftmp.1532, align 4 ; <ptr> [#uses=0]
+ %18 = getelementptr %struct.rtx_def, ptr null, i32 0, i32 3 ; <ptr> [#uses=1]
+ %19 = getelementptr %struct.u, ptr %18, i32 0, i32 0 ; <ptr> [#uses=1]
+ %20 = getelementptr [1 x i64], ptr %19, i32 0, i32 0 ; <ptr> [#uses=0]
+ %21 = call ptr @plus_constant(ptr null, i64 0) nounwind ; <ptr> [#uses=0]
unreachable
}
diff --git a/llvm/test/Transforms/GVN/PRE/2009-06-17-InvalidPRE.ll b/llvm/test/Transforms/GVN/PRE/2009-06-17-InvalidPRE.ll
index b21b08677c93d..506ad7ce6cd35 100644
--- a/llvm/test/Transforms/GVN/PRE/2009-06-17-InvalidPRE.ll
+++ b/llvm/test/Transforms/GVN/PRE/2009-06-17-InvalidPRE.ll
@@ -5,11 +5,11 @@
; ModuleID = 'mbuf.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.6"
- %struct.mbuf = type { %struct.mbuf*, %struct.mbuf*, i32, i8*, i16, i16, i32 }
+ %struct.mbuf = type { ptr, ptr, i32, ptr, i16, i16, i32 }
-define void @m_adj(%struct.mbuf* %mp, i32 %req_len) nounwind optsize {
+define void @m_adj(ptr %mp, i32 %req_len) nounwind optsize {
entry:
- %0 = icmp eq %struct.mbuf* %mp, null ; <i1> [#uses=1]
+ %0 = icmp eq ptr %mp, null ; <i1> [#uses=1]
%1 = icmp slt i32 %req_len, 0 ; <i1> [#uses=1]
%or.cond = or i1 %1, %0 ; <i1> [#uses=1]
br i1 %or.cond, label %return, label %bb4.preheader
@@ -19,20 +19,20 @@ bb4.preheader: ; preds = %entry
bb2: ; preds = %bb1
%2 = sub i32 %len.0, %13 ; <i32> [#uses=1]
- %3 = getelementptr %struct.mbuf, %struct.mbuf* %m.0.ph, i32 0, i32 2 ; <i32*> [#uses=1]
- store i32 0, i32* %3, align 4
- %4 = getelementptr %struct.mbuf, %struct.mbuf* %m.0.ph, i32 0, i32 0 ; <%struct.mbuf**> [#uses=1]
- %5 = load %struct.mbuf*, %struct.mbuf** %4, align 4 ; <%struct.mbuf*> [#uses=1]
+ %3 = getelementptr %struct.mbuf, ptr %m.0.ph, i32 0, i32 2 ; <ptr> [#uses=1]
+ store i32 0, ptr %3, align 4
+ %4 = getelementptr %struct.mbuf, ptr %m.0.ph, i32 0, i32 0 ; <ptr> [#uses=1]
+ %5 = load ptr, ptr %4, align 4 ; <ptr> [#uses=1]
br label %bb4.outer
bb4.outer: ; preds = %bb4.preheader, %bb2
- %m.0.ph = phi %struct.mbuf* [ %5, %bb2 ], [ %mp, %bb4.preheader ] ; <%struct.mbuf*> [#uses=7]
+ %m.0.ph = phi ptr [ %5, %bb2 ], [ %mp, %bb4.preheader ] ; <ptr> [#uses=7]
%len.0.ph = phi i32 [ %2, %bb2 ], [ %req_len, %bb4.preheader ] ; <i32> [#uses=1]
- %6 = icmp ne %struct.mbuf* %m.0.ph, null ; <i1> [#uses=1]
- %7 = getelementptr %struct.mbuf, %struct.mbuf* %m.0.ph, i32 0, i32 2 ; <i32*> [#uses=1]
- %8 = getelementptr %struct.mbuf, %struct.mbuf* %m.0.ph, i32 0, i32 2 ; <i32*> [#uses=1]
- %9 = getelementptr %struct.mbuf, %struct.mbuf* %m.0.ph, i32 0, i32 3 ; <i8**> [#uses=1]
- %10 = getelementptr %struct.mbuf, %struct.mbuf* %m.0.ph, i32 0, i32 3 ; <i8**> [#uses=1]
+ %6 = icmp ne ptr %m.0.ph, null ; <i1> [#uses=1]
+ %7 = getelementptr %struct.mbuf, ptr %m.0.ph, i32 0, i32 2 ; <ptr> [#uses=1]
+ %8 = getelementptr %struct.mbuf, ptr %m.0.ph, i32 0, i32 2 ; <ptr> [#uses=1]
+ %9 = getelementptr %struct.mbuf, ptr %m.0.ph, i32 0, i32 3 ; <ptr> [#uses=1]
+ %10 = getelementptr %struct.mbuf, ptr %m.0.ph, i32 0, i32 3 ; <ptr> [#uses=1]
br label %bb4
bb4: ; preds = %bb4.outer, %bb3
@@ -42,21 +42,21 @@ bb4: ; preds = %bb4.outer, %bb3
br i1 %12, label %bb1, label %bb7
bb1: ; preds = %bb4
- %13 = load i32, i32* %7, align 4 ; <i32> [#uses=3]
+ %13 = load i32, ptr %7, align 4 ; <i32> [#uses=3]
%14 = icmp sgt i32 %13, %len.0 ; <i1> [#uses=1]
br i1 %14, label %bb3, label %bb2
bb3: ; preds = %bb1
%15 = sub i32 %13, %len.0 ; <i32> [#uses=1]
- store i32 %15, i32* %8, align 4
- %16 = load i8*, i8** %9, align 4 ; <i8*> [#uses=1]
- %17 = getelementptr i8, i8* %16, i32 %len.0 ; <i8*> [#uses=1]
- store i8* %17, i8** %10, align 4
+ store i32 %15, ptr %8, align 4
+ %16 = load ptr, ptr %9, align 4 ; <ptr> [#uses=1]
+ %17 = getelementptr i8, ptr %16, i32 %len.0 ; <ptr> [#uses=1]
+ store ptr %17, ptr %10, align 4
br label %bb4
bb7: ; preds = %bb4
- %18 = getelementptr %struct.mbuf, %struct.mbuf* %mp, i32 0, i32 5 ; <i16*> [#uses=1]
- %19 = load i16, i16* %18, align 2 ; <i16> [#uses=1]
+ %18 = getelementptr %struct.mbuf, ptr %mp, i32 0, i32 5 ; <ptr> [#uses=1]
+ %19 = load i16, ptr %18, align 2 ; <i16> [#uses=1]
%20 = zext i16 %19 to i32 ; <i32> [#uses=1]
%21 = and i32 %20, 2 ; <i32> [#uses=1]
%22 = icmp eq i32 %21, 0 ; <i1> [#uses=1]
@@ -64,8 +64,8 @@ bb7: ; preds = %bb4
bb8: ; preds = %bb7
%23 = sub i32 %req_len, %len.0 ; <i32> [#uses=1]
- %24 = getelementptr %struct.mbuf, %struct.mbuf* %mp, i32 0, i32 6 ; <i32*> [#uses=1]
- store i32 %23, i32* %24, align 4
+ %24 = getelementptr %struct.mbuf, ptr %mp, i32 0, i32 6 ; <ptr> [#uses=1]
+ store i32 %23, ptr %24, align 4
ret void
return: ; preds = %bb7, %entry
diff --git a/llvm/test/Transforms/GVN/PRE/2011-06-01-NonLocalMemdepMiscompile.ll b/llvm/test/Transforms/GVN/PRE/2011-06-01-NonLocalMemdepMiscompile.ll
index b2ac1d083747a..951ee21a4594b 100644
--- a/llvm/test/Transforms/GVN/PRE/2011-06-01-NonLocalMemdepMiscompile.ll
+++ b/llvm/test/Transforms/GVN/PRE/2011-06-01-NonLocalMemdepMiscompile.ll
@@ -5,23 +5,23 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-macosx10.7.0"
-define i1 @rb_intern(i8 *%foo) nounwind ssp {
+define i1 @rb_intern(ptr %foo) nounwind ssp {
; CHECK-LABEL: @rb_intern(
bb:
- %tmp = alloca i8*, align 8
- store i8* null, i8** %tmp, align 8
- store i8 undef, i8* null, align 536870912
+ %tmp = alloca ptr, align 8
+ store ptr null, ptr %tmp, align 8
+ store i8 undef, ptr null, align 536870912
br label %bb1
bb1:
br i1 undef, label %bb3, label %bb15
; CHECK: bb1:
-; CHECK: [[TMP:%.*]] = phi i8* [ %tmp14, %bb10 ], [ null, %bb ]
+; CHECK: [[TMP:%.*]] = phi ptr [ %tmp14, %bb10 ], [ null, %bb ]
; CHECK: bb1.bb15_crit_edge:
-; CHECK: %tmp17.pre = load i8, i8* [[TMP]], align 1
+; CHECK: %tmp17.pre = load i8, ptr [[TMP]], align 1
bb3:
call void @isalnum()
@@ -31,22 +31,22 @@ bb5:
br i1 undef, label %bb10, label %bb6
bb6:
- %tmp7 = load i8*, i8** %tmp, align 8
- %tmp8 = load i8, i8* %tmp7, align 1
+ %tmp7 = load ptr, ptr %tmp, align 8
+ %tmp8 = load i8, ptr %tmp7, align 1
%tmp9 = zext i8 %tmp8 to i64
br i1 undef, label %bb15, label %bb10
bb10:
- %tmp11 = load i8*, i8** %tmp, align 8
- %tmp12 = load i8, i8* %tmp11, align 1
+ %tmp11 = load ptr, ptr %tmp, align 8
+ %tmp12 = load i8, ptr %tmp11, align 1
%tmp13 = zext i8 %tmp12 to i64
- %tmp14 = getelementptr inbounds i8, i8* %foo, i64 undef
- store i8* %tmp14, i8** %tmp, align 8
+ %tmp14 = getelementptr inbounds i8, ptr %foo, i64 undef
+ store ptr %tmp14, ptr %tmp, align 8
br label %bb1
bb15:
- %tmp16 = load i8*, i8** %tmp, align 8
- %tmp17 = load i8, i8* %tmp16, align 1
+ %tmp16 = load ptr, ptr %tmp, align 8
+ %tmp17 = load i8, ptr %tmp16, align 1
%tmp18 = icmp eq i8 %tmp17, 0
br label %bb19
diff --git a/llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll b/llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
index ccae5b24d079c..fc13782b66c88 100644
--- a/llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
+++ b/llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
@@ -11,12 +11,12 @@
; struct node *node;
; };
-; extern int bar(void *v, void* n);
+; extern int bar(ptr v, ptr n);
; int test(struct desc *desc)
; {
-; void *v, *n;
-; v = !desc ? ((void *)0) : desc->node->v; // Line 15
+; ptr v, *n;
+; v = !desc ? ((ptr)0) : desc->node->v; // Line 15
; n = &desc->node->descs[0]; // Line 16
; return bar(v, n);
; }
@@ -28,36 +28,33 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-gnu"
-%struct.desc = type { %struct.node* }
-%struct.node = type { i32*, %struct.desc* }
+%struct.desc = type { ptr }
+%struct.node = type { ptr, ptr }
-define i32 @test(%struct.desc* readonly %desc) local_unnamed_addr #0 !dbg !4 {
+define i32 @test(ptr readonly %desc) local_unnamed_addr #0 !dbg !4 {
entry:
- %tobool = icmp eq %struct.desc* %desc, null
+ %tobool = icmp eq ptr %desc, null
br i1 %tobool, label %cond.end, label %cond.false, !dbg !9
; ALL: br i1 %tobool, label %entry.cond.end_crit_edge, label %cond.false, !dbg [[LOC_15_6:![0-9]+]]
; ALL: entry.cond.end_crit_edge:
-; GVN: %.pre = load %struct.node*, %struct.node** null, align 8, !dbg [[LOC_16_13:![0-9]+]]
-; INSTCOMBINE:store %struct.node* poison, %struct.node** null, align 4294967296, !dbg [[LOC_16_13:![0-9]+]]
+; GVN: %.pre = load ptr, ptr null, align 8, !dbg [[LOC_16_13:![0-9]+]]
+; INSTCOMBINE:store ptr poison, ptr null, align 4294967296, !dbg [[LOC_16_13:![0-9]+]]
cond.false:
- %0 = bitcast %struct.desc* %desc to i8***, !dbg !11
- %1 = load i8**, i8*** %0, align 8, !dbg !11
- %2 = load i8*, i8** %1, align 8
+ %0 = load ptr, ptr %desc, align 8, !dbg !11
+ %1 = load ptr, ptr %0, align 8
br label %cond.end, !dbg !9
cond.end:
- %3 = phi i8* [ %2, %cond.false ], [ null, %entry ], !dbg !9
- %node2 = getelementptr inbounds %struct.desc, %struct.desc* %desc, i64 0, i32 0
- %4 = load %struct.node*, %struct.node** %node2, align 8, !dbg !10
- %descs = getelementptr inbounds %struct.node, %struct.node* %4, i64 0, i32 1
- %5 = bitcast %struct.desc** %descs to i8**
- %6 = load i8*, i8** %5, align 8
- %call = tail call i32 @bar(i8* %3, i8* %6)
+ %2 = phi ptr [ %1, %cond.false ], [ null, %entry ], !dbg !9
+ %3 = load ptr, ptr %desc, align 8, !dbg !10
+ %descs = getelementptr inbounds %struct.node, ptr %3, i64 0, i32 1
+ %4 = load ptr, ptr %descs, align 8
+ %call = tail call i32 @bar(ptr %2, ptr %4)
ret i32 %call
}
-declare i32 @bar(i8*, i8*) local_unnamed_addr #1
+declare i32 @bar(ptr, ptr) local_unnamed_addr #1
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!2, !3}
diff --git a/llvm/test/Transforms/GVN/PRE/2017-10-16-LoadPRECrash.ll b/llvm/test/Transforms/GVN/PRE/2017-10-16-LoadPRECrash.ll
index 46f2d98d12f81..04de10a5cc1dc 100644
--- a/llvm/test/Transforms/GVN/PRE/2017-10-16-LoadPRECrash.ll
+++ b/llvm/test/Transforms/GVN/PRE/2017-10-16-LoadPRECrash.ll
@@ -3,13 +3,13 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-%ArrayImpl = type { i64, i64 addrspace(100)*, [1 x i64], [1 x i64], [1 x i64], i64, i64, double addrspace(100)*, double addrspace(100)*, i8, i64 }
+%ArrayImpl = type { i64, ptr addrspace(100), [1 x i64], [1 x i64], [1 x i64], i64, i64, ptr addrspace(100), ptr addrspace(100), i8, i64 }
; Function Attrs: readnone
-declare %ArrayImpl* @getaddr_ArrayImpl(%ArrayImpl addrspace(100)*) #0
+declare ptr @getaddr_ArrayImpl(ptr addrspace(100)) #0
; Function Attrs: readnone
-declare i64* @getaddr_i64(i64 addrspace(100)*) #0
+declare ptr @getaddr_i64(ptr addrspace(100)) #0
; Make sure that the test compiles without a crash.
; Bug https://bugs.llvm.org/show_bug.cgi?id=34937
@@ -18,21 +18,21 @@ define hidden void @wrapon_fn173() {
; CHECK-LABEL: @wrapon_fn173
; CHECK: entry:
-; CHECK-NEXT: call %ArrayImpl* @getaddr_ArrayImpl(%ArrayImpl addrspace(100)* undef)
-; CHECK-NEXT: %.pre = load i64 addrspace(100)*, i64 addrspace(100)** null, align 8
+; CHECK-NEXT: call ptr @getaddr_ArrayImpl(ptr addrspace(100) undef)
+; CHECK-NEXT: %.pre = load ptr addrspace(100), ptr null, align 8
; CHECK-NEXT: br label %loop
; CHECK: loop:
-; CHECK-NEXT: call i64* @getaddr_i64(i64 addrspace(100)* %.pre)
+; CHECK-NEXT: call ptr @getaddr_i64(ptr addrspace(100) %.pre)
; CHECK-NEXT: br label %loop
entry:
- %0 = call %ArrayImpl* @getaddr_ArrayImpl(%ArrayImpl addrspace(100)* undef)
+ %0 = call ptr @getaddr_ArrayImpl(ptr addrspace(100) undef)
br label %loop
loop:
- %1 = call %ArrayImpl* @getaddr_ArrayImpl(%ArrayImpl addrspace(100)* undef)
- %2 = load i64 addrspace(100)*, i64 addrspace(100)** null, align 8
- %3 = call i64* @getaddr_i64(i64 addrspace(100)* %2)
+ %1 = call ptr @getaddr_ArrayImpl(ptr addrspace(100) undef)
+ %2 = load ptr addrspace(100), ptr null, align 8
+ %3 = call ptr @getaddr_i64(ptr addrspace(100) %2)
br label %loop
}
diff --git a/llvm/test/Transforms/GVN/PRE/invariant-load.ll b/llvm/test/Transforms/GVN/PRE/invariant-load.ll
index 433fd9f04a8c3..686c40d0c6b83 100644
--- a/llvm/test/Transforms/GVN/PRE/invariant-load.ll
+++ b/llvm/test/Transforms/GVN/PRE/invariant-load.ll
@@ -1,66 +1,66 @@
; Test if the !invariant.load metadata is maintained by GVN.
; RUN: opt -passes=gvn -S < %s | FileCheck %s
-define i32 @test1(i32* nocapture %p, i8* nocapture %q) {
+define i32 @test1(ptr nocapture %p, ptr nocapture %q) {
; CHECK-LABEL: test1
-; CHECK: %x = load i32, i32* %p, align 4, !invariant.load !0
+; CHECK: %x = load i32, ptr %p, align 4, !invariant.load !0
; CHECK-NOT: %y = load
entry:
- %x = load i32, i32* %p, align 4, !invariant.load !0
+ %x = load i32, ptr %p, align 4, !invariant.load !0
%conv = trunc i32 %x to i8
- store i8 %conv, i8* %q, align 1
- %y = load i32, i32* %p, align 4, !invariant.load !0
+ store i8 %conv, ptr %q, align 1
+ %y = load i32, ptr %p, align 4, !invariant.load !0
%add = add i32 %y, 1
ret i32 %add
}
-define i32 @test2(i32* nocapture %p, i8* nocapture %q) {
+define i32 @test2(ptr nocapture %p, ptr nocapture %q) {
; CHECK-LABEL: test2
; CHECK-NOT: !invariant.load
; CHECK-NOT: %y = load
entry:
- %x = load i32, i32* %p, align 4
+ %x = load i32, ptr %p, align 4
%conv = trunc i32 %x to i8
- store i8 %conv, i8* %q, align 1
- %y = load i32, i32* %p, align 4, !invariant.load !0
+ store i8 %conv, ptr %q, align 1
+ %y = load i32, ptr %p, align 4, !invariant.load !0
%add = add i32 %y, 1
ret i32 %add
}
; With the invariant.load metadata, what would otherwise
; be a case for PRE becomes a full redundancy.
-define i32 @test3(i1 %cnd, i32* %p, i32* %q) {
+define i32 @test3(i1 %cnd, ptr %p, ptr %q) {
; CHECK-LABEL: test3
; CHECK-NOT: load
entry:
- %v1 = load i32, i32* %p
+ %v1 = load i32, ptr %p
br i1 %cnd, label %bb1, label %bb2
bb1:
- store i32 5, i32* %q
+ store i32 5, ptr %q
br label %bb2
bb2:
- %v2 = load i32, i32* %p, !invariant.load !0
+ %v2 = load i32, ptr %p, !invariant.load !0
%res = sub i32 %v1, %v2
ret i32 %res
}
; This test is here to document a case which doesn't optimize
; as well as it could.
-define i32 @test4(i1 %cnd, i32* %p, i32* %q) {
+define i32 @test4(i1 %cnd, ptr %p, ptr %q) {
; CHECK-LABEL: test4
; %v2 is redundant, but GVN currently doesn't catch that
entry:
- %v1 = load i32, i32* %p, !invariant.load !0
+ %v1 = load i32, ptr %p, !invariant.load !0
br i1 %cnd, label %bb1, label %bb2
bb1:
- store i32 5, i32* %q
+ store i32 5, ptr %q
br label %bb2
bb2:
- %v2 = load i32, i32* %p
+ %v2 = load i32, ptr %p
%res = sub i32 %v1, %v2
ret i32 %res
}
@@ -68,15 +68,15 @@ bb2:
; Checks that we return the mustalias store as a def
; so that it contributes to value forwarding. Note
; that we could and should remove the store too.
-define i32 @test5(i1 %cnd, i32* %p) {
+define i32 @test5(i1 %cnd, ptr %p) {
; CHECK-LABEL: test5
; CHECK-LABEL: entry:
-; CHECK-NEXT: store i32 5, i32* %p
+; CHECK-NEXT: store i32 5, ptr %p
; CHECK-NEXT: ret i32 5
entry:
- %v1 = load i32, i32* %p, !invariant.load !0
- store i32 5, i32* %p ;; must alias store, want to exploit
- %v2 = load i32, i32* %p, !invariant.load !0
+ %v1 = load i32, ptr %p, !invariant.load !0
+ store i32 5, ptr %p ;; must alias store, want to exploit
+ %v2 = load i32, ptr %p, !invariant.load !0
ret i32 %v2
}
@@ -84,50 +84,50 @@ entry:
declare void @foo()
; Clobbering (mayalias) stores, even in function calls, can be ignored
-define i32 @test6(i1 %cnd, i32* %p) {
+define i32 @test6(i1 %cnd, ptr %p) {
; CHECK-LABEL: test6
; CHECK-LABEL: entry:
; CHECK-NEXT: @foo
; CHECK-NEXT: ret i32 0
entry:
- %v1 = load i32, i32* %p, !invariant.load !0
+ %v1 = load i32, ptr %p, !invariant.load !0
call void @foo()
- %v2 = load i32, i32* %p, !invariant.load !0
+ %v2 = load i32, ptr %p, !invariant.load !0
%res = sub i32 %v1, %v2
ret i32 %res
}
-declare noalias i32* @bar(...)
+declare noalias ptr @bar(...)
; Same as previous, but a function with a noalias result (since they're handled
;
diff erently in MDA)
-define i32 @test7(i1 %cnd, i32* %p) {
+define i32 @test7(i1 %cnd, ptr %p) {
; CHECK-LABEL: test7
; CHECK-LABEL: entry:
; CHECK-NEXT: @bar
; CHECK-NEXT: ret i32 0
entry:
- %v1 = load i32, i32* %p, !invariant.load !0
- call i32* (...) @bar(i32* %p)
- %v2 = load i32, i32* %p, !invariant.load !0
+ %v1 = load i32, ptr %p, !invariant.load !0
+ call ptr (...) @bar(ptr %p)
+ %v2 = load i32, ptr %p, !invariant.load !0
%res = sub i32 %v1, %v2
ret i32 %res
}
-define i32 @test8(i1 %cnd, i32* %p) {
+define i32 @test8(i1 %cnd, ptr %p) {
; CHECK-LABEL: test8
; CHECK: @bar
-; CHECK: load i32, i32* %p2, align 4, !invariant.load
+; CHECK: load i32, ptr %p2, align 4, !invariant.load
; CHECK: br label %merge
entry:
- %v1 = load i32, i32* %p, !invariant.load !0
+ %v1 = load i32, ptr %p, !invariant.load !0
br i1 %cnd, label %taken, label %merge
taken:
- %p2 = call i32* (...) @bar(i32* %p)
+ %p2 = call ptr (...) @bar(ptr %p)
br label %merge
merge:
- %p3 = phi i32* [%p, %entry], [%p2, %taken]
- %v2 = load i32, i32* %p3, !invariant.load !0
+ %p3 = phi ptr [%p, %entry], [%p2, %taken]
+ %v2 = load i32, ptr %p3, !invariant.load !0
%res = sub i32 %v1, %v2
ret i32 %res
}
diff --git a/llvm/test/Transforms/GVN/PRE/load-pre-align.ll b/llvm/test/Transforms/GVN/PRE/load-pre-align.ll
index ea60f317012e6..aec47f6d12dd1 100644
--- a/llvm/test/Transforms/GVN/PRE/load-pre-align.ll
+++ b/llvm/test/Transforms/GVN/PRE/load-pre-align.ll
@@ -26,9 +26,9 @@ for.cond.for.end_crit_edge:
br label %for.end
for.body:
- %tmp3 = load i32, i32* @p, align 8
+ %tmp3 = load i32, ptr @p, align 8
%dec = add i32 %tmp3, -1
- store i32 %dec, i32* @p
+ store i32 %dec, ptr @p
%cmp6 = icmp slt i32 %dec, 0
br i1 %cmp6, label %for.body.for.end_crit_edge, label %for.inc
@@ -40,6 +40,6 @@ for.inc:
br label %for.cond
for.end:
- %tmp9 = load i32, i32* @p, align 8
+ %tmp9 = load i32, ptr @p, align 8
ret i32 %tmp9
}
diff --git a/llvm/test/Transforms/GVN/PRE/load-pre-licm.ll b/llvm/test/Transforms/GVN/PRE/load-pre-licm.ll
index d98eeec908787..c52f46b4f63ee 100644
--- a/llvm/test/Transforms/GVN/PRE/load-pre-licm.ll
+++ b/llvm/test/Transforms/GVN/PRE/load-pre-licm.ll
@@ -8,21 +8,21 @@ target triple = "i386-apple-darwin11.0.0"
define void @Bubble() nounwind noinline {
; CHECK-LABEL: @Bubble(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP7_PRE:%.*]] = load i32, i32* getelementptr inbounds ([5001 x i32], [5001 x i32]* @sortlist, i32 0, i32 1), align 4
+; CHECK-NEXT: [[TMP7_PRE:%.*]] = load i32, ptr getelementptr inbounds ([5001 x i32], ptr @sortlist, i32 0, i32 1), align 4
; CHECK-NEXT: br label [[WHILE_BODY5:%.*]]
; CHECK: while.body5:
; CHECK-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP7_PRE]], [[ENTRY:%.*]] ], [ [[TMP71:%.*]], [[IF_END:%.*]] ]
; CHECK-NEXT: [[INDVAR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP6:%.*]], [[IF_END]] ]
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[INDVAR]], 2
-; CHECK-NEXT: [[ARRAYIDX9:%.*]] = getelementptr [5001 x i32], [5001 x i32]* @sortlist, i32 0, i32 [[TMP5]]
+; CHECK-NEXT: [[ARRAYIDX9:%.*]] = getelementptr [5001 x i32], ptr @sortlist, i32 0, i32 [[TMP5]]
; CHECK-NEXT: [[TMP6]] = add i32 [[INDVAR]], 1
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr [5001 x i32], [5001 x i32]* @sortlist, i32 0, i32 [[TMP6]]
-; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr [5001 x i32], ptr @sortlist, i32 0, i32 [[TMP6]]
+; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX9]], align 4
; CHECK-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP7]], [[TMP10]]
; CHECK-NEXT: br i1 [[CMP11]], label [[IF_THEN:%.*]], label [[IF_END]]
; CHECK: if.then:
-; CHECK-NEXT: store i32 [[TMP10]], i32* [[ARRAYIDX]], align 4
-; CHECK-NEXT: store i32 [[TMP7]], i32* [[ARRAYIDX9]], align 4
+; CHECK-NEXT: store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: store i32 [[TMP7]], ptr [[ARRAYIDX9]], align 4
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: [[TMP71]] = phi i32 [ [[TMP7]], [[IF_THEN]] ], [ [[TMP10]], [[WHILE_BODY5]] ]
@@ -37,17 +37,17 @@ entry:
while.body5:
%indvar = phi i32 [ 0, %entry ], [ %tmp6, %if.end ]
%tmp5 = add i32 %indvar, 2
- %arrayidx9 = getelementptr [5001 x i32], [5001 x i32]* @sortlist, i32 0, i32 %tmp5
+ %arrayidx9 = getelementptr [5001 x i32], ptr @sortlist, i32 0, i32 %tmp5
%tmp6 = add i32 %indvar, 1
- %arrayidx = getelementptr [5001 x i32], [5001 x i32]* @sortlist, i32 0, i32 %tmp6
- %tmp7 = load i32, i32* %arrayidx, align 4
- %tmp10 = load i32, i32* %arrayidx9, align 4
+ %arrayidx = getelementptr [5001 x i32], ptr @sortlist, i32 0, i32 %tmp6
+ %tmp7 = load i32, ptr %arrayidx, align 4
+ %tmp10 = load i32, ptr %arrayidx9, align 4
%cmp11 = icmp sgt i32 %tmp7, %tmp10
br i1 %cmp11, label %if.then, label %if.end
if.then:
- store i32 %tmp10, i32* %arrayidx, align 4
- store i32 %tmp7, i32* %arrayidx9, align 4
+ store i32 %tmp10, ptr %arrayidx, align 4
+ store i32 %tmp7, ptr %arrayidx9, align 4
br label %if.end
if.end:
@@ -62,10 +62,10 @@ declare void @hold(i32) readonly
declare void @clobber()
; This is a classic LICM case
-define i32 @test1(i1 %cnd, i32* %p) {
+define i32 @test1(i1 %cnd, ptr %p) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[V1_PRE:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[V1_PRE:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
; CHECK-NEXT: call void @hold(i32 [[V1_PRE]])
@@ -75,7 +75,7 @@ entry:
br label %header
header:
- %v1 = load i32, i32* %p
+ %v1 = load i32, ptr %p
call void @hold(i32 %v1)
br label %header
}
@@ -85,10 +85,10 @@ header:
; can compute availability for internal control flow. In this case, because
; the value is fully available across the backedge, we only need to establish
; anticipation for the preheader block (which is trivial in this case.)
-define i32 @test2(i1 %cnd, i32* %p) {
+define i32 @test2(i1 %cnd, ptr %p) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[V1_PRE:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[V1_PRE:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
; CHECK-NEXT: call void @hold(i32 [[V1_PRE]])
@@ -104,7 +104,7 @@ entry:
br label %header
header:
- %v1 = load i32, i32* %p
+ %v1 = load i32, ptr %p
call void @hold(i32 %v1)
br i1 %cnd, label %bb1, label %bb2
@@ -123,7 +123,7 @@ merge:
; other than straight-line unconditional fallthrough. This particular
; case could be solved through either a backwards anticipation walk or
; use of the "safe to speculate" status (if we annotate the param)
-define i32 @test3(i1 %cnd, i32* %p) {
+define i32 @test3(i1 %cnd, ptr %p) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[HEADER:%.*]]
@@ -134,7 +134,7 @@ define i32 @test3(i1 %cnd, i32* %p) {
; CHECK: bb2:
; CHECK-NEXT: br label [[MERGE]]
; CHECK: merge:
-; CHECK-NEXT: [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: call void @hold(i32 [[V1]])
; CHECK-NEXT: br label [[HEADER]]
;
@@ -151,17 +151,17 @@ bb2:
br label %merge
merge:
- %v1 = load i32, i32* %p
+ %v1 = load i32, ptr %p
call void @hold(i32 %v1)
br label %header
}
; Highlight that we can PRE into a latch block when there are multiple
; latches only one of which clobbers an otherwise invariant value.
-define i32 @test4(i1 %cnd, i32* %p) {
+define i32 @test4(i1 %cnd, ptr %p) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: call void @hold(i32 [[V1]])
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
@@ -172,16 +172,16 @@ define i32 @test4(i1 %cnd, i32* %p) {
; CHECK-NEXT: br label [[HEADER]]
; CHECK: bb2:
; CHECK-NEXT: call void @clobber()
-; CHECK-NEXT: [[V2_PRE]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[V2_PRE]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: br label [[HEADER]]
;
entry:
- %v1 = load i32, i32* %p
+ %v1 = load i32, ptr %p
call void @hold(i32 %v1)
br label %header
header:
- %v2 = load i32, i32* %p
+ %v2 = load i32, ptr %p
call void @hold(i32 %v2)
br i1 %cnd, label %bb1, label %bb2
@@ -197,10 +197,10 @@ bb2:
; Highlight the fact that we can PRE into a single clobbering latch block
; even in loop simplify form (though multiple applications of the same
; transformation).
-define i32 @test5(i1 %cnd, i32* %p) {
+define i32 @test5(i1 %cnd, ptr %p) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: call void @hold(i32 [[V1]])
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
@@ -211,19 +211,19 @@ define i32 @test5(i1 %cnd, i32* %p) {
; CHECK-NEXT: br label [[MERGE]]
; CHECK: bb2:
; CHECK-NEXT: call void @clobber()
-; CHECK-NEXT: [[V2_PRE_PRE:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[V2_PRE_PRE:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: br label [[MERGE]]
; CHECK: merge:
; CHECK-NEXT: [[V2_PRE]] = phi i32 [ [[V2_PRE_PRE]], [[BB2]] ], [ [[V2_PRE2]], [[BB1]] ]
; CHECK-NEXT: br label [[HEADER]]
;
entry:
- %v1 = load i32, i32* %p
+ %v1 = load i32, ptr %p
call void @hold(i32 %v1)
br label %header
header:
- %v2 = load i32, i32* %p
+ %v2 = load i32, ptr %p
call void @hold(i32 %v2)
br i1 %cnd, label %bb1, label %bb2
@@ -243,13 +243,13 @@ declare void @llvm.experimental.guard(i1 %cnd, ...)
; These two tests highlight speculation safety when we can not establish
; anticipation (since the original load might actually not execcute)
-define i32 @test6a(i1 %cnd, i32* %p) {
+define i32 @test6a(i1 %cnd, ptr %p) {
; CHECK-LABEL: @test6a(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[CND:%.*]]) [ "deopt"() ]
-; CHECK-NEXT: [[V1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: call void @hold(i32 [[V1]])
; CHECK-NEXT: br label [[HEADER]]
;
@@ -258,15 +258,15 @@ entry:
header:
call void (i1, ...) @llvm.experimental.guard(i1 %cnd) ["deopt"()]
- %v1 = load i32, i32* %p
+ %v1 = load i32, ptr %p
call void @hold(i32 %v1)
br label %header
}
-define i32 @test6b(i1 %cnd, i32* dereferenceable(8) align 4 %p) nofree nosync {
+define i32 @test6b(i1 %cnd, ptr dereferenceable(8) align 4 %p) nofree nosync {
; CHECK-LABEL: @test6b(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[V1_PRE:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[V1_PRE:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[CND:%.*]]) [ "deopt"() ]
@@ -278,7 +278,7 @@ entry:
header:
call void (i1, ...) @llvm.experimental.guard(i1 %cnd) ["deopt"()]
- %v1 = load i32, i32* %p
+ %v1 = load i32, ptr %p
call void @hold(i32 %v1)
br label %header
}
diff --git a/llvm/test/Transforms/GVN/PRE/load-pre-metadata-accsess-group.ll b/llvm/test/Transforms/GVN/PRE/load-pre-metadata-accsess-group.ll
index 7bbdc077cb203..148e308b116ed 100644
--- a/llvm/test/Transforms/GVN/PRE/load-pre-metadata-accsess-group.ll
+++ b/llvm/test/Transforms/GVN/PRE/load-pre-metadata-accsess-group.ll
@@ -1,44 +1,44 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes='require<loops>,gvn' -enable-split-backedge-in-load-pre -S | FileCheck %s
-define dso_local void @test1(i32* nocapture readonly %aa, i32* nocapture %bb) local_unnamed_addr {
+define dso_local void @test1(ptr nocapture readonly %aa, ptr nocapture %bb) local_unnamed_addr {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds i32, i32* [[BB:%.*]], i64 1
-; CHECK-NEXT: [[IDX2:%.*]] = getelementptr inbounds i32, i32* [[AA:%.*]], i64 1
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[IDX2]], align 4
-; CHECK-NEXT: store i32 [[TMP0]], i32* [[IDX]], align 4
+; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds i32, ptr [[BB:%.*]], i64 1
+; CHECK-NEXT: [[IDX2:%.*]] = getelementptr inbounds i32, ptr [[AA:%.*]], i64 1
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[IDX2]], align 4
+; CHECK-NEXT: store i32 [[TMP0]], ptr [[IDX]], align 4
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[TMP0]], [[ENTRY:%.*]] ], [ [[DOTPRE:%.*]], [[FOR_BODY_FOR_BODY_CRIT_EDGE:%.*]] ]
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY_FOR_BODY_CRIT_EDGE]] ]
-; CHECK-NEXT: [[IDX4:%.*]] = getelementptr inbounds i32, i32* [[AA]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[IDX4]], align 4, !llvm.access.group !0
+; CHECK-NEXT: [[IDX4:%.*]] = getelementptr inbounds i32, ptr [[AA]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[IDX4]], align 4, !llvm.access.group !0
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP1]], [[TMP2]]
-; CHECK-NEXT: store i32 [[MUL]], i32* [[IDX4]], align 4, !llvm.access.group !0
+; CHECK-NEXT: store i32 [[MUL]], ptr [[IDX4]], align 4, !llvm.access.group !0
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 100
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY_FOR_BODY_CRIT_EDGE]], label [[FOR_END:%.*]]
; CHECK: for.body.for.body_crit_edge:
-; CHECK-NEXT: [[DOTPRE]] = load i32, i32* [[IDX]], align 4, !llvm.access.group !0
+; CHECK-NEXT: [[DOTPRE]] = load i32, ptr [[IDX]], align 4, !llvm.access.group !0
; CHECK-NEXT: br label [[FOR_BODY]]
; CHECK: for.end:
; CHECK-NEXT: ret void
;
entry:
- %idx = getelementptr inbounds i32, i32* %bb, i64 1
- %idx2 = getelementptr inbounds i32, i32* %aa, i64 1
- %0 = load i32, i32* %idx2, align 4
- store i32 %0, i32* %idx, align 4
+ %idx = getelementptr inbounds i32, ptr %bb, i64 1
+ %idx2 = getelementptr inbounds i32, ptr %aa, i64 1
+ %0 = load i32, ptr %idx2, align 4
+ store i32 %0, ptr %idx, align 4
br label %for.body
for.body:
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
- %idx4 = getelementptr inbounds i32, i32* %aa, i64 %indvars.iv
- %1 = load i32, i32* %idx4, align 4, !llvm.access.group !0
- %2 = load i32, i32* %idx, align 4, !llvm.access.group !0
+ %idx4 = getelementptr inbounds i32, ptr %aa, i64 %indvars.iv
+ %1 = load i32, ptr %idx4, align 4, !llvm.access.group !0
+ %2 = load i32, ptr %idx, align 4, !llvm.access.group !0
%mul = mul nsw i32 %2, %1
- store i32 %mul, i32* %idx4, align 4, !llvm.access.group !0
+ store i32 %mul, ptr %idx4, align 4, !llvm.access.group !0
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp ne i64 %indvars.iv.next, 100
br i1 %exitcond, label %for.body, label %for.end
@@ -49,26 +49,26 @@ for.end:
!0 = distinct !{}
-define dso_local void @test2(i32* nocapture readonly %aa, i32* nocapture %bb) local_unnamed_addr {
+define dso_local void @test2(ptr nocapture readonly %aa, ptr nocapture %bb) local_unnamed_addr {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds i32, i32* [[BB:%.*]], i64 1
-; CHECK-NEXT: [[IDX2:%.*]] = getelementptr inbounds i32, i32* [[AA:%.*]], i64 1
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[IDX2]], align 4
-; CHECK-NEXT: store i32 [[TMP0]], i32* [[IDX]], align 4
-; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, i32* [[AA]], align 4
+; CHECK-NEXT: [[IDX:%.*]] = getelementptr inbounds i32, ptr [[BB:%.*]], i64 1
+; CHECK-NEXT: [[IDX2:%.*]] = getelementptr inbounds i32, ptr [[AA:%.*]], i64 1
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[IDX2]], align 4
+; CHECK-NEXT: store i32 [[TMP0]], ptr [[IDX]], align 4
+; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, ptr [[AA]], align 4
; CHECK-NEXT: br label [[FOR_BODY2:%.*]]
; CHECK: for.body2:
; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[TMP0]], [[FOR_BODY]] ], [ [[DOTPRE1:%.*]], [[FOR_BODY2_FOR_BODY2_CRIT_EDGE:%.*]] ]
; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[DOTPRE]], [[FOR_BODY]] ], [ [[MUL:%.*]], [[FOR_BODY2_FOR_BODY2_CRIT_EDGE]] ]
; CHECK-NEXT: [[INDVARS2_IV:%.*]] = phi i64 [ 0, [[FOR_BODY]] ], [ 1, [[FOR_BODY2_FOR_BODY2_CRIT_EDGE]] ]
; CHECK-NEXT: [[MUL]] = mul nsw i32 [[TMP1]], [[TMP2]]
-; CHECK-NEXT: store i32 [[MUL]], i32* [[AA]], align 4, !llvm.access.group !1
+; CHECK-NEXT: store i32 [[MUL]], ptr [[AA]], align 4, !llvm.access.group !1
; CHECK-NEXT: br i1 true, label [[FOR_BODY2_FOR_BODY2_CRIT_EDGE]], label [[FOR_END:%.*]]
; CHECK: for.body2.for.body2_crit_edge:
-; CHECK-NEXT: [[DOTPRE1]] = load i32, i32* [[IDX]], align 4, !llvm.access.group !1
+; CHECK-NEXT: [[DOTPRE1]] = load i32, ptr [[IDX]], align 4, !llvm.access.group !1
; CHECK-NEXT: br label [[FOR_BODY2]]
; CHECK: for.end:
; CHECK-NEXT: br i1 false, label [[FOR_END_FOR_BODY_CRIT_EDGE:%.*]], label [[END:%.*]]
@@ -82,19 +82,19 @@ entry:
for.body:
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.end ]
- %idx = getelementptr inbounds i32, i32* %bb, i64 1
- %idx2 = getelementptr inbounds i32, i32* %aa, i64 1
- %0 = load i32, i32* %idx2, align 4
- store i32 %0, i32* %idx, align 4
+ %idx = getelementptr inbounds i32, ptr %bb, i64 1
+ %idx2 = getelementptr inbounds i32, ptr %aa, i64 1
+ %0 = load i32, ptr %idx2, align 4
+ store i32 %0, ptr %idx, align 4
br label %for.body2
for.body2:
%indvars2.iv = phi i64 [ 0, %for.body ], [ %indvars2.iv.next, %for.body2 ]
- %idx4 = getelementptr inbounds i32, i32* %aa, i64 %indvars.iv
- %1 = load i32, i32* %idx4, align 4, !llvm.access.group !1
- %2 = load i32, i32* %idx, align 4, !llvm.access.group !1
+ %idx4 = getelementptr inbounds i32, ptr %aa, i64 %indvars.iv
+ %1 = load i32, ptr %idx4, align 4, !llvm.access.group !1
+ %2 = load i32, ptr %idx, align 4, !llvm.access.group !1
%mul = mul nsw i32 %2, %1
- store i32 %mul, i32* %idx4, align 4, !llvm.access.group !1
+ store i32 %mul, ptr %idx4, align 4, !llvm.access.group !1
%indvars2.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond2 = icmp ne i64 %indvars2.iv.next, 100
br i1 %exitcond2, label %for.body2, label %for.end
diff --git a/llvm/test/Transforms/GVN/PRE/load-pre-nonlocal.ll b/llvm/test/Transforms/GVN/PRE/load-pre-nonlocal.ll
index b07fea2dff1dd..b778d985ff418 100644
--- a/llvm/test/Transforms/GVN/PRE/load-pre-nonlocal.ll
+++ b/llvm/test/Transforms/GVN/PRE/load-pre-nonlocal.ll
@@ -5,8 +5,8 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
%struct.S1 = type { i32, i32 }
- at a2 = common global i32* null, align 8
- at a = common global i32* null, align 8
+ at a2 = common global ptr null, align 8
+ at a = common global ptr null, align 8
@s1 = common global %struct.S1 zeroinitializer, align 8
; Check that GVN doesn't determine %2 is partially redundant.
@@ -17,20 +17,20 @@ define i32 @volatile_load(i32 %n) {
; CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N:%.*]], 0
; CHECK-NEXT: br i1 [[CMP6]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]]
; CHECK: for.body.lr.ph:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32*, i32** @a2, align 8, !tbaa [[TBAA5:![0-9]+]]
-; CHECK-NEXT: [[TMP1:%.*]] = load i32*, i32** @a, align 8, !tbaa [[TBAA5]]
+; CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr @a2, align 8, !tbaa [[TBAA5:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr @a, align 8, !tbaa [[TBAA5]]
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[S_09:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[ADD:%.*]], [[FOR_BODY]] ]
-; CHECK-NEXT: [[P_08:%.*]] = phi i32* [ [[TMP0]], [[FOR_BODY_LR_PH]] ], [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[P_08]], align 4, !tbaa [[TBAA9:![0-9]+]]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store i32 [[TMP2]], i32* [[ARRAYIDX]], align 4, !tbaa [[TBAA9]]
-; CHECK-NEXT: [[TMP3:%.*]] = load volatile i32, i32* [[P_08]], align 4, !tbaa [[TBAA9]]
+; CHECK-NEXT: [[P_08:%.*]] = phi ptr [ [[TMP0]], [[FOR_BODY_LR_PH]] ], [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[P_08]], align 4, !tbaa [[TBAA9:![0-9]+]]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store i32 [[TMP2]], ptr [[ARRAYIDX]], align 4, !tbaa [[TBAA9]]
+; CHECK-NEXT: [[TMP3:%.*]] = load volatile i32, ptr [[P_08]], align 4, !tbaa [[TBAA9]]
; CHECK-NEXT: [[ADD]] = add nsw i32 [[TMP3]], [[S_09]]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i32, i32* [[P_08]], i64 1
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i32, ptr [[P_08]], i64 1
; CHECK-NEXT: [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[LFTR_WIDEIV]], [[N]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_FOR_END_CRIT_EDGE:%.*]]
@@ -45,21 +45,21 @@ entry:
br i1 %cmp6, label %for.body.lr.ph, label %for.end
for.body.lr.ph:
- %0 = load i32*, i32** @a2, align 8, !tbaa !1
- %1 = load i32*, i32** @a, align 8, !tbaa !1
+ %0 = load ptr, ptr @a2, align 8, !tbaa !1
+ %1 = load ptr, ptr @a, align 8, !tbaa !1
br label %for.body
for.body:
%indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ]
%s.09 = phi i32 [ 0, %for.body.lr.ph ], [ %add, %for.body ]
- %p.08 = phi i32* [ %0, %for.body.lr.ph ], [ %incdec.ptr, %for.body ]
- %2 = load i32, i32* %p.08, align 4, !tbaa !5
- %arrayidx = getelementptr inbounds i32, i32* %1, i64 %indvars.iv
- store i32 %2, i32* %arrayidx, align 4, !tbaa !5
- %3 = load volatile i32, i32* %p.08, align 4, !tbaa !5
+ %p.08 = phi ptr [ %0, %for.body.lr.ph ], [ %incdec.ptr, %for.body ]
+ %2 = load i32, ptr %p.08, align 4, !tbaa !5
+ %arrayidx = getelementptr inbounds i32, ptr %1, i64 %indvars.iv
+ store i32 %2, ptr %arrayidx, align 4, !tbaa !5
+ %3 = load volatile i32, ptr %p.08, align 4, !tbaa !5
%add = add nsw i32 %3, %s.09
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
- %incdec.ptr = getelementptr inbounds i32, i32* %p.08, i64 1
+ %incdec.ptr = getelementptr inbounds i32, ptr %p.08, i64 1
%lftr.wideiv = trunc i64 %indvars.iv.next to i32
%exitcond = icmp ne i32 %lftr.wideiv, %n
br i1 %exitcond, label %for.body, label %for.cond.for.end_crit_edge
@@ -76,23 +76,23 @@ for.end:
; %1 is partially redundant if %0 can be widened to a 64-bit load.
; But we should not widen %0 to 64-bit load.
-define i32 @overaligned_load(i32 %a, i32* nocapture %b) !dbg !13 {
+define i32 @overaligned_load(i32 %a, ptr nocapture %b) !dbg !13 {
; CHECK-LABEL: @overaligned_load(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 0, !dbg [[DBG14:![0-9]+]]
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]], !dbg [[DBG14]]
; CHECK: if.then:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_S1:%.*]], %struct.S1* @s1, i64 0, i32 0), align 8, !dbg [[DBG15:![0-9]+]], !tbaa [[TBAA9]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @s1, align 8, !dbg [[DBG15:![0-9]+]], !tbaa [[TBAA9]]
; CHECK-NEXT: br label [[IF_END:%.*]], !dbg [[DBG15]]
; CHECK: if.else:
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 2, !dbg [[DBG16:![0-9]+]]
-; CHECK-NEXT: store i32 10, i32* [[ARRAYIDX]], align 4, !dbg [[DBG16]], !tbaa [[TBAA9]]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 2, !dbg [[DBG16:![0-9]+]]
+; CHECK-NEXT: store i32 10, ptr [[ARRAYIDX]], align 4, !dbg [[DBG16]], !tbaa [[TBAA9]]
; CHECK-NEXT: br label [[IF_END]], !dbg [[DBG16]]
; CHECK: if.end:
; CHECK-NEXT: [[I_0:%.*]] = phi i32 [ [[TMP0]], [[IF_THEN]] ], [ 0, [[IF_ELSE]] ]
-; CHECK-NEXT: [[P_0:%.*]] = phi i32* [ getelementptr inbounds ([[STRUCT_S1]], %struct.S1* @s1, i64 0, i32 0), [[IF_THEN]] ], [ [[B]], [[IF_ELSE]] ]
-; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[P_0]], i64 1, !dbg [[DBG17:![0-9]+]]
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ADD_PTR]], align 4, !dbg [[DBG17]], !tbaa [[TBAA9]]
+; CHECK-NEXT: [[P_0:%.*]] = phi ptr [ @s1, [[IF_THEN]] ], [ [[B]], [[IF_ELSE]] ]
+; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[P_0]], i64 1, !dbg [[DBG17:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ADD_PTR]], align 4, !dbg [[DBG17]], !tbaa [[TBAA9]]
; CHECK-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP1]], [[I_0]], !dbg [[DBG17]]
; CHECK-NEXT: ret i32 [[ADD1]], !dbg [[DBG17]]
;
@@ -101,19 +101,19 @@ entry:
br i1 %cmp, label %if.then, label %if.else, !dbg !14
if.then:
- %0 = load i32, i32* getelementptr inbounds (%struct.S1, %struct.S1* @s1, i64 0, i32 0), align 8, !tbaa !5, !dbg !15
+ %0 = load i32, ptr @s1, align 8, !tbaa !5, !dbg !15
br label %if.end, !dbg !15
if.else:
- %arrayidx = getelementptr inbounds i32, i32* %b, i64 2, !dbg !16
- store i32 10, i32* %arrayidx, align 4, !tbaa !5, !dbg !16
+ %arrayidx = getelementptr inbounds i32, ptr %b, i64 2, !dbg !16
+ store i32 10, ptr %arrayidx, align 4, !tbaa !5, !dbg !16
br label %if.end, !dbg !16
if.end:
%i.0 = phi i32 [ %0, %if.then ], [ 0, %if.else ]
- %p.0 = phi i32* [ getelementptr inbounds (%struct.S1, %struct.S1* @s1, i64 0, i32 0), %if.then ], [ %b, %if.else ]
- %add.ptr = getelementptr inbounds i32, i32* %p.0, i64 1, !dbg !17
- %1 = load i32, i32* %add.ptr, align 4, !tbaa !5, !dbg !17
+ %p.0 = phi ptr [ @s1, %if.then ], [ %b, %if.else ]
+ %add.ptr = getelementptr inbounds i32, ptr %p.0, i64 1, !dbg !17
+ %1 = load i32, ptr %add.ptr, align 4, !tbaa !5, !dbg !17
%add1 = add nsw i32 %1, %i.0, !dbg !17
ret i32 %add1, !dbg !17
}
diff --git a/llvm/test/Transforms/GVN/PRE/load-pre-split-backedge.ll b/llvm/test/Transforms/GVN/PRE/load-pre-split-backedge.ll
index 2811d01893002..5f9fbc36b6521 100644
--- a/llvm/test/Transforms/GVN/PRE/load-pre-split-backedge.ll
+++ b/llvm/test/Transforms/GVN/PRE/load-pre-split-backedge.ll
@@ -4,10 +4,10 @@
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
-define i32 @test(i1 %b, i1 %c, i32* noalias %p, i32* noalias %q) {
+define i32 @test(i1 %b, i1 %c, ptr noalias %p, ptr noalias %q) {
; ON-LABEL: @test(
; ON-NEXT: entry:
-; ON-NEXT: [[Y1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; ON-NEXT: [[Y1:%.*]] = load i32, ptr [[P:%.*]], align 4
; ON-NEXT: call void @use(i32 [[Y1]])
; ON-NEXT: br label [[HEADER:%.*]]
; ON: header:
@@ -15,43 +15,43 @@ define i32 @test(i1 %b, i1 %c, i32* noalias %p, i32* noalias %q) {
; ON-NEXT: call void @use(i32 [[Y]])
; ON-NEXT: br i1 [[B:%.*]], label [[SKIP:%.*]], label [[HEADER]]
; ON: skip:
-; ON-NEXT: call void @clobber(i32* [[P]], i32* [[Q:%.*]])
+; ON-NEXT: call void @clobber(ptr [[P]], ptr [[Q:%.*]])
; ON-NEXT: br i1 [[C:%.*]], label [[SKIP_HEADER_CRIT_EDGE]], label [[EXIT:%.*]]
; ON: skip.header_crit_edge:
-; ON-NEXT: [[Y_PRE]] = load i32, i32* [[P]], align 4
+; ON-NEXT: [[Y_PRE]] = load i32, ptr [[P]], align 4
; ON-NEXT: br label [[HEADER]]
; ON: exit:
; ON-NEXT: ret i32 [[Y]]
;
; OFF-LABEL: @test(
; OFF-NEXT: entry:
-; OFF-NEXT: [[Y1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; OFF-NEXT: [[Y1:%.*]] = load i32, ptr [[P:%.*]], align 4
; OFF-NEXT: call void @use(i32 [[Y1]])
; OFF-NEXT: br label [[HEADER:%.*]]
; OFF: header:
-; OFF-NEXT: [[Y:%.*]] = load i32, i32* [[P]], align 4
+; OFF-NEXT: [[Y:%.*]] = load i32, ptr [[P]], align 4
; OFF-NEXT: call void @use(i32 [[Y]])
; OFF-NEXT: br i1 [[B:%.*]], label [[SKIP:%.*]], label [[HEADER]]
; OFF: skip:
-; OFF-NEXT: call void @clobber(i32* [[P]], i32* [[Q:%.*]])
+; OFF-NEXT: call void @clobber(ptr [[P]], ptr [[Q:%.*]])
; OFF-NEXT: br i1 [[C:%.*]], label [[HEADER]], label [[EXIT:%.*]]
; OFF: exit:
; OFF-NEXT: ret i32 [[Y]]
;
entry:
- %y1 = load i32, i32* %p
+ %y1 = load i32, ptr %p
call void @use(i32 %y1)
br label %header
header:
- %y = load i32, i32* %p
+ %y = load i32, ptr %p
call void @use(i32 %y)
br i1 %b, label %skip, label %header
skip:
- call void @clobber(i32* %p, i32* %q)
+ call void @clobber(ptr %p, ptr %q)
br i1 %c, label %header, label %exit
exit:
ret i32 %y
}
declare void @use(i32) readonly
-declare void @clobber(i32* %p, i32* %q)
+declare void @clobber(ptr %p, ptr %q)
diff --git a/llvm/test/Transforms/GVN/PRE/lpre-call-wrap-2.ll b/llvm/test/Transforms/GVN/PRE/lpre-call-wrap-2.ll
index 864ad6e2491e1..177b8a080bb0a 100644
--- a/llvm/test/Transforms/GVN/PRE/lpre-call-wrap-2.ll
+++ b/llvm/test/Transforms/GVN/PRE/lpre-call-wrap-2.ll
@@ -11,15 +11,15 @@
; }
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin7"
- at outcnt = common global i32 0 ; <i32*> [#uses=3]
+ at outcnt = common global i32 0 ; <ptr> [#uses=3]
-define void @bi_windup(i8* %outbuf, i8 zeroext %bi_buf) nounwind {
+define void @bi_windup(ptr %outbuf, i8 zeroext %bi_buf) nounwind {
entry:
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
- %0 = load i32, i32* @outcnt, align 4 ; <i32> [#uses=1]
- %1 = getelementptr i8, i8* %outbuf, i32 %0 ; <i8*> [#uses=1]
- store i8 %bi_buf, i8* %1, align 1
- %2 = load i32, i32* @outcnt, align 4 ; <i32> [#uses=1]
+ %0 = load i32, ptr @outcnt, align 4 ; <i32> [#uses=1]
+ %1 = getelementptr i8, ptr %outbuf, i32 %0 ; <ptr> [#uses=1]
+ store i8 %bi_buf, ptr %1, align 1
+ %2 = load i32, ptr @outcnt, align 4 ; <i32> [#uses=1]
%3 = icmp eq i32 %2, 16384 ; <i1> [#uses=1]
br i1 %3, label %bb, label %bb1
@@ -31,9 +31,9 @@ bb1: ; preds = %bb, %entry
; CHECK: bb1:
; CHECK-NEXT: phi
; CHECK-NEXT: getelementptr
- %4 = load i32, i32* @outcnt, align 4 ; <i32> [#uses=1]
- %5 = getelementptr i8, i8* %outbuf, i32 %4 ; <i8*> [#uses=1]
- store i8 %bi_buf, i8* %5, align 1
+ %4 = load i32, ptr @outcnt, align 4 ; <i32> [#uses=1]
+ %5 = getelementptr i8, ptr %outbuf, i32 %4 ; <ptr> [#uses=1]
+ store i8 %bi_buf, ptr %5, align 1
ret void
}
diff --git a/llvm/test/Transforms/GVN/PRE/lpre-call-wrap.ll b/llvm/test/Transforms/GVN/PRE/lpre-call-wrap.ll
index 9478abb613589..1f6a5c7a11a89 100644
--- a/llvm/test/Transforms/GVN/PRE/lpre-call-wrap.ll
+++ b/llvm/test/Transforms/GVN/PRE/lpre-call-wrap.ll
@@ -18,49 +18,48 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3
target triple = "i386-apple-darwin7"
%struct.A = type { i32, i32 }
-define void @_Z12testfunctionR1A(%struct.A* %iter) {
+define void @_Z12testfunctionR1A(ptr %iter) {
; CHECK-LABEL: @_Z12testfunctionR1A(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_A:%.*]], %struct.A* [[ITER:%.*]], i32 0, i32 0
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: br i1 [[TMP2]], label [[RETURN:%.*]], label [[BB_NPH:%.*]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ITER:%.*]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 0
+; CHECK-NEXT: br i1 [[TMP1]], label [[RETURN:%.*]], label [[BB_NPH:%.*]]
; CHECK: bb.nph:
-; CHECK-NEXT: [[TMP3:%.*]] = getelementptr [[STRUCT_A]], %struct.A* [[ITER]], i32 0, i32 1
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_A:%.*]], ptr [[ITER]], i32 0, i32 1
; CHECK-NEXT: br label [[BB:%.*]]
; CHECK: bb:
-; CHECK-NEXT: [[DOTRLE:%.*]] = phi i32 [ [[TMP1]], [[BB_NPH]] ], [ [[TMP7:%.*]], [[BB3_BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[DOTRLE]], 1
-; CHECK-NEXT: store i32 [[TMP4]], i32* [[TMP0]], align 4
-; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP3]], align 4
-; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP4]], [[TMP5]]
-; CHECK-NEXT: br i1 [[TMP6]], label [[BB1:%.*]], label [[BB3_BACKEDGE]]
+; CHECK-NEXT: [[DOTRLE:%.*]] = phi i32 [ [[TMP0]], [[BB_NPH]] ], [ [[TMP6:%.*]], [[BB3_BACKEDGE:%.*]] ]
+; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[DOTRLE]], 1
+; CHECK-NEXT: store i32 [[TMP3]], ptr [[ITER]], align 4
+; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP2]], align 4
+; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP3]], [[TMP4]]
+; CHECK-NEXT: br i1 [[TMP5]], label [[BB1:%.*]], label [[BB3_BACKEDGE]]
; CHECK: bb1:
; CHECK-NEXT: tail call void @_Z1gv()
-; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, i32* [[TMP0]], align 4
+; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, ptr [[ITER]], align 4
; CHECK-NEXT: br label [[BB3_BACKEDGE]]
; CHECK: bb3.backedge:
-; CHECK-NEXT: [[TMP7]] = phi i32 [ [[DOTPRE]], [[BB1]] ], [ [[TMP4]], [[BB]] ]
-; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
-; CHECK-NEXT: br i1 [[TMP8]], label [[RETURN]], label [[BB]]
+; CHECK-NEXT: [[TMP6]] = phi i32 [ [[DOTPRE]], [[BB1]] ], [ [[TMP3]], [[BB]] ]
+; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
+; CHECK-NEXT: br i1 [[TMP7]], label [[RETURN]], label [[BB]]
; CHECK: return:
; CHECK-NEXT: ret void
;
entry:
- %0 = getelementptr %struct.A, %struct.A* %iter, i32 0, i32 0 ; <i32*> [#uses=3]
- %1 = load i32, i32* %0, align 4 ; <i32> [#uses=2]
+ %0 = getelementptr %struct.A, ptr %iter, i32 0, i32 0 ; <ptr> [#uses=3]
+ %1 = load i32, ptr %0, align 4 ; <i32> [#uses=2]
%2 = icmp eq i32 %1, 0 ; <i1> [#uses=1]
br i1 %2, label %return, label %bb.nph
bb.nph: ; preds = %entry
- %3 = getelementptr %struct.A, %struct.A* %iter, i32 0, i32 1 ; <i32*> [#uses=1]
+ %3 = getelementptr %struct.A, ptr %iter, i32 0, i32 1 ; <ptr> [#uses=1]
br label %bb
bb: ; preds = %bb3.backedge, %bb.nph
%.rle = phi i32 [ %1, %bb.nph ], [ %7, %bb3.backedge ] ; <i32> [#uses=1]
%4 = add i32 %.rle, 1 ; <i32> [#uses=2]
- store i32 %4, i32* %0, align 4
- %5 = load i32, i32* %3, align 4 ; <i32> [#uses=1]
+ store i32 %4, ptr %0, align 4
+ %5 = load i32, ptr %3, align 4 ; <i32> [#uses=1]
%6 = icmp eq i32 %4, %5 ; <i1> [#uses=1]
br i1 %6, label %bb1, label %bb3.backedge
@@ -69,7 +68,7 @@ bb1: ; preds = %bb
br label %bb3.backedge
bb3.backedge: ; preds = %bb, %bb1
- %7 = load i32, i32* %0, align 4 ; <i32> [#uses=2]
+ %7 = load i32, ptr %0, align 4 ; <i32> [#uses=2]
%8 = icmp eq i32 %7, 0 ; <i1> [#uses=1]
br i1 %8, label %return, label %bb
diff --git a/llvm/test/Transforms/GVN/PRE/modified-status.ll b/llvm/test/Transforms/GVN/PRE/modified-status.ll
index 20cec1d7a8d82..e9e601a4140f7 100644
--- a/llvm/test/Transforms/GVN/PRE/modified-status.ll
+++ b/llvm/test/Transforms/GVN/PRE/modified-status.ll
@@ -3,10 +3,10 @@
; Make sure GVN correctly sets the modified status when doing PRE.
-define i32 @test(i64 %v, i32* %ptr.1, i32** %ptr.2, i1 %c) {
+define i32 @test(i64 %v, ptr %ptr.1, ptr %ptr.2, i1 %c) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[L_0:%.*]] = load i32, i32* [[PTR_1:%.*]], align 4
+; CHECK-NEXT: [[L_0:%.*]] = load i32, ptr [[PTR_1:%.*]], align 4
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then:
; CHECK-NEXT: ret i32 10
@@ -15,23 +15,23 @@ define i32 @test(i64 %v, i32* %ptr.1, i32** %ptr.2, i1 %c) {
; CHECK-NEXT: [[C_2:%.*]] = icmp eq i64 [[L_0_EXT]], 10
; CHECK-NEXT: br i1 [[C_2]], label [[IF_2_END:%.*]], label [[IF_2_THEN:%.*]]
; CHECK: if.2.then:
-; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr inbounds i32, i32* [[PTR_1]], i64 [[V:%.*]]
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[GEP_1]], align 4
+; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr inbounds i32, ptr [[PTR_1]], i64 [[V:%.*]]
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[GEP_1]], align 4
; CHECK-NEXT: [[DOTPRE:%.*]] = zext i32 [[L_2]] to i64
; CHECK-NEXT: br label [[IF_2_END]]
; CHECK: if.2.end:
; CHECK-NEXT: [[REP_0_EXT_PRE_PHI:%.*]] = phi i64 [ [[DOTPRE]], [[IF_2_THEN]] ], [ 10, [[IF_END]] ]
; CHECK-NEXT: [[REP_0:%.*]] = phi i32 [ [[L_2]], [[IF_2_THEN]] ], [ [[L_0]], [[IF_END]] ]
-; CHECK-NEXT: [[L_3:%.*]] = load i32*, i32** [[PTR_2:%.*]], align 8
-; CHECK-NEXT: [[GEP_2:%.*]] = getelementptr inbounds i32, i32* [[PTR_1]], i64 [[REP_0_EXT_PRE_PHI]]
-; CHECK-NEXT: [[L_4:%.*]] = load i32, i32* [[GEP_2]], align 4
-; CHECK-NEXT: [[GEP_3:%.*]] = getelementptr inbounds i32, i32* [[L_3]], i64 10
-; CHECK-NEXT: [[L_5:%.*]] = load i32, i32* [[GEP_3]], align 4
+; CHECK-NEXT: [[L_3:%.*]] = load ptr, ptr [[PTR_2:%.*]], align 8
+; CHECK-NEXT: [[GEP_2:%.*]] = getelementptr inbounds i32, ptr [[PTR_1]], i64 [[REP_0_EXT_PRE_PHI]]
+; CHECK-NEXT: [[L_4:%.*]] = load i32, ptr [[GEP_2]], align 4
+; CHECK-NEXT: [[GEP_3:%.*]] = getelementptr inbounds i32, ptr [[L_3]], i64 10
+; CHECK-NEXT: [[L_5:%.*]] = load i32, ptr [[GEP_3]], align 4
; CHECK-NEXT: [[R:%.*]] = add i32 [[L_4]], [[L_5]]
; CHECK-NEXT: ret i32 [[R]]
;
entry:
- %l.0 = load i32, i32* %ptr.1, align 4
+ %l.0 = load i32, ptr %ptr.1, align 4
br i1 %c, label %if.then, label %if.end
if.then: ; preds = %entry
@@ -43,18 +43,18 @@ if.end: ; preds = %entry
br i1 %c.2, label %if.2.end, label %if.2.then
if.2.then: ; preds = %if.end
- %gep.1 = getelementptr inbounds i32, i32* %ptr.1, i64 %v
- %l.2 = load i32, i32* %gep.1, align 4
+ %gep.1 = getelementptr inbounds i32, ptr %ptr.1, i64 %v
+ %l.2 = load i32, ptr %gep.1, align 4
br label %if.2.end
if.2.end: ; preds = %if.then7, %if.end
%rep.0 = phi i32 [ %l.2, %if.2.then ], [ %l.0, %if.end ]
- %l.3 = load i32*, i32** %ptr.2, align 8
+ %l.3 = load ptr, ptr %ptr.2, align 8
%rep.0.ext = zext i32 %rep.0 to i64
- %gep.2 = getelementptr inbounds i32, i32* %ptr.1, i64 %rep.0.ext
- %l.4 = load i32, i32* %gep.2, align 4
- %gep.3 = getelementptr inbounds i32, i32* %l.3, i64 10
- %l.5 = load i32, i32* %gep.3, align 4
+ %gep.2 = getelementptr inbounds i32, ptr %ptr.1, i64 %rep.0.ext
+ %l.4 = load i32, ptr %gep.2, align 4
+ %gep.3 = getelementptr inbounds i32, ptr %l.3, i64 10
+ %l.5 = load i32, ptr %gep.3, align 4
%r = add i32 %l.4, %l.5
ret i32 %r
}
diff --git a/llvm/test/Transforms/GVN/PRE/nonintegral.ll b/llvm/test/Transforms/GVN/PRE/nonintegral.ll
index 046b432f96e75..240c985b23580 100644
--- a/llvm/test/Transforms/GVN/PRE/nonintegral.ll
+++ b/llvm/test/Transforms/GVN/PRE/nonintegral.ll
@@ -4,36 +4,31 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:4"
target triple = "x86_64-unknown-linux-gnu"
-define void @nipre(double addrspace(4)** noalias %p, i64 addrspace(4)** noalias %p2, i8 %jmp) {
+define void @nipre(ptr noalias %p, ptr noalias %p2, i8 %jmp) {
; CHECK-LABEL: @nipre(
-; CHECK: [[PCAST:%.*]] = bitcast double addrspace(4)** [[P:%.*]] to i64 addrspace(4)**
; CHECK: a:
-; CHECK: [[L1:%.*]] = load i64 addrspace(4)*, i64 addrspace(4)** [[PCAST]]
-; CHECK: [[TMP0:%.*]] = bitcast i64 addrspace(4)* [[L1]] to double addrspace(4)*
+; CHECK: [[L1:%.*]] = load ptr addrspace(4), ptr [[P:%.*]]
; CHECK: b:
-; CHECK: [[L2:%.*]] = load i64 addrspace(4)*, i64 addrspace(4)** [[PCAST]]
-; CHECK: [[TMP1:%.*]] = bitcast i64 addrspace(4)* [[L2]] to double addrspace(4)*
+; CHECK: [[L2:%.*]] = load ptr addrspace(4), ptr [[P]]
; CHECK: c:
-; CHECK-NEXT: [[L3_PRE:%.*]] = load double addrspace(4)*, double addrspace(4)** %p
+; CHECK-NEXT: [[L3_PRE:%.*]] = load ptr addrspace(4), ptr %p
entry:
- %pcast = bitcast double addrspace(4)** %p to i64 addrspace(4)**
switch i8 %jmp, label %c [ i8 0, label %a
i8 1, label %b]
a:
- %l1 = load i64 addrspace(4)*, i64 addrspace(4)** %pcast
- store i64 addrspace(4)* %l1, i64 addrspace(4)** %p2
+ %l1 = load ptr addrspace(4), ptr %p
+ store ptr addrspace(4) %l1, ptr %p2
br label %tail
b:
- %l2 = load i64 addrspace(4)*, i64 addrspace(4)** %pcast
- store i64 addrspace(4)* %l2, i64 addrspace(4)** %p2
+ %l2 = load ptr addrspace(4), ptr %p
+ store ptr addrspace(4) %l2, ptr %p2
br label %tail
c:
br label %tail
tail:
- %l3 = load double addrspace(4)*, double addrspace(4)** %p
- %l3cast = bitcast double addrspace(4)* %l3 to i64 addrspace(4)*
- store i64 addrspace(4)* %l3cast, i64 addrspace(4)** %p2
+ %l3 = load ptr addrspace(4), ptr %p
+ store ptr addrspace(4) %l3, ptr %p2
ret void
}
diff --git a/llvm/test/Transforms/GVN/PRE/phi-translate-2.ll b/llvm/test/Transforms/GVN/PRE/phi-translate-2.ll
index 42116836f2cab..92dc991ed37c7 100644
--- a/llvm/test/Transforms/GVN/PRE/phi-translate-2.ll
+++ b/llvm/test/Transforms/GVN/PRE/phi-translate-2.ll
@@ -13,31 +13,31 @@ define void @test1(i64 %a, i64 %b, i64 %c, i64 %d) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i64 [[B:%.*]], [[A:%.*]]
-; CHECK-NEXT: store i64 [[MUL]], i64* @g1, align 8
-; CHECK-NEXT: [[T0:%.*]] = load i64, i64* @g2, align 8
+; CHECK-NEXT: store i64 [[MUL]], ptr @g1, align 8
+; CHECK-NEXT: [[T0:%.*]] = load i64, ptr @g2, align 8
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[T0]], 3
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then:
; CHECK-NEXT: [[MUL2:%.*]] = mul nsw i64 [[D:%.*]], [[C:%.*]]
-; CHECK-NEXT: store i64 [[MUL2]], i64* @g2, align 8
+; CHECK-NEXT: store i64 [[MUL2]], ptr @g2, align 8
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: [[MUL3_PRE_PHI:%.*]] = phi i64 [ [[MUL2]], [[IF_THEN]] ], [ [[MUL]], [[ENTRY:%.*]] ]
; CHECK-NEXT: [[B_ADDR_0:%.*]] = phi i64 [ [[D]], [[IF_THEN]] ], [ [[B]], [[ENTRY]] ]
; CHECK-NEXT: [[A_ADDR_0:%.*]] = phi i64 [ [[C]], [[IF_THEN]] ], [ [[A]], [[ENTRY]] ]
-; CHECK-NEXT: store i64 [[MUL3_PRE_PHI]], i64* @g3, align 8
+; CHECK-NEXT: store i64 [[MUL3_PRE_PHI]], ptr @g3, align 8
; CHECK-NEXT: ret void
;
entry:
%mul = mul nsw i64 %b, %a
- store i64 %mul, i64* @g1, align 8
- %t0 = load i64, i64* @g2, align 8
+ store i64 %mul, ptr @g1, align 8
+ %t0 = load i64, ptr @g2, align 8
%cmp = icmp sgt i64 %t0, 3
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
%mul2 = mul nsw i64 %d, %c
- store i64 %mul2, i64* @g2, align 8
+ store i64 %mul2, ptr @g2, align 8
br label %if.end
; Check phi-translate works and mul is removed.
@@ -45,26 +45,26 @@ if.end: ; preds = %if.then, %entry
%b.addr.0 = phi i64 [ %d, %if.then ], [ %b, %entry ]
%a.addr.0 = phi i64 [ %c, %if.then ], [ %a, %entry ]
%mul3 = mul nsw i64 %a.addr.0, %b.addr.0
- store i64 %mul3, i64* @g3, align 8
+ store i64 %mul3, ptr @g3, align 8
ret void
}
define void @test2(i64 %i) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i64], [100 x i64]* @a, i64 0, i64 [[I:%.*]]
-; CHECK-NEXT: [[T0:%.*]] = load i64, i64* [[ARRAYIDX]], align 8
-; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [100 x i64], [100 x i64]* @b, i64 0, i64 [[I]]
-; CHECK-NEXT: [[T1:%.*]] = load i64, i64* [[ARRAYIDX1]], align 8
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 [[I:%.*]]
+; CHECK-NEXT: [[T0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8
+; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [100 x i64], ptr @b, i64 0, i64 [[I]]
+; CHECK-NEXT: [[T1:%.*]] = load i64, ptr [[ARRAYIDX1]], align 8
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i64 [[T1]], [[T0]]
-; CHECK-NEXT: store i64 [[MUL]], i64* @g1, align 8
+; CHECK-NEXT: store i64 [[MUL]], ptr @g1, align 8
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[MUL]], 3
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then:
; CHECK-NEXT: [[CALL:%.*]] = tail call i64 (...) @goo()
-; CHECK-NEXT: store i64 [[CALL]], i64* @g2, align 8
-; CHECK-NEXT: [[T2_PRE:%.*]] = load i64, i64* getelementptr inbounds ([100 x i64], [100 x i64]* @a, i64 0, i64 3), align 8
-; CHECK-NEXT: [[T3_PRE:%.*]] = load i64, i64* getelementptr inbounds ([100 x i64], [100 x i64]* @b, i64 0, i64 3), align 8
+; CHECK-NEXT: store i64 [[CALL]], ptr @g2, align 8
+; CHECK-NEXT: [[T2_PRE:%.*]] = load i64, ptr getelementptr inbounds ([100 x i64], ptr @a, i64 0, i64 3), align 8
+; CHECK-NEXT: [[T3_PRE:%.*]] = load i64, ptr getelementptr inbounds ([100 x i64], ptr @b, i64 0, i64 3), align 8
; CHECK-NEXT: [[DOTPRE:%.*]] = mul nsw i64 [[T3_PRE]], [[T2_PRE]]
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
@@ -72,18 +72,18 @@ define void @test2(i64 %i) {
; CHECK-NEXT: [[T3:%.*]] = phi i64 [ [[T3_PRE]], [[IF_THEN]] ], [ [[T1]], [[ENTRY]] ]
; CHECK-NEXT: [[T2:%.*]] = phi i64 [ [[T2_PRE]], [[IF_THEN]] ], [ [[T0]], [[ENTRY]] ]
; CHECK-NEXT: [[I_ADDR_0:%.*]] = phi i64 [ 3, [[IF_THEN]] ], [ [[I]], [[ENTRY]] ]
-; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [100 x i64], [100 x i64]* @a, i64 0, i64 [[I_ADDR_0]]
-; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [100 x i64], [100 x i64]* @b, i64 0, i64 [[I_ADDR_0]]
-; CHECK-NEXT: store i64 [[MUL5_PRE_PHI]], i64* @g3, align 8
+; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 [[I_ADDR_0]]
+; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [100 x i64], ptr @b, i64 0, i64 [[I_ADDR_0]]
+; CHECK-NEXT: store i64 [[MUL5_PRE_PHI]], ptr @g3, align 8
; CHECK-NEXT: ret void
;
entry:
- %arrayidx = getelementptr inbounds [100 x i64], [100 x i64]* @a, i64 0, i64 %i
- %t0 = load i64, i64* %arrayidx, align 8
- %arrayidx1 = getelementptr inbounds [100 x i64], [100 x i64]* @b, i64 0, i64 %i
- %t1 = load i64, i64* %arrayidx1, align 8
+ %arrayidx = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 %i
+ %t0 = load i64, ptr %arrayidx, align 8
+ %arrayidx1 = getelementptr inbounds [100 x i64], ptr @b, i64 0, i64 %i
+ %t1 = load i64, ptr %arrayidx1, align 8
%mul = mul nsw i64 %t1, %t0
- store i64 %mul, i64* @g1, align 8
+ store i64 %mul, ptr @g1, align 8
%cmp = icmp sgt i64 %mul, 3
br i1 %cmp, label %if.then, label %if.end
@@ -91,31 +91,31 @@ entry:
; inserted in if.then block.
if.then: ; preds = %entry
%call = tail call i64 (...) @goo() #2
- store i64 %call, i64* @g2, align 8
+ store i64 %call, ptr @g2, align 8
br label %if.end
if.end: ; preds = %if.then, %entry
%i.addr.0 = phi i64 [ 3, %if.then ], [ %i, %entry ]
- %arrayidx3 = getelementptr inbounds [100 x i64], [100 x i64]* @a, i64 0, i64 %i.addr.0
- %t2 = load i64, i64* %arrayidx3, align 8
- %arrayidx4 = getelementptr inbounds [100 x i64], [100 x i64]* @b, i64 0, i64 %i.addr.0
- %t3 = load i64, i64* %arrayidx4, align 8
+ %arrayidx3 = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 %i.addr.0
+ %t2 = load i64, ptr %arrayidx3, align 8
+ %arrayidx4 = getelementptr inbounds [100 x i64], ptr @b, i64 0, i64 %i.addr.0
+ %t3 = load i64, ptr %arrayidx4, align 8
%mul5 = mul nsw i64 %t3, %t2
- store i64 %mul5, i64* @g3, align 8
+ store i64 %mul5, ptr @g3, align 8
ret void
}
; Check phi-translate doesn't go through backedge, which may lead to incorrect
; pre transformation.
-define void @test3(i64 %N, i64* nocapture readonly %a) {
+define void @test3(i64 %N, ptr nocapture readonly %a) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_COND:%.*]]
; CHECK: for.cond:
; CHECK-NEXT: [[I_0:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[ADD:%.*]], [[FOR_BODY:%.*]] ]
; CHECK-NEXT: [[ADD]] = add nuw nsw i64 [[I_0]], 1
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, i64* [[A:%.*]], i64 [[ADD]]
-; CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[ARRAYIDX]], align 8
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, ptr [[A:%.*]], i64 [[ADD]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_0]], [[N:%.*]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; CHECK: for.body:
@@ -124,9 +124,9 @@ define void @test3(i64 %N, i64* nocapture readonly %a) {
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[TMP0]], [[ADD1]]
; CHECK-NEXT: br i1 [[TOBOOL]], label [[FOR_COND]], label [[FOR_END]]
; CHECK: for.end:
-; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i64, i64* [[A]], i64 [[I_0]]
-; CHECK-NEXT: [[TMP1:%.*]] = load i64, i64* [[ARRAYIDX2]], align 8
-; CHECK-NEXT: store i64 [[TMP1]], i64* @g1, align 8
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[I_0]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARRAYIDX2]], align 8
+; CHECK-NEXT: store i64 [[TMP1]], ptr @g1, align 8
; CHECK-NEXT: ret void
;
entry:
@@ -135,8 +135,8 @@ entry:
for.cond: ; preds = %for.body, %entry
%i.0 = phi i64 [ 0, %entry ], [ %add, %for.body ]
%add = add nuw nsw i64 %i.0, 1
- %arrayidx = getelementptr inbounds i64, i64* %a, i64 %add
- %tmp0 = load i64, i64* %arrayidx, align 8
+ %arrayidx = getelementptr inbounds i64, ptr %a, i64 %add
+ %tmp0 = load i64, ptr %arrayidx, align 8
%cmp = icmp slt i64 %i.0, %N
br i1 %cmp, label %for.body, label %for.end
@@ -148,18 +148,18 @@ for.body: ; preds = %for.cond
for.end: ; preds = %for.body, %for.cond
%i.0.lcssa = phi i64 [ %i.0, %for.body ], [ %i.0, %for.cond ]
- %arrayidx2 = getelementptr inbounds i64, i64* %a, i64 %i.0.lcssa
- %tmp1 = load i64, i64* %arrayidx2, align 8
- store i64 %tmp1, i64* @g1, align 8
+ %arrayidx2 = getelementptr inbounds i64, ptr %a, i64 %i.0.lcssa
+ %tmp1 = load i64, ptr %arrayidx2, align 8
+ store i64 %tmp1, ptr @g1, align 8
ret void
}
; It is incorrect to use the value of %andres in last loop iteration
; to do pre.
-define i32 @test4(i32 %cond, i32 %SectionAttrs.0231.ph, i32 *%AttrFlag) {
+define i32 @test4(i32 %cond, i32 %SectionAttrs.0231.ph, ptr %AttrFlag) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: for.body.preheader:
-; CHECK-NEXT: [[T514:%.*]] = load volatile i32, i32* [[ATTRFLAG:%.*]], align 4
+; CHECK-NEXT: [[T514:%.*]] = load volatile i32, ptr [[ATTRFLAG:%.*]], align 4
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[T320:%.*]] = phi i32 [ [[T334:%.*]], [[BB343:%.*]] ], [ [[T514]], [[FOR_BODY_PREHEADER:%.*]] ]
@@ -167,14 +167,14 @@ define i32 @test4(i32 %cond, i32 %SectionAttrs.0231.ph, i32 *%AttrFlag) {
; CHECK-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[ANDRES]], 0
; CHECK-NEXT: br i1 [[TOBOOL1]], label [[BB343]], label [[CRITEDGE_LOOPEXIT:%.*]]
; CHECK: bb343:
-; CHECK-NEXT: [[T334]] = load volatile i32, i32* [[ATTRFLAG]], align 4
+; CHECK-NEXT: [[T334]] = load volatile i32, ptr [[ATTRFLAG]], align 4
; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp eq i32 [[COND:%.*]], 0
; CHECK-NEXT: br i1 [[TOBOOL2]], label [[CRITEDGE_LOOPEXIT]], label [[FOR_BODY]]
; CHECK: critedge.loopexit:
; CHECK-NEXT: unreachable
;
for.body.preheader:
- %t514 = load volatile i32, i32* %AttrFlag
+ %t514 = load volatile i32, ptr %AttrFlag
br label %for.body
for.body:
@@ -184,7 +184,7 @@ for.body:
br i1 %tobool1, label %bb343, label %critedge.loopexit
bb343:
- %t334 = load volatile i32, i32* %AttrFlag
+ %t334 = load volatile i32, ptr %AttrFlag
%tobool2 = icmp eq i32 %cond, 0
br i1 %tobool2, label %critedge.loopexit, label %for.body
@@ -195,11 +195,11 @@ critedge.loopexit:
declare void @bar(...) local_unnamed_addr #1
; Check sub expression will be pre transformed.
-define i64 @test5(i32* %start, i32* %e, i32 %n1, i32 %n2) local_unnamed_addr #0 {
+define i64 @test5(ptr %start, ptr %e, i32 %n1, i32 %n2) local_unnamed_addr #0 {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint i32* [[E:%.*]] to i64
-; CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint i32* [[START:%.*]] to i64
+; CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[E:%.*]] to i64
+; CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[START:%.*]] to i64
; CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]]
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[SUB_PTR_SUB]], 4000
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END3:%.*]]
@@ -207,8 +207,8 @@ define i64 @test5(i32* %start, i32* %e, i32 %n1, i32 %n2) local_unnamed_addr #0
; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[N1:%.*]], [[N2:%.*]]
; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN2:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then2:
-; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[START]], i64 800
-; CHECK-NEXT: [[DOTPRE:%.*]] = ptrtoint i32* [[ADD_PTR]] to i64
+; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[START]], i64 800
+; CHECK-NEXT: [[DOTPRE:%.*]] = ptrtoint ptr [[ADD_PTR]] to i64
; CHECK-NEXT: [[DOTPRE1:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[DOTPRE]]
; CHECK-NEXT: br label [[IF_END3]]
; CHECK: if.else:
@@ -217,13 +217,13 @@ define i64 @test5(i32* %start, i32* %e, i32 %n1, i32 %n2) local_unnamed_addr #0
; CHECK: if.end3:
; CHECK-NEXT: [[SUB_PTR_SUB6_PRE_PHI:%.*]] = phi i64 [ [[SUB_PTR_SUB]], [[IF_ELSE]] ], [ [[DOTPRE1]], [[IF_THEN2]] ], [ [[SUB_PTR_SUB]], [[ENTRY:%.*]] ]
; CHECK-NEXT: [[SUB_PTR_RHS_CAST5_PRE_PHI:%.*]] = phi i64 [ [[SUB_PTR_RHS_CAST]], [[IF_ELSE]] ], [ [[DOTPRE]], [[IF_THEN2]] ], [ [[SUB_PTR_RHS_CAST]], [[ENTRY]] ]
-; CHECK-NEXT: [[P_0:%.*]] = phi i32* [ [[ADD_PTR]], [[IF_THEN2]] ], [ [[START]], [[IF_ELSE]] ], [ [[START]], [[ENTRY]] ]
+; CHECK-NEXT: [[P_0:%.*]] = phi ptr [ [[ADD_PTR]], [[IF_THEN2]] ], [ [[START]], [[IF_ELSE]] ], [ [[START]], [[ENTRY]] ]
; CHECK-NEXT: [[SUB_PTR_DIV7:%.*]] = ashr exact i64 [[SUB_PTR_SUB6_PRE_PHI]], 2
; CHECK-NEXT: ret i64 [[SUB_PTR_DIV7]]
;
entry:
- %sub.ptr.lhs.cast = ptrtoint i32* %e to i64
- %sub.ptr.rhs.cast = ptrtoint i32* %start to i64
+ %sub.ptr.lhs.cast = ptrtoint ptr %e to i64
+ %sub.ptr.rhs.cast = ptrtoint ptr %start to i64
%sub.ptr.sub = sub i64 %sub.ptr.lhs.cast, %sub.ptr.rhs.cast
%cmp = icmp sgt i64 %sub.ptr.sub, 4000
br i1 %cmp, label %if.then, label %if.end3
@@ -233,7 +233,7 @@ if.then: ; preds = %entry
br i1 %cmp1, label %if.then2, label %if.else
if.then2: ; preds = %if.then
- %add.ptr = getelementptr inbounds i32, i32* %start, i64 800
+ %add.ptr = getelementptr inbounds i32, ptr %start, i64 800
br label %if.end3
if.else: ; preds = %if.then
@@ -241,8 +241,8 @@ if.else: ; preds = %if.then
br label %if.end3
if.end3: ; preds = %if.then2, %if.else, %entry
- %p.0 = phi i32* [ %add.ptr, %if.then2 ], [ %start, %if.else ], [ %start, %entry ]
- %sub.ptr.rhs.cast5 = ptrtoint i32* %p.0 to i64
+ %p.0 = phi ptr [ %add.ptr, %if.then2 ], [ %start, %if.else ], [ %start, %entry ]
+ %sub.ptr.rhs.cast5 = ptrtoint ptr %p.0 to i64
%sub.ptr.sub6 = sub i64 %sub.ptr.lhs.cast, %sub.ptr.rhs.cast5
%sub.ptr.div7 = ashr exact i64 %sub.ptr.sub6, 2
ret i64 %sub.ptr.div7
@@ -251,24 +251,24 @@ if.end3: ; preds = %if.then2, %if.else,
; Here the load from arrayidx1 is partially redundant, but its value is
; available in if.then. Check that we correctly phi-translate to the phi that
; the load has been replaced with.
-define void @test6(i32* %ptr) {
+define void @test6(ptr %ptr) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[ARRAYIDX1_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, i32* [[ARRAYIDX1_PHI_TRANS_INSERT]], align 4
+; CHECK-NEXT: [[ARRAYIDX1_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, ptr [[ARRAYIDX1_PHI_TRANS_INSERT]], align 4
; CHECK-NEXT: br label [[WHILE:%.*]]
; CHECK: while:
; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ [[DOTPRE]], [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[IF_END:%.*]] ]
; CHECK-NEXT: [[I:%.*]] = phi i64 [ 1, [[ENTRY]] ], [ [[I_NEXT:%.*]], [[IF_END]] ]
-; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[PTR]], i64 [[I]]
+; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[I]]
; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1
-; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[PTR]], i64 [[I_NEXT]]
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[I_NEXT]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP0]], [[TMP1]]
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END]]
; CHECK: if.then:
-; CHECK-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX1]], align 4
-; CHECK-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX2]], align 4
+; CHECK-NEXT: store i32 [[TMP1]], ptr [[ARRAYIDX1]], align 4
+; CHECK-NEXT: store i32 [[TMP0]], ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: [[TMP2]] = phi i32 [ [[TMP0]], [[IF_THEN]] ], [ [[TMP1]], [[WHILE]] ]
@@ -281,17 +281,17 @@ entry:
while:
%i = phi i64 [ 1, %entry ], [ %i.next, %if.end ]
- %arrayidx1 = getelementptr inbounds i32, i32* %ptr, i64 %i
- %0 = load i32, i32* %arrayidx1, align 4
+ %arrayidx1 = getelementptr inbounds i32, ptr %ptr, i64 %i
+ %0 = load i32, ptr %arrayidx1, align 4
%i.next = add nuw nsw i64 %i, 1
- %arrayidx2 = getelementptr inbounds i32, i32* %ptr, i64 %i.next
- %1 = load i32, i32* %arrayidx2, align 4
+ %arrayidx2 = getelementptr inbounds i32, ptr %ptr, i64 %i.next
+ %1 = load i32, ptr %arrayidx2, align 4
%cmp = icmp sgt i32 %0, %1
br i1 %cmp, label %if.then, label %if.end
if.then:
- store i32 %1, i32* %arrayidx1, align 4
- store i32 %0, i32* %arrayidx2, align 4
+ store i32 %1, ptr %arrayidx1, align 4
+ store i32 %0, ptr %arrayidx2, align 4
br label %if.end
if.end:
diff --git a/llvm/test/Transforms/GVN/PRE/phi-translate.ll b/llvm/test/Transforms/GVN/PRE/phi-translate.ll
index cb29fd41a0335..713f012583403 100644
--- a/llvm/test/Transforms/GVN/PRE/phi-translate.ll
+++ b/llvm/test/Transforms/GVN/PRE/phi-translate.ll
@@ -5,8 +5,8 @@ target datalayout = "e-p:64:64:64"
; CHECK-LABEL: @foo(
; CHECK: entry.end_crit_edge:
; CHECK: %[[INDEX:[a-z0-9.]+]] = sext i32 %x to i64{{$}}
-; CHECK: %[[ADDRESS:[a-z0-9.]+]] = getelementptr [100 x i32], [100 x i32]* @G, i64 0, i64 %[[INDEX]]{{$}}
-; CHECK: %n.pre = load i32, i32* %[[ADDRESS]], align 4, !dbg [[N_LOC:![0-9]+]]
+; CHECK: %[[ADDRESS:[a-z0-9.]+]] = getelementptr [100 x i32], ptr @G, i64 0, i64 %[[INDEX]]{{$}}
+; CHECK: %n.pre = load i32, ptr %[[ADDRESS]], align 4, !dbg [[N_LOC:![0-9]+]]
; CHECK: br label %end
; CHECK: then:
; CHECK: store i32 %z
@@ -24,14 +24,14 @@ entry:
then:
%i = sext i32 %x to i64, !dbg !8
- %p = getelementptr [100 x i32], [100 x i32]* @G, i64 0, i64 %i, !dbg !8
- store i32 %z, i32* %p, !dbg !8
+ %p = getelementptr [100 x i32], ptr @G, i64 0, i64 %i, !dbg !8
+ store i32 %z, ptr %p, !dbg !8
br label %end, !dbg !8
end:
%j = sext i32 %x to i64, !dbg !9
- %q = getelementptr [100 x i32], [100 x i32]* @G, i64 0, i64 %j, !dbg !10
- %n = load i32, i32* %q, !dbg !11
+ %q = getelementptr [100 x i32], ptr @G, i64 0, i64 %j, !dbg !10
+ %n = load i32, ptr %q, !dbg !11
ret i32 %n, !dbg !11
}
diff --git a/llvm/test/Transforms/GVN/PRE/pre-after-rle.ll b/llvm/test/Transforms/GVN/PRE/pre-after-rle.ll
index 0fb30684c7083..be3663c04fa70 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-after-rle.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-after-rle.ll
@@ -1,26 +1,25 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes='require<phi-values>,gvn' -S < %s | FileCheck %s
-declare noalias i8* @malloc(i64)
+declare noalias ptr @malloc(i64)
; Detecting that %s is fully redundant should let us detect that %w is partially
; redundant.
-define void @fn1(i32** noalias %start, i32* %width, i32 %h) {
+define void @fn1(ptr noalias %start, ptr %width, i32 %h) {
; CHECK-LABEL: @fn1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CALL:%.*]] = tail call noalias i8* @malloc(i64 1024)
-; CHECK-NEXT: [[CALL_CAST:%.*]] = bitcast i8* [[CALL]] to i32*
-; CHECK-NEXT: store i32* [[CALL_CAST]], i32** [[START:%.*]], align 8
+; CHECK-NEXT: [[CALL:%.*]] = tail call noalias ptr @malloc(i64 1024)
+; CHECK-NEXT: store ptr [[CALL]], ptr [[START:%.*]], align 8
; CHECK-NEXT: br label [[PREHEADER:%.*]]
; CHECK: preheader:
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 1, [[H:%.*]]
; CHECK-NEXT: br i1 [[CMP]], label [[PREHEADER_BODY_CRIT_EDGE:%.*]], label [[EXIT:%.*]]
; CHECK: preheader.body_crit_edge:
-; CHECK-NEXT: [[W_PRE:%.*]] = load i32, i32* [[WIDTH:%.*]], align 8
+; CHECK-NEXT: [[W_PRE:%.*]] = load i32, ptr [[WIDTH:%.*]], align 8
; CHECK-NEXT: br label [[BODY:%.*]]
; CHECK: body:
; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[PREHEADER_BODY_CRIT_EDGE]] ], [ [[J_NEXT:%.*]], [[BODY]] ]
-; CHECK-NEXT: store i32 0, i32* [[CALL_CAST]], align 4
+; CHECK-NEXT: store i32 0, ptr [[CALL]], align 4
; CHECK-NEXT: [[J_NEXT]] = add nuw nsw i32 [[J]], 1
; CHECK-NEXT: [[CMP3:%.*]] = icmp slt i32 [[J_NEXT]], [[W_PRE]]
; CHECK-NEXT: br i1 [[CMP3]], label [[BODY]], label [[PREHEADER]]
@@ -28,9 +27,8 @@ define void @fn1(i32** noalias %start, i32* %width, i32 %h) {
; CHECK-NEXT: ret void
;
entry:
- %call = tail call noalias i8* @malloc(i64 1024)
- %call.cast = bitcast i8* %call to i32*
- store i32* %call.cast, i32** %start, align 8
+ %call = tail call noalias ptr @malloc(i64 1024)
+ store ptr %call, ptr %start, align 8
br label %preheader
preheader:
@@ -39,11 +37,10 @@ preheader:
body:
%j = phi i32 [ 0, %preheader ], [ %j.next, %body ]
- %s = load i32*, i32** %start, align 8
- %idx = getelementptr inbounds i32, i32* %s, i64 0
- store i32 0, i32* %idx, align 4
+ %s = load ptr, ptr %start, align 8
+ store i32 0, ptr %s, align 4
%j.next = add nuw nsw i32 %j, 1
- %w = load i32, i32* %width, align 8
+ %w = load i32, ptr %width, align 8
%cmp3 = icmp slt i32 %j.next, %w
br i1 %cmp3, label %body, label %preheader
@@ -54,30 +51,29 @@ exit:
; %s is fully redundant but has more than one available value. Detecting that
; %w is partially redundant requires alias analysis that can analyze those
; values.
-define void @fn2(i32** noalias %start, i32* %width, i32 %h, i32 %arg) {
+define void @fn2(ptr noalias %start, ptr %width, i32 %h, i32 %arg) {
; CHECK-LABEL: @fn2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CALL:%.*]] = tail call noalias i8* @malloc(i64 1024)
-; CHECK-NEXT: [[CALL_CAST:%.*]] = bitcast i8* [[CALL]] to i32*
+; CHECK-NEXT: [[CALL:%.*]] = tail call noalias ptr @malloc(i64 1024)
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ARG:%.*]], 0
; CHECK-NEXT: br i1 [[CMP1]], label [[IF:%.*]], label [[ELSE:%.*]]
; CHECK: if:
-; CHECK-NEXT: store i32* [[CALL_CAST]], i32** [[START:%.*]], align 8
+; CHECK-NEXT: store ptr [[CALL]], ptr [[START:%.*]], align 8
; CHECK-NEXT: br label [[PREHEADER:%.*]]
; CHECK: else:
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, i32* [[CALL_CAST]], i32 [[ARG]]
-; CHECK-NEXT: store i32* [[GEP]], i32** [[START]], align 8
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[CALL]], i32 [[ARG]]
+; CHECK-NEXT: store ptr [[GEP]], ptr [[START]], align 8
; CHECK-NEXT: br label [[PREHEADER]]
; CHECK: preheader:
-; CHECK-NEXT: [[S:%.*]] = phi i32* [ [[S]], [[BODY:%.*]] ], [ [[GEP]], [[ELSE]] ], [ [[CALL_CAST]], [[IF]] ]
+; CHECK-NEXT: [[S:%.*]] = phi ptr [ [[S]], [[BODY:%.*]] ], [ [[GEP]], [[ELSE]] ], [ [[CALL]], [[IF]] ]
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 1, [[H:%.*]]
; CHECK-NEXT: br i1 [[CMP]], label [[PREHEADER_BODY_CRIT_EDGE:%.*]], label [[EXIT:%.*]]
; CHECK: preheader.body_crit_edge:
-; CHECK-NEXT: [[W_PRE:%.*]] = load i32, i32* [[WIDTH:%.*]], align 8
+; CHECK-NEXT: [[W_PRE:%.*]] = load i32, ptr [[WIDTH:%.*]], align 8
; CHECK-NEXT: br label [[BODY]]
; CHECK: body:
; CHECK-NEXT: [[J:%.*]] = phi i32 [ 0, [[PREHEADER_BODY_CRIT_EDGE]] ], [ [[J_NEXT:%.*]], [[BODY]] ]
-; CHECK-NEXT: store i32 0, i32* [[S]], align 4
+; CHECK-NEXT: store i32 0, ptr [[S]], align 4
; CHECK-NEXT: [[J_NEXT]] = add nuw nsw i32 [[J]], 1
; CHECK-NEXT: [[CMP3:%.*]] = icmp slt i32 [[J_NEXT]], [[W_PRE]]
; CHECK-NEXT: br i1 [[CMP3]], label [[BODY]], label [[PREHEADER]]
@@ -85,18 +81,17 @@ define void @fn2(i32** noalias %start, i32* %width, i32 %h, i32 %arg) {
; CHECK-NEXT: ret void
;
entry:
- %call = tail call noalias i8* @malloc(i64 1024)
- %call.cast = bitcast i8* %call to i32*
+ %call = tail call noalias ptr @malloc(i64 1024)
%cmp1 = icmp slt i32 %arg, 0
br i1 %cmp1, label %if, label %else
if:
- store i32* %call.cast, i32** %start, align 8
+ store ptr %call, ptr %start, align 8
br label %preheader
else:
- %gep = getelementptr inbounds i32, i32* %call.cast, i32 %arg
- store i32* %gep, i32** %start, align 8
+ %gep = getelementptr inbounds i32, ptr %call, i32 %arg
+ store ptr %gep, ptr %start, align 8
br label %preheader
preheader:
@@ -105,11 +100,10 @@ preheader:
body:
%j = phi i32 [ 0, %preheader ], [ %j.next, %body ]
- %s = load i32*, i32** %start, align 8
- %idx = getelementptr inbounds i32, i32* %s, i64 0
- store i32 0, i32* %idx, align 4
+ %s = load ptr, ptr %start, align 8
+ store i32 0, ptr %s, align 4
%j.next = add nuw nsw i32 %j, 1
- %w = load i32, i32* %width, align 8
+ %w = load i32, ptr %width, align 8
%cmp3 = icmp slt i32 %j.next, %w
br i1 %cmp3, label %body, label %preheader
diff --git a/llvm/test/Transforms/GVN/PRE/pre-aliasning-path.ll b/llvm/test/Transforms/GVN/PRE/pre-aliasning-path.ll
index 5f59e1c8714bd..9ca3e1b53f06c 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-aliasning-path.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-aliasning-path.ll
@@ -8,13 +8,13 @@ declare void @side_effect_1(i32 %x) nofree
declare void @no_side_effect() readonly
; TODO: We can PRE the load into the cold path, removing it from the hot path.
-define i32 @test_01(i32* %p) {
+define i32 @test_01(ptr %p) {
; CHECK-LABEL: @test_01(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[X]], 100
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -34,7 +34,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ult i32 %x, 100
br i1 %cond, label %hot_path, label %cold_path
@@ -55,13 +55,13 @@ exit:
}
; TODO: We can PRE the load into the cold path, removing it from the hot path.
-define i32 @test_02(i32* %p) {
+define i32 @test_02(ptr %p) {
; CHECK-LABEL: @test_02(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[X]], 100
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -81,7 +81,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ult i32 %x, 100
br i1 %cond, label %hot_path, label %cold_path
@@ -101,10 +101,10 @@ exit:
ret i32 %x
}
-define i32 @test_03(i32* %p) {
+define i32 @test_03(ptr %p) {
; CHECK-LABEL: @test_03(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[X_PRE:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X_PRE:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
@@ -127,7 +127,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ult i32 %x, 100
br i1 %cond, label %hot_path, label %cold_path
diff --git a/llvm/test/Transforms/GVN/PRE/pre-basic-add.ll b/llvm/test/Transforms/GVN/PRE/pre-basic-add.ll
index 17c9c516aba2b..f099ddcdbd7f5 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-basic-add.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-basic-add.ll
@@ -1,12 +1,12 @@
; RUN: opt < %s -passes=gvn -enable-pre -S | FileCheck %s
; RUN: opt < %s -passes="gvn<pre>" -enable-pre=false -S | FileCheck %s
- at H = common global i32 0 ; <i32*> [#uses=2]
- at G = common global i32 0 ; <i32*> [#uses=1]
+ at H = common global i32 0 ; <ptr> [#uses=2]
+ at G = common global i32 0 ; <ptr> [#uses=1]
define i32 @test() nounwind {
entry:
- %0 = load i32, i32* @H, align 4 ; <i32> [#uses=2]
+ %0 = load i32, ptr @H, align 4 ; <i32> [#uses=2]
%1 = call i32 (...) @foo() nounwind ; <i32> [#uses=1]
%2 = icmp ne i32 %1, 0 ; <i1> [#uses=1]
br i1 %2, label %bb, label %bb1
@@ -14,16 +14,16 @@ entry:
bb: ; preds = %entry
%3 = add i32 %0, 42 ; <i32> [#uses=1]
; CHECK: %.pre = add i32 %0, 42
- store i32 %3, i32* @G, align 4
+ store i32 %3, ptr @G, align 4
br label %bb1
bb1: ; preds = %bb, %entry
%4 = add i32 %0, 42 ; <i32> [#uses=1]
- store i32 %4, i32* @H, align 4
+ store i32 %4, ptr @H, align 4
br label %return
; CHECK: %.pre-phi = phi i32 [ %.pre, %entry.bb1_crit_edge ], [ %3, %bb ]
-; CHECK-NEXT: store i32 %.pre-phi, i32* @H, align 4
+; CHECK-NEXT: store i32 %.pre-phi, ptr @H, align 4
; CHECK-NEXT: ret i32 0
return: ; preds = %bb1
diff --git a/llvm/test/Transforms/GVN/PRE/pre-gep-load.ll b/llvm/test/Transforms/GVN/PRE/pre-gep-load.ll
index d41e7a4253cd0..6b5211ebc00cc 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-gep-load.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-gep-load.ll
@@ -6,7 +6,7 @@
target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-gnu"
-define double @foo(i32 %stat, i32 %i, double** %p) {
+define double @foo(i32 %stat, i32 %i, ptr %p) {
; CHECK-LABEL: @foo(
; CHECK-NEXT: entry:
; CHECK-NEXT: switch i32 [[STAT:%.*]], label [[SW_DEFAULT:%.*]] [
@@ -15,16 +15,16 @@ define double @foo(i32 %stat, i32 %i, double** %p) {
; CHECK-NEXT: i32 2, label [[ENTRY_SW_BB2_CRIT_EDGE:%.*]]
; CHECK-NEXT: ]
; CHECK: entry.sw.bb2_crit_edge:
-; CHECK-NEXT: [[DOTPRE:%.*]] = load double*, double** [[P:%.*]], align 8
+; CHECK-NEXT: [[DOTPRE:%.*]] = load ptr, ptr [[P:%.*]], align 8
; CHECK-NEXT: [[DOTPRE1:%.*]] = sext i32 [[I:%.*]] to i64
-; CHECK-NEXT: [[ARRAYIDX5_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds double, double* [[DOTPRE]], i64 [[DOTPRE1]]
-; CHECK-NEXT: [[DOTPRE2:%.*]] = load double, double* [[ARRAYIDX5_PHI_TRANS_INSERT]], align 8
+; CHECK-NEXT: [[ARRAYIDX5_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds double, ptr [[DOTPRE]], i64 [[DOTPRE1]]
+; CHECK-NEXT: [[DOTPRE2:%.*]] = load double, ptr [[ARRAYIDX5_PHI_TRANS_INSERT]], align 8
; CHECK-NEXT: br label [[SW_BB2:%.*]]
; CHECK: sw.bb:
; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[I]] to i64
-; CHECK-NEXT: [[TMP0:%.*]] = load double*, double** [[P]], align 8
-; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[TMP0]], i64 [[IDXPROM]]
-; CHECK-NEXT: [[TMP1:%.*]] = load double, double* [[ARRAYIDX1]], align 8
+; CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[P]], align 8
+; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, ptr [[TMP0]], i64 [[IDXPROM]]
+; CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[ARRAYIDX1]], align 8
; CHECK-NEXT: [[SUB:%.*]] = fsub double [[TMP1]], 1.000000e+00
; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[SUB]], 0.000000e+00
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
@@ -35,10 +35,10 @@ define double @foo(i32 %stat, i32 %i, double** %p) {
; CHECK: sw.bb2:
; CHECK-NEXT: [[TMP2:%.*]] = phi double [ [[DOTPRE2]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[TMP1]], [[IF_END]] ]
; CHECK-NEXT: [[IDXPROM3_PRE_PHI:%.*]] = phi i64 [ [[DOTPRE1]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[IDXPROM]], [[IF_END]] ]
-; CHECK-NEXT: [[TMP3:%.*]] = phi double* [ [[DOTPRE]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[TMP0]], [[IF_END]] ]
-; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, double* [[TMP3]], i64 [[IDXPROM3_PRE_PHI]]
+; CHECK-NEXT: [[TMP3:%.*]] = phi ptr [ [[DOTPRE]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[TMP0]], [[IF_END]] ]
+; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, ptr [[TMP3]], i64 [[IDXPROM3_PRE_PHI]]
; CHECK-NEXT: [[SUB6:%.*]] = fsub double 3.000000e+00, [[TMP2]]
-; CHECK-NEXT: store double [[SUB6]], double* [[ARRAYIDX5]], align 8
+; CHECK-NEXT: store double [[SUB6]], ptr [[ARRAYIDX5]], align 8
; CHECK-NEXT: br label [[RETURN]]
; CHECK: sw.default:
; CHECK-NEXT: br label [[RETURN]]
@@ -55,10 +55,9 @@ entry:
sw.bb: ; preds = %entry, %entry
%idxprom = sext i32 %i to i64
- %arrayidx = getelementptr inbounds double*, double** %p, i64 0
- %0 = load double*, double** %arrayidx, align 8
- %arrayidx1 = getelementptr inbounds double, double* %0, i64 %idxprom
- %1 = load double, double* %arrayidx1, align 8
+ %0 = load ptr, ptr %p, align 8
+ %arrayidx1 = getelementptr inbounds double, ptr %0, i64 %idxprom
+ %1 = load double, ptr %arrayidx1, align 8
%sub = fsub double %1, 1.000000e+00
%cmp = fcmp olt double %sub, 0.000000e+00
br i1 %cmp, label %if.then, label %if.end
@@ -71,12 +70,11 @@ if.end: ; preds = %sw.bb
sw.bb2: ; preds = %if.end, %entry
%idxprom3 = sext i32 %i to i64
- %arrayidx4 = getelementptr inbounds double*, double** %p, i64 0
- %2 = load double*, double** %arrayidx4, align 8
- %arrayidx5 = getelementptr inbounds double, double* %2, i64 %idxprom3
- %3 = load double, double* %arrayidx5, align 8
+ %2 = load ptr, ptr %p, align 8
+ %arrayidx5 = getelementptr inbounds double, ptr %2, i64 %idxprom3
+ %3 = load double, ptr %arrayidx5, align 8
%sub6 = fsub double 3.000000e+00, %3
- store double %sub6, double* %arrayidx5
+ store double %sub6, ptr %arrayidx5
br label %return
sw.default: ; preds = %entry
@@ -91,7 +89,7 @@ return: ; preds = %sw.default, %sw.bb2
; resulting sext ends up in pre.dest and in the GVN system before that BB is
; actually processed. Make sure we can deal with the situation.
-define void @test_shortcut_safe(i1 %tst, i32 %p1, i32* %a) {
+define void @test_shortcut_safe(i1 %tst, i32 %p1, ptr %a) {
; CHECK-LABEL: @test_shortcut_safe(
; CHECK-NEXT: br i1 [[TST:%.*]], label [[SEXT1:%.*]], label [[PRE_DEST:%.*]]
; CHECK: pre.dest:
@@ -101,8 +99,8 @@ define void @test_shortcut_safe(i1 %tst, i32 %p1, i32* %a) {
; CHECK-NEXT: br label [[SEXT_USE]]
; CHECK: sext.use:
; CHECK-NEXT: [[IDXPROM2:%.*]] = sext i32 [[P1]] to i64
-; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[IDXPROM2]]
-; CHECK-NEXT: [[VAL:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4
+; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[IDXPROM2]]
+; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[ARRAYIDX3]], align 4
; CHECK-NEXT: tail call void @g(i32 [[VAL]])
; CHECK-NEXT: br label [[PRE_DEST]]
;
@@ -118,8 +116,8 @@ sext1:
sext.use:
%idxprom2 = sext i32 %p1 to i64
- %arrayidx3 = getelementptr inbounds i32, i32* %a, i64 %idxprom2
- %val = load i32, i32* %arrayidx3, align 4
+ %arrayidx3 = getelementptr inbounds i32, ptr %a, i64 %idxprom2
+ %val = load i32, ptr %arrayidx3, align 4
tail call void (i32) @g(i32 %val)
br label %pre.dest
}
diff --git a/llvm/test/Transforms/GVN/PRE/pre-jt-add.ll b/llvm/test/Transforms/GVN/PRE/pre-jt-add.ll
index b8c8585b0925d..95f8f3ff31892 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-jt-add.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-jt-add.ll
@@ -12,7 +12,7 @@ bb:
; CHECK: store
; CHECK-NOT: br label %return
%add.1 = add nuw nsw i32 %v, -1
- store i32 %add.1, i32* @G, align 4
+ store i32 %add.1, ptr @G, align 4
br label %merge
bb1:
@@ -26,7 +26,7 @@ merge:
action:
; CHECK: store
; CHECK-NEXT: br label %return
- store i32 %add.2, i32* @H, align 4
+ store i32 %add.2, ptr @H, align 4
br label %return
return:
diff --git a/llvm/test/Transforms/GVN/PRE/pre-load-guards.ll b/llvm/test/Transforms/GVN/PRE/pre-load-guards.ll
index abfd8c48b273c..1ca907df35215 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-load-guards.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-load-guards.ll
@@ -7,11 +7,11 @@ declare void @llvm.experimental.guard(i1, ...)
; In the bottom block, we check that the index is within bounds and only access
; the element in this case and deoptimize otherwise. If we hoist the load to a
; place above the guard, it will may lead to out-of-bound array access.
-define i32 @test_motivation(i32* %p, i32* %q, i1 %C, i32 %index, i32 %len) {
+define i32 @test_motivation(ptr %p, ptr %q, i1 %C, i32 %index, i32 %len) {
; CHECK-LABEL: @test_motivation(
block1:
- %el1 = getelementptr inbounds i32, i32* %q, i32 %index
- %el2 = getelementptr inbounds i32, i32* %p, i32 %index
+ %el1 = getelementptr inbounds i32, ptr %q, i32 %index
+ %el2 = getelementptr inbounds i32, ptr %p, i32 %index
br i1 %C, label %block2, label %block3
block2:
@@ -25,7 +25,7 @@ block2:
br label %block4
block3:
- store i32 0, i32* %el1
+ store i32 0, ptr %el1
br label %block4
block4:
@@ -35,20 +35,20 @@ block4:
; CHECK-NEXT: %cond2 = icmp slt i32 %index, %len
; CHECK-NEXT: %in.bounds = and i1 %cond1, %cond2
; CHECK: call void (i1, ...) @llvm.experimental.guard(i1 %in.bounds)
-; CHECK-NEXT: %PRE = load i32, i32* %P2
+; CHECK-NEXT: %PRE = load i32, ptr %P2
; CHECK: ret i32 %PRE
- %P2 = phi i32* [%el2, %block3], [%el1, %block2]
+ %P2 = phi ptr [%el2, %block3], [%el1, %block2]
%cond1 = icmp sge i32 %index, 0
%cond2 = icmp slt i32 %index, %len
%in.bounds = and i1 %cond1, %cond2
call void (i1, ...) @llvm.experimental.guard(i1 %in.bounds) [ "deopt"() ]
- %PRE = load i32, i32* %P2
+ %PRE = load i32, ptr %P2
ret i32 %PRE
}
; Guard in load's block that is above the load should prohibit the PRE.
-define i32 @test_guard_01(i32* %p, i32* %q, i1 %C, i1 %G) {
+define i32 @test_guard_01(ptr %p, ptr %q, i1 %C, i1 %G) {
; CHECK-LABEL: @test_guard_01(
block1:
br i1 %C, label %block2, label %block3
@@ -62,7 +62,7 @@ block2:
br label %block4
block3:
- store i32 0, i32* %p
+ store i32 0, ptr %p
br label %block4
block4:
@@ -72,14 +72,14 @@ block4:
; CHECK-NEXT: load
; CHECK: ret i32
- %P2 = phi i32* [%p, %block3], [%q, %block2]
+ %P2 = phi ptr [%p, %block3], [%q, %block2]
call void (i1, ...) @llvm.experimental.guard(i1 %G) [ "deopt"() ]
- %PRE = load i32, i32* %P2
+ %PRE = load i32, ptr %P2
ret i32 %PRE
}
; Guard in load's block that is below the load should not prohibit the PRE.
-define i32 @test_guard_02(i32* %p, i32* %q, i1 %C, i1 %G) {
+define i32 @test_guard_02(ptr %p, ptr %q, i1 %C, i1 %G) {
; CHECK-LABEL: @test_guard_02(
block1:
br i1 %C, label %block2, label %block3
@@ -87,31 +87,31 @@ block1:
block2:
; CHECK: block2:
-; CHECK-NEXT: load i32, i32* %q
+; CHECK-NEXT: load i32, ptr %q
br label %block4
block3:
- store i32 0, i32* %p
+ store i32 0, ptr %p
br label %block4
block4:
; CHECK: block4:
; CHECK-NEXT: phi i32 [
-; CHECK-NEXT: phi i32* [
+; CHECK-NEXT: phi ptr [
; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 %G)
; CHECK-NOT: load
; CHECK: ret i32
- %P2 = phi i32* [%p, %block3], [%q, %block2]
- %PRE = load i32, i32* %P2
+ %P2 = phi ptr [%p, %block3], [%q, %block2]
+ %PRE = load i32, ptr %P2
call void (i1, ...) @llvm.experimental.guard(i1 %G) [ "deopt"() ]
ret i32 %PRE
}
; Guard above the load's block should prevent PRE from hoisting through it.
-define i32 @test_guard_03(i32* %p, i32* %q, i1 %C, i1 %G) {
+define i32 @test_guard_03(ptr %p, ptr %q, i1 %C, i1 %G) {
; CHECK-LABEL: @test_guard_03(
block1:
br i1 %C, label %block2, label %block3
@@ -125,22 +125,22 @@ block2:
br label %block4
block3:
- store i32 0, i32* %p
+ store i32 0, ptr %p
br label %block4
block4:
; CHECK: block4:
-; CHECK-NEXT: phi i32*
+; CHECK-NEXT: phi ptr
; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 %G)
; CHECK-NEXT: load
; CHECK-NEXT: ret i32
- %P2 = phi i32* [%p, %block3], [%q, %block2]
+ %P2 = phi ptr [%p, %block3], [%q, %block2]
call void (i1, ...) @llvm.experimental.guard(i1 %G) [ "deopt"() ]
br label %block5
block5:
- %PRE = load i32, i32* %P2
+ %PRE = load i32, ptr %P2
ret i32 %PRE
}
diff --git a/llvm/test/Transforms/GVN/PRE/pre-load-implicit-cf-updates.ll b/llvm/test/Transforms/GVN/PRE/pre-load-implicit-cf-updates.ll
index 5c6e2ef3ce63d..331344b767436 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-load-implicit-cf-updates.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-load-implicit-cf-updates.ll
@@ -17,7 +17,7 @@ define hidden void @test_01(i32 %x, i32 %y) {
; CHECK-LABEL: @test_01
; CHECK: entry:
; CHECK-NEXT: %c1 = call i32 @foo(i32 %x)
-; CHECK-NEXT: %val.pre = load i32, i32* null, align 8
+; CHECK-NEXT: %val.pre = load i32, ptr null, align 8
; CHECK-NEXT: br label %loop
; CHECK: loop:
; CHECK-NEXT: %c3 = call i32 @foo(i32 %val.pre)
@@ -29,7 +29,7 @@ entry:
loop:
%c2 = call i32 @foo(i32 %x)
- %val = load i32, i32* null, align 8
+ %val = load i32, ptr null, align 8
%c3 = call i32 @foo(i32 %val)
br label %loop
}
@@ -44,7 +44,7 @@ define hidden void @test_02(i32 %x, i32 %y) {
; CHECK-NEXT: br label %loop
; CHECK: loop:
; CHECK-NEXT: %c2 = call i32 @foo(i32 %y)
-; CHECK-NEXT: %val = load i32, i32* null, align 8
+; CHECK-NEXT: %val = load i32, ptr null, align 8
; CHECK-NEXT: %c3 = call i32 @foo(i32 %val)
; CHECK-NEXT: br label %loop
@@ -54,7 +54,7 @@ entry:
loop:
%c2 = call i32 @foo(i32 %y)
- %val = load i32, i32* null, align 8
+ %val = load i32, ptr null, align 8
%c3 = call i32 @foo(i32 %val)
br label %loop
}
@@ -67,7 +67,7 @@ define hidden void @test_03(i32 %x, i32 %y) {
; CHECK-LABEL: @test_03
; CHECK: entry:
; CHECK-NEXT: %c1 = call i32 @foo(i32 %x)
-; CHECK-NEXT: %val.pre = load i32, i32* null, align 8
+; CHECK-NEXT: %val.pre = load i32, ptr null, align 8
; CHECK-NEXT: br label %loop
; CHECK: loop:
; CHECK-NEXT: %c3 = call i32 @foo(i32 %y)
@@ -80,9 +80,9 @@ entry:
loop:
%c2 = call i32 @foo(i32 %x)
- %val = load i32, i32* null, align 8
+ %val = load i32, ptr null, align 8
%c3 = call i32 @foo(i32 %y)
- %val2 = load i32, i32* null, align 8
+ %val2 = load i32, ptr null, align 8
%c4 = call i32 @foo(i32 %y)
%c5 = call i32 @foo(i32 %val)
br label %loop
@@ -98,7 +98,7 @@ define hidden void @test_04(i32 %x, i32 %y) {
; CHECK-NEXT: br label %loop
; CHECK: loop:
; CHECK-NEXT: %c3 = call i32 @foo(i32 %y)
-; CHECK-NEXT: %val = load i32, i32* null, align 8
+; CHECK-NEXT: %val = load i32, ptr null, align 8
; CHECK-NEXT: %c5 = call i32 @foo(i32 %val)
; CHECK-NEXT: br label %loop
@@ -109,7 +109,7 @@ entry:
loop:
%c2 = call i32 @foo(i32 %x)
%c3 = call i32 @foo(i32 %y)
- %val = load i32, i32* null, align 8
+ %val = load i32, ptr null, align 8
%c4 = call i32 @foo(i32 %y)
%c5 = call i32 @foo(i32 %val)
br label %loop
diff --git a/llvm/test/Transforms/GVN/PRE/pre-load-in-loop.ll b/llvm/test/Transforms/GVN/PRE/pre-load-in-loop.ll
index d4ec8b16ec10c..81e87bf56c088 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-load-in-loop.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-load-in-loop.ll
@@ -1,13 +1,13 @@
; RUN: opt < %s -passes='require<loops>,gvn' -enable-load-in-loop-pre=false -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
-;void test1(int N, double *G) {
+;void test1(int N, ptr G) {
; int j;
; for (j = 0; j < N - 1; j++)
; G[j] = G[j] + G[j+1];
;}
-define void @test1(i32 %N, double* nocapture %G) nounwind ssp {
+define void @test1(i32 %N, ptr nocapture %G) nounwind ssp {
; CHECK-LABEL: @test1(
entry:
%0 = add i32 %N, -1
@@ -19,25 +19,25 @@ bb.nph:
br label %bb
; CHECK: bb.nph:
-; CHECK-NOT: load double, double*
+; CHECK-NOT: load double, ptr
; CHECK: br label %bb
bb:
%indvar = phi i64 [ 0, %bb.nph ], [ %tmp6, %bb ]
%tmp6 = add i64 %indvar, 1
- %scevgep = getelementptr double, double* %G, i64 %tmp6
- %scevgep7 = getelementptr double, double* %G, i64 %indvar
- %2 = load double, double* %scevgep7, align 8
- %3 = load double, double* %scevgep, align 8
+ %scevgep = getelementptr double, ptr %G, i64 %tmp6
+ %scevgep7 = getelementptr double, ptr %G, i64 %indvar
+ %2 = load double, ptr %scevgep7, align 8
+ %3 = load double, ptr %scevgep, align 8
%4 = fadd double %2, %3
- store double %4, double* %scevgep7, align 8
+ store double %4, ptr %scevgep7, align 8
%exitcond = icmp eq i64 %tmp6, %tmp
br i1 %exitcond, label %return, label %bb
; Both loads should remain in the loop.
; CHECK: bb:
-; CHECK: load double, double*
-; CHECK: load double, double*
+; CHECK: load double, ptr
+; CHECK: load double, ptr
; CHECK: br i1 %exitcond
return:
diff --git a/llvm/test/Transforms/GVN/PRE/pre-load-through-select.ll b/llvm/test/Transforms/GVN/PRE/pre-load-through-select.ll
index b21eb4a561c9d..af1a13a1cbbb8 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-load-through-select.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-load-through-select.ll
@@ -1,364 +1,364 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes='require<domtree>,loop(loop-simplifycfg),gvn' -S %s | FileCheck %s
-define i32 @test_pointer_phi_select_simp_1(i32* %a, i32* %b, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_1(ptr %a, ptr %b, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0:%.*]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
-; CHECK-NEXT: [[RES_2_PRE:%.*]] = load i32, i32* [[A]], align 4
+; CHECK-NEXT: [[RES_2_PRE:%.*]] = load i32, ptr [[A]], align 4
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[RES_2:%.*]] = phi i32 [ [[TMP0]], [[THEN]] ], [ [[RES_2_PRE]], [[ELSE]] ]
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
; CHECK-NEXT: ret i32 [[RES_2]]
;
entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
+ %res.2 = load i32, ptr %p, align 4
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_no_load_for_select_op_1(i32* %a, i32* %b, i32* %c, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_no_load_for_select_op_1(ptr %a, ptr %b, ptr %c, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_no_load_for_select_op_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[C:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[C:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A:%.*]], i32* [[B]]
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A:%.*]], ptr [[B]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
-; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[RES_2:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: ret i32 [[RES_2]]
;
entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %c, align 4
- %l.2 = load i32, i32* %b, align 4
+ %l.1 = load i32, ptr %c, align 4
+ %l.2 = load i32, ptr %b, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
+ %res.2 = load i32, ptr %p, align 4
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_no_load_for_select_op_2(i32* %a, i32* %b, i32* %c, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_no_load_for_select_op_2(ptr %a, ptr %b, ptr %c, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_no_load_for_select_op_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[C:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[C:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B:%.*]]
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B:%.*]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
-; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[RES_2:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: ret i32 [[RES_2]]
;
entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %c, align 4
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %c, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
+ %res.2 = load i32, ptr %p, align 4
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_store_noclobber(i32* %a, i32* %b, i32* noalias %c, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_store_noclobber(ptr %a, ptr %b, ptr noalias %c, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_store_noclobber(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
-; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
+; CHECK-NEXT: store i32 99, ptr [[C:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0:%.*]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
-; CHECK-NEXT: [[RES_2_PRE:%.*]] = load i32, i32* [[A]], align 4
+; CHECK-NEXT: [[RES_2_PRE:%.*]] = load i32, ptr [[A]], align 4
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[RES_2:%.*]] = phi i32 [ [[TMP0]], [[THEN]] ], [ [[RES_2_PRE]], [[ELSE]] ]
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
; CHECK-NEXT: ret i32 [[RES_2]]
;
entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
- store i32 99, i32* %c
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
+ store i32 99, ptr %c
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
+ %res.2 = load i32, ptr %p, align 4
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_store_clobber_1(i32* %a, i32* %b, i32* %c, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_store_clobber_1(ptr %a, ptr %b, ptr %c, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
-; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
+; CHECK-NEXT: store i32 99, ptr [[C:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
-; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[RES_2:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: ret i32 [[RES_2]]
;
entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
- store i32 99, i32* %c
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
+ store i32 99, ptr %c
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
+ %res.2 = load i32, ptr %p, align 4
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_store_clobber_2(i32* %a, i32* %b, i32* %c, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_store_clobber_2(ptr %a, ptr %b, ptr %c, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: store i32 99, ptr [[C:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
-; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[RES_2:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: ret i32 [[RES_2]]
;
entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %a, align 4
- store i32 99, i32* %c
- %l.2 = load i32, i32* %b, align 4
+ %l.1 = load i32, ptr %a, align 4
+ store i32 99, ptr %c
+ %l.2 = load i32, ptr %b, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
+ %res.2 = load i32, ptr %p, align 4
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_store_clobber_3(i32* %a, i32* %b, i32* %c, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_store_clobber_3(ptr %a, ptr %b, ptr %c, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_3(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
+; CHECK-NEXT: store i32 99, ptr [[C:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
-; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[RES_2:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: ret i32 [[RES_2]]
;
entry:
br i1 %cond, label %then, label %else
then:
- store i32 99, i32* %c
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
+ store i32 99, ptr %c
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
+ %res.2 = load i32, ptr %p, align 4
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_store_clobber_4(i32* %a, i32* %b, i32* %c, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_store_clobber_4(ptr %a, ptr %b, ptr %c, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_4(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
-; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT: store i32 99, ptr [[C:%.*]], align 4
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
-; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[RES_2:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: ret i32 [[RES_2]]
;
entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
- store i32 99, i32* %c
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
+ store i32 99, ptr %c
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
+ %res.2 = load i32, ptr %p, align 4
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_store_clobber_5(i32* %a, i32* %b, i32* %c, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_store_clobber_5(ptr %a, ptr %b, ptr %c, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_5(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
-; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
-; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: store i32 99, ptr [[C:%.*]], align 4
+; CHECK-NEXT: [[RES_2:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: ret i32 [[RES_2]]
;
entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
- store i32 99, i32* %c
- %res.2 = load i32, i32* %p, align 4
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
+ store i32 99, ptr %c
+ %res.2 = load i32, ptr %p, align 4
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_store_clobber_6(i32* %a, i32* %b, i32* %c, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_store_clobber_6(ptr %a, ptr %b, ptr %c, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_6(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
-; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
+; CHECK-NEXT: store i32 99, ptr [[C:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
-; CHECK-NEXT: [[RES_0:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT: [[RES_0:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
-; CHECK-NEXT: [[RES_2_PRE:%.*]] = load i32, i32* [[A]], align 4
+; CHECK-NEXT: [[RES_2_PRE:%.*]] = load i32, ptr [[A]], align 4
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[RES_2:%.*]] = phi i32 [ [[RES_0]], [[THEN]] ], [ [[RES_2_PRE]], [[ELSE]] ]
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
; CHECK-NEXT: [[V:%.*]] = phi i32 [ [[RES_0]], [[THEN]] ], [ 10, [[ELSE]] ]
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[RES_2]], [[V]]
; CHECK-NEXT: ret i32 [[RES_2]]
@@ -367,43 +367,43 @@ entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
- store i32 99, i32* %c
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
+ store i32 99, ptr %c
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
- %res.0 = load i32, i32* %min.select, align 4
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
+ %res.0 = load i32, ptr %min.select, align 4
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
%v = phi i32 [ %res.0, %then ], [ 10, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %res.2 = load i32, ptr %p, align 4
%add = add i32 %res.2, %v
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_store_clobber_7(i32* %a, i32* %b, i32* %c, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_store_clobber_7(ptr %a, ptr %b, ptr %c, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_7(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
-; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
+; CHECK-NEXT: store i32 99, ptr [[C:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
-; CHECK-NEXT: [[RES_0:%.*]] = load i32, i32* [[A]], align 4
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT: [[RES_0:%.*]] = load i32, ptr [[A]], align 4
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
; CHECK-NEXT: [[V:%.*]] = phi i32 [ [[RES_0]], [[THEN]] ], [ 10, [[ELSE]] ]
-; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[RES_2:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[RES_2]], [[V]]
; CHECK-NEXT: ret i32 [[RES_2]]
;
@@ -411,43 +411,43 @@ entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
- store i32 99, i32* %c
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
+ store i32 99, ptr %c
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
- %res.0 = load i32, i32* %a, align 4
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
+ %res.0 = load i32, ptr %a, align 4
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
%v = phi i32 [ %res.0, %then ], [ 10, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %res.2 = load i32, ptr %p, align 4
%add = add i32 %res.2, %v
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_store_clobber_8(i32* %a, i32* %b, i32* %c, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_store_clobber_8(ptr %a, ptr %b, ptr %c, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_8(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
-; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
+; CHECK-NEXT: store i32 99, ptr [[C:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
-; CHECK-NEXT: [[RES_0:%.*]] = load i32, i32* [[B]], align 4
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT: [[RES_0:%.*]] = load i32, ptr [[B]], align 4
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
; CHECK-NEXT: [[V:%.*]] = phi i32 [ [[RES_0]], [[THEN]] ], [ 10, [[ELSE]] ]
-; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[RES_2:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[RES_2]], [[V]]
; CHECK-NEXT: ret i32 [[RES_2]]
;
@@ -455,43 +455,43 @@ entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
- store i32 99, i32* %c
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
+ store i32 99, ptr %c
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
- %res.0 = load i32, i32* %b, align 4
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
+ %res.0 = load i32, ptr %b, align 4
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
%v = phi i32 [ %res.0, %then ], [ 10, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %res.2 = load i32, ptr %p, align 4
%add = add i32 %res.2, %v
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_store_clobber_9(i32* %a, i32* %b, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_store_clobber_9(ptr %a, ptr %b, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_9(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
-; CHECK-NEXT: store i32 99, i32* [[A]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
+; CHECK-NEXT: store i32 99, ptr [[A]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
-; CHECK-NEXT: [[RES_0:%.*]] = load i32, i32* [[B]], align 4
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT: [[RES_0:%.*]] = load i32, ptr [[B]], align 4
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
; CHECK-NEXT: [[V:%.*]] = phi i32 [ [[RES_0]], [[THEN]] ], [ 10, [[ELSE]] ]
-; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[RES_2:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[RES_2]], [[V]]
; CHECK-NEXT: ret i32 [[RES_2]]
;
@@ -499,42 +499,42 @@ entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
- store i32 99, i32* %a
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
+ store i32 99, ptr %a
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
- %res.0 = load i32, i32* %b, align 4
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
+ %res.0 = load i32, ptr %b, align 4
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
%v = phi i32 [ %res.0, %then ], [ 10, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %res.2 = load i32, ptr %p, align 4
%add = add i32 %res.2, %v
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_store_clobber_10(i32* %a, i32* %b, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_store_clobber_10(ptr %a, ptr %b, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_10(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: store i32 99, i32* [[A]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: store i32 99, ptr [[A]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
; CHECK-NEXT: [[V:%.*]] = phi i32 [ [[L_2]], [[THEN]] ], [ 10, [[ELSE]] ]
-; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[RES_2:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[RES_2]], [[V]]
; CHECK-NEXT: ret i32 [[RES_2]]
;
@@ -542,42 +542,42 @@ entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %a, align 4
- store i32 99, i32* %a
- %l.2 = load i32, i32* %b, align 4
+ %l.1 = load i32, ptr %a, align 4
+ store i32 99, ptr %a
+ %l.2 = load i32, ptr %b, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
- %res.0 = load i32, i32* %b, align 4
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
+ %res.0 = load i32, ptr %b, align 4
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
%v = phi i32 [ %res.0, %then ], [ 10, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %res.2 = load i32, ptr %p, align 4
%add = add i32 %res.2, %v
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_store_clobber_11(i32* %a, i32* %b, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_store_clobber_11(ptr %a, ptr %b, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_11(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
-; CHECK-NEXT: store i32 99, i32* [[B]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
+; CHECK-NEXT: store i32 99, ptr [[B]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
; CHECK-NEXT: [[V:%.*]] = phi i32 [ 99, [[THEN]] ], [ 10, [[ELSE]] ]
-; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[RES_2:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[RES_2]], [[V]]
; CHECK-NEXT: ret i32 [[RES_2]]
;
@@ -585,41 +585,41 @@ entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
- store i32 99, i32* %b
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
+ store i32 99, ptr %b
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
- %res.0 = load i32, i32* %b, align 4
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
+ %res.0 = load i32, ptr %b, align 4
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
%v = phi i32 [ %res.0, %then ], [ 10, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %res.2 = load i32, ptr %p, align 4
%add = add i32 %res.2, %v
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_simp_store_clobber_12(i32* %a, i32* %b, i1 %cond) {
+define i32 @test_pointer_phi_select_simp_store_clobber_12(ptr %a, ptr %b, i1 %cond) {
; CHECK-LABEL: @test_pointer_phi_select_simp_store_clobber_12(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[COND:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: store i32 99, i32* [[B:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: store i32 99, ptr [[B:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], 99
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: else:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[MIN_SELECT]], [[THEN]] ], [ [[A]], [[ELSE]] ]
; CHECK-NEXT: [[V:%.*]] = phi i32 [ 99, [[THEN]] ], [ 10, [[ELSE]] ]
-; CHECK-NEXT: [[RES_2:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[RES_2:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[RES_2]], [[V]]
; CHECK-NEXT: ret i32 [[RES_2]]
;
@@ -627,124 +627,124 @@ entry:
br i1 %cond, label %then, label %else
then:
- %l.1 = load i32, i32* %a, align 4
- store i32 99, i32* %b
- %l.2 = load i32, i32* %b, align 4
+ %l.1 = load i32, ptr %a, align 4
+ store i32 99, ptr %b
+ %l.2 = load i32, ptr %b, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
- %res.0 = load i32, i32* %b, align 4
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
+ %res.0 = load i32, ptr %b, align 4
br label %exit
else:
br label %exit
exit:
- %p = phi i32* [ %min.select, %then ], [ %a, %else ]
+ %p = phi ptr [ %min.select, %then ], [ %a, %else ]
%v = phi i32 [ %res.0, %then ], [ 10, %else ]
- %res.2 = load i32, i32* %p, align 4
+ %res.2 = load i32, ptr %p, align 4
%add = add i32 %res.2, %v
ret i32 %res.2
}
-define i32 @test_pointer_phi_select_single_block_store(i32* %a, i32* %b) {
+define i32 @test_pointer_phi_select_single_block_store(ptr %a, ptr %b) {
; CHECK-LABEL: @test_pointer_phi_select_single_block_store(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0:%.*]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
; CHECK-NEXT: ret i32 [[TMP0]]
;
entry:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
- %res.0 = load i32, i32* %min.select, align 4
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
+ %res.0 = load i32, ptr %min.select, align 4
ret i32 %res.0
}
-define i32 @test_pointer_phi_select_single_block_store_clobber_1(i32* %a, i32* %b, i32* %c) {
+define i32 @test_pointer_phi_select_single_block_store_clobber_1(ptr %a, ptr %b, ptr %c) {
; CHECK-LABEL: @test_pointer_phi_select_single_block_store_clobber_1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
-; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
+; CHECK-NEXT: store i32 99, ptr [[C:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
-; CHECK-NEXT: [[RES_0:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT: [[RES_0:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES_0]]
;
entry:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
- store i32 99, i32* %c
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
+ store i32 99, ptr %c
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
- %res.0 = load i32, i32* %min.select, align 4
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
+ %res.0 = load i32, ptr %min.select, align 4
ret i32 %res.0
}
-define i32 @test_pointer_phi_select_single_block_store_clobber_2(i32* %a, i32* %b, i32* %c) {
+define i32 @test_pointer_phi_select_single_block_store_clobber_2(ptr %a, ptr %b, ptr %c) {
; CHECK-LABEL: @test_pointer_phi_select_single_block_store_clobber_2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
-; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
-; CHECK-NEXT: [[RES_0:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT: store i32 99, ptr [[C:%.*]], align 4
+; CHECK-NEXT: [[RES_0:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES_0]]
;
entry:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
- store i32 99, i32* %c
- %res.0 = load i32, i32* %min.select, align 4
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
+ store i32 99, ptr %c
+ %res.0 = load i32, ptr %min.select, align 4
ret i32 %res.0
}
-define i32 @test_pointer_phi_select_single_block_store_clobber_3(i32* %a, i32* %b, i32* %c) {
+define i32 @test_pointer_phi_select_single_block_store_clobber_3(ptr %a, ptr %b, ptr %c) {
; CHECK-LABEL: @test_pointer_phi_select_single_block_store_clobber_3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: store i32 99, ptr [[C:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
-; CHECK-NEXT: [[RES_0:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT: [[RES_0:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES_0]]
;
entry:
- %l.1 = load i32, i32* %a, align 4
- store i32 99, i32* %c
- %l.2 = load i32, i32* %b, align 4
+ %l.1 = load i32, ptr %a, align 4
+ store i32 99, ptr %c
+ %l.2 = load i32, ptr %b, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
- %res.0 = load i32, i32* %min.select, align 4
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
+ %res.0 = load i32, ptr %min.select, align 4
ret i32 %res.0
}
-define i32 @test_pointer_phi_select_single_block_store_after(i32* %a, i32* %b, i32* %c) {
+define i32 @test_pointer_phi_select_single_block_store_after(ptr %a, ptr %b, ptr %c) {
; CHECK-LABEL: @test_pointer_phi_select_single_block_store_after(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[A:%.*]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[B:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0:%.*]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], i32* [[A]], i32* [[B]]
-; CHECK-NEXT: store i32 99, i32* [[C:%.*]], align 4
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_I_I_I]], ptr [[A]], ptr [[B]]
+; CHECK-NEXT: store i32 99, ptr [[C:%.*]], align 4
; CHECK-NEXT: ret i32 [[TMP0]]
;
entry:
- %l.1 = load i32, i32* %a, align 4
- %l.2 = load i32, i32* %b, align 4
+ %l.1 = load i32, ptr %a, align 4
+ %l.2 = load i32, ptr %b, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %a, i32* %b
- %res.0 = load i32, i32* %min.select, align 4
- store i32 99, i32* %c
+ %min.select = select i1 %cmp.i.i.i, ptr %a, ptr %b
+ %res.0 = load i32, ptr %min.select, align 4
+ store i32 99, ptr %c
ret i32 %res.0
}
diff --git a/llvm/test/Transforms/GVN/PRE/pre-load.ll b/llvm/test/Transforms/GVN/PRE/pre-load.ll
index d7be7fdb79588..5d031d317e39d 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-load.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-load.ll
@@ -3,15 +3,15 @@
; RUN: opt < %s -aa-pipeline=basic-aa -passes="gvn<load-pre>" -enable-load-pre=false -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
-define i32 @test1(i32* %p, i1 %C) {
+define i32 @test1(ptr %p, i1 %C) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: block1:
; CHECK-NEXT: br i1 [[C:%.*]], label [[BLOCK2:%.*]], label [[BLOCK3:%.*]]
; CHECK: block2:
-; CHECK-NEXT: [[PRE_PRE:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[PRE_PRE:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[BLOCK4:%.*]]
; CHECK: block3:
-; CHECK-NEXT: store i32 0, i32* [[P]], align 4
+; CHECK-NEXT: store i32 0, ptr [[P]], align 4
; CHECK-NEXT: br label [[BLOCK4]]
; CHECK: block4:
; CHECK-NEXT: [[PRE:%.*]] = phi i32 [ 0, [[BLOCK3]] ], [ [[PRE_PRE]], [[BLOCK2]] ]
@@ -24,28 +24,28 @@ block2:
br label %block4
block3:
- store i32 0, i32* %p
+ store i32 0, ptr %p
br label %block4
block4:
- %PRE = load i32, i32* %p
+ %PRE = load i32, ptr %p
ret i32 %PRE
}
; This is a simple phi translation case.
-define i32 @test2(i32* %p, i32* %q, i1 %C) {
+define i32 @test2(ptr %p, ptr %q, i1 %C) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: block1:
; CHECK-NEXT: br i1 [[C:%.*]], label [[BLOCK2:%.*]], label [[BLOCK3:%.*]]
; CHECK: block2:
-; CHECK-NEXT: [[PRE_PRE:%.*]] = load i32, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[PRE_PRE:%.*]] = load i32, ptr [[Q:%.*]], align 4
; CHECK-NEXT: br label [[BLOCK4:%.*]]
; CHECK: block3:
-; CHECK-NEXT: store i32 0, i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 0, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[BLOCK4]]
; CHECK: block4:
; CHECK-NEXT: [[PRE:%.*]] = phi i32 [ 0, [[BLOCK3]] ], [ [[PRE_PRE]], [[BLOCK2]] ]
-; CHECK-NEXT: [[P2:%.*]] = phi i32* [ [[P]], [[BLOCK3]] ], [ [[Q]], [[BLOCK2]] ]
+; CHECK-NEXT: [[P2:%.*]] = phi ptr [ [[P]], [[BLOCK3]] ], [ [[Q]], [[BLOCK2]] ]
; CHECK-NEXT: ret i32 [[PRE]]
;
block1:
@@ -55,75 +55,75 @@ block2:
br label %block4
block3:
- store i32 0, i32* %p
+ store i32 0, ptr %p
br label %block4
block4:
- %P2 = phi i32* [%p, %block3], [%q, %block2]
- %PRE = load i32, i32* %P2
+ %P2 = phi ptr [%p, %block3], [%q, %block2]
+ %PRE = load i32, ptr %P2
ret i32 %PRE
}
; This is a PRE case that requires phi translation through a GEP.
-define i32 @test3(i32* %p, i32* %q, i32** %Hack, i1 %C) {
+define i32 @test3(ptr %p, ptr %q, ptr %Hack, i1 %C) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: block1:
-; CHECK-NEXT: [[B:%.*]] = getelementptr i32, i32* [[Q:%.*]], i32 1
-; CHECK-NEXT: store i32* [[B]], i32** [[HACK:%.*]], align 8
+; CHECK-NEXT: [[B:%.*]] = getelementptr i32, ptr [[Q:%.*]], i32 1
+; CHECK-NEXT: store ptr [[B]], ptr [[HACK:%.*]], align 8
; CHECK-NEXT: br i1 [[C:%.*]], label [[BLOCK2:%.*]], label [[BLOCK3:%.*]]
; CHECK: block2:
-; CHECK-NEXT: [[PRE_PRE:%.*]] = load i32, i32* [[B]], align 4
+; CHECK-NEXT: [[PRE_PRE:%.*]] = load i32, ptr [[B]], align 4
; CHECK-NEXT: br label [[BLOCK4:%.*]]
; CHECK: block3:
-; CHECK-NEXT: [[A:%.*]] = getelementptr i32, i32* [[P:%.*]], i32 1
-; CHECK-NEXT: store i32 0, i32* [[A]], align 4
+; CHECK-NEXT: [[A:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 1
+; CHECK-NEXT: store i32 0, ptr [[A]], align 4
; CHECK-NEXT: br label [[BLOCK4]]
; CHECK: block4:
; CHECK-NEXT: [[PRE:%.*]] = phi i32 [ 0, [[BLOCK3]] ], [ [[PRE_PRE]], [[BLOCK2]] ]
-; CHECK-NEXT: [[P2:%.*]] = phi i32* [ [[P]], [[BLOCK3]] ], [ [[Q]], [[BLOCK2]] ]
-; CHECK-NEXT: [[P3:%.*]] = getelementptr i32, i32* [[P2]], i32 1
+; CHECK-NEXT: [[P2:%.*]] = phi ptr [ [[P]], [[BLOCK3]] ], [ [[Q]], [[BLOCK2]] ]
+; CHECK-NEXT: [[P3:%.*]] = getelementptr i32, ptr [[P2]], i32 1
; CHECK-NEXT: ret i32 [[PRE]]
;
block1:
- %B = getelementptr i32, i32* %q, i32 1
- store i32* %B, i32** %Hack
+ %B = getelementptr i32, ptr %q, i32 1
+ store ptr %B, ptr %Hack
br i1 %C, label %block2, label %block3
block2:
br label %block4
block3:
- %A = getelementptr i32, i32* %p, i32 1
- store i32 0, i32* %A
+ %A = getelementptr i32, ptr %p, i32 1
+ store i32 0, ptr %A
br label %block4
block4:
- %P2 = phi i32* [%p, %block3], [%q, %block2]
- %P3 = getelementptr i32, i32* %P2, i32 1
- %PRE = load i32, i32* %P3
+ %P2 = phi ptr [%p, %block3], [%q, %block2]
+ %P3 = getelementptr i32, ptr %P2, i32 1
+ %PRE = load i32, ptr %P3
ret i32 %PRE
}
;; Here the loaded address is available, but the computation is in 'block3'
;; which does not dominate 'block2'.
-define i32 @test4(i32* %p, i32* %q, i32** %Hack, i1 %C) {
+define i32 @test4(ptr %p, ptr %q, ptr %Hack, i1 %C) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: block1:
; CHECK-NEXT: br i1 [[C:%.*]], label [[BLOCK2:%.*]], label [[BLOCK3:%.*]]
; CHECK: block2:
-; CHECK-NEXT: [[P3_PHI_TRANS_INSERT:%.*]] = getelementptr i32, i32* [[Q:%.*]], i32 1
-; CHECK-NEXT: [[PRE_PRE:%.*]] = load i32, i32* [[P3_PHI_TRANS_INSERT]], align 4
+; CHECK-NEXT: [[P3_PHI_TRANS_INSERT:%.*]] = getelementptr i32, ptr [[Q:%.*]], i32 1
+; CHECK-NEXT: [[PRE_PRE:%.*]] = load i32, ptr [[P3_PHI_TRANS_INSERT]], align 4
; CHECK-NEXT: br label [[BLOCK4:%.*]]
; CHECK: block3:
-; CHECK-NEXT: [[B:%.*]] = getelementptr i32, i32* [[Q]], i32 1
-; CHECK-NEXT: store i32* [[B]], i32** [[HACK:%.*]], align 8
-; CHECK-NEXT: [[A:%.*]] = getelementptr i32, i32* [[P:%.*]], i32 1
-; CHECK-NEXT: store i32 0, i32* [[A]], align 4
+; CHECK-NEXT: [[B:%.*]] = getelementptr i32, ptr [[Q]], i32 1
+; CHECK-NEXT: store ptr [[B]], ptr [[HACK:%.*]], align 8
+; CHECK-NEXT: [[A:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 1
+; CHECK-NEXT: store i32 0, ptr [[A]], align 4
; CHECK-NEXT: br label [[BLOCK4]]
; CHECK: block4:
; CHECK-NEXT: [[PRE:%.*]] = phi i32 [ 0, [[BLOCK3]] ], [ [[PRE_PRE]], [[BLOCK2]] ]
-; CHECK-NEXT: [[P2:%.*]] = phi i32* [ [[P]], [[BLOCK3]] ], [ [[Q]], [[BLOCK2]] ]
-; CHECK-NEXT: [[P3:%.*]] = getelementptr i32, i32* [[P2]], i32 1
+; CHECK-NEXT: [[P2:%.*]] = phi ptr [ [[P]], [[BLOCK3]] ], [ [[Q]], [[BLOCK2]] ]
+; CHECK-NEXT: [[P3:%.*]] = getelementptr i32, ptr [[P2]], i32 1
; CHECK-NEXT: ret i32 [[PRE]]
;
block1:
@@ -133,27 +133,27 @@ block2:
br label %block4
block3:
- %B = getelementptr i32, i32* %q, i32 1
- store i32* %B, i32** %Hack
+ %B = getelementptr i32, ptr %q, i32 1
+ store ptr %B, ptr %Hack
- %A = getelementptr i32, i32* %p, i32 1
- store i32 0, i32* %A
+ %A = getelementptr i32, ptr %p, i32 1
+ store i32 0, ptr %A
br label %block4
block4:
- %P2 = phi i32* [%p, %block3], [%q, %block2]
- %P3 = getelementptr i32, i32* %P2, i32 1
- %PRE = load i32, i32* %P3
+ %P2 = phi ptr [%p, %block3], [%q, %block2]
+ %P3 = getelementptr i32, ptr %P2, i32 1
+ %PRE = load i32, ptr %P3
ret i32 %PRE
}
-;void test5(int N, double *G) {
+;void test5(int N, ptr G) {
; int j;
; for (j = 0; j < N - 1; j++)
; G[j] = G[j] + G[j+1];
;}
-define void @test5(i32 %N, double* nocapture %G) nounwind ssp {
+define void @test5(i32 %N, ptr nocapture %G) nounwind ssp {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N:%.*]], -1
@@ -161,17 +161,17 @@ define void @test5(i32 %N, double* nocapture %G) nounwind ssp {
; CHECK-NEXT: br i1 [[TMP1]], label [[BB_NPH:%.*]], label [[RETURN:%.*]]
; CHECK: bb.nph:
; CHECK-NEXT: [[TMP:%.*]] = zext i32 [[TMP0]] to i64
-; CHECK-NEXT: [[DOTPRE:%.*]] = load double, double* [[G:%.*]], align 8
+; CHECK-NEXT: [[DOTPRE:%.*]] = load double, ptr [[G:%.*]], align 8
; CHECK-NEXT: br label [[BB:%.*]]
; CHECK: bb:
; CHECK-NEXT: [[TMP2:%.*]] = phi double [ [[DOTPRE]], [[BB_NPH]] ], [ [[TMP3:%.*]], [[BB]] ]
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH]] ], [ [[TMP6:%.*]], [[BB]] ]
; CHECK-NEXT: [[TMP6]] = add i64 [[INDVAR]], 1
-; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr double, double* [[G]], i64 [[TMP6]]
-; CHECK-NEXT: [[SCEVGEP7:%.*]] = getelementptr double, double* [[G]], i64 [[INDVAR]]
-; CHECK-NEXT: [[TMP3]] = load double, double* [[SCEVGEP]], align 8
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr double, ptr [[G]], i64 [[TMP6]]
+; CHECK-NEXT: [[SCEVGEP7:%.*]] = getelementptr double, ptr [[G]], i64 [[INDVAR]]
+; CHECK-NEXT: [[TMP3]] = load double, ptr [[SCEVGEP]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = fadd double [[TMP2]], [[TMP3]]
-; CHECK-NEXT: store double [[TMP4]], double* [[SCEVGEP7]], align 8
+; CHECK-NEXT: store double [[TMP4]], ptr [[SCEVGEP7]], align 8
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP6]], [[TMP]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[RETURN]], label [[BB]]
; CHECK: return:
@@ -190,12 +190,12 @@ bb.nph:
bb:
%indvar = phi i64 [ 0, %bb.nph ], [ %tmp6, %bb ]
%tmp6 = add i64 %indvar, 1
- %scevgep = getelementptr double, double* %G, i64 %tmp6
- %scevgep7 = getelementptr double, double* %G, i64 %indvar
- %2 = load double, double* %scevgep7, align 8
- %3 = load double, double* %scevgep, align 8
+ %scevgep = getelementptr double, ptr %G, i64 %tmp6
+ %scevgep7 = getelementptr double, ptr %G, i64 %indvar
+ %2 = load double, ptr %scevgep7, align 8
+ %3 = load double, ptr %scevgep, align 8
%4 = fadd double %2, %3
- store double %4, double* %scevgep7, align 8
+ store double %4, ptr %scevgep7, align 8
%exitcond = icmp eq i64 %tmp6, %tmp
br i1 %exitcond, label %return, label %bb
@@ -205,13 +205,13 @@ return:
ret void
}
-;void test6(int N, double *G) {
+;void test6(int N, ptr G) {
; int j;
; for (j = 0; j < N - 1; j++)
; G[j+1] = G[j] + G[j+1];
;}
-define void @test6(i32 %N, double* nocapture %G) nounwind ssp {
+define void @test6(i32 %N, ptr nocapture %G) nounwind ssp {
; CHECK-LABEL: @test6(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N:%.*]], -1
@@ -219,17 +219,17 @@ define void @test6(i32 %N, double* nocapture %G) nounwind ssp {
; CHECK-NEXT: br i1 [[TMP1]], label [[BB_NPH:%.*]], label [[RETURN:%.*]]
; CHECK: bb.nph:
; CHECK-NEXT: [[TMP:%.*]] = zext i32 [[TMP0]] to i64
-; CHECK-NEXT: [[DOTPRE:%.*]] = load double, double* [[G:%.*]], align 8
+; CHECK-NEXT: [[DOTPRE:%.*]] = load double, ptr [[G:%.*]], align 8
; CHECK-NEXT: br label [[BB:%.*]]
; CHECK: bb:
; CHECK-NEXT: [[TMP2:%.*]] = phi double [ [[DOTPRE]], [[BB_NPH]] ], [ [[TMP4:%.*]], [[BB]] ]
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH]] ], [ [[TMP6:%.*]], [[BB]] ]
; CHECK-NEXT: [[TMP6]] = add i64 [[INDVAR]], 1
-; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr double, double* [[G]], i64 [[TMP6]]
-; CHECK-NEXT: [[SCEVGEP7:%.*]] = getelementptr double, double* [[G]], i64 [[INDVAR]]
-; CHECK-NEXT: [[TMP3:%.*]] = load double, double* [[SCEVGEP]], align 8
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr double, ptr [[G]], i64 [[TMP6]]
+; CHECK-NEXT: [[SCEVGEP7:%.*]] = getelementptr double, ptr [[G]], i64 [[INDVAR]]
+; CHECK-NEXT: [[TMP3:%.*]] = load double, ptr [[SCEVGEP]], align 8
; CHECK-NEXT: [[TMP4]] = fadd double [[TMP2]], [[TMP3]]
-; CHECK-NEXT: store double [[TMP4]], double* [[SCEVGEP]], align 8
+; CHECK-NEXT: store double [[TMP4]], ptr [[SCEVGEP]], align 8
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP6]], [[TMP]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[RETURN]], label [[BB]]
; CHECK: return:
@@ -248,12 +248,12 @@ bb.nph:
bb:
%indvar = phi i64 [ 0, %bb.nph ], [ %tmp6, %bb ]
%tmp6 = add i64 %indvar, 1
- %scevgep = getelementptr double, double* %G, i64 %tmp6
- %scevgep7 = getelementptr double, double* %G, i64 %indvar
- %2 = load double, double* %scevgep7, align 8
- %3 = load double, double* %scevgep, align 8
+ %scevgep = getelementptr double, ptr %G, i64 %tmp6
+ %scevgep7 = getelementptr double, ptr %G, i64 %indvar
+ %2 = load double, ptr %scevgep7, align 8
+ %3 = load double, ptr %scevgep, align 8
%4 = fadd double %2, %3
- store double %4, double* %scevgep, align 8
+ store double %4, ptr %scevgep, align 8
%exitcond = icmp eq i64 %tmp6, %tmp
br i1 %exitcond, label %return, label %bb
@@ -263,7 +263,7 @@ return:
ret void
}
-;void test7(int N, double* G) {
+;void test7(int N, ptr G) {
; long j;
; G[1] = 1;
; for (j = 1; j < N - 1; j++)
@@ -271,11 +271,11 @@ return:
;}
; This requires phi translation of the adds.
-define void @test7(i32 %N, double* nocapture %G) nounwind ssp {
+define void @test7(i32 %N, ptr nocapture %G) nounwind ssp {
; CHECK-LABEL: @test7(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds double, double* [[G:%.*]], i64 1
-; CHECK-NEXT: store double 1.000000e+00, double* [[TMP0]], align 8
+; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds double, ptr [[G:%.*]], i64 1
+; CHECK-NEXT: store double 1.000000e+00, ptr [[TMP0]], align 8
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[N:%.*]], -1
; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], 1
; CHECK-NEXT: br i1 [[TMP2]], label [[BB_NPH:%.*]], label [[RETURN:%.*]]
@@ -287,20 +287,20 @@ define void @test7(i32 %N, double* nocapture %G) nounwind ssp {
; CHECK-NEXT: [[TMP3:%.*]] = phi double [ 1.000000e+00, [[BB_NPH]] ], [ [[TMP5:%.*]], [[BB]] ]
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH]] ], [ [[TMP9:%.*]], [[BB]] ]
; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[INDVAR]], 2
-; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr double, double* [[G]], i64 [[TMP8]]
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr double, ptr [[G]], i64 [[TMP8]]
; CHECK-NEXT: [[TMP9]] = add i64 [[INDVAR]], 1
-; CHECK-NEXT: [[SCEVGEP10:%.*]] = getelementptr double, double* [[G]], i64 [[TMP9]]
-; CHECK-NEXT: [[TMP4:%.*]] = load double, double* [[SCEVGEP]], align 8
+; CHECK-NEXT: [[SCEVGEP10:%.*]] = getelementptr double, ptr [[G]], i64 [[TMP9]]
+; CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[SCEVGEP]], align 8
; CHECK-NEXT: [[TMP5]] = fadd double [[TMP3]], [[TMP4]]
-; CHECK-NEXT: store double [[TMP5]], double* [[SCEVGEP]], align 8
+; CHECK-NEXT: store double [[TMP5]], ptr [[SCEVGEP]], align 8
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP9]], [[TMP7]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[RETURN]], label [[BB]]
; CHECK: return:
; CHECK-NEXT: ret void
;
entry:
- %0 = getelementptr inbounds double, double* %G, i64 1
- store double 1.000000e+00, double* %0, align 8
+ %0 = getelementptr inbounds double, ptr %G, i64 1
+ store double 1.000000e+00, ptr %0, align 8
%1 = add i32 %N, -1
%2 = icmp sgt i32 %1, 1
br i1 %2, label %bb.nph, label %return
@@ -313,13 +313,13 @@ bb.nph:
bb:
%indvar = phi i64 [ 0, %bb.nph ], [ %tmp9, %bb ]
%tmp8 = add i64 %indvar, 2
- %scevgep = getelementptr double, double* %G, i64 %tmp8
+ %scevgep = getelementptr double, ptr %G, i64 %tmp8
%tmp9 = add i64 %indvar, 1
- %scevgep10 = getelementptr double, double* %G, i64 %tmp9
- %3 = load double, double* %scevgep10, align 8
- %4 = load double, double* %scevgep, align 8
+ %scevgep10 = getelementptr double, ptr %G, i64 %tmp9
+ %3 = load double, ptr %scevgep10, align 8
+ %4 = load double, ptr %scevgep, align 8
%5 = fadd double %3, %4
- store double %5, double* %scevgep, align 8
+ store double %5, ptr %scevgep, align 8
%exitcond = icmp eq i64 %tmp9, %tmp7
br i1 %exitcond, label %return, label %bb
@@ -331,22 +331,22 @@ return:
;; Here the loaded address isn't available in 'block2' at all, requiring a new
;; GEP to be inserted into it.
-define i32 @test8(i32* %p, i32* %q, i32** %Hack, i1 %C) {
+define i32 @test8(ptr %p, ptr %q, ptr %Hack, i1 %C) {
; CHECK-LABEL: @test8(
; CHECK-NEXT: block1:
; CHECK-NEXT: br i1 [[C:%.*]], label [[BLOCK2:%.*]], label [[BLOCK3:%.*]]
; CHECK: block2:
-; CHECK-NEXT: [[P3_PHI_TRANS_INSERT:%.*]] = getelementptr i32, i32* [[Q:%.*]], i32 1
-; CHECK-NEXT: [[PRE_PRE:%.*]] = load i32, i32* [[P3_PHI_TRANS_INSERT]], align 4
+; CHECK-NEXT: [[P3_PHI_TRANS_INSERT:%.*]] = getelementptr i32, ptr [[Q:%.*]], i32 1
+; CHECK-NEXT: [[PRE_PRE:%.*]] = load i32, ptr [[P3_PHI_TRANS_INSERT]], align 4
; CHECK-NEXT: br label [[BLOCK4:%.*]]
; CHECK: block3:
-; CHECK-NEXT: [[A:%.*]] = getelementptr i32, i32* [[P:%.*]], i32 1
-; CHECK-NEXT: store i32 0, i32* [[A]], align 4
+; CHECK-NEXT: [[A:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 1
+; CHECK-NEXT: store i32 0, ptr [[A]], align 4
; CHECK-NEXT: br label [[BLOCK4]]
; CHECK: block4:
; CHECK-NEXT: [[PRE:%.*]] = phi i32 [ 0, [[BLOCK3]] ], [ [[PRE_PRE]], [[BLOCK2]] ]
-; CHECK-NEXT: [[P2:%.*]] = phi i32* [ [[P]], [[BLOCK3]] ], [ [[Q]], [[BLOCK2]] ]
-; CHECK-NEXT: [[P3:%.*]] = getelementptr i32, i32* [[P2]], i32 1
+; CHECK-NEXT: [[P2:%.*]] = phi ptr [ [[P]], [[BLOCK3]] ], [ [[Q]], [[BLOCK2]] ]
+; CHECK-NEXT: [[P3:%.*]] = getelementptr i32, ptr [[P2]], i32 1
; CHECK-NEXT: ret i32 [[PRE]]
;
block1:
@@ -356,25 +356,25 @@ block2:
br label %block4
block3:
- %A = getelementptr i32, i32* %p, i32 1
- store i32 0, i32* %A
+ %A = getelementptr i32, ptr %p, i32 1
+ store i32 0, ptr %A
br label %block4
block4:
- %P2 = phi i32* [%p, %block3], [%q, %block2]
- %P3 = getelementptr i32, i32* %P2, i32 1
- %PRE = load i32, i32* %P3
+ %P2 = phi ptr [%p, %block3], [%q, %block2]
+ %P3 = getelementptr i32, ptr %P2, i32 1
+ %PRE = load i32, ptr %P3
ret i32 %PRE
}
-;void test9(int N, double* G) {
+;void test9(int N, ptr G) {
; long j;
; for (j = 1; j < N - 1; j++)
; G[j+1] = G[j] + G[j+1];
;}
; This requires phi translation of the adds.
-define void @test9(i32 %N, double* nocapture %G) nounwind ssp {
+define void @test9(i32 %N, ptr nocapture %G) nounwind ssp {
; CHECK-LABEL: @test9(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N:%.*]], -1
@@ -383,19 +383,19 @@ define void @test9(i32 %N, double* nocapture %G) nounwind ssp {
; CHECK: bb.nph:
; CHECK-NEXT: [[TMP:%.*]] = sext i32 [[TMP0]] to i64
; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[TMP]], -1
-; CHECK-NEXT: [[SCEVGEP10_PHI_TRANS_INSERT:%.*]] = getelementptr double, double* [[G:%.*]], i64 1
-; CHECK-NEXT: [[DOTPRE:%.*]] = load double, double* [[SCEVGEP10_PHI_TRANS_INSERT]], align 8
+; CHECK-NEXT: [[SCEVGEP10_PHI_TRANS_INSERT:%.*]] = getelementptr double, ptr [[G:%.*]], i64 1
+; CHECK-NEXT: [[DOTPRE:%.*]] = load double, ptr [[SCEVGEP10_PHI_TRANS_INSERT]], align 8
; CHECK-NEXT: br label [[BB:%.*]]
; CHECK: bb:
; CHECK-NEXT: [[TMP2:%.*]] = phi double [ [[DOTPRE]], [[BB_NPH]] ], [ [[TMP4:%.*]], [[BB]] ]
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH]] ], [ [[TMP9:%.*]], [[BB]] ]
; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[INDVAR]], 2
-; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr double, double* [[G]], i64 [[TMP8]]
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr double, ptr [[G]], i64 [[TMP8]]
; CHECK-NEXT: [[TMP9]] = add i64 [[INDVAR]], 1
-; CHECK-NEXT: [[SCEVGEP10:%.*]] = getelementptr double, double* [[G]], i64 [[TMP9]]
-; CHECK-NEXT: [[TMP3:%.*]] = load double, double* [[SCEVGEP]], align 8
+; CHECK-NEXT: [[SCEVGEP10:%.*]] = getelementptr double, ptr [[G]], i64 [[TMP9]]
+; CHECK-NEXT: [[TMP3:%.*]] = load double, ptr [[SCEVGEP]], align 8
; CHECK-NEXT: [[TMP4]] = fadd double [[TMP2]], [[TMP3]]
-; CHECK-NEXT: store double [[TMP4]], double* [[SCEVGEP]], align 8
+; CHECK-NEXT: store double [[TMP4]], ptr [[SCEVGEP]], align 8
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP9]], [[TMP7]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[RETURN]], label [[BB]]
; CHECK: return:
@@ -416,13 +416,13 @@ bb.nph:
bb:
%indvar = phi i64 [ 0, %bb.nph ], [ %tmp9, %bb ]
%tmp8 = add i64 %indvar, 2
- %scevgep = getelementptr double, double* %G, i64 %tmp8
+ %scevgep = getelementptr double, ptr %G, i64 %tmp8
%tmp9 = add i64 %indvar, 1
- %scevgep10 = getelementptr double, double* %G, i64 %tmp9
- %3 = load double, double* %scevgep10, align 8
- %4 = load double, double* %scevgep, align 8
+ %scevgep10 = getelementptr double, ptr %G, i64 %tmp9
+ %3 = load double, ptr %scevgep10, align 8
+ %4 = load double, ptr %scevgep, align 8
%5 = fadd double %3, %4
- store double %5, double* %scevgep, align 8
+ store double %5, ptr %scevgep, align 8
%exitcond = icmp eq i64 %tmp9, %tmp7
br i1 %exitcond, label %return, label %bb
@@ -432,14 +432,14 @@ return:
ret void
}
-;void test10(int N, double* G) {
+;void test10(int N, ptr G) {
; long j;
; for (j = 1; j < N - 1; j++)
; G[j] = G[j] + G[j+1] + G[j-1];
;}
; PR5501
-define void @test10(i32 %N, double* nocapture %G) nounwind ssp {
+define void @test10(i32 %N, ptr nocapture %G) nounwind ssp {
; CHECK-LABEL: @test10(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N:%.*]], -1
@@ -448,23 +448,23 @@ define void @test10(i32 %N, double* nocapture %G) nounwind ssp {
; CHECK: bb.nph:
; CHECK-NEXT: [[TMP:%.*]] = sext i32 [[TMP0]] to i64
; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[TMP]], -1
-; CHECK-NEXT: [[SCEVGEP12_PHI_TRANS_INSERT:%.*]] = getelementptr double, double* [[G:%.*]], i64 1
-; CHECK-NEXT: [[DOTPRE:%.*]] = load double, double* [[SCEVGEP12_PHI_TRANS_INSERT]], align 8
-; CHECK-NEXT: [[DOTPRE1:%.*]] = load double, double* [[G]], align 8
+; CHECK-NEXT: [[SCEVGEP12_PHI_TRANS_INSERT:%.*]] = getelementptr double, ptr [[G:%.*]], i64 1
+; CHECK-NEXT: [[DOTPRE:%.*]] = load double, ptr [[SCEVGEP12_PHI_TRANS_INSERT]], align 8
+; CHECK-NEXT: [[DOTPRE1:%.*]] = load double, ptr [[G]], align 8
; CHECK-NEXT: br label [[BB:%.*]]
; CHECK: bb:
; CHECK-NEXT: [[TMP2:%.*]] = phi double [ [[DOTPRE1]], [[BB_NPH]] ], [ [[TMP6:%.*]], [[BB]] ]
; CHECK-NEXT: [[TMP3:%.*]] = phi double [ [[DOTPRE]], [[BB_NPH]] ], [ [[TMP4:%.*]], [[BB]] ]
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH]] ], [ [[TMP11:%.*]], [[BB]] ]
-; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr double, double* [[G]], i64 [[INDVAR]]
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr double, ptr [[G]], i64 [[INDVAR]]
; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[INDVAR]], 2
-; CHECK-NEXT: [[SCEVGEP10:%.*]] = getelementptr double, double* [[G]], i64 [[TMP9]]
+; CHECK-NEXT: [[SCEVGEP10:%.*]] = getelementptr double, ptr [[G]], i64 [[TMP9]]
; CHECK-NEXT: [[TMP11]] = add i64 [[INDVAR]], 1
-; CHECK-NEXT: [[SCEVGEP12:%.*]] = getelementptr double, double* [[G]], i64 [[TMP11]]
-; CHECK-NEXT: [[TMP4]] = load double, double* [[SCEVGEP10]], align 8
+; CHECK-NEXT: [[SCEVGEP12:%.*]] = getelementptr double, ptr [[G]], i64 [[TMP11]]
+; CHECK-NEXT: [[TMP4]] = load double, ptr [[SCEVGEP10]], align 8
; CHECK-NEXT: [[TMP5:%.*]] = fadd double [[TMP3]], [[TMP4]]
; CHECK-NEXT: [[TMP6]] = fadd double [[TMP5]], [[TMP2]]
-; CHECK-NEXT: store double [[TMP6]], double* [[SCEVGEP12]], align 8
+; CHECK-NEXT: store double [[TMP6]], ptr [[SCEVGEP12]], align 8
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[TMP11]], [[TMP8]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[RETURN]], label [[BB]]
; CHECK: return:
@@ -483,17 +483,17 @@ bb.nph:
bb:
%indvar = phi i64 [ 0, %bb.nph ], [ %tmp11, %bb ]
- %scevgep = getelementptr double, double* %G, i64 %indvar
+ %scevgep = getelementptr double, ptr %G, i64 %indvar
%tmp9 = add i64 %indvar, 2
- %scevgep10 = getelementptr double, double* %G, i64 %tmp9
+ %scevgep10 = getelementptr double, ptr %G, i64 %tmp9
%tmp11 = add i64 %indvar, 1
- %scevgep12 = getelementptr double, double* %G, i64 %tmp11
- %2 = load double, double* %scevgep12, align 8
- %3 = load double, double* %scevgep10, align 8
+ %scevgep12 = getelementptr double, ptr %G, i64 %tmp11
+ %2 = load double, ptr %scevgep12, align 8
+ %3 = load double, ptr %scevgep10, align 8
%4 = fadd double %2, %3
- %5 = load double, double* %scevgep, align 8
+ %5 = load double, ptr %scevgep, align 8
%6 = fadd double %4, %5
- store double %6, double* %scevgep12, align 8
+ store double %6, ptr %scevgep12, align 8
%exitcond = icmp eq i64 %tmp11, %tmp8
br i1 %exitcond, label %return, label %bb
@@ -504,7 +504,7 @@ return:
}
; Test critical edge splitting.
-define i32 @test11(i32* %p, i1 %C, i32 %N) {
+define i32 @test11(ptr %p, i1 %C, i32 %N) {
; CHECK-LABEL: @test11(
; CHECK-NEXT: block1:
; CHECK-NEXT: br i1 [[C:%.*]], label [[BLOCK2:%.*]], label [[BLOCK3:%.*]]
@@ -512,10 +512,10 @@ define i32 @test11(i32* %p, i1 %C, i32 %N) {
; CHECK-NEXT: [[COND:%.*]] = icmp sgt i32 [[N:%.*]], 1
; CHECK-NEXT: br i1 [[COND]], label [[BLOCK2_BLOCK4_CRIT_EDGE:%.*]], label [[BLOCK5:%.*]]
; CHECK: block2.block4_crit_edge:
-; CHECK-NEXT: [[PRE_PRE:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[PRE_PRE:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[BLOCK4:%.*]]
; CHECK: block3:
-; CHECK-NEXT: store i32 0, i32* [[P]], align 4
+; CHECK-NEXT: store i32 0, ptr [[P]], align 4
; CHECK-NEXT: br label [[BLOCK4]]
; CHECK: block4:
; CHECK-NEXT: [[PRE:%.*]] = phi i32 [ [[PRE_PRE]], [[BLOCK2_BLOCK4_CRIT_EDGE]] ], [ 0, [[BLOCK3]] ]
@@ -532,11 +532,11 @@ block2:
br i1 %cond, label %block4, label %block5
block3:
- store i32 0, i32* %p
+ store i32 0, ptr %p
br label %block4
block4:
- %PRE = load i32, i32* %p
+ %PRE = load i32, ptr %p
br label %block5
block5:
@@ -549,7 +549,7 @@ declare void @g(i32)
declare i32 @__CxxFrameHandler3(...)
; Test that loads aren't PRE'd into EH pads.
-define void @test12(i32* %p) personality i32 (...)* @__CxxFrameHandler3 {
+define void @test12(ptr %p) personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: @test12(
; CHECK-NEXT: block1:
; CHECK-NEXT: invoke void @f()
@@ -566,11 +566,11 @@ define void @test12(i32* %p) personality i32 (...)* @__CxxFrameHandler3 {
; CHECK-NEXT: catchret from [[C]] to label [[BLOCK2]]
; CHECK: cleanup:
; CHECK-NEXT: [[C1:%.*]] = cleanuppad within none []
-; CHECK-NEXT: store i32 0, i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 0, ptr [[P:%.*]], align 4
; CHECK-NEXT: cleanupret from [[C1]] unwind label [[CLEANUP2]]
; CHECK: cleanup2:
; CHECK-NEXT: [[C2:%.*]] = cleanuppad within none []
-; CHECK-NEXT: [[NOTPRE:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[NOTPRE:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: call void @g(i32 [[NOTPRE]])
; CHECK-NEXT: cleanupret from [[C2]] unwind to caller
;
@@ -594,30 +594,30 @@ catch:
cleanup:
%c1 = cleanuppad within none []
- store i32 0, i32* %p
+ store i32 0, ptr %p
cleanupret from %c1 unwind label %cleanup2
cleanup2:
%c2 = cleanuppad within none []
- %NOTPRE = load i32, i32* %p
+ %NOTPRE = load i32, ptr %p
call void @g(i32 %NOTPRE)
cleanupret from %c2 unwind to caller
}
; Don't PRE load across potentially throwing calls.
-define i32 @test13(i32* noalias nocapture readonly %x, i32* noalias nocapture %r, i32 %a) {
+define i32 @test13(ptr noalias nocapture readonly %x, ptr noalias nocapture %r, i32 %a) {
; CHECK-LABEL: @test13(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[A:%.*]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[UU:%.*]] = load i32, i32* [[X:%.*]], align 4
-; CHECK-NEXT: store i32 [[UU]], i32* [[R:%.*]], align 4
+; CHECK-NEXT: [[UU:%.*]] = load i32, ptr [[X:%.*]], align 4
+; CHECK-NEXT: store i32 [[UU]], ptr [[R:%.*]], align 4
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: call void @f()
-; CHECK-NEXT: [[VV:%.*]] = load i32, i32* [[X]], align 4
+; CHECK-NEXT: [[VV:%.*]] = load i32, ptr [[X]], align 4
; CHECK-NEXT: ret i32 [[VV]]
;
@@ -627,32 +627,32 @@ entry:
if.then:
- %uu = load i32, i32* %x, align 4
- store i32 %uu, i32* %r, align 4
+ %uu = load i32, ptr %x, align 4
+ store i32 %uu, ptr %r, align 4
br label %if.end
if.end:
call void @f()
- %vv = load i32, i32* %x, align 4
+ %vv = load i32, ptr %x, align 4
ret i32 %vv
}
; Same as test13, but now the blocking function is not immediately in load's
; block.
-define i32 @test14(i32* noalias nocapture readonly %x, i32* noalias nocapture %r, i32 %a) {
+define i32 @test14(ptr noalias nocapture readonly %x, ptr noalias nocapture %r, i32 %a) {
; CHECK-LABEL: @test14(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[A:%.*]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[UU:%.*]] = load i32, i32* [[X:%.*]], align 4
-; CHECK-NEXT: store i32 [[UU]], i32* [[R:%.*]], align 4
+; CHECK-NEXT: [[UU:%.*]] = load i32, ptr [[X:%.*]], align 4
+; CHECK-NEXT: store i32 [[UU]], ptr [[R:%.*]], align 4
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: call void @f()
-; CHECK-NEXT: [[VV:%.*]] = load i32, i32* [[X]], align 4
+; CHECK-NEXT: [[VV:%.*]] = load i32, ptr [[X]], align 4
; CHECK-NEXT: ret i32 [[VV]]
;
@@ -662,8 +662,8 @@ entry:
if.then:
- %uu = load i32, i32* %x, align 4
- store i32 %uu, i32* %r, align 4
+ %uu = load i32, ptr %x, align 4
+ store i32 %uu, ptr %r, align 4
br label %if.end
@@ -675,7 +675,7 @@ follow_1:
br label %follow_2
follow_2:
- %vv = load i32, i32* %x, align 4
+ %vv = load i32, ptr %x, align 4
ret i32 %vv
}
@@ -683,17 +683,17 @@ follow_2:
; dereferenceable can be loaded from speculatively without a risk of trapping.
; Since it is OK to speculate, PRE is allowed.
-define i32 @test15(i32* noalias nocapture readonly dereferenceable(8) align 4 %x, i32* noalias nocapture %r, i32 %a) nofree nosync {
+define i32 @test15(ptr noalias nocapture readonly dereferenceable(8) align 4 %x, ptr noalias nocapture %r, i32 %a) nofree nosync {
; CHECK-LABEL: @test15(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[A:%.*]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[ENTRY_IF_END_CRIT_EDGE:%.*]], label [[IF_THEN:%.*]]
; CHECK: entry.if.end_crit_edge:
-; CHECK-NEXT: [[VV_PRE:%.*]] = load i32, i32* [[X:%.*]], align 4
+; CHECK-NEXT: [[VV_PRE:%.*]] = load i32, ptr [[X:%.*]], align 4
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[UU:%.*]] = load i32, i32* [[X]], align 4
-; CHECK-NEXT: store i32 [[UU]], i32* [[R:%.*]], align 4
+; CHECK-NEXT: [[UU:%.*]] = load i32, ptr [[X]], align 4
+; CHECK-NEXT: store i32 [[UU]], ptr [[R:%.*]], align 4
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: [[VV:%.*]] = phi i32 [ [[VV_PRE]], [[ENTRY_IF_END_CRIT_EDGE]] ], [ [[UU]], [[IF_THEN]] ]
@@ -707,14 +707,14 @@ entry:
if.then:
- %uu = load i32, i32* %x, align 4
- store i32 %uu, i32* %r, align 4
+ %uu = load i32, ptr %x, align 4
+ store i32 %uu, ptr %r, align 4
br label %if.end
if.end:
call void @f()
- %vv = load i32, i32* %x, align 4
+ %vv = load i32, ptr %x, align 4
ret i32 %vv
@@ -724,17 +724,17 @@ if.end:
; dereferenceable can be loaded from speculatively without a risk of trapping.
; Since it is OK to speculate, PRE is allowed.
-define i32 @test16(i32* noalias nocapture readonly dereferenceable(8) align 4 %x, i32* noalias nocapture %r, i32 %a) nofree nosync {
+define i32 @test16(ptr noalias nocapture readonly dereferenceable(8) align 4 %x, ptr noalias nocapture %r, i32 %a) nofree nosync {
; CHECK-LABEL: @test16(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[A:%.*]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[ENTRY_IF_END_CRIT_EDGE:%.*]], label [[IF_THEN:%.*]]
; CHECK: entry.if.end_crit_edge:
-; CHECK-NEXT: [[VV_PRE:%.*]] = load i32, i32* [[X:%.*]], align 4
+; CHECK-NEXT: [[VV_PRE:%.*]] = load i32, ptr [[X:%.*]], align 4
; CHECK-NEXT: br label [[IF_END:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[UU:%.*]] = load i32, i32* [[X]], align 4
-; CHECK-NEXT: store i32 [[UU]], i32* [[R:%.*]], align 4
+; CHECK-NEXT: [[UU:%.*]] = load i32, ptr [[X]], align 4
+; CHECK-NEXT: store i32 [[UU]], ptr [[R:%.*]], align 4
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
; CHECK-NEXT: [[VV:%.*]] = phi i32 [ [[VV_PRE]], [[ENTRY_IF_END_CRIT_EDGE]] ], [ [[UU]], [[IF_THEN]] ]
@@ -748,8 +748,8 @@ entry:
if.then:
- %uu = load i32, i32* %x, align 4
- store i32 %uu, i32* %r, align 4
+ %uu = load i32, ptr %x, align 4
+ store i32 %uu, ptr %r, align 4
br label %if.end
@@ -762,7 +762,7 @@ follow_1:
br label %follow_2
follow_2:
- %vv = load i32, i32* %x, align 4
+ %vv = load i32, ptr %x, align 4
ret i32 %vv
}
@@ -773,10 +773,10 @@ declare i1 @bar()
; critical edges. The other successors of those predecessors have same loads.
; We can move all loads into predecessors.
-define void @test17(i64* %p1, i64* %p2, i64* %p3, i64* %p4)
+define void @test17(ptr %p1, ptr %p2, ptr %p3, ptr %p4)
; CHECK-LABEL: @test17(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[V1:%.*]] = load i64, i64* [[P1:%.*]], align 8
+; CHECK-NEXT: [[V1:%.*]] = load i64, ptr [[P1:%.*]], align 8
; CHECK-NEXT: [[COND1:%.*]] = icmp sgt i64 [[V1]], 200
; CHECK-NEXT: br i1 [[COND1]], label [[BB200:%.*]], label [[BB1:%.*]]
; CHECK: bb1:
@@ -784,30 +784,30 @@ define void @test17(i64* %p1, i64* %p2, i64* %p3, i64* %p4)
; CHECK-NEXT: br i1 [[COND2]], label [[BB100:%.*]], label [[BB2:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[V2:%.*]] = add nsw i64 [[V1]], 1
-; CHECK-NEXT: store i64 [[V2]], i64* [[P1]], align 8
+; CHECK-NEXT: store i64 [[V2]], ptr [[P1]], align 8
; CHECK-NEXT: br label [[BB3:%.*]]
; CHECK: bb3:
-; CHECK-NEXT: [[V3:%.*]] = load i64, i64* [[P1]], align 8
-; CHECK-NEXT: store i64 [[V3]], i64* [[P2:%.*]], align 8
+; CHECK-NEXT: [[V3:%.*]] = load i64, ptr [[P1]], align 8
+; CHECK-NEXT: store i64 [[V3]], ptr [[P2:%.*]], align 8
; CHECK-NEXT: ret void
; CHECK: bb100:
; CHECK-NEXT: [[COND3:%.*]] = call i1 @foo()
; CHECK-NEXT: br i1 [[COND3]], label [[BB3]], label [[BB101:%.*]]
; CHECK: bb101:
-; CHECK-NEXT: [[V4:%.*]] = load i64, i64* [[P1]], align 8
-; CHECK-NEXT: store i64 [[V4]], i64* [[P3:%.*]], align 8
+; CHECK-NEXT: [[V4:%.*]] = load i64, ptr [[P1]], align 8
+; CHECK-NEXT: store i64 [[V4]], ptr [[P3:%.*]], align 8
; CHECK-NEXT: ret void
; CHECK: bb200:
; CHECK-NEXT: [[COND4:%.*]] = call i1 @bar()
; CHECK-NEXT: br i1 [[COND4]], label [[BB3]], label [[BB201:%.*]]
; CHECK: bb201:
-; CHECK-NEXT: [[V5:%.*]] = load i64, i64* [[P1]], align 8
-; CHECK-NEXT: store i64 [[V5]], i64* [[P4:%.*]], align 8
+; CHECK-NEXT: [[V5:%.*]] = load i64, ptr [[P1]], align 8
+; CHECK-NEXT: store i64 [[V5]], ptr [[P4:%.*]], align 8
; CHECK-NEXT: ret void
;
{
entry:
- %v1 = load i64, i64* %p1, align 8
+ %v1 = load i64, ptr %p1, align 8
%cond1 = icmp sgt i64 %v1, 200
br i1 %cond1, label %bb200, label %bb1
@@ -817,12 +817,12 @@ bb1:
bb2:
%v2 = add nsw i64 %v1, 1
- store i64 %v2, i64* %p1, align 8
+ store i64 %v2, ptr %p1, align 8
br label %bb3
bb3:
- %v3 = load i64, i64* %p1, align 8
- store i64 %v3, i64* %p2, align 8
+ %v3 = load i64, ptr %p1, align 8
+ store i64 %v3, ptr %p2, align 8
ret void
bb100:
@@ -830,8 +830,8 @@ bb100:
br i1 %cond3, label %bb3, label %bb101
bb101:
- %v4 = load i64, i64* %p1, align 8
- store i64 %v4, i64* %p3, align 8
+ %v4 = load i64, ptr %p1, align 8
+ store i64 %v4, ptr %p3, align 8
ret void
bb200:
@@ -839,7 +839,7 @@ bb200:
br i1 %cond4, label %bb3, label %bb201
bb201:
- %v5 = load i64, i64* %p1, align 8
- store i64 %v5, i64* %p4, align 8
+ %v5 = load i64, ptr %p1, align 8
+ store i64 %v5, ptr %p4, align 8
ret void
}
diff --git a/llvm/test/Transforms/GVN/PRE/pre-loop-load-new-pm.ll b/llvm/test/Transforms/GVN/PRE/pre-loop-load-new-pm.ll
index 568c4492a58f9..0d6500471bdb0 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-loop-load-new-pm.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-loop-load-new-pm.ll
@@ -7,13 +7,13 @@ declare i1 @side_effect_cond()
declare i32 @personality_function()
; TODO: We can PRE the load away from the hot path.
-define i32 @test_load_on_cold_path(i32* %p) {
+define i32 @test_load_on_cold_path(ptr %p) {
; CHECK-LABEL: @test_load_on_cold_path(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -33,7 +33,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -54,13 +54,13 @@ exit:
}
; PRE here is meaningless, so we should not do it.
-define i32 @test_load_on_both_paths(i32* %p) {
+define i32 @test_load_on_both_paths(ptr %p) {
; CHECK-LABEL: @test_load_on_both_paths(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -81,7 +81,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -104,13 +104,13 @@ exit:
; We could PRE here, but it doesn't seem very profitable.
-define i32 @test_load_on_backedge(i32* %p) {
+define i32 @test_load_on_backedge(ptr %p) {
; CHECK-LABEL: @test_load_on_backedge(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -130,7 +130,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -151,13 +151,13 @@ exit:
}
; TODO: We can PRE via splitting of the critical edge in the cold path.
-define i32 @test_load_on_exiting_cold_path_01(i32* %p) {
+define i32 @test_load_on_exiting_cold_path_01(ptr %p) {
; CHECK-LABEL: @test_load_on_exiting_cold_path_01(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -179,7 +179,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -203,13 +203,13 @@ cold_exit:
}
; TODO: We can PRE via splitting of the critical edge in the cold path.
-define i32 @test_load_on_exiting_cold_path_02(i32* %p) gc "statepoint-example" personality i32 ()* @personality_function {
+define i32 @test_load_on_exiting_cold_path_02(ptr %p) gc "statepoint-example" personality ptr @personality_function {
; CHECK-LABEL: @test_load_on_exiting_cold_path_02(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -233,7 +233,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -258,13 +258,13 @@ cold_exit:
}
; Make sure we do not insert load into both cold path & backedge.
-define i32 @test_load_on_cold_path_and_backedge(i32* %p) {
+define i32 @test_load_on_cold_path_and_backedge(ptr %p) {
; CHECK-LABEL: @test_load_on_cold_path_and_backedge(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -285,7 +285,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -307,13 +307,13 @@ exit:
}
; TODO: We can PRE the load away from the hot path. Make sure we only insert 1 load.
-define i32 @test_load_multi_block_cold_path(i32* %p) {
+define i32 @test_load_multi_block_cold_path(ptr %p) {
; CHECK-LABEL: @test_load_multi_block_cold_path(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH_1:%.*]]
; CHECK: hot_path:
@@ -336,7 +336,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path.1
@@ -366,13 +366,13 @@ exit:
}
; TODO: We can PRE via splitting of the critical edge in the cold path. Make sure we only insert 1 load.
-define i32 @test_load_on_multi_exiting_cold_path(i32* %p) {
+define i32 @test_load_on_multi_exiting_cold_path(ptr %p) {
; CHECK-LABEL: @test_load_on_multi_exiting_cold_path(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH_1:%.*]]
; CHECK: hot_path:
@@ -400,7 +400,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path.1
@@ -432,13 +432,13 @@ cold_exit:
}
; TODO: PRE via splittinga backedge in the cold loop. Make sure we don't insert a load into an inner loop.
-define i32 @test_inner_loop(i32* %p) {
+define i32 @test_inner_loop(ptr %p) {
; CHECK-LABEL: @test_inner_loop(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -460,7 +460,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -484,13 +484,13 @@ exit:
}
; TODO: We can PRE here, but profitablility depends on frequency of cold blocks. Conservatively, we should not do it unless there is a reason.
-define i32 @test_multiple_cold_paths(i32* %p) {
+define i32 @test_multiple_cold_paths(ptr %p) {
; CHECK-LABEL: @test_multiple_cold_paths(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND_1:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND_1]], label [[HOT_PATH_1:%.*]], label [[COLD_PATH_1:%.*]]
; CHECK: hot_path.1:
@@ -526,7 +526,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond.1 = icmp ne i32 %x, 0
br i1 %cond.1, label %hot_path.1, label %cold_path.1
@@ -569,13 +569,13 @@ exit:
}
; TODO: We can PRE via split of critical edge.
-define i32 @test_side_exit_after_merge(i32* %p) {
+define i32 @test_side_exit_after_merge(ptr %p) {
; CHECK-LABEL: @test_side_exit_after_merge(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -603,7 +603,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
diff --git a/llvm/test/Transforms/GVN/PRE/pre-loop-load-through-select.ll b/llvm/test/Transforms/GVN/PRE/pre-loop-load-through-select.ll
index e3ab965e199df..3b16b86baa75f 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-loop-load-through-select.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-loop-load-through-select.ll
@@ -1,227 +1,227 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes='require<domtree>,loop(loop-simplifycfg),gvn' -enable-split-backedge-in-load-pre -S %s | FileCheck %s
-define i32 @test_pointer_phi_select_same_object(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_same_object(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_same_object(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[TMP0:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_same_object_lcssa(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_same_object_lcssa(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_same_object_lcssa(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[TMP0:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %lcssa.min = phi i32* [ %min.select, %loop ]
- %res = load i32, i32* %lcssa.min, align 4
+ %lcssa.min = phi ptr [ %min.select, %loop ]
+ %res = load i32, ptr %lcssa.min, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_
diff erent_objects(i32* %A, i32 *%B, i32* %end) {
+define i32 @test_pointer_phi_select_
diff erent_objects(ptr %A, ptr %B, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_
diff erent_objects(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[B:%.*]], align 4
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[TMP0:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[A:%.*]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[B]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[A:%.*]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[B]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
br label %loop
loop:
- %ptr.iv = phi i32* [ %A, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %B, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %A, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %B, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_same_object_multiple_loads_1(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_same_object_multiple_loads_1(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_same_object_multiple_loads_1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[TMP0:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %l.3 = load i32, i32* %min.ptr, align 4
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %l.3 = load i32, ptr %min.ptr, align 4
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_same_object_multiple_loads_2(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_same_object_multiple_loads_2(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_same_object_multiple_loads_2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[TMP0:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %l.3 = load i32, i32* %ptr.iv, align 4
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %l.3 = load i32, ptr %ptr.iv, align 4
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_load_after(i32* %A, i32 *%B, i32* %end) {
+define i32 @test_pointer_phi_select_load_after(ptr %A, ptr %B, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_load_after(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[B:%.*]], align 4
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[B:%.*]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[L_3:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[A:%.*]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[B]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[A:%.*]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[B]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[L_3]] = load i32, i32* [[MIN_SELECT]], align 4
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i32 [[L_3]]
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[L_3]] = load i32, ptr [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i32 [[L_3]]
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
; CHECK-NEXT: ret i32 [[L_3]]
@@ -230,809 +230,809 @@ entry:
br label %loop
loop:
- %ptr.iv = phi i32* [ %A, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %B, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %A, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %B, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %l.3 = load i32, i32* %min.select, align 4
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i32 %l.3
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %l.3 = load i32, ptr %min.select, align 4
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i32 %l.3
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_same_object_split_edge(i32* %ptr, i32* %end, i1 %c) {
+define i32 @test_pointer_phi_select_same_object_split_edge(ptr %ptr, ptr %end, i1 %c) {
; CHECK-LABEL: @test_pointer_phi_select_same_object_split_edge(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
; CHECK-NEXT: br i1 [[C:%.*]], label [[EXIT:%.*]], label [[LOOP_PREHEADER:%.*]]
; CHECK: loop.preheader:
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[TMP0:%.*]], [[LOOP]] ], [ [[L_2_PRE]], [[LOOP_PREHEADER]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ], [ [[START_PTR]], [[LOOP_PREHEADER]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[MIN_SELECT:%.*]], [[LOOP]] ], [ [[PTR]], [[LOOP_PREHEADER]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ], [ [[START_PTR]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[MIN_SELECT:%.*]], [[LOOP]] ], [ [[PTR]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[LOOP_EXIT:%.*]], label [[LOOP]]
; CHECK: loop.exit:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
-; CHECK-NEXT: [[LCSSA_PHI_2:%.*]] = phi i32* [ [[END]], [[ENTRY:%.*]] ], [ [[MIN_SELECT]], [[LOOP_EXIT]] ]
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[LCSSA_PHI_2]], align 4
+; CHECK-NEXT: [[LCSSA_PHI_2:%.*]] = phi ptr [ [[END]], [[ENTRY:%.*]] ], [ [[MIN_SELECT]], [[LOOP_EXIT]] ]
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[LCSSA_PHI_2]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br i1 %c, label %exit, label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %loop.exit, label %loop
loop.exit:
- %lcssa.phi.1 = phi i32* [ %min.select, %loop ]
+ %lcssa.phi.1 = phi ptr [ %min.select, %loop ]
br label %exit
exit:
- %lcssa.phi.2 = phi i32* [ %end, %entry ], [ %lcssa.phi.1, %loop.exit ]
- %res = load i32, i32* %lcssa.phi.2, align 4
+ %lcssa.phi.2 = phi ptr [ %end, %entry ], [ %lcssa.phi.1, %loop.exit ]
+ %res = load i32, ptr %lcssa.phi.2, align 4
ret i32 %res
}
declare void @may_throw() readonly
-define i32 @test_pointer_phi_select_load_may_not_execute_1(i32* %A, i32 *%B, i32* %end) {
+define i32 @test_pointer_phi_select_load_may_not_execute_1(ptr %A, ptr %B, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_load_may_not_execute_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[B:%.*]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[B:%.*]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
; CHECK-NEXT: call void @may_throw()
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[MIN_PTR]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[MIN_PTR]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
br label %loop
loop:
- %ptr.iv = phi i32* [ %A, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %B, %entry ], [ %min.select, %loop ]
+ %ptr.iv = phi ptr [ %A, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %B, %entry ], [ %min.select, %loop ]
call void @may_throw()
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_load_may_not_execute_2(i32* %A, i32 *%B, i32* %end) {
+define i32 @test_pointer_phi_select_load_may_not_execute_2(ptr %A, ptr %B, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_load_may_not_execute_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[B:%.*]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[B:%.*]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: call void @may_throw()
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[MIN_PTR]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[MIN_PTR]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
br label %loop
loop:
- %ptr.iv = phi i32* [ %A, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %B, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %A, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %B, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
call void @may_throw()
- %l.2 = load i32, i32* %min.ptr, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_same_object_store_1(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_same_object_store_1(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_same_object_store_1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: store i32 3, i32* [[MIN_PTR]], align 4
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: store i32 3, ptr [[MIN_PTR]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], 3
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- store i32 3, i32* %min.ptr
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ store i32 3, ptr %min.ptr
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_same_object_store_2(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_same_object_store_2(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_same_object_store_2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[MIN_PTR]], align 4
-; CHECK-NEXT: store i32 3, i32* [[MIN_PTR]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[MIN_PTR]], align 4
+; CHECK-NEXT: store i32 3, ptr [[MIN_PTR]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
- store i32 3, i32* %min.ptr
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
+ store i32 3, ptr %min.ptr
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_same_object_store_3(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_same_object_store_3(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_same_object_store_3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[MIN_PTR]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[MIN_PTR]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: store i32 3, i32* [[MIN_PTR]], align 4
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: store i32 3, ptr [[MIN_PTR]], align 4
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- store i32 3, i32* %min.ptr
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ store i32 3, ptr %min.ptr
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
declare void @may_write()
-define i32 @test_pointer_phi_select_same_object_may_write_call_1(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_same_object_may_write_call_1(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_same_object_may_write_call_1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
; CHECK-NEXT: call void @may_write()
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[MIN_PTR]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[MIN_PTR]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
call void @may_write()
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_same_object_may_write_call_2(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_same_object_may_write_call_2(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_same_object_may_write_call_2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[MIN_PTR]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[MIN_PTR]], align 4
; CHECK-NEXT: call void @may_write()
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
call void @may_write()
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_same_object_may_write_call_3(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_same_object_may_write_call_3(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_same_object_may_write_call_3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[MIN_PTR]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[MIN_PTR]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
; CHECK-NEXT: call void @may_write()
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
call void @may_write()
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_same_object_header_exit(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_same_object_header_exit(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_same_object_header_exit(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP_LATCH]] ]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP_LATCH]] ]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP_LATCH]]
; CHECK: loop.latch:
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[MIN_PTR]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[MIN_PTR]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
; CHECK-NEXT: br label [[LOOP_HEADER]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_PTR]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_PTR]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop.header
loop.header:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop.latch ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop.latch ]
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop.latch ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop.latch ]
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop.latch
loop.latch:
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
br label %loop.header
exit:
- %res = load i32, i32* %min.ptr, align 4
+ %res = load i32, ptr %min.ptr, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_same_object_ptr_use_cycle(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_same_object_ptr_use_cycle(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_same_object_ptr_use_cycle(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[TMP0:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT_PREHEADER:%.*]], label [[LOOP]]
; CHECK: exit.preheader:
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: exit:
-; CHECK-NEXT: [[P:%.*]] = phi i32* [ [[P_NEXT:%.*]], [[EXIT]] ], [ [[MIN_SELECT]], [[EXIT_PREHEADER]] ]
-; CHECK-NEXT: store i32 0, i32* [[P]], align 4
-; CHECK-NEXT: [[P_NEXT]] = getelementptr inbounds i32, i32* [[P]], i64 1
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[P_NEXT:%.*]], [[EXIT]] ], [ [[MIN_SELECT]], [[EXIT_PREHEADER]] ]
+; CHECK-NEXT: store i32 0, ptr [[P]], align 4
+; CHECK-NEXT: [[P_NEXT]] = getelementptr inbounds i32, ptr [[P]], i64 1
; CHECK-NEXT: br label [[EXIT]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %p = phi i32* [ %min.select, %loop ], [ %p.next, %exit ]
- store i32 0, i32* %p
- %p.next = getelementptr inbounds i32, i32* %p, i64 1
+ %p = phi ptr [ %min.select, %loop ], [ %p.next, %exit ]
+ store i32 0, ptr %p
+ %p.next = getelementptr inbounds i32, ptr %p, i64 1
br label %exit
}
-define i32 @test_pointer_phi_select_same_object_maybe_clobbered_in_exit(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_same_object_maybe_clobbered_in_exit(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_same_object_maybe_clobbered_in_exit(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[TMP0:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: store i32 0, i32* [[START_PTR]], align 4
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: store i32 0, ptr [[START_PTR]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- store i32 0, i32* %start.ptr
- %res = load i32, i32* %min.select, align 4
+ store i32 0, ptr %start.ptr
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_same_object_maybe_clobbered_in_exit_2(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_same_object_maybe_clobbered_in_exit_2(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_same_object_maybe_clobbered_in_exit_2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[TMP0:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT_1:%.*]], label [[LOOP]]
; CHECK: exit.1:
-; CHECK-NEXT: store i32 0, i32* [[START_PTR]], align 4
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: store i32 0, ptr [[START_PTR]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit.1, label %loop
exit.1:
- %lcssa.min = phi i32* [ %min.select, %loop ]
- store i32 0, i32* %start.ptr
+ %lcssa.min = phi ptr [ %min.select, %loop ]
+ store i32 0, ptr %start.ptr
br label %exit.2
exit.2:
- %res = load i32, i32* %lcssa.min, align 4
+ %res = load i32, ptr %lcssa.min, align 4
ret i32 %res
}
declare i32 @__CxxFrameHandler3(...)
-define i32 @test_pointer_phi_select_same_object_invoke_in_chain(i32* %ptr, i32* %end) personality i32 (...)* @__CxxFrameHandler3 {
+define i32 @test_pointer_phi_select_same_object_invoke_in_chain(ptr %ptr, ptr %end) personality ptr @__CxxFrameHandler3 {
; CHECK-LABEL: @test_pointer_phi_select_same_object_invoke_in_chain(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[TMP0:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT_1:%.*]], label [[LOOP]]
; CHECK: exit.1:
-; CHECK-NEXT: store i32 0, i32* [[START_PTR]], align 4
+; CHECK-NEXT: store i32 0, ptr [[START_PTR]], align 4
; CHECK-NEXT: invoke void @may_throw()
; CHECK-NEXT: to label [[EXIT_2:%.*]] unwind label [[CATCH_OBJECT:%.*]]
; CHECK: exit.2:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
; CHECK: catch.object:
-; CHECK-NEXT: [[LP:%.*]] = landingpad { i8*, i32 }
-; CHECK-NEXT: catch i8* null
+; CHECK-NEXT: [[LP:%.*]] = landingpad { ptr, i32 }
+; CHECK-NEXT: catch ptr null
; CHECK-NEXT: unreachable
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit.1, label %loop
exit.1:
- %lcssa.min = phi i32* [ %min.select, %loop ]
- store i32 0, i32* %start.ptr
+ %lcssa.min = phi ptr [ %min.select, %loop ]
+ store i32 0, ptr %start.ptr
invoke void @may_throw()
to label %exit.2 unwind label %catch.object
exit.2:
- %res = load i32, i32* %lcssa.min, align 4
+ %res = load i32, ptr %lcssa.min, align 4
ret i32 %res
catch.object:
- %lp = landingpad { i8*, i32 }
- catch i8* null
+ %lp = landingpad { ptr, i32 }
+ catch ptr null
unreachable
}
-define i32 @test_pointer_phi_select_used_by_others_in_loop(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_used_by_others_in_loop(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_used_by_others_in_loop(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[L_3:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[L_3]] = load i32, i32* [[MIN_SELECT]], align 4
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i32 [[L_3]]
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[L_3]] = load i32, ptr [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i32 [[L_3]]
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
; CHECK-NEXT: ret i32 [[L_3]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %l.3 = load i32, i32* %min.select, align 4
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i32 %l.3
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %l.3 = load i32, ptr %min.select, align 4
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i32 %l.3
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_used_by_others_in_loop_1(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_used_by_others_in_loop_1(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_used_by_others_in_loop_1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_3:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[L_3_PRE:%.*]], [[LOOP_LOOP_CRIT_EDGE:%.*]] ]
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY]] ], [ [[TMP0:%.*]], [[LOOP_LOOP_CRIT_EDGE]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP_LOOP_CRIT_EDGE]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP_LOOP_CRIT_EDGE]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP_LOOP_CRIT_EDGE]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP_LOOP_CRIT_EDGE]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i32 [[L_3]]
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i32 [[L_3]]
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP_LOOP_CRIT_EDGE]]
; CHECK: loop.loop_crit_edge:
-; CHECK-NEXT: [[L_3_PRE]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[L_3_PRE]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: br label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %l.3 = load i32, i32* %min.ptr, align 4
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i32 %l.3
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %l.3 = load i32, ptr %min.ptr, align 4
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i32 %l.3
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_used_by_others_in_loop_2(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_used_by_others_in_loop_2(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_used_by_others_in_loop_2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[TMP0:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[TMP0]] = select i1 [[CMP_I_I_I]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[GEP_MIN_PTR:%.*]] = getelementptr inbounds i32, i32* [[MIN_PTR]], i32 1
-; CHECK-NEXT: [[L_3:%.*]] = load i32, i32* [[GEP_MIN_PTR]], align 4
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i32 [[L_3]]
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[GEP_MIN_PTR:%.*]] = getelementptr inbounds i32, ptr [[MIN_PTR]], i32 1
+; CHECK-NEXT: [[L_3:%.*]] = load i32, ptr [[GEP_MIN_PTR]], align 4
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i32 [[L_3]]
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 %l.1, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %gep.min.ptr = getelementptr inbounds i32, i32* %min.ptr, i32 1
- %l.3 = load i32, i32* %gep.min.ptr, align 4
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i32 %l.3
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %gep.min.ptr = getelementptr inbounds i32, ptr %min.ptr, i32 1
+ %l.3 = load i32, ptr %gep.min.ptr, align 4
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i32 %l.3
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @test_pointer_phi_select_no_iter_load(i32* %ptr, i32* %end) {
+define i32 @test_pointer_phi_select_no_iter_load(ptr %ptr, ptr %end) {
; CHECK-LABEL: @test_pointer_phi_select_no_iter_load(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_2:%.*]] = load i32, i32* [[MIN_PTR]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY:%.*]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_2:%.*]] = load i32, ptr [[MIN_PTR]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp ult i32 10, [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_I_I_I]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.2 = load i32, i32* %min.ptr, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.2 = load i32, ptr %min.ptr, align 4
%cmp.i.i.i = icmp ult i32 10, %l.2
- %min.select = select i1 %cmp.i.i.i, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.i.i.i, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
diff --git a/llvm/test/Transforms/GVN/PRE/pre-loop-load.ll b/llvm/test/Transforms/GVN/PRE/pre-loop-load.ll
index eb994d83d2a4d..376b9f1c8f561 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-loop-load.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-loop-load.ll
@@ -8,10 +8,10 @@ declare void @may_free_memory()
declare i32 @personality_function()
; We can PRE the load from gc-managed memory away from the hot path.
-define i32 @test_load_on_cold_path_gc(i32 addrspace(1)* %p) gc "statepoint-example" personality i32 ()* @"personality_function" {
+define i32 @test_load_on_cold_path_gc(ptr addrspace(1) %p) gc "statepoint-example" personality ptr @"personality_function" {
; CHECK-LABEL: @test_load_on_cold_path_gc(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[X_PRE1:%.*]] = load i32, i32 addrspace(1)* [[P:%.*]], align 4
+; CHECK-NEXT: [[X_PRE1:%.*]] = load i32, ptr addrspace(1) [[P:%.*]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[X:%.*]] = phi i32 [ [[X_PRE1]], [[ENTRY:%.*]] ], [ [[X2:%.*]], [[BACKEDGE:%.*]] ]
@@ -22,7 +22,7 @@ define i32 @test_load_on_cold_path_gc(i32 addrspace(1)* %p) gc "statepoint-examp
; CHECK-NEXT: br label [[BACKEDGE]]
; CHECK: cold_path:
; CHECK-NEXT: call void @may_free_memory()
-; CHECK-NEXT: [[X_PRE:%.*]] = load i32, i32 addrspace(1)* [[P]], align 4
+; CHECK-NEXT: [[X_PRE:%.*]] = load i32, ptr addrspace(1) [[P]], align 4
; CHECK-NEXT: br label [[BACKEDGE]]
; CHECK: backedge:
; CHECK-NEXT: [[X2]] = phi i32 [ [[X_PRE]], [[COLD_PATH]] ], [ [[X]], [[HOT_PATH]] ]
@@ -37,7 +37,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32 addrspace(1)* %p
+ %x = load i32, ptr addrspace(1) %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -58,14 +58,14 @@ exit:
}
; Do not PRE here because a loop-variant pointer.
-define i32 @test_load_on_cold_path_gc_variant_neg(i32 addrspace(1)* addrspace(1)* %pp) gc "statepoint-example" personality i32 ()* @"personality_function" {
+define i32 @test_load_on_cold_path_gc_variant_neg(ptr addrspace(1) %pp) gc "statepoint-example" personality ptr @"personality_function" {
; CHECK-LABEL: @test_load_on_cold_path_gc_variant_neg(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[P:%.*]] = load volatile i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* [[PP:%.*]], align 8
-; CHECK-NEXT: [[X:%.*]] = load i32, i32 addrspace(1)* [[P]], align 4
+; CHECK-NEXT: [[P:%.*]] = load volatile ptr addrspace(1), ptr addrspace(1) [[PP:%.*]], align 8
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr addrspace(1) [[P]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -85,8 +85,8 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %p = load volatile i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* %pp
- %x = load i32, i32 addrspace(1)* %p
+ %p = load volatile ptr addrspace(1), ptr addrspace(1) %pp
+ %x = load i32, ptr addrspace(1) %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -108,13 +108,13 @@ exit:
; TODO: We can PRE the load away from the hot path.
-define i32 @test_load_on_cold_path(i32* %p) {
+define i32 @test_load_on_cold_path(ptr %p) {
; CHECK-LABEL: @test_load_on_cold_path(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -134,7 +134,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -156,13 +156,13 @@ exit:
; We should NOT PRE here because the function on the cold path may possibly
; free the memory under the pointer.
-define i32 @test_load_on_cold_path_may_free_memory_neg(i32* %p) {
+define i32 @test_load_on_cold_path_may_free_memory_neg(ptr %p) {
; CHECK-LABEL: @test_load_on_cold_path_may_free_memory_neg(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -182,7 +182,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -202,7 +202,7 @@ exit:
ret i32 %x
}
-declare void @may_modify_or_free_pointer(i32* %p)
+declare void @may_modify_or_free_pointer(ptr %p)
; TODO: Despite the fact that the function may free memory in general, it
; cannot free memory allocated by alloca.
@@ -210,17 +210,17 @@ define i32 @test_load_on_cold_path_may_free_memory_alloca() {
; CHECK-LABEL: @test_load_on_cold_path_may_free_memory_alloca(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[P:%.*]] = alloca i32, align 4
-; CHECK-NEXT: call void @may_modify_or_free_pointer(i32* [[P]])
+; CHECK-NEXT: call void @may_modify_or_free_pointer(ptr [[P]])
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
; CHECK-NEXT: br label [[BACKEDGE]]
; CHECK: cold_path:
-; CHECK-NEXT: call void @may_modify_or_free_pointer(i32* [[P]])
+; CHECK-NEXT: call void @may_modify_or_free_pointer(ptr [[P]])
; CHECK-NEXT: br label [[BACKEDGE]]
; CHECK: backedge:
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], [[X]]
@@ -231,12 +231,12 @@ define i32 @test_load_on_cold_path_may_free_memory_alloca() {
;
entry:
%p = alloca i32
- call void @may_modify_or_free_pointer(i32* %p)
+ call void @may_modify_or_free_pointer(ptr %p)
br label %loop
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -244,7 +244,7 @@ hot_path:
br label %backedge
cold_path:
- call void @may_modify_or_free_pointer(i32* %p)
+ call void @may_modify_or_free_pointer(ptr %p)
br label %backedge
backedge:
@@ -258,13 +258,13 @@ exit:
; PRE here is meaningless, so we should not do it.
-define i32 @test_load_on_both_paths(i32* %p) {
+define i32 @test_load_on_both_paths(ptr %p) {
; CHECK-LABEL: @test_load_on_both_paths(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -285,7 +285,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -308,13 +308,13 @@ exit:
; We could PRE here, but it doesn't seem very profitable.
-define i32 @test_load_on_backedge(i32* %p) {
+define i32 @test_load_on_backedge(ptr %p) {
; CHECK-LABEL: @test_load_on_backedge(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -334,7 +334,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -355,13 +355,13 @@ exit:
}
; TODO: We can PRE via splitting of the critical edge in the cold path.
-define i32 @test_load_on_exiting_cold_path_01(i32* %p) {
+define i32 @test_load_on_exiting_cold_path_01(ptr %p) {
; CHECK-LABEL: @test_load_on_exiting_cold_path_01(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -383,7 +383,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -407,13 +407,13 @@ cold_exit:
}
; TODO: We can PRE via splitting of the critical edge in the cold path.
-define i32 @test_load_on_exiting_cold_path_02(i32* %p) gc "statepoint-example" personality i32 ()* @personality_function {
+define i32 @test_load_on_exiting_cold_path_02(ptr %p) gc "statepoint-example" personality ptr @personality_function {
; CHECK-LABEL: @test_load_on_exiting_cold_path_02(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -437,7 +437,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -462,13 +462,13 @@ cold_exit:
}
; Make sure we do not insert load into both cold path & backedge.
-define i32 @test_load_on_cold_path_and_backedge(i32* %p) {
+define i32 @test_load_on_cold_path_and_backedge(ptr %p) {
; CHECK-LABEL: @test_load_on_cold_path_and_backedge(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -489,7 +489,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -511,13 +511,13 @@ exit:
}
; TODO: We can PRE the load away from the hot path. Make sure we only insert 1 load.
-define i32 @test_load_multi_block_cold_path(i32* %p) {
+define i32 @test_load_multi_block_cold_path(ptr %p) {
; CHECK-LABEL: @test_load_multi_block_cold_path(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH_1:%.*]]
; CHECK: hot_path:
@@ -540,7 +540,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path.1
@@ -570,13 +570,13 @@ exit:
}
; TODO: We can PRE via splitting of the critical edge in the cold path. Make sure we only insert 1 load.
-define i32 @test_load_on_multi_exiting_cold_path(i32* %p) {
+define i32 @test_load_on_multi_exiting_cold_path(ptr %p) {
; CHECK-LABEL: @test_load_on_multi_exiting_cold_path(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH_1:%.*]]
; CHECK: hot_path:
@@ -604,7 +604,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path.1
@@ -636,13 +636,13 @@ cold_exit:
}
; TODO: PRE via splittinga backedge in the cold loop. Make sure we don't insert a load into an inner loop.
-define i32 @test_inner_loop(i32* %p) {
+define i32 @test_inner_loop(ptr %p) {
; CHECK-LABEL: @test_inner_loop(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -664,7 +664,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -688,13 +688,13 @@ exit:
}
; TODO: We can PRE here, but profitablility depends on frequency of cold blocks. Conservatively, we should not do it unless there is a reason.
-define i32 @test_multiple_cold_paths(i32* %p) {
+define i32 @test_multiple_cold_paths(ptr %p) {
; CHECK-LABEL: @test_multiple_cold_paths(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND_1:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND_1]], label [[HOT_PATH_1:%.*]], label [[COLD_PATH_1:%.*]]
; CHECK: hot_path.1:
@@ -730,7 +730,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond.1 = icmp ne i32 %x, 0
br i1 %cond.1, label %hot_path.1, label %cold_path.1
@@ -773,13 +773,13 @@ exit:
}
; TODO: We can PRE via split of critical edge.
-define i32 @test_side_exit_after_merge(i32* %p) {
+define i32 @test_side_exit_after_merge(ptr %p) {
; CHECK-LABEL: @test_side_exit_after_merge(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -807,7 +807,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ne i32 %x, 0
br i1 %cond, label %hot_path, label %cold_path
@@ -840,7 +840,7 @@ cold_exit:
declare void @llvm.experimental.guard(i1, ...)
-define i32 @test_guard_1(i32* %p, i32 %g) {
+define i32 @test_guard_1(ptr %p, i32 %g) {
; CHECK-LABEL: @test_guard_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
@@ -848,7 +848,7 @@ define i32 @test_guard_1(i32* %p, i32 %g) {
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
; CHECK-NEXT: [[GUARD_COND:%.*]] = icmp ne i32 [[IV]], [[G:%.*]]
; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[GUARD_COND]]) [ "deopt"() ]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[X]], 100
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
; CHECK: hot_path:
@@ -870,7 +870,7 @@ loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
%guard_cond = icmp ne i32 %iv, %g
call void(i1, ...) @llvm.experimental.guard(i1 %guard_cond) [ "deopt"() ]
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
%cond = icmp ult i32 %x, 100
br i1 %cond, label %hot_path, label %cold_path
@@ -890,14 +890,14 @@ exit:
ret i32 %x
}
-define i32 @test_guard_2(i32* %p, i32 %g) {
+define i32 @test_guard_2(ptr %p, i32 %g) {
; CHECK-LABEL: @test_guard_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
; CHECK-NEXT: [[GUARD_COND:%.*]] = icmp ne i32 [[IV]], [[G:%.*]]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[GUARD_COND]]) [ "deopt"() ]
; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[X]], 100
; CHECK-NEXT: br i1 [[COND]], label [[HOT_PATH:%.*]], label [[COLD_PATH:%.*]]
@@ -919,7 +919,7 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [%iv.next, %backedge]
%guard_cond = icmp ne i32 %iv, %g
- %x = load i32, i32* %p
+ %x = load i32, ptr %p
call void(i1, ...) @llvm.experimental.guard(i1 %guard_cond) [ "deopt"() ]
%cond = icmp ult i32 %x, 100
br i1 %cond, label %hot_path, label %cold_path
diff --git a/llvm/test/Transforms/GVN/PRE/pre-no-cost-phi.ll b/llvm/test/Transforms/GVN/PRE/pre-no-cost-phi.ll
index ddb211e594b07..2009c29931455 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-no-cost-phi.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-no-cost-phi.ll
@@ -13,12 +13,12 @@ define i32 @mai(i32 %foo, i32 %a, i32 %b) {
bb1:
%2 = add nsw i32 %a, %b
- store i32 %2, i32* @c, align 4
+ store i32 %2, ptr @c, align 4
br label %mergeblock
bb2:
%3 = add nsw i32 %a, %b
- store i32 %3, i32* @d, align 4
+ store i32 %3, ptr @d, align 4
br label %mergeblock
mergeblock:
diff --git a/llvm/test/Transforms/GVN/PRE/pre-poison-add.ll b/llvm/test/Transforms/GVN/PRE/pre-poison-add.ll
index a56806d58f2a7..d17c459f1cff8 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-poison-add.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-poison-add.ll
@@ -11,7 +11,7 @@ entry:
bb:
%add.1 = add nuw nsw i32 %v, 42
; CHECK: %add.1 = add i32 %v, 42
- store i32 %add.1, i32* @G, align 4
+ store i32 %add.1, ptr @G, align 4
br label %return
bb1:
@@ -20,10 +20,10 @@ bb1:
return:
; CHECK: %add.2.pre-phi = phi i32 [ %.pre, %bb1 ], [ %add.1, %bb ]
-; CHECK-NEXT: store i32 %add.2.pre-phi, i32* @H, align 4
+; CHECK-NEXT: store i32 %add.2.pre-phi, ptr @H, align 4
; CHECK-NEXT: ret i32 0
%add.2 = add i32 %v, 42
- store i32 %add.2, i32* @H, align 4
+ store i32 %add.2, ptr @H, align 4
ret i32 0
}
@@ -35,7 +35,7 @@ entry:
bb:
%add.1 = add i32 %v, 42
; CHECK: %add.1 = add i32 %v, 42
- store i32 %add.1, i32* @G, align 4
+ store i32 %add.1, ptr @G, align 4
br label %return
bb1:
@@ -44,9 +44,9 @@ bb1:
return:
; CHECK: %add.2.pre-phi = phi i32 [ %.pre, %bb1 ], [ %add.1, %bb ]
-; CHECK-NEXT: store i32 %add.2.pre-phi, i32* @H, align 4
+; CHECK-NEXT: store i32 %add.2.pre-phi, ptr @H, align 4
; CHECK-NEXT: ret i32 0
%add.2 = add nuw nsw i32 %v, 42
- store i32 %add.2, i32* @H, align 4
+ store i32 %add.2, ptr @H, align 4
ret i32 0
}
diff --git a/llvm/test/Transforms/GVN/PRE/pre-single-pred.ll b/llvm/test/Transforms/GVN/PRE/pre-single-pred.ll
index e776337dbb2b0..7342925a0c3be 100644
--- a/llvm/test/Transforms/GVN/PRE/pre-single-pred.ll
+++ b/llvm/test/Transforms/GVN/PRE/pre-single-pred.ll
@@ -24,11 +24,11 @@ for.cond.for.end_crit_edge: ; preds = %for.cond
br label %for.end
; CHECK: for.body:
-; CHECK-NEXT: %tmp3 = load i32, i32* @p
+; CHECK-NEXT: %tmp3 = load i32, ptr @p
for.body: ; preds = %for.cond
- %tmp3 = load i32, i32* @p ; <i32> [#uses=1]
+ %tmp3 = load i32, ptr @p ; <i32> [#uses=1]
%dec = add i32 %tmp3, -1 ; <i32> [#uses=2]
- store i32 %dec, i32* @p
+ store i32 %dec, ptr @p
%cmp6 = icmp slt i32 %dec, 0 ; <i1> [#uses=1]
br i1 %cmp6, label %for.body.for.end_crit_edge, label %for.inc
@@ -41,6 +41,6 @@ for.inc: ; preds = %for.body
br label %for.cond
for.end: ; preds = %for.body.for.end_crit_edge, %for.cond.for.end_crit_edge
- %tmp9 = load i32, i32* @p ; <i32> [#uses=1]
+ %tmp9 = load i32, ptr @p ; <i32> [#uses=1]
ret i32 %tmp9
}
diff --git a/llvm/test/Transforms/GVN/PRE/preserve-tbaa.ll b/llvm/test/Transforms/GVN/PRE/preserve-tbaa.ll
index 51e3f94454fa5..d5b05ab838860 100644
--- a/llvm/test/Transforms/GVN/PRE/preserve-tbaa.ll
+++ b/llvm/test/Transforms/GVN/PRE/preserve-tbaa.ll
@@ -5,9 +5,9 @@ target datalayout = "e-p:64:64:64"
; GVN should preserve the TBAA tag on loads when doing PRE.
; CHECK-LABEL: @test(
-; CHECK: %tmp33.pre = load i16, i16* %P, align 2, !tbaa !0
+; CHECK: %tmp33.pre = load i16, ptr %P, align 2, !tbaa !0
; CHECK: br label %for.body
-define void @test(i16 *%P, i16* %Q) nounwind {
+define void @test(ptr %P, ptr %Q) nounwind {
entry:
br i1 undef, label %bb.nph, label %for.end
@@ -15,10 +15,10 @@ bb.nph: ; preds = %entry
br label %for.body
for.body: ; preds = %for.body, %bb.nph
- %tmp33 = load i16, i16* %P, align 2, !tbaa !0
- store i16 %tmp33, i16* %Q
+ %tmp33 = load i16, ptr %P, align 2, !tbaa !0
+ store i16 %tmp33, ptr %Q
- store i16 0, i16* %P, align 2, !tbaa !0
+ store i16 0, ptr %P, align 2, !tbaa !0
br i1 false, label %for.end, label %for.body
for.end: ; preds = %for.body, %entry
diff --git a/llvm/test/Transforms/GVN/PRE/rle-addrspace-cast.ll b/llvm/test/Transforms/GVN/PRE/rle-addrspace-cast.ll
index 3b2e8493bf131..7f67b2b13647d 100644
--- a/llvm/test/Transforms/GVN/PRE/rle-addrspace-cast.ll
+++ b/llvm/test/Transforms/GVN/PRE/rle-addrspace-cast.ll
@@ -1,12 +1,12 @@
; RUN: opt < %s -data-layout="e-p:32:32:32-p1:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-n8:16:32" -passes=gvn,dce -S | FileCheck %s
-define i8 @coerce_offset0_addrspacecast(i32 %V, i32* %P) {
- store i32 %V, i32* %P
+define i8 @coerce_offset0_addrspacecast(i32 %V, ptr %P) {
+ store i32 %V, ptr %P
- %P2 = addrspacecast i32* %P to i8 addrspace(1)*
- %P3 = getelementptr i8, i8 addrspace(1)* %P2, i32 2
+ %P2 = addrspacecast ptr %P to ptr addrspace(1)
+ %P3 = getelementptr i8, ptr addrspace(1) %P2, i32 2
- %A = load i8, i8 addrspace(1)* %P3
+ %A = load i8, ptr addrspace(1) %P3
ret i8 %A
; CHECK-LABEL: @coerce_offset0_addrspacecast(
; CHECK-NOT: load
diff --git a/llvm/test/Transforms/GVN/PRE/rle-phi-translate.ll b/llvm/test/Transforms/GVN/PRE/rle-phi-translate.ll
index 9a31276510a82..519e0ca29a971 100644
--- a/llvm/test/Transforms/GVN/PRE/rle-phi-translate.ll
+++ b/llvm/test/Transforms/GVN/PRE/rle-phi-translate.ll
@@ -3,30 +3,30 @@
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin7"
-define i32 @test1(i32* %b, i32* %c) nounwind {
+define i32 @test1(ptr %b, ptr %c) nounwind {
; CHECK-LABEL: @test1(
entry:
%g = alloca i32
- %t1 = icmp eq i32* %b, null
+ %t1 = icmp eq ptr %b, null
br i1 %t1, label %bb, label %bb1
bb:
- %t2 = load i32, i32* %c, align 4
+ %t2 = load i32, ptr %c, align 4
%t3 = add i32 %t2, 1
- store i32 %t3, i32* %g, align 4
+ store i32 %t3, ptr %g, align 4
br label %bb2
bb1: ; preds = %entry
- %t5 = load i32, i32* %b, align 4
+ %t5 = load i32, ptr %b, align 4
%t6 = add i32 %t5, 1
- store i32 %t6, i32* %g, align 4
+ store i32 %t6, ptr %g, align 4
br label %bb2
bb2: ; preds = %bb1, %bb
- %c_addr.0 = phi i32* [ %g, %bb1 ], [ %c, %bb ]
- %b_addr.0 = phi i32* [ %b, %bb1 ], [ %g, %bb ]
- %cv = load i32, i32* %c_addr.0, align 4
- %bv = load i32, i32* %b_addr.0, align 4
+ %c_addr.0 = phi ptr [ %g, %bb1 ], [ %c, %bb ]
+ %b_addr.0 = phi ptr [ %b, %bb1 ], [ %g, %bb ]
+ %cv = load i32, ptr %c_addr.0, align 4
+ %bv = load i32, ptr %b_addr.0, align 4
; CHECK: %bv = phi i32
; CHECK: %cv = phi i32
; CHECK-NOT: load
@@ -35,51 +35,48 @@ bb2: ; preds = %bb1, %bb
ret i32 %ret
}
-define i8 @test2(i1 %cond, i32* %b, i32* %c) nounwind {
+define i8 @test2(i1 %cond, ptr %b, ptr %c) nounwind {
; CHECK-LABEL: @test2(
entry:
br i1 %cond, label %bb, label %bb1
bb:
- %b1 = bitcast i32* %b to i8*
- store i8 4, i8* %b1
+ store i8 4, ptr %b
br label %bb2
bb1:
- %c1 = bitcast i32* %c to i8*
- store i8 92, i8* %c1
+ store i8 92, ptr %c
br label %bb2
bb2:
- %d = phi i32* [ %c, %bb1 ], [ %b, %bb ]
- %d1 = bitcast i32* %d to i8*
- %dv = load i8, i8* %d1
+ %d = phi ptr [ %c, %bb1 ], [ %b, %bb ]
+ %dv = load i8, ptr %d
; CHECK: %dv = phi i8 [ 92, %bb1 ], [ 4, %bb ]
; CHECK-NOT: load
; CHECK: ret i8 %dv
ret i8 %dv
}
-define i32 @test3(i1 %cond, i32* %b, i32* %c) nounwind {
+define i32 @test3(i1 %cond, ptr %b, ptr %c) nounwind {
; CHECK-LABEL: @test3(
entry:
br i1 %cond, label %bb, label %bb1
bb:
- %b1 = getelementptr i32, i32* %b, i32 17
- store i32 4, i32* %b1
+ %b1 = getelementptr i32, ptr %b, i32 17
+ store i32 4, ptr %b1
br label %bb2
bb1:
- %c1 = getelementptr i32, i32* %c, i32 7
- store i32 82, i32* %c1
+ %c1 = getelementptr i32, ptr %c, i32 7
+ store i32 82, ptr %c1
br label %bb2
bb2:
- %d = phi i32* [ %c, %bb1 ], [ %b, %bb ]
+ %d = phi ptr [ %c, %bb1 ], [ %b, %bb ]
%i = phi i32 [ 7, %bb1 ], [ 17, %bb ]
- %d1 = getelementptr i32, i32* %d, i32 %i
- %dv = load i32, i32* %d1
+ %d1 = getelementptr i32, ptr %d, i32 %i
+ %dv = load i32, ptr %d1
; CHECK: %dv = phi i32 [ 82, %bb1 ], [ 4, %bb ]
; CHECK-NOT: load
; CHECK: ret i32 %dv
@@ -87,25 +84,25 @@ bb2:
}
; PR5313
-define i32 @test4(i1 %cond, i32* %b, i32* %c) nounwind {
+define i32 @test4(i1 %cond, ptr %b, ptr %c) nounwind {
; CHECK-LABEL: @test4(
entry:
br i1 %cond, label %bb, label %bb1
bb:
- store i32 4, i32* %b
+ store i32 4, ptr %b
br label %bb2
bb1:
- %c1 = getelementptr i32, i32* %c, i32 7
- store i32 82, i32* %c1
+ %c1 = getelementptr i32, ptr %c, i32 7
+ store i32 82, ptr %c1
br label %bb2
bb2:
- %d = phi i32* [ %c, %bb1 ], [ %b, %bb ]
+ %d = phi ptr [ %c, %bb1 ], [ %b, %bb ]
%i = phi i32 [ 7, %bb1 ], [ 0, %bb ]
- %d1 = getelementptr i32, i32* %d, i32 %i
- %dv = load i32, i32* %d1
+ %d1 = getelementptr i32, ptr %d, i32 %i
+ %dv = load i32, ptr %d1
; CHECK: %dv = phi i32 [ 82, %bb1 ], [ 4, %bb ]
; CHECK-NOT: load
; CHECK: ret i32 %dv
@@ -114,26 +111,26 @@ bb2:
-; void test5(int N, double* G) {
+; void test5(int N, ptr G) {
; for (long j = 1; j < 1000; j++)
; G[j] = G[j] + G[j-1];
; }
;
; Should compile into one load in the loop.
-define void @test5(i32 %N, double* nocapture %G) nounwind ssp {
+define void @test5(i32 %N, ptr nocapture %G) nounwind ssp {
; CHECK-LABEL: @test5(
bb.nph:
br label %for.body
for.body:
%indvar = phi i64 [ 0, %bb.nph ], [ %tmp, %for.body ]
- %arrayidx6 = getelementptr double, double* %G, i64 %indvar
+ %arrayidx6 = getelementptr double, ptr %G, i64 %indvar
%tmp = add i64 %indvar, 1
- %arrayidx = getelementptr double, double* %G, i64 %tmp
- %tmp3 = load double, double* %arrayidx
- %tmp7 = load double, double* %arrayidx6
+ %arrayidx = getelementptr double, ptr %G, i64 %tmp
+ %tmp3 = load double, ptr %arrayidx
+ %tmp7 = load double, ptr %arrayidx6
%add = fadd double %tmp3, %tmp7
- store double %add, double* %arrayidx
+ store double %add, ptr %arrayidx
%exitcond = icmp eq i64 %tmp, 999
br i1 %exitcond, label %for.end, label %for.body
; CHECK: for.body:
diff --git a/llvm/test/Transforms/GVN/PRE/rle-semidominated.ll b/llvm/test/Transforms/GVN/PRE/rle-semidominated.ll
index 8ee227fb7a80d..e927f37cb0101 100644
--- a/llvm/test/Transforms/GVN/PRE/rle-semidominated.ll
+++ b/llvm/test/Transforms/GVN/PRE/rle-semidominated.ll
@@ -1,8 +1,8 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
-define i32 @main(i32* %p, i32 %x, i32 %y) {
+define i32 @main(ptr %p, i32 %x, i32 %y) {
block1:
- %z = load i32, i32* %p
+ %z = load i32, ptr %p
%cmp = icmp eq i32 %x, %y
br i1 %cmp, label %block2, label %block3
@@ -11,24 +11,24 @@ block2:
block3:
%b = bitcast i32 0 to i32
- store i32 %b, i32* %p
+ store i32 %b, ptr %p
br label %block4
block4:
- %DEAD = load i32, i32* %p
+ %DEAD = load i32, ptr %p
ret i32 %DEAD
}
-; CHECK: define i32 @main(i32* %p, i32 %x, i32 %y) {
+; CHECK: define i32 @main(ptr %p, i32 %x, i32 %y) {
; CHECK-NEXT: block1:
-; CHECK-NOT: %z = load i32, i32* %p
+; CHECK-NOT: %z = load i32, ptr %p
; CHECK-NEXT: %cmp = icmp eq i32 %x, %y
; CHECK-NEXT: br i1 %cmp, label %block2, label %block3
; CHECK: block2:
-; CHECK-NEXT: %DEAD.pre = load i32, i32* %p
+; CHECK-NEXT: %DEAD.pre = load i32, ptr %p
; CHECK-NEXT: br label %block4
; CHECK: block3:
-; CHECK-NEXT: store i32 0, i32* %p
+; CHECK-NEXT: store i32 0, ptr %p
; CHECK-NEXT: br label %block4
; CHECK: block4:
; CHECK-NEXT: %DEAD = phi i32 [ 0, %block3 ], [ %DEAD.pre, %block2 ]
diff --git a/llvm/test/Transforms/GVN/PRE/rle.ll b/llvm/test/Transforms/GVN/PRE/rle.ll
index 4fc71cc392245..fd4a9a081eab3 100644
--- a/llvm/test/Transforms/GVN/PRE/rle.ll
+++ b/llvm/test/Transforms/GVN/PRE/rle.ll
@@ -3,14 +3,14 @@
; RUN: opt < %s -data-layout="E-p:32:32:32-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-n32" -passes=gvn,dce -enable-split-backedge-in-load-pre -S | FileCheck %s --check-prefixes=CHECK,BE
;; Trivial RLE test.
-define i32 @test0(i32 %V, i32* %P) {
+define i32 @test0(i32 %V, ptr %P) {
; CHECK-LABEL: @test0(
-; CHECK-NEXT: store i32 [[V:%.*]], i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 [[V:%.*]], ptr [[P:%.*]], align 4
; CHECK-NEXT: ret i32 [[V]]
;
- store i32 %V, i32* %P
+ store i32 %V, ptr %P
- %A = load i32, i32* %P
+ %A = load i32, ptr %P
ret i32 %A
}
@@ -20,16 +20,14 @@ define i32 @test0(i32 %V, i32* %P) {
;;===----------------------------------------------------------------------===;;
;; PR5016
-define i8 @crash0({i32, i32} %A, {i32, i32}* %P) {
+define i8 @crash0({i32, i32} %A, ptr %P) {
; CHECK-LABEL: @crash0(
-; CHECK-NEXT: store { i32, i32 } [[A:%.*]], { i32, i32 }* [[P:%.*]], align 4
-; CHECK-NEXT: [[X:%.*]] = bitcast { i32, i32 }* [[P]] to i8*
-; CHECK-NEXT: [[Y:%.*]] = load i8, i8* [[X]], align 1
+; CHECK-NEXT: store { i32, i32 } [[A:%.*]], ptr [[P:%.*]], align 4
+; CHECK-NEXT: [[Y:%.*]] = load i8, ptr [[P]], align 1
; CHECK-NEXT: ret i8 [[Y]]
;
- store {i32, i32} %A, {i32, i32}* %P
- %X = bitcast {i32, i32}* %P to i8*
- %Y = load i8, i8* %X
+ store {i32, i32} %A, ptr %P
+ %Y = load i8, ptr %P
ret i8 %Y
}
@@ -37,11 +35,11 @@ define i8 @crash0({i32, i32} %A, {i32, i32}* %P) {
declare void @helper()
define void @crash1() {
; CHECK-LABEL: @crash1(
-; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* undef, i64 undef, i1 false) #[[ATTR3:[0-9]+]]
+; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr undef, ptr undef, i64 undef, i1 false) #[[ATTR3:[0-9]+]]
; CHECK-NEXT: ret void
;
- tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* undef, i64 undef, i1 false) nounwind
- %ttmp = load i8, i8* bitcast (void ()* @helper to i8*)
+ tail call void @llvm.memcpy.p0.p0.i64(ptr undef, ptr undef, i64 undef, i1 false) nounwind
+ %ttmp = load i8, ptr @helper
%x = icmp eq i8 %ttmp, 15
ret void
}
@@ -53,56 +51,53 @@ define void @crash1() {
;;===----------------------------------------------------------------------===;;
;; i32 -> f32 forwarding.
-define float @coerce_mustalias1(i32 %V, i32* %P) {
+define float @coerce_mustalias1(i32 %V, ptr %P) {
; CHECK-LABEL: @coerce_mustalias1(
-; CHECK-NEXT: store i32 [[V:%.*]], i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 [[V:%.*]], ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[V]] to float
; CHECK-NEXT: ret float [[TMP1]]
;
- store i32 %V, i32* %P
+ store i32 %V, ptr %P
- %P2 = bitcast i32* %P to float*
- %A = load float, float* %P2
+ %A = load float, ptr %P
ret float %A
}
-;; i32* -> float forwarding.
-define float @coerce_mustalias2(i32* %V, i32** %P) {
+;; ptr -> float forwarding.
+define float @coerce_mustalias2(ptr %V, ptr %P) {
; CHECK-LABEL: @coerce_mustalias2(
-; CHECK-NEXT: store i32* [[V:%.*]], i32** [[P:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint i32* [[V]] to i32
+; CHECK-NEXT: store ptr [[V:%.*]], ptr [[P:%.*]], align 4
+; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[V]] to i32
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[TMP1]] to float
; CHECK-NEXT: ret float [[TMP2]]
;
- store i32* %V, i32** %P
+ store ptr %V, ptr %P
- %P2 = bitcast i32** %P to float*
- %A = load float, float* %P2
+ %A = load float, ptr %P
ret float %A
}
-;; float -> i32* forwarding.
-define i32* @coerce_mustalias3(float %V, float* %P) {
+;; float -> ptr forwarding.
+define ptr @coerce_mustalias3(float %V, ptr %P) {
; CHECK-LABEL: @coerce_mustalias3(
-; CHECK-NEXT: store float [[V:%.*]], float* [[P:%.*]], align 4
+; CHECK-NEXT: store float [[V:%.*]], ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[V]] to i32
-; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP1]] to i32*
-; CHECK-NEXT: ret i32* [[TMP2]]
+; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP1]] to ptr
+; CHECK-NEXT: ret ptr [[TMP2]]
;
- store float %V, float* %P
+ store float %V, ptr %P
- %P2 = bitcast float* %P to i32**
- %A = load i32*, i32** %P2
- ret i32* %A
+ %A = load ptr, ptr %P
+ ret ptr %A
}
;; i32 -> f32 load forwarding.
-define float @coerce_mustalias4(i32* %P, i1 %cond) {
+define float @coerce_mustalias4(ptr %P, i1 %cond) {
; CHECK-LABEL: @coerce_mustalias4(
-; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32 [[A]] to float
; CHECK-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
; CHECK: T:
@@ -110,10 +105,9 @@ define float @coerce_mustalias4(i32* %P, i1 %cond) {
; CHECK: F:
; CHECK-NEXT: ret float [[TMP1]]
;
- %A = load i32, i32* %P
+ %A = load i32, ptr %P
- %P2 = bitcast i32* %P to float*
- %B = load float, float* %P2
+ %B = load float, ptr %P
br i1 %cond, label %T, label %F
T:
ret float %B
@@ -125,94 +119,88 @@ F:
}
;; i32 -> i8 forwarding
-define i8 @coerce_mustalias5(i32 %V, i32* %P) {
+define i8 @coerce_mustalias5(i32 %V, ptr %P) {
; LE-LABEL: @coerce_mustalias5(
-; LE-NEXT: store i32 [[V:%.*]], i32* [[P:%.*]], align 4
+; LE-NEXT: store i32 [[V:%.*]], ptr [[P:%.*]], align 4
; LE-NEXT: [[TMP1:%.*]] = trunc i32 [[V]] to i8
; LE-NEXT: ret i8 [[TMP1]]
;
; BE-LABEL: @coerce_mustalias5(
-; BE-NEXT: store i32 [[V:%.*]], i32* [[P:%.*]], align 4
+; BE-NEXT: store i32 [[V:%.*]], ptr [[P:%.*]], align 4
; BE-NEXT: [[TMP1:%.*]] = lshr i32 [[V]], 24
; BE-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
; BE-NEXT: ret i8 [[TMP2]]
;
- store i32 %V, i32* %P
+ store i32 %V, ptr %P
- %P2 = bitcast i32* %P to i8*
- %A = load i8, i8* %P2
+ %A = load i8, ptr %P
ret i8 %A
}
;; i64 -> float forwarding
-define float @coerce_mustalias6(i64 %V, i64* %P) {
+define float @coerce_mustalias6(i64 %V, ptr %P) {
; LE-LABEL: @coerce_mustalias6(
-; LE-NEXT: store i64 [[V:%.*]], i64* [[P:%.*]], align 4
+; LE-NEXT: store i64 [[V:%.*]], ptr [[P:%.*]], align 4
; LE-NEXT: [[TMP1:%.*]] = trunc i64 [[V]] to i32
; LE-NEXT: [[TMP2:%.*]] = bitcast i32 [[TMP1]] to float
; LE-NEXT: ret float [[TMP2]]
;
; BE-LABEL: @coerce_mustalias6(
-; BE-NEXT: store i64 [[V:%.*]], i64* [[P:%.*]], align 4
+; BE-NEXT: store i64 [[V:%.*]], ptr [[P:%.*]], align 4
; BE-NEXT: [[TMP1:%.*]] = lshr i64 [[V]], 32
; BE-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
; BE-NEXT: [[TMP3:%.*]] = bitcast i32 [[TMP2]] to float
; BE-NEXT: ret float [[TMP3]]
;
- store i64 %V, i64* %P
+ store i64 %V, ptr %P
- %P2 = bitcast i64* %P to float*
- %A = load float, float* %P2
+ %A = load float, ptr %P
ret float %A
}
-;; i64 -> i8* (32-bit) forwarding
-define i8* @coerce_mustalias7(i64 %V, i64* %P) {
+;; i64 -> ptr (32-bit) forwarding
+define ptr @coerce_mustalias7(i64 %V, ptr %P) {
; LE-LABEL: @coerce_mustalias7(
-; LE-NEXT: store i64 [[V:%.*]], i64* [[P:%.*]], align 4
+; LE-NEXT: store i64 [[V:%.*]], ptr [[P:%.*]], align 4
; LE-NEXT: [[TMP1:%.*]] = trunc i64 [[V]] to i32
-; LE-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP1]] to i8*
-; LE-NEXT: ret i8* [[TMP2]]
+; LE-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP1]] to ptr
+; LE-NEXT: ret ptr [[TMP2]]
;
; BE-LABEL: @coerce_mustalias7(
-; BE-NEXT: store i64 [[V:%.*]], i64* [[P:%.*]], align 4
+; BE-NEXT: store i64 [[V:%.*]], ptr [[P:%.*]], align 4
; BE-NEXT: [[TMP1:%.*]] = lshr i64 [[V]], 32
; BE-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
-; BE-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP2]] to i8*
-; BE-NEXT: ret i8* [[TMP3]]
+; BE-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP2]] to ptr
+; BE-NEXT: ret ptr [[TMP3]]
;
- store i64 %V, i64* %P
+ store i64 %V, ptr %P
- %P2 = bitcast i64* %P to i8**
- %A = load i8*, i8** %P2
- ret i8* %A
+ %A = load ptr, ptr %P
+ ret ptr %A
}
; memset -> i16 forwarding.
-define signext i16 @memset_to_i16_local(i16* %A) nounwind ssp {
+define signext i16 @memset_to_i16_local(ptr %A) nounwind ssp {
; CHECK-LABEL: @memset_to_i16_local(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CONV:%.*]] = bitcast i16* [[A:%.*]] to i8*
-; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* [[CONV]], i8 1, i64 200, i1 false)
+; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr [[A:%.*]], i8 1, i64 200, i1 false)
; CHECK-NEXT: ret i16 257
;
entry:
- %conv = bitcast i16* %A to i8*
- tail call void @llvm.memset.p0i8.i64(i8* %conv, i8 1, i64 200, i1 false)
- %arrayidx = getelementptr inbounds i16, i16* %A, i64 42
- %ttmp2 = load i16, i16* %arrayidx
+ tail call void @llvm.memset.p0.i64(ptr %A, i8 1, i64 200, i1 false)
+ %arrayidx = getelementptr inbounds i16, ptr %A, i64 42
+ %ttmp2 = load i16, ptr %arrayidx
ret i16 %ttmp2
}
; memset -> float forwarding.
-define float @memset_to_float_local(float* %A, i8 %Val) nounwind ssp {
+define float @memset_to_float_local(ptr %A, i8 %Val) nounwind ssp {
; CHECK-LABEL: @memset_to_float_local(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CONV:%.*]] = bitcast float* [[A:%.*]] to i8*
-; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* [[CONV]], i8 [[VAL:%.*]], i64 400, i1 false)
+; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr [[A:%.*]], i8 [[VAL:%.*]], i64 400, i1 false)
; CHECK-NEXT: [[TMP0:%.*]] = zext i8 [[VAL]] to i32
; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[TMP0]], 8
; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP0]], [[TMP1]]
@@ -222,41 +210,38 @@ define float @memset_to_float_local(float* %A, i8 %Val) nounwind ssp {
; CHECK-NEXT: ret float [[TMP5]]
;
entry:
- %conv = bitcast float* %A to i8* ; <i8*> [#uses=1]
- tail call void @llvm.memset.p0i8.i64(i8* %conv, i8 %Val, i64 400, i1 false)
- %arrayidx = getelementptr inbounds float, float* %A, i64 42 ; <float*> [#uses=1]
- %ttmp2 = load float, float* %arrayidx ; <float> [#uses=1]
+ tail call void @llvm.memset.p0.i64(ptr %A, i8 %Val, i64 400, i1 false)
+ %arrayidx = getelementptr inbounds float, ptr %A, i64 42 ; <ptr> [#uses=1]
+ %ttmp2 = load float, ptr %arrayidx ; <float> [#uses=1]
ret float %ttmp2
}
;; non-local memset -> i16 load forwarding.
-define i16 @memset_to_i16_nonlocal0(i16* %P, i1 %cond) {
+define i16 @memset_to_i16_nonlocal0(ptr %P, i1 %cond) {
; CHECK-LABEL: @memset_to_i16_nonlocal0(
-; CHECK-NEXT: [[P3:%.*]] = bitcast i16* [[P:%.*]] to i8*
; CHECK-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
; CHECK: T:
-; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* [[P3]], i8 1, i64 400, i1 false)
+; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr [[P:%.*]], i8 1, i64 400, i1 false)
; CHECK-NEXT: br label [[CONT:%.*]]
; CHECK: F:
-; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* [[P3]], i8 2, i64 400, i1 false)
+; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr [[P]], i8 2, i64 400, i1 false)
; CHECK-NEXT: br label [[CONT]]
; CHECK: Cont:
; CHECK-NEXT: [[A:%.*]] = phi i16 [ 514, [[F]] ], [ 257, [[T]] ]
; CHECK-NEXT: ret i16 [[A]]
;
- %P3 = bitcast i16* %P to i8*
br i1 %cond, label %T, label %F
T:
- tail call void @llvm.memset.p0i8.i64(i8* %P3, i8 1, i64 400, i1 false)
+ tail call void @llvm.memset.p0.i64(ptr %P, i8 1, i64 400, i1 false)
br label %Cont
F:
- tail call void @llvm.memset.p0i8.i64(i8* %P3, i8 2, i64 400, i1 false)
+ tail call void @llvm.memset.p0.i64(ptr %P, i8 2, i64 400, i1 false)
br label %Cont
Cont:
- %P2 = getelementptr i16, i16* %P, i32 4
- %A = load i16, i16* %P2
+ %P2 = getelementptr i16, ptr %P, i32 4
+ %A = load i16, ptr %P2
ret i16 %A
}
@@ -265,78 +250,70 @@ Cont:
@GCst_as1 = addrspace(1) constant {i32, float, i32 } { i32 42, float 14., i32 97 }
; memset -> float forwarding.
-define float @memcpy_to_float_local(float* %A) nounwind ssp {
+define float @memcpy_to_float_local(ptr %A) nounwind ssp {
; CHECK-LABEL: @memcpy_to_float_local(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CONV:%.*]] = bitcast float* [[A:%.*]] to i8*
-; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[CONV]], i8* bitcast ({ i32, float, i32 }* @GCst to i8*), i64 12, i1 false)
+; CHECK-NEXT: tail call void @llvm.memcpy.p0.p0.i64(ptr [[A:%.*]], ptr @GCst, i64 12, i1 false)
; CHECK-NEXT: ret float 1.400000e+01
;
entry:
- %conv = bitcast float* %A to i8* ; <i8*> [#uses=1]
- tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %conv, i8* bitcast ({i32, float, i32 }* @GCst to i8*), i64 12, i1 false)
- %arrayidx = getelementptr inbounds float, float* %A, i64 1 ; <float*> [#uses=1]
- %ttmp2 = load float, float* %arrayidx ; <float> [#uses=1]
+ tail call void @llvm.memcpy.p0.p0.i64(ptr %A, ptr @GCst, i64 12, i1 false)
+ %arrayidx = getelementptr inbounds float, ptr %A, i64 1 ; <ptr> [#uses=1]
+ %ttmp2 = load float, ptr %arrayidx ; <float> [#uses=1]
ret float %ttmp2
}
; memcpy from address space 1
-define float @memcpy_to_float_local_as1(float* %A) nounwind ssp {
+define float @memcpy_to_float_local_as1(ptr %A) nounwind ssp {
; CHECK-LABEL: @memcpy_to_float_local_as1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CONV:%.*]] = bitcast float* [[A:%.*]] to i8*
-; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p1i8.i64(i8* [[CONV]], i8 addrspace(1)* bitcast ({ i32, float, i32 } addrspace(1)* @GCst_as1 to i8 addrspace(1)*), i64 12, i1 false)
+; CHECK-NEXT: tail call void @llvm.memcpy.p0.p1.i64(ptr [[A:%.*]], ptr addrspace(1) @GCst_as1, i64 12, i1 false)
; CHECK-NEXT: ret float 1.400000e+01
;
entry:
- %conv = bitcast float* %A to i8* ; <i8*> [#uses=1]
- tail call void @llvm.memcpy.p0i8.p1i8.i64(i8* %conv, i8 addrspace(1)* bitcast ({i32, float, i32 } addrspace(1)* @GCst_as1 to i8 addrspace(1)*), i64 12, i1 false)
- %arrayidx = getelementptr inbounds float, float* %A, i64 1 ; <float*> [#uses=1]
- %ttmp2 = load float, float* %arrayidx ; <float> [#uses=1]
+ tail call void @llvm.memcpy.p0.p1.i64(ptr %A, ptr addrspace(1) @GCst_as1, i64 12, i1 false)
+ %arrayidx = getelementptr inbounds float, ptr %A, i64 1 ; <ptr> [#uses=1]
+ %ttmp2 = load float, ptr %arrayidx ; <float> [#uses=1]
ret float %ttmp2
}
;; non-local i32/float -> i8 load forwarding.
-define i8 @coerce_mustalias_nonlocal0(i32* %P, i1 %cond) {
+define i8 @coerce_mustalias_nonlocal0(ptr %P, i1 %cond) {
; LE-LABEL: @coerce_mustalias_nonlocal0(
-; LE-NEXT: [[P2:%.*]] = bitcast i32* [[P:%.*]] to float*
; LE-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
; LE: T:
-; LE-NEXT: store i32 42, i32* [[P]], align 4
+; LE-NEXT: store i32 42, ptr [[P:%.*]], align 4
; LE-NEXT: br label [[CONT:%.*]]
; LE: F:
-; LE-NEXT: store float 1.000000e+00, float* [[P2]], align 4
+; LE-NEXT: store float 1.000000e+00, ptr [[P]], align 4
; LE-NEXT: br label [[CONT]]
; LE: Cont:
; LE-NEXT: [[A:%.*]] = phi i8 [ 0, [[F]] ], [ 42, [[T]] ]
; LE-NEXT: ret i8 [[A]]
;
; BE-LABEL: @coerce_mustalias_nonlocal0(
-; BE-NEXT: [[P2:%.*]] = bitcast i32* [[P:%.*]] to float*
; BE-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
; BE: T:
-; BE-NEXT: store i32 42, i32* [[P]], align 4
+; BE-NEXT: store i32 42, ptr [[P:%.*]], align 4
; BE-NEXT: br label [[CONT:%.*]]
; BE: F:
-; BE-NEXT: store float 1.000000e+00, float* [[P2]], align 4
+; BE-NEXT: store float 1.000000e+00, ptr [[P]], align 4
; BE-NEXT: br label [[CONT]]
; BE: Cont:
; BE-NEXT: [[A:%.*]] = phi i8 [ 63, [[F]] ], [ 0, [[T]] ]
; BE-NEXT: ret i8 [[A]]
;
- %P2 = bitcast i32* %P to float*
- %P3 = bitcast i32* %P to i8*
br i1 %cond, label %T, label %F
T:
- store i32 42, i32* %P
+ store i32 42, ptr %P
br label %Cont
F:
- store float 1.0, float* %P2
+ store float 1.0, ptr %P
br label %Cont
Cont:
- %A = load i8, i8* %P3
+ %A = load i8, ptr %P
ret i8 %A
}
@@ -344,90 +321,83 @@ Cont:
;; non-local i32/float -> i8 load forwarding. This also tests that the "P3"
;; bitcast equivalence can be properly phi translated.
-define i8 @coerce_mustalias_nonlocal1(i32* %P, i1 %cond) {
+define i8 @coerce_mustalias_nonlocal1(ptr %P, i1 %cond) {
; LE-LABEL: @coerce_mustalias_nonlocal1(
-; LE-NEXT: [[P2:%.*]] = bitcast i32* [[P:%.*]] to float*
; LE-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
; LE: T:
-; LE-NEXT: store i32 42, i32* [[P]], align 4
+; LE-NEXT: store i32 42, ptr [[P:%.*]], align 4
; LE-NEXT: br label [[CONT:%.*]]
; LE: F:
-; LE-NEXT: store float 1.000000e+00, float* [[P2]], align 4
+; LE-NEXT: store float 1.000000e+00, ptr [[P]], align 4
; LE-NEXT: br label [[CONT]]
; LE: Cont:
; LE-NEXT: [[A:%.*]] = phi i8 [ 0, [[F]] ], [ 42, [[T]] ]
; LE-NEXT: ret i8 [[A]]
;
; BE-LABEL: @coerce_mustalias_nonlocal1(
-; BE-NEXT: [[P2:%.*]] = bitcast i32* [[P:%.*]] to float*
; BE-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
; BE: T:
-; BE-NEXT: store i32 42, i32* [[P]], align 4
+; BE-NEXT: store i32 42, ptr [[P:%.*]], align 4
; BE-NEXT: br label [[CONT:%.*]]
; BE: F:
-; BE-NEXT: store float 1.000000e+00, float* [[P2]], align 4
+; BE-NEXT: store float 1.000000e+00, ptr [[P]], align 4
; BE-NEXT: br label [[CONT]]
; BE: Cont:
; BE-NEXT: [[A:%.*]] = phi i8 [ 63, [[F]] ], [ 0, [[T]] ]
; BE-NEXT: ret i8 [[A]]
;
- %P2 = bitcast i32* %P to float*
br i1 %cond, label %T, label %F
T:
- store i32 42, i32* %P
+ store i32 42, ptr %P
br label %Cont
F:
- store float 1.0, float* %P2
+ store float 1.0, ptr %P
br label %Cont
Cont:
- %P3 = bitcast i32* %P to i8*
- %A = load i8, i8* %P3
+ %A = load i8, ptr %P
ret i8 %A
}
;; non-local i32 -> i8 partial redundancy load forwarding.
-define i8 @coerce_mustalias_pre0(i32* %P, i1 %cond) {
+define i8 @coerce_mustalias_pre0(ptr %P, i1 %cond) {
; LE-LABEL: @coerce_mustalias_pre0(
-; LE-NEXT: [[P3:%.*]] = bitcast i32* [[P:%.*]] to i8*
; LE-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
; LE: T:
-; LE-NEXT: store i32 42, i32* [[P]], align 4
+; LE-NEXT: store i32 42, ptr [[P:%.*]], align 4
; LE-NEXT: br label [[CONT:%.*]]
; LE: F:
-; LE-NEXT: [[A_PRE:%.*]] = load i8, i8* [[P3]], align 1
+; LE-NEXT: [[A_PRE:%.*]] = load i8, ptr [[P]], align 1
; LE-NEXT: br label [[CONT]]
; LE: Cont:
; LE-NEXT: [[A:%.*]] = phi i8 [ [[A_PRE]], [[F]] ], [ 42, [[T]] ]
; LE-NEXT: ret i8 [[A]]
;
; BE-LABEL: @coerce_mustalias_pre0(
-; BE-NEXT: [[P3:%.*]] = bitcast i32* [[P:%.*]] to i8*
; BE-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
; BE: T:
-; BE-NEXT: store i32 42, i32* [[P]], align 4
+; BE-NEXT: store i32 42, ptr [[P:%.*]], align 4
; BE-NEXT: br label [[CONT:%.*]]
; BE: F:
-; BE-NEXT: [[A_PRE:%.*]] = load i8, i8* [[P3]], align 1
+; BE-NEXT: [[A_PRE:%.*]] = load i8, ptr [[P]], align 1
; BE-NEXT: br label [[CONT]]
; BE: Cont:
; BE-NEXT: [[A:%.*]] = phi i8 [ [[A_PRE]], [[F]] ], [ 0, [[T]] ]
; BE-NEXT: ret i8 [[A]]
;
- %P3 = bitcast i32* %P to i8*
br i1 %cond, label %T, label %F
T:
- store i32 42, i32* %P
+ store i32 42, ptr %P
br label %Cont
F:
br label %Cont
Cont:
- %A = load i8, i8* %P3
+ %A = load i8, ptr %P
ret i8 %A
}
@@ -439,113 +409,106 @@ Cont:
;; i32 -> i8 forwarding.
;; PR4216
-define i8 @coerce_offset0(i32 %V, i32* %P) {
+define i8 @coerce_offset0(i32 %V, ptr %P) {
; LE-LABEL: @coerce_offset0(
-; LE-NEXT: store i32 [[V:%.*]], i32* [[P:%.*]], align 4
+; LE-NEXT: store i32 [[V:%.*]], ptr [[P:%.*]], align 4
; LE-NEXT: [[TMP1:%.*]] = lshr i32 [[V]], 16
; LE-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
; LE-NEXT: ret i8 [[TMP2]]
;
; BE-LABEL: @coerce_offset0(
-; BE-NEXT: store i32 [[V:%.*]], i32* [[P:%.*]], align 4
+; BE-NEXT: store i32 [[V:%.*]], ptr [[P:%.*]], align 4
; BE-NEXT: [[TMP1:%.*]] = lshr i32 [[V]], 8
; BE-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
; BE-NEXT: ret i8 [[TMP2]]
;
- store i32 %V, i32* %P
+ store i32 %V, ptr %P
- %P2 = bitcast i32* %P to i8*
- %P3 = getelementptr i8, i8* %P2, i32 2
+ %P3 = getelementptr i8, ptr %P, i32 2
- %A = load i8, i8* %P3
+ %A = load i8, ptr %P3
ret i8 %A
}
;; non-local i32/float -> i8 load forwarding.
-define i8 @coerce_offset_nonlocal0(i32* %P, i1 %cond) {
+define i8 @coerce_offset_nonlocal0(ptr %P, i1 %cond) {
; LE-LABEL: @coerce_offset_nonlocal0(
-; LE-NEXT: [[P2:%.*]] = bitcast i32* [[P:%.*]] to float*
; LE-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
; LE: T:
-; LE-NEXT: store i32 57005, i32* [[P]], align 4
+; LE-NEXT: store i32 57005, ptr [[P:%.*]], align 4
; LE-NEXT: br label [[CONT:%.*]]
; LE: F:
-; LE-NEXT: store float 1.000000e+00, float* [[P2]], align 4
+; LE-NEXT: store float 1.000000e+00, ptr [[P]], align 4
; LE-NEXT: br label [[CONT]]
; LE: Cont:
; LE-NEXT: [[A:%.*]] = phi i8 [ -128, [[F]] ], [ 0, [[T]] ]
; LE-NEXT: ret i8 [[A]]
;
; BE-LABEL: @coerce_offset_nonlocal0(
-; BE-NEXT: [[P2:%.*]] = bitcast i32* [[P:%.*]] to float*
; BE-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
; BE: T:
-; BE-NEXT: store i32 57005, i32* [[P]], align 4
+; BE-NEXT: store i32 57005, ptr [[P:%.*]], align 4
; BE-NEXT: br label [[CONT:%.*]]
; BE: F:
-; BE-NEXT: store float 1.000000e+00, float* [[P2]], align 4
+; BE-NEXT: store float 1.000000e+00, ptr [[P]], align 4
; BE-NEXT: br label [[CONT]]
; BE: Cont:
; BE-NEXT: [[A:%.*]] = phi i8 [ 0, [[F]] ], [ -34, [[T]] ]
; BE-NEXT: ret i8 [[A]]
;
- %P2 = bitcast i32* %P to float*
- %P3 = bitcast i32* %P to i8*
- %P4 = getelementptr i8, i8* %P3, i32 2
+ %P4 = getelementptr i8, ptr %P, i32 2
br i1 %cond, label %T, label %F
T:
- store i32 57005, i32* %P
+ store i32 57005, ptr %P
br label %Cont
F:
- store float 1.0, float* %P2
+ store float 1.0, ptr %P
br label %Cont
Cont:
- %A = load i8, i8* %P4
+ %A = load i8, ptr %P4
ret i8 %A
}
;; non-local i32 -> i8 partial redundancy load forwarding.
-define i8 @coerce_offset_pre0(i32* %P, i1 %cond) {
+define i8 @coerce_offset_pre0(ptr %P, i1 %cond) {
; CHECK-LABEL: @coerce_offset_pre0(
-; CHECK-NEXT: [[P3:%.*]] = bitcast i32* [[P:%.*]] to i8*
-; CHECK-NEXT: [[P4:%.*]] = getelementptr i8, i8* [[P3]], i32 2
+; CHECK-NEXT: [[P4:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 2
; CHECK-NEXT: br i1 [[COND:%.*]], label [[T:%.*]], label [[F:%.*]]
; CHECK: T:
-; CHECK-NEXT: store i32 42, i32* [[P]], align 4
+; CHECK-NEXT: store i32 42, ptr [[P]], align 4
; CHECK-NEXT: br label [[CONT:%.*]]
; CHECK: F:
-; CHECK-NEXT: [[A_PRE:%.*]] = load i8, i8* [[P4]], align 1
+; CHECK-NEXT: [[A_PRE:%.*]] = load i8, ptr [[P4]], align 1
; CHECK-NEXT: br label [[CONT]]
; CHECK: Cont:
; CHECK-NEXT: [[A:%.*]] = phi i8 [ [[A_PRE]], [[F]] ], [ 0, [[T]] ]
; CHECK-NEXT: ret i8 [[A]]
;
- %P3 = bitcast i32* %P to i8*
- %P4 = getelementptr i8, i8* %P3, i32 2
+ %P4 = getelementptr i8, ptr %P, i32 2
br i1 %cond, label %T, label %F
T:
- store i32 42, i32* %P
+ store i32 42, ptr %P
br label %Cont
F:
br label %Cont
Cont:
- %A = load i8, i8* %P4
+ %A = load i8, ptr %P4
ret i8 %A
}
-define i32 @chained_load(i32** %p, i32 %x, i32 %y) {
+define i32 @chained_load(ptr %p, i32 %x, i32 %y) {
; CHECK-LABEL: @chained_load(
; CHECK-NEXT: block1:
-; CHECK-NEXT: [[A:%.*]] = alloca i32*, align 4
-; CHECK-NEXT: [[Z:%.*]] = load i32*, i32** [[P:%.*]], align 4
-; CHECK-NEXT: store i32* [[Z]], i32** [[A]], align 4
+; CHECK-NEXT: [[A:%.*]] = alloca ptr, align 4
+; CHECK-NEXT: [[Z:%.*]] = load ptr, ptr [[P:%.*]], align 4
+; CHECK-NEXT: store ptr [[Z]], ptr [[A]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: br i1 [[CMP]], label [[BLOCK2:%.*]], label [[BLOCK3:%.*]]
; CHECK: block2:
@@ -553,28 +516,28 @@ define i32 @chained_load(i32** %p, i32 %x, i32 %y) {
; CHECK: block3:
; CHECK-NEXT: br label [[BLOCK4]]
; CHECK: block4:
-; CHECK-NEXT: [[D:%.*]] = load i32, i32* [[Z]], align 4
+; CHECK-NEXT: [[D:%.*]] = load i32, ptr [[Z]], align 4
; CHECK-NEXT: ret i32 [[D]]
;
block1:
- %A = alloca i32*
+ %A = alloca ptr
- %z = load i32*, i32** %p
- store i32* %z, i32** %A
+ %z = load ptr, ptr %p
+ store ptr %z, ptr %A
%cmp = icmp eq i32 %x, %y
br i1 %cmp, label %block2, label %block3
block2:
- %a = load i32*, i32** %p
+ %a = load ptr, ptr %p
br label %block4
block3:
- %b = load i32*, i32** %p
+ %b = load ptr, ptr %p
br label %block4
block4:
- %c = load i32*, i32** %p
- %d = load i32, i32* %c
+ %c = load ptr, ptr %p
+ %d = load i32, ptr %c
ret i32 %d
}
@@ -593,14 +556,14 @@ define i32 @phi_trans2() {
; CHECK-NEXT: [[COND2:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[COND2]], label [[T1:%.*]], label [[TY:%.*]]
; CHECK: T1:
-; CHECK-NEXT: [[P2:%.*]] = getelementptr i32, i32* [[P]], i32 [[A]]
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P2]], align 4
+; CHECK-NEXT: [[P2:%.*]] = getelementptr i32, ptr [[P]], i32 [[A]]
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P2]], align 4
; CHECK-NEXT: [[COND:%.*]] = call i1 @cond2()
; CHECK-NEXT: br i1 [[COND]], label [[TX:%.*]], label [[F]]
; CHECK: F:
-; CHECK-NEXT: [[P3:%.*]] = getelementptr i32, i32* [[P]], i32 2
-; CHECK-NEXT: store i32 17, i32* [[P3]], align 4
-; CHECK-NEXT: store i32 42, i32* [[P2]], align 4
+; CHECK-NEXT: [[P3:%.*]] = getelementptr i32, ptr [[P]], i32 2
+; CHECK-NEXT: store i32 17, ptr [[P3]], align 4
+; CHECK-NEXT: store i32 42, ptr [[P2]], align 4
; CHECK-NEXT: br label [[F1]]
; CHECK: TX:
; CHECK-NEXT: ret i32 [[X]]
@@ -617,16 +580,16 @@ F1:
br i1 %cond2, label %T1, label %TY
T1:
- %P2 = getelementptr i32, i32* %P, i32 %A
- %x = load i32, i32* %P2
+ %P2 = getelementptr i32, ptr %P, i32 %A
+ %x = load i32, ptr %P2
%cond = call i1 @cond2()
br i1 %cond, label %TX, label %F
F:
- %P3 = getelementptr i32, i32* %P, i32 2
- store i32 17, i32* %P3
+ %P3 = getelementptr i32, ptr %P, i32 2
+ store i32 17, ptr %P3
- store i32 42, i32* %P2 ; Provides "P[A]".
+ store i32 42, ptr %P2 ; Provides "P[A]".
br label %F1
TX:
@@ -641,17 +604,17 @@ TY:
ret i32 0
}
-define i32 @phi_trans3(i32* %p, i32 %x, i32 %y, i32 %z) {
+define i32 @phi_trans3(ptr %p, i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @phi_trans3(
; CHECK-NEXT: block1:
; CHECK-NEXT: [[CMPXY:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: br i1 [[CMPXY]], label [[BLOCK2:%.*]], label [[BLOCK3:%.*]]
; CHECK: block2:
-; CHECK-NEXT: store i32 87, i32* [[P:%.*]], align 4
+; CHECK-NEXT: store i32 87, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[BLOCK4:%.*]]
; CHECK: block3:
-; CHECK-NEXT: [[P2:%.*]] = getelementptr i32, i32* [[P]], i32 43
-; CHECK-NEXT: store i32 97, i32* [[P2]], align 4
+; CHECK-NEXT: [[P2:%.*]] = getelementptr i32, ptr [[P]], i32 43
+; CHECK-NEXT: store i32 97, ptr [[P2]], align 4
; CHECK-NEXT: br label [[BLOCK4]]
; CHECK: block4:
; CHECK-NEXT: [[D:%.*]] = phi i32 [ 87, [[BLOCK2]] ], [ 97, [[BLOCK3]] ]
@@ -674,12 +637,12 @@ block1:
br i1 %cmpxy, label %block2, label %block3
block2:
- store i32 87, i32* %p
+ store i32 87, ptr %p
br label %block4
block3:
- %p2 = getelementptr i32, i32* %p, i32 43
- store i32 97, i32* %p2
+ %p2 = getelementptr i32, ptr %p, i32 43
+ store i32 97, ptr %p2
br label %block4
block4:
@@ -692,11 +655,11 @@ block5:
br i1 %cmpxy, label %block6, label %exit
block6:
- %C = getelementptr i32, i32* %p, i32 %B
+ %C = getelementptr i32, ptr %p, i32 %B
br i1 %cmpxy, label %block7, label %exit
block7:
- %D = load i32, i32* %C
+ %D = load i32, ptr %C
ret i32 %D
@@ -704,42 +667,40 @@ exit:
ret i32 -1
}
-define i8 @phi_trans4(i8* %p) {
+define i8 @phi_trans4(ptr %p) {
; CHECK-LABEL: @phi_trans4(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[X3:%.*]] = getelementptr i8, i8* [[P:%.*]], i32 192
-; CHECK-NEXT: store i8 -64, i8* [[X3]], align 1
-; CHECK-NEXT: [[X:%.*]] = getelementptr i8, i8* [[P]], i32 4
-; CHECK-NEXT: [[Y:%.*]] = load i8, i8* [[X]], align 1
+; CHECK-NEXT: [[X3:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 192
+; CHECK-NEXT: store i8 -64, ptr [[X3]], align 1
+; CHECK-NEXT: [[X:%.*]] = getelementptr i8, ptr [[P]], i32 4
+; CHECK-NEXT: [[Y:%.*]] = load i8, ptr [[X]], align 1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[Y2:%.*]] = phi i8 [ [[Y]], [[ENTRY:%.*]] ], [ 0, [[LOOP]] ]
; CHECK-NEXT: [[COND:%.*]] = call i1 @cond2()
-; CHECK-NEXT: [[Z:%.*]] = bitcast i8* [[X3]] to i32*
-; CHECK-NEXT: store i32 0, i32* [[Z]], align 4
+; CHECK-NEXT: store i32 0, ptr [[X3]], align 4
; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[OUT:%.*]]
; CHECK: out:
; CHECK-NEXT: [[R:%.*]] = add i8 [[Y]], [[Y2]]
; CHECK-NEXT: ret i8 [[R]]
;
entry:
- %X3 = getelementptr i8, i8* %p, i32 192
- store i8 192, i8* %X3
+ %X3 = getelementptr i8, ptr %p, i32 192
+ store i8 192, ptr %X3
- %X = getelementptr i8, i8* %p, i32 4
- %Y = load i8, i8* %X
+ %X = getelementptr i8, ptr %p, i32 4
+ %Y = load i8, ptr %X
br label %loop
loop:
%i = phi i32 [4, %entry], [192, %loop]
- %X2 = getelementptr i8, i8* %p, i32 %i
- %Y2 = load i8, i8* %X2
+ %X2 = getelementptr i8, ptr %p, i32 %i
+ %Y2 = load i8, ptr %X2
%cond = call i1 @cond2()
- %Z = bitcast i8 *%X3 to i32*
- store i32 0, i32* %Z
+ store i32 0, ptr %X3
br i1 %cond, label %loop, label %out
out:
@@ -747,26 +708,25 @@ out:
ret i8 %R
}
-define i8 @phi_trans5(i8* %p) {
+define i8 @phi_trans5(ptr %p) {
; CHECK-LABEL: @phi_trans5(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[X4:%.*]] = getelementptr i8, i8* [[P:%.*]], i32 2
-; CHECK-NEXT: store i8 19, i8* [[X4]], align 1
-; CHECK-NEXT: [[X:%.*]] = getelementptr i8, i8* [[P]], i32 4
-; CHECK-NEXT: [[Y:%.*]] = load i8, i8* [[X]], align 1
+; CHECK-NEXT: [[X4:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 2
+; CHECK-NEXT: store i8 19, ptr [[X4]], align 1
+; CHECK-NEXT: [[X:%.*]] = getelementptr i8, ptr [[P]], i32 4
+; CHECK-NEXT: [[Y:%.*]] = load i8, ptr [[X]], align 1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[Y2:%.*]] = phi i8 [ [[Y]], [[ENTRY:%.*]] ], [ [[Y2_PRE:%.*]], [[CONT:%.*]] ]
; CHECK-NEXT: [[I:%.*]] = phi i32 [ 4, [[ENTRY]] ], [ 3, [[CONT]] ]
-; CHECK-NEXT: [[X2:%.*]] = getelementptr i8, i8* [[P]], i32 [[I]]
+; CHECK-NEXT: [[X2:%.*]] = getelementptr i8, ptr [[P]], i32 [[I]]
; CHECK-NEXT: [[COND:%.*]] = call i1 @cond2()
; CHECK-NEXT: br i1 [[COND]], label [[CONT]], label [[OUT:%.*]]
; CHECK: cont:
-; CHECK-NEXT: [[Z:%.*]] = getelementptr i8, i8* [[X2]], i32 -1
-; CHECK-NEXT: [[Z2:%.*]] = bitcast i8* [[Z]] to i32*
-; CHECK-NEXT: store i32 50462976, i32* [[Z2]], align 4
-; CHECK-NEXT: [[X2_PHI_TRANS_INSERT:%.*]] = getelementptr i8, i8* [[P]], i32 3
-; CHECK-NEXT: [[Y2_PRE]] = load i8, i8* [[X2_PHI_TRANS_INSERT]], align 1
+; CHECK-NEXT: [[Z:%.*]] = getelementptr i8, ptr [[X2]], i32 -1
+; CHECK-NEXT: store i32 50462976, ptr [[Z]], align 4
+; CHECK-NEXT: [[X2_PHI_TRANS_INSERT:%.*]] = getelementptr i8, ptr [[P]], i32 3
+; CHECK-NEXT: [[Y2_PRE]] = load i8, ptr [[X2_PHI_TRANS_INSERT]], align 1
; CHECK-NEXT: br label [[LOOP]]
; CHECK: out:
; CHECK-NEXT: [[R:%.*]] = add i8 [[Y]], [[Y2]]
@@ -774,24 +734,23 @@ define i8 @phi_trans5(i8* %p) {
;
entry:
- %X4 = getelementptr i8, i8* %p, i32 2
- store i8 19, i8* %X4
+ %X4 = getelementptr i8, ptr %p, i32 2
+ store i8 19, ptr %X4
- %X = getelementptr i8, i8* %p, i32 4
- %Y = load i8, i8* %X
+ %X = getelementptr i8, ptr %p, i32 4
+ %Y = load i8, ptr %X
br label %loop
loop:
%i = phi i32 [4, %entry], [3, %cont]
- %X2 = getelementptr i8, i8* %p, i32 %i
- %Y2 = load i8, i8* %X2 ; Ensure this load is not being incorrectly replaced.
+ %X2 = getelementptr i8, ptr %p, i32 %i
+ %Y2 = load i8, ptr %X2 ; Ensure this load is not being incorrectly replaced.
%cond = call i1 @cond2()
br i1 %cond, label %cont, label %out
cont:
- %Z = getelementptr i8, i8* %X2, i32 -1
- %Z2 = bitcast i8 *%Z to i32*
- store i32 50462976, i32* %Z2 ;; (1 << 8) | (2 << 16) | (3 << 24)
+ %Z = getelementptr i8, ptr %X2, i32 -1
+ store i32 50462976, ptr %Z ;; (1 << 8) | (2 << 16) | (3 << 24)
br label %loop
@@ -806,38 +765,38 @@ declare void @use_i32(i32) readonly
; indirectbr currently prevents MergeBlockIntoPredecessor from merging latch
; into header. Make sure we translate the address for %l1 correctly where
; parts of the address computations are in
diff erent basic blocks.
-define i32 @phi_trans6(i32* noalias nocapture readonly %x, i1 %cond) {
+define i32 @phi_trans6(ptr noalias nocapture readonly %x, i1 %cond) {
; CHECK-LABEL: @phi_trans6(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[L0:%.*]] = load i32, i32* [[X:%.*]], align 4
+; CHECK-NEXT: [[L0:%.*]] = load i32, ptr [[X:%.*]], align 4
; CHECK-NEXT: call void @use_i32(i32 [[L0]])
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
; CHECK-NEXT: [[L1:%.*]] = phi i32 [ [[L0]], [[ENTRY:%.*]] ], [ [[L1_PRE:%.*]], [[LATCH_HEADER_CRIT_EDGE:%.*]] ]
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[LATCH_HEADER_CRIT_EDGE]] ]
-; CHECK-NEXT: indirectbr i8* blockaddress(@phi_trans6, [[LATCH:%.*]]), [label %latch]
+; CHECK-NEXT: indirectbr ptr blockaddress(@phi_trans6, [[LATCH:%.*]]), [label %latch]
; CHECK: latch:
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT: br i1 [[COND:%.*]], label [[EXIT:%.*]], label [[LATCH_HEADER_CRIT_EDGE]]
; CHECK: latch.header_crit_edge:
-; CHECK-NEXT: [[GEP_1_PHI_TRANS_INSERT_PHI_TRANS_INSERT:%.*]] = getelementptr i32, i32* [[X]], i32 [[IV_NEXT]]
-; CHECK-NEXT: [[L1_PRE]] = load i32, i32* [[GEP_1_PHI_TRANS_INSERT_PHI_TRANS_INSERT]], align 4
+; CHECK-NEXT: [[GEP_1_PHI_TRANS_INSERT_PHI_TRANS_INSERT:%.*]] = getelementptr i32, ptr [[X]], i32 [[IV_NEXT]]
+; CHECK-NEXT: [[L1_PRE]] = load i32, ptr [[GEP_1_PHI_TRANS_INSERT_PHI_TRANS_INSERT]], align 4
; CHECK-NEXT: br label [[HEADER]]
; CHECK: exit:
; CHECK-NEXT: ret i32 [[L1]]
;
entry:
- %l0 = load i32, i32* %x
+ %l0 = load i32, ptr %x
call void @use_i32(i32 %l0)
br label %header
header:
%iv = phi i32 [0, %entry], [ %iv.next, %latch]
- indirectbr i8* blockaddress(@phi_trans6, %latch), [label %latch]
+ indirectbr ptr blockaddress(@phi_trans6, %latch), [label %latch]
latch:
- %gep.1 = getelementptr i32, i32* %x, i32 %iv
- %l1 = load i32, i32* %gep.1
+ %gep.1 = getelementptr i32, ptr %x, i32 %iv
+ %l1 = load i32, ptr %gep.1
%iv.next = add i32 %iv, 1
br i1 %cond, label %exit, label %header
@@ -846,19 +805,19 @@ exit:
}
; FIXME: Currently we fail to translate the PHI in this case.
-define i32 @phi_trans7(i32* noalias nocapture readonly %x, i1 %cond) {
+define i32 @phi_trans7(ptr noalias nocapture readonly %x, i1 %cond) {
; CHECK-LABEL: @phi_trans7(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[L0:%.*]] = load i32, i32* [[X:%.*]], align 4
+; CHECK-NEXT: [[L0:%.*]] = load i32, ptr [[X:%.*]], align 4
; CHECK-NEXT: call void @use_i32(i32 [[L0]])
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 2, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LATCH_HEADER_CRIT_EDGE:%.*]] ]
; CHECK-NEXT: [[OFFSET:%.*]] = add i32 [[IV]], -2
-; CHECK-NEXT: indirectbr i8* blockaddress(@phi_trans7, [[LATCH:%.*]]), [label %latch]
+; CHECK-NEXT: indirectbr ptr blockaddress(@phi_trans7, [[LATCH:%.*]]), [label %latch]
; CHECK: latch:
-; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr i32, i32* [[X]], i32 [[OFFSET]]
-; CHECK-NEXT: [[L1:%.*]] = load i32, i32* [[GEP_1]], align 4
+; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr i32, ptr [[X]], i32 [[OFFSET]]
+; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[GEP_1]], align 4
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT: br i1 [[COND:%.*]], label [[EXIT:%.*]], label [[LATCH_HEADER_CRIT_EDGE]]
; CHECK: latch.header_crit_edge:
@@ -867,18 +826,18 @@ define i32 @phi_trans7(i32* noalias nocapture readonly %x, i1 %cond) {
; CHECK-NEXT: ret i32 [[L1]]
;
entry:
- %l0 = load i32, i32* %x
+ %l0 = load i32, ptr %x
call void @use_i32(i32 %l0)
br label %header
header:
%iv = phi i32 [2, %entry], [ %iv.next, %latch]
%offset = add i32 %iv, -2
- indirectbr i8* blockaddress(@phi_trans7, %latch), [label %latch]
+ indirectbr ptr blockaddress(@phi_trans7, %latch), [label %latch]
latch:
- %gep.1 = getelementptr i32, i32* %x, i32 %offset
- %l1 = load i32, i32* %gep.1
+ %gep.1 = getelementptr i32, ptr %x, i32 %offset
+ %l1 = load i32, ptr %gep.1
%iv.next = add i32 %iv, 1
br i1 %cond, label %exit, label %header
@@ -887,19 +846,19 @@ exit:
}
; FIXME: Currently we fail to translate the PHI in this case.
-define i32 @phi_trans8(i32* noalias nocapture readonly %x, i1 %cond) {
+define i32 @phi_trans8(ptr noalias nocapture readonly %x, i1 %cond) {
; CHECK-LABEL: @phi_trans8(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[L0:%.*]] = load i32, i32* [[X:%.*]], align 4
+; CHECK-NEXT: [[L0:%.*]] = load i32, ptr [[X:%.*]], align 4
; CHECK-NEXT: call void @use_i32(i32 [[L0]])
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 2, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LATCH_HEADER_CRIT_EDGE:%.*]] ]
-; CHECK-NEXT: indirectbr i8* blockaddress(@phi_trans8, [[LATCH:%.*]]), [label %latch]
+; CHECK-NEXT: indirectbr ptr blockaddress(@phi_trans8, [[LATCH:%.*]]), [label %latch]
; CHECK: latch:
; CHECK-NEXT: [[OFFSET:%.*]] = add i32 [[IV]], -2
-; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr i32, i32* [[X]], i32 [[OFFSET]]
-; CHECK-NEXT: [[L1:%.*]] = load i32, i32* [[GEP_1]], align 4
+; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr i32, ptr [[X]], i32 [[OFFSET]]
+; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[GEP_1]], align 4
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT: br i1 [[COND:%.*]], label [[EXIT:%.*]], label [[LATCH_HEADER_CRIT_EDGE]]
; CHECK: latch.header_crit_edge:
@@ -908,18 +867,18 @@ define i32 @phi_trans8(i32* noalias nocapture readonly %x, i1 %cond) {
; CHECK-NEXT: ret i32 [[L1]]
;
entry:
- %l0 = load i32, i32* %x
+ %l0 = load i32, ptr %x
call void @use_i32(i32 %l0)
br label %header
header:
%iv = phi i32 [2, %entry], [ %iv.next, %latch]
- indirectbr i8* blockaddress(@phi_trans8, %latch), [label %latch]
+ indirectbr ptr blockaddress(@phi_trans8, %latch), [label %latch]
latch:
%offset = add i32 %iv, -2
- %gep.1 = getelementptr i32, i32* %x, i32 %offset
- %l1 = load i32, i32* %gep.1
+ %gep.1 = getelementptr i32, ptr %x, i32 %offset
+ %l1 = load i32, ptr %gep.1
%iv.next = add i32 %iv, 1
br i1 %cond, label %exit, label %header
@@ -934,16 +893,14 @@ define i32 @memset_to_load() nounwind readnone {
; CHECK-LABEL: @memset_to_load(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X:%.*]] = alloca [256 x i32], align 4
-; CHECK-NEXT: [[TTMP:%.*]] = bitcast [256 x i32]* [[X]] to i8*
-; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[TTMP]], i8 0, i64 1024, i1 false)
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[X]], i8 0, i64 1024, i1 false)
; CHECK-NEXT: ret i32 0
;
entry:
- %x = alloca [256 x i32], align 4 ; <[256 x i32]*> [#uses=2]
- %ttmp = bitcast [256 x i32]* %x to i8* ; <i8*> [#uses=1]
- call void @llvm.memset.p0i8.i64(i8* align 4 %ttmp, i8 0, i64 1024, i1 false)
- %arraydecay = getelementptr inbounds [256 x i32], [256 x i32]* %x, i32 0, i32 0 ; <i32*>
- %ttmp1 = load i32, i32* %arraydecay ; <i32> [#uses=1]
+ %x = alloca [256 x i32], align 4 ; <ptr> [#uses=2]
+ call void @llvm.memset.p0.i64(ptr align 4 %x, i8 0, i64 1024, i1 false)
+ %arraydecay = getelementptr inbounds [256 x i32], ptr %x, i32 0, i32 0 ; <ptr>
+ %ttmp1 = load i32, ptr %arraydecay ; <i32> [#uses=1]
ret i32 %ttmp1
}
@@ -952,23 +909,29 @@ entry:
;; Load -> Load forwarding in partial alias case.
;;===----------------------------------------------------------------------===;;
-define i32 @load_load_partial_alias(i8* %P) nounwind ssp {
-; CHECK-LABEL: @load_load_partial_alias(
-; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[P:%.*]] to i32*
-; CHECK-NEXT: [[TTMP2:%.*]] = load i32, i32* [[TMP0]], align 4
-; LE-NEXT: [[TMP1:%.*]] = lshr i32 [[TTMP2]], 8
-; BE-NEXT: [[TMP1:%.*]] = lshr i32 [[TTMP2]], 16
-; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
-; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[TMP2]] to i32
-; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TTMP2]], [[CONV]]
-; CHECK-NEXT: ret i32 [[ADD]]
+define i32 @load_load_partial_alias(ptr %P) nounwind ssp {
+; LE-LABEL: @load_load_partial_alias(
+; LE-NEXT: entry:
+; LE-NEXT: [[TTMP2:%.*]] = load i32, ptr [[P:%.*]], align 4
+; LE-NEXT: [[TMP0:%.*]] = lshr i32 [[TTMP2]], 8
+; LE-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i8
+; LE-NEXT: [[CONV:%.*]] = zext i8 [[TMP1]] to i32
+; LE-NEXT: [[ADD:%.*]] = add nsw i32 [[TTMP2]], [[CONV]]
+; LE-NEXT: ret i32 [[ADD]]
+;
+; BE-LABEL: @load_load_partial_alias(
+; BE-NEXT: entry:
+; BE-NEXT: [[TTMP2:%.*]] = load i32, ptr [[P:%.*]], align 4
+; BE-NEXT: [[TMP0:%.*]] = lshr i32 [[TTMP2]], 16
+; BE-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i8
+; BE-NEXT: [[CONV:%.*]] = zext i8 [[TMP1]] to i32
+; BE-NEXT: [[ADD:%.*]] = add nsw i32 [[TTMP2]], [[CONV]]
+; BE-NEXT: ret i32 [[ADD]]
;
entry:
- %0 = bitcast i8* %P to i32*
- %ttmp2 = load i32, i32* %0
- %add.ptr = getelementptr inbounds i8, i8* %P, i64 1
- %ttmp5 = load i8, i8* %add.ptr
+ %ttmp2 = load i32, ptr %P
+ %add.ptr = getelementptr inbounds i8, ptr %P, i64 1
+ %ttmp5 = load i8, ptr %add.ptr
%conv = zext i8 %ttmp5 to i32
%add = add nsw i32 %ttmp2, %conv
ret i32 %add
@@ -976,31 +939,41 @@ entry:
; Cross block partial alias case.
-define i32 @load_load_partial_alias_cross_block(i8* %P) nounwind ssp {
-; CHECK-LABEL: @load_load_partial_alias_cross_block(
-; CHECK-NEXT: entry:
-; CHECK-NEXT: [[XX:%.*]] = bitcast i8* [[P:%.*]] to i32*
-; CHECK-NEXT: [[X1:%.*]] = load i32, i32* [[XX]], align 4
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X1]], 127
-; LE-NEXT: [[TMP0:%.*]] = lshr i32 [[X1]], 8
-; BE-NEXT: [[TMP0:%.*]] = lshr i32 [[X1]], 16
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i8
-; CHECK-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[IF_END:%.*]]
-; CHECK: land.lhs.true:
-; CHECK-NEXT: [[CONV6:%.*]] = zext i8 [[TMP1]] to i32
-; CHECK-NEXT: ret i32 [[CONV6]]
-; CHECK: if.end:
-; CHECK-NEXT: ret i32 52
+define i32 @load_load_partial_alias_cross_block(ptr %P) nounwind ssp {
+; LE-LABEL: @load_load_partial_alias_cross_block(
+; LE-NEXT: entry:
+; LE-NEXT: [[X1:%.*]] = load i32, ptr [[P:%.*]], align 4
+; LE-NEXT: [[CMP:%.*]] = icmp eq i32 [[X1]], 127
+; LE-NEXT: [[TMP0:%.*]] = lshr i32 [[X1]], 8
+; LE-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i8
+; LE-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[IF_END:%.*]]
+; LE: land.lhs.true:
+; LE-NEXT: [[CONV6:%.*]] = zext i8 [[TMP1]] to i32
+; LE-NEXT: ret i32 [[CONV6]]
+; LE: if.end:
+; LE-NEXT: ret i32 52
+;
+; BE-LABEL: @load_load_partial_alias_cross_block(
+; BE-NEXT: entry:
+; BE-NEXT: [[X1:%.*]] = load i32, ptr [[P:%.*]], align 4
+; BE-NEXT: [[CMP:%.*]] = icmp eq i32 [[X1]], 127
+; BE-NEXT: [[TMP0:%.*]] = lshr i32 [[X1]], 16
+; BE-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i8
+; BE-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[IF_END:%.*]]
+; BE: land.lhs.true:
+; BE-NEXT: [[CONV6:%.*]] = zext i8 [[TMP1]] to i32
+; BE-NEXT: ret i32 [[CONV6]]
+; BE: if.end:
+; BE-NEXT: ret i32 52
;
entry:
- %xx = bitcast i8* %P to i32*
- %x1 = load i32, i32* %xx, align 4
+ %x1 = load i32, ptr %P, align 4
%cmp = icmp eq i32 %x1, 127
br i1 %cmp, label %land.lhs.true, label %if.end
land.lhs.true: ; preds = %entry
- %arrayidx4 = getelementptr inbounds i8, i8* %P, i64 1
- %ttmp5 = load i8, i8* %arrayidx4, align 1
+ %arrayidx4 = getelementptr inbounds i8, ptr %P, i64 1
+ %ttmp5 = load i8, ptr %arrayidx4, align 1
%conv6 = zext i8 %ttmp5 to i32
ret i32 %conv6
@@ -1008,48 +981,64 @@ if.end:
ret i32 52
}
-define i32 @load_load_partial_alias_cross_block_phi_trans(i8* %P) nounwind {
-; CHECK-LABEL: @load_load_partial_alias_cross_block_phi_trans(
-; CHECK-NEXT: entry:
-; CHECK-NEXT: [[XX:%.*]] = bitcast i8* [[P:%.*]] to i32*
-; CHECK-NEXT: [[X1:%.*]] = load i32, i32* [[XX]], align 4
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X1]], 127
-; LE-NEXT: [[TMP0:%.*]] = lshr i32 [[X1]], 16
-; BE-NEXT: [[TMP0:%.*]] = lshr i32 [[X1]], 8
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i8
-; LE-NEXT: [[TMP2:%.*]] = lshr i32 [[X1]], 8
-; BE-NEXT: [[TMP2:%.*]] = lshr i32 [[X1]], 16
-; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i8
-; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[ELSE:%.*]]
-; CHECK: if:
-; CHECK-NEXT: br label [[JOIN:%.*]]
-; CHECK: else:
-; CHECK-NEXT: br label [[JOIN]]
-; CHECK: join:
-; CHECK-NEXT: [[TTMP5:%.*]] = phi i8 [ [[TMP3]], [[IF]] ], [ [[TMP1]], [[ELSE]] ]
-; CHECK-NEXT: [[CONV6:%.*]] = zext i8 [[TTMP5]] to i32
-; CHECK-NEXT: ret i32 [[CONV6]]
-; CHECK: if.end:
-; CHECK-NEXT: ret i32 52
+define i32 @load_load_partial_alias_cross_block_phi_trans(ptr %P) nounwind {
+; LE-LABEL: @load_load_partial_alias_cross_block_phi_trans(
+; LE-NEXT: entry:
+; LE-NEXT: [[X1:%.*]] = load i32, ptr [[P:%.*]], align 4
+; LE-NEXT: [[CMP:%.*]] = icmp eq i32 [[X1]], 127
+; LE-NEXT: [[TMP0:%.*]] = lshr i32 [[X1]], 16
+; LE-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i8
+; LE-NEXT: [[TMP2:%.*]] = lshr i32 [[X1]], 8
+; LE-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i8
+; LE-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[ELSE:%.*]]
+; LE: if:
+; LE-NEXT: br label [[JOIN:%.*]]
+; LE: else:
+; LE-NEXT: br label [[JOIN]]
+; LE: join:
+; LE-NEXT: [[TTMP5:%.*]] = phi i8 [ [[TMP3]], [[IF]] ], [ [[TMP1]], [[ELSE]] ]
+; LE-NEXT: [[CONV6:%.*]] = zext i8 [[TTMP5]] to i32
+; LE-NEXT: ret i32 [[CONV6]]
+; LE: if.end:
+; LE-NEXT: ret i32 52
+;
+; BE-LABEL: @load_load_partial_alias_cross_block_phi_trans(
+; BE-NEXT: entry:
+; BE-NEXT: [[X1:%.*]] = load i32, ptr [[P:%.*]], align 4
+; BE-NEXT: [[CMP:%.*]] = icmp eq i32 [[X1]], 127
+; BE-NEXT: [[TMP0:%.*]] = lshr i32 [[X1]], 8
+; BE-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i8
+; BE-NEXT: [[TMP2:%.*]] = lshr i32 [[X1]], 16
+; BE-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i8
+; BE-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[ELSE:%.*]]
+; BE: if:
+; BE-NEXT: br label [[JOIN:%.*]]
+; BE: else:
+; BE-NEXT: br label [[JOIN]]
+; BE: join:
+; BE-NEXT: [[TTMP5:%.*]] = phi i8 [ [[TMP3]], [[IF]] ], [ [[TMP1]], [[ELSE]] ]
+; BE-NEXT: [[CONV6:%.*]] = zext i8 [[TTMP5]] to i32
+; BE-NEXT: ret i32 [[CONV6]]
+; BE: if.end:
+; BE-NEXT: ret i32 52
;
entry:
- %xx = bitcast i8* %P to i32*
- %x1 = load i32, i32* %xx, align 4
+ %x1 = load i32, ptr %P, align 4
%cmp = icmp eq i32 %x1, 127
br i1 %cmp, label %if, label %else
if:
- %arrayidx.if = getelementptr inbounds i8, i8* %P, i64 1
+ %arrayidx.if = getelementptr inbounds i8, ptr %P, i64 1
br label %join
else:
- %arrayidx.else = getelementptr inbounds i8, i8* %P, i64 2
+ %arrayidx.else = getelementptr inbounds i8, ptr %P, i64 2
br label %join
join:
%idx = phi i64 [ 1, %if ], [ 2, %else ]
- %arrayidx4 = getelementptr inbounds i8, i8* %P, i64 %idx
- %ttmp5 = load i8, i8* %arrayidx4, align 1
+ %arrayidx4 = getelementptr inbounds i8, ptr %P, i64 %idx
+ %ttmp5 = load i8, ptr %arrayidx4, align 1
%conv6 = zext i8 %ttmp5 to i32
ret i32 %conv6
@@ -1057,80 +1046,74 @@ if.end:
ret i32 52
}
-define void @load_load_partial_alias_loop(i8* %P) {
+define void @load_load_partial_alias_loop(ptr %P) {
; LE-LABEL: @load_load_partial_alias_loop(
; LE-NEXT: entry:
-; LE-NEXT: [[P_1:%.*]] = getelementptr i8, i8* [[P:%.*]], i64 1
-; LE-NEXT: [[V_1:%.*]] = load i8, i8* [[P_1]], align 1
+; LE-NEXT: [[P_1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
+; LE-NEXT: [[V_1:%.*]] = load i8, ptr [[P_1]], align 1
; LE-NEXT: call void @use.i8(i8 [[V_1]])
-; LE-NEXT: [[P_1_32:%.*]] = bitcast i8* [[P_1]] to i32*
-; LE-NEXT: [[V_1_32:%.*]] = load i32, i32* [[P_1_32]], align 4
+; LE-NEXT: [[V_1_32:%.*]] = load i32, ptr [[P_1]], align 4
; LE-NEXT: call void @use.i32(i32 [[V_1_32]])
; LE-NEXT: [[TMP0:%.*]] = trunc i32 [[V_1_32]] to i8
; LE-NEXT: br label [[LOOP:%.*]]
; LE: loop:
-; LE-NEXT: [[V_I:%.*]] = phi i8 [ [[TMP0]], [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[LOOP_LOOP_CRIT_EDGE:%.*]] ]
+; LE-NEXT: [[V_I:%.*]] = phi i8 [ [[TMP0]], [[ENTRY:%.*]] ], [ [[V_I_PRE:%.*]], [[LOOP_LOOP_CRIT_EDGE:%.*]] ]
; LE-NEXT: [[I:%.*]] = phi i64 [ 1, [[ENTRY]] ], [ [[I_INC:%.*]], [[LOOP_LOOP_CRIT_EDGE]] ]
-; LE-NEXT: [[P_I:%.*]] = getelementptr i8, i8* [[P]], i64 [[I]]
+; LE-NEXT: [[P_I:%.*]] = getelementptr i8, ptr [[P]], i64 [[I]]
; LE-NEXT: call void @use.i8(i8 [[V_I]])
-; LE-NEXT: [[P_I_32:%.*]] = bitcast i8* [[P_I]] to i32*
-; LE-NEXT: [[V_I_32:%.*]] = load i32, i32* [[P_I_32]], align 4
+; LE-NEXT: [[V_I_32:%.*]] = load i32, ptr [[P_I]], align 4
; LE-NEXT: call void @use.i32(i32 [[V_I_32]])
; LE-NEXT: [[I_INC]] = add i64 [[I]], 1
; LE-NEXT: [[CMP:%.*]] = icmp ne i64 [[I_INC]], 64
-; LE-NEXT: [[TMP1:%.*]] = lshr i32 [[V_I_32]], 8
-; LE-NEXT: [[TMP2]] = trunc i32 [[TMP1]] to i8
; LE-NEXT: br i1 [[CMP]], label [[LOOP_LOOP_CRIT_EDGE]], label [[EXIT:%.*]]
; LE: loop.loop_crit_edge:
+; LE-NEXT: [[P_I_PHI_TRANS_INSERT:%.*]] = getelementptr i8, ptr [[P]], i64 [[I_INC]]
+; LE-NEXT: [[V_I_PRE]] = load i8, ptr [[P_I_PHI_TRANS_INSERT]], align 1
; LE-NEXT: br label [[LOOP]]
; LE: exit:
; LE-NEXT: ret void
;
; BE-LABEL: @load_load_partial_alias_loop(
; BE-NEXT: entry:
-; BE-NEXT: [[P_1:%.*]] = getelementptr i8, i8* [[P:%.*]], i64 1
-; BE-NEXT: [[V_1:%.*]] = load i8, i8* [[P_1]], align 1
+; BE-NEXT: [[P_1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
+; BE-NEXT: [[V_1:%.*]] = load i8, ptr [[P_1]], align 1
; BE-NEXT: call void @use.i8(i8 [[V_1]])
-; BE-NEXT: [[P_1_32:%.*]] = bitcast i8* [[P_1]] to i32*
-; BE-NEXT: [[V_1_32:%.*]] = load i32, i32* [[P_1_32]], align 4
+; BE-NEXT: [[V_1_32:%.*]] = load i32, ptr [[P_1]], align 4
; BE-NEXT: call void @use.i32(i32 [[V_1_32]])
; BE-NEXT: [[TMP0:%.*]] = lshr i32 [[V_1_32]], 24
; BE-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i8
; BE-NEXT: br label [[LOOP:%.*]]
; BE: loop:
-; BE-NEXT: [[V_I:%.*]] = phi i8 [ [[TMP1]], [[ENTRY:%.*]] ], [ [[TMP3:%.*]], [[LOOP_LOOP_CRIT_EDGE:%.*]] ]
+; BE-NEXT: [[V_I:%.*]] = phi i8 [ [[TMP1]], [[ENTRY:%.*]] ], [ [[V_I_PRE:%.*]], [[LOOP_LOOP_CRIT_EDGE:%.*]] ]
; BE-NEXT: [[I:%.*]] = phi i64 [ 1, [[ENTRY]] ], [ [[I_INC:%.*]], [[LOOP_LOOP_CRIT_EDGE]] ]
-; BE-NEXT: [[P_I:%.*]] = getelementptr i8, i8* [[P]], i64 [[I]]
+; BE-NEXT: [[P_I:%.*]] = getelementptr i8, ptr [[P]], i64 [[I]]
; BE-NEXT: call void @use.i8(i8 [[V_I]])
-; BE-NEXT: [[P_I_32:%.*]] = bitcast i8* [[P_I]] to i32*
-; BE-NEXT: [[V_I_32:%.*]] = load i32, i32* [[P_I_32]], align 4
+; BE-NEXT: [[V_I_32:%.*]] = load i32, ptr [[P_I]], align 4
; BE-NEXT: call void @use.i32(i32 [[V_I_32]])
; BE-NEXT: [[I_INC]] = add i64 [[I]], 1
; BE-NEXT: [[CMP:%.*]] = icmp ne i64 [[I_INC]], 64
-; BE-NEXT: [[TMP2:%.*]] = lshr i32 [[V_I_32]], 16
-; BE-NEXT: [[TMP3]] = trunc i32 [[TMP2]] to i8
; BE-NEXT: br i1 [[CMP]], label [[LOOP_LOOP_CRIT_EDGE]], label [[EXIT:%.*]]
; BE: loop.loop_crit_edge:
+; BE-NEXT: [[P_I_PHI_TRANS_INSERT:%.*]] = getelementptr i8, ptr [[P]], i64 [[I_INC]]
+; BE-NEXT: [[V_I_PRE]] = load i8, ptr [[P_I_PHI_TRANS_INSERT]], align 1
; BE-NEXT: br label [[LOOP]]
; BE: exit:
; BE-NEXT: ret void
;
entry:
- %P.1 = getelementptr i8, i8* %P, i64 1
- %v.1 = load i8, i8* %P.1
+ %P.1 = getelementptr i8, ptr %P, i64 1
+ %v.1 = load i8, ptr %P.1
call void @use.i8(i8 %v.1)
- %P.1.32 = bitcast i8* %P.1 to i32*
- %v.1.32 = load i32, i32* %P.1.32
+ %v.1.32 = load i32, ptr %P.1
call void @use.i32(i32 %v.1.32)
br label %loop
loop:
%i = phi i64 [ 1, %entry ], [ %i.inc, %loop ]
- %P.i = getelementptr i8, i8* %P, i64 %i
- %v.i = load i8, i8* %P.i
+ %P.i = getelementptr i8, ptr %P, i64 %i
+ %v.i = load i8, ptr %P.i
call void @use.i8(i8 %v.i)
- %P.i.32 = bitcast i8* %P.i to i32*
- %v.i.32 = load i32, i32* %P.i.32
+ %v.i.32 = load i32, ptr %P.i
call void @use.i32(i32 %v.i.32)
%i.inc = add i64 %i, 1
%cmp = icmp ne i64 %i.inc, 64
@@ -1145,40 +1128,52 @@ declare void @use.i32(i32) readnone
@global = external local_unnamed_addr global i8, align 4
-define void @load_load_partial_alias_atomic(i8* %arg) {
-; CHECK-LABEL: @load_load_partial_alias_atomic(
-; CHECK-NEXT: bb:
-; CHECK-NEXT: [[TMP2_1:%.*]] = getelementptr inbounds i8, i8* [[ARG:%.*]], i64 1
-; CHECK-NEXT: [[TMP2_2:%.*]] = bitcast i8* [[TMP2_1]] to i64*
-; CHECK-NEXT: [[TMP2_3:%.*]] = load i64, i64* [[TMP2_2]], align 4
-; CHECK-NEXT: [[TMP3_1:%.*]] = getelementptr inbounds i8, i8* [[ARG]], i64 2
-; LE-NEXT: [[TMP0:%.*]] = lshr i64 [[TMP2_3]], 8
-; BE-NEXT: [[TMP0:%.*]] = lshr i64 [[TMP2_3]], 48
-; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i8
-; CHECK-NEXT: br label [[BB5:%.*]]
-; CHECK: bb5:
-; CHECK-NEXT: [[TMP4_1:%.*]] = phi i8 [ [[TMP4_1_PRE:%.*]], [[BB5]] ], [ [[TMP1]], [[BB:%.*]] ]
-; CHECK-NEXT: [[TMP6_1:%.*]] = load atomic i8, i8* @global acquire, align 4
-; CHECK-NEXT: [[TMP7_1:%.*]] = add i8 [[TMP6_1]], [[TMP4_1]]
-; CHECK-NEXT: store i8 [[TMP7_1]], i8* [[ARG]], align 1
-; CHECK-NEXT: [[TMP4_1_PRE]] = load i8, i8* [[TMP3_1]], align 4
-; CHECK-NEXT: br label [[BB5]]
+define void @load_load_partial_alias_atomic(ptr %arg) {
+; LE-LABEL: @load_load_partial_alias_atomic(
+; LE-NEXT: bb:
+; LE-NEXT: [[TMP2_1:%.*]] = getelementptr inbounds i8, ptr [[ARG:%.*]], i64 1
+; LE-NEXT: [[TMP2_3:%.*]] = load i64, ptr [[TMP2_1]], align 4
+; LE-NEXT: [[TMP3_1:%.*]] = getelementptr inbounds i8, ptr [[ARG]], i64 2
+; LE-NEXT: [[TMP0:%.*]] = lshr i64 [[TMP2_3]], 8
+; LE-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i8
+; LE-NEXT: br label [[BB5:%.*]]
+; LE: bb5:
+; LE-NEXT: [[TMP4_1:%.*]] = phi i8 [ [[TMP4_1_PRE:%.*]], [[BB5]] ], [ [[TMP1]], [[BB:%.*]] ]
+; LE-NEXT: [[TMP6_1:%.*]] = load atomic i8, ptr @global acquire, align 4
+; LE-NEXT: [[TMP7_1:%.*]] = add i8 [[TMP6_1]], [[TMP4_1]]
+; LE-NEXT: store i8 [[TMP7_1]], ptr [[ARG]], align 1
+; LE-NEXT: [[TMP4_1_PRE]] = load i8, ptr [[TMP3_1]], align 4
+; LE-NEXT: br label [[BB5]]
+;
+; BE-LABEL: @load_load_partial_alias_atomic(
+; BE-NEXT: bb:
+; BE-NEXT: [[TMP2_1:%.*]] = getelementptr inbounds i8, ptr [[ARG:%.*]], i64 1
+; BE-NEXT: [[TMP2_3:%.*]] = load i64, ptr [[TMP2_1]], align 4
+; BE-NEXT: [[TMP3_1:%.*]] = getelementptr inbounds i8, ptr [[ARG]], i64 2
+; BE-NEXT: [[TMP0:%.*]] = lshr i64 [[TMP2_3]], 48
+; BE-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i8
+; BE-NEXT: br label [[BB5:%.*]]
+; BE: bb5:
+; BE-NEXT: [[TMP4_1:%.*]] = phi i8 [ [[TMP4_1_PRE:%.*]], [[BB5]] ], [ [[TMP1]], [[BB:%.*]] ]
+; BE-NEXT: [[TMP6_1:%.*]] = load atomic i8, ptr @global acquire, align 4
+; BE-NEXT: [[TMP7_1:%.*]] = add i8 [[TMP6_1]], [[TMP4_1]]
+; BE-NEXT: store i8 [[TMP7_1]], ptr [[ARG]], align 1
+; BE-NEXT: [[TMP4_1_PRE]] = load i8, ptr [[TMP3_1]], align 4
+; BE-NEXT: br label [[BB5]]
;
bb:
- %tmp1.1 = getelementptr inbounds i8, i8* %arg, i64 0
- %tmp2.1 = getelementptr inbounds i8, i8* %arg, i64 1
- %tmp2.2 = bitcast i8* %tmp2.1 to i64*
- %tmp2.3 = load i64, i64* %tmp2.2, align 4
+ %tmp2.1 = getelementptr inbounds i8, ptr %arg, i64 1
+ %tmp2.3 = load i64, ptr %tmp2.1, align 4
%tmp2.4 = icmp ugt i64 %tmp2.3, 1
- %tmp3.1 = getelementptr inbounds i8, i8* %arg, i64 2
+ %tmp3.1 = getelementptr inbounds i8, ptr %arg, i64 2
br label %bb5
bb5: ; preds = %bb14, %bb
- %tmp4.1 = load i8, i8* %tmp3.1, align 4
- %tmp6.1 = load atomic i8, i8* getelementptr inbounds (i8, i8* @global, i64 0) acquire, align 4
+ %tmp4.1 = load i8, ptr %tmp3.1, align 4
+ %tmp6.1 = load atomic i8, ptr @global acquire, align 4
%tmp7.1 = add i8 %tmp6.1, %tmp4.1
- store i8 %tmp7.1, i8* %tmp1.1
+ store i8 %tmp7.1, ptr %arg
br label %bb5
}
@@ -1192,20 +1187,20 @@ bb5: ; preds = %bb14, %bb
@f = global %widening1 zeroinitializer, align 4
-define i32 @test_widening1(i8* %P) nounwind ssp noredzone {
+define i32 @test_widening1(ptr %P) nounwind ssp noredzone {
; CHECK-LABEL: @test_widening1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TTMP:%.*]] = load i8, i8* getelementptr inbounds ([[WIDENING1:%.*]], %widening1* @f, i64 0, i32 1), align 4
+; CHECK-NEXT: [[TTMP:%.*]] = load i8, ptr getelementptr inbounds ([[WIDENING1:%.*]], ptr @f, i64 0, i32 1), align 4
; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[TTMP]] to i32
-; CHECK-NEXT: [[TTMP1:%.*]] = load i8, i8* getelementptr inbounds ([[WIDENING1]], %widening1* @f, i64 0, i32 2), align 1
+; CHECK-NEXT: [[TTMP1:%.*]] = load i8, ptr getelementptr inbounds ([[WIDENING1]], ptr @f, i64 0, i32 2), align 1
; CHECK-NEXT: [[CONV2:%.*]] = zext i8 [[TTMP1]] to i32
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]
; CHECK-NEXT: ret i32 [[ADD]]
;
entry:
- %ttmp = load i8, i8* getelementptr inbounds (%widening1, %widening1* @f, i64 0, i32 1), align 4
+ %ttmp = load i8, ptr getelementptr inbounds (%widening1, ptr @f, i64 0, i32 1), align 4
%conv = zext i8 %ttmp to i32
- %ttmp1 = load i8, i8* getelementptr inbounds (%widening1, %widening1* @f, i64 0, i32 2), align 1
+ %ttmp1 = load i8, ptr getelementptr inbounds (%widening1, ptr @f, i64 0, i32 2), align 1
%conv2 = zext i8 %ttmp1 to i32
%add = add nsw i32 %conv, %conv2
ret i32 %add
@@ -1214,31 +1209,31 @@ entry:
define i32 @test_widening2() nounwind ssp noredzone {
; CHECK-LABEL: @test_widening2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TTMP:%.*]] = load i8, i8* getelementptr inbounds ([[WIDENING1:%.*]], %widening1* @f, i64 0, i32 1), align 4
+; CHECK-NEXT: [[TTMP:%.*]] = load i8, ptr getelementptr inbounds ([[WIDENING1:%.*]], ptr @f, i64 0, i32 1), align 4
; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[TTMP]] to i32
-; CHECK-NEXT: [[TTMP1:%.*]] = load i8, i8* getelementptr inbounds ([[WIDENING1]], %widening1* @f, i64 0, i32 2), align 1
+; CHECK-NEXT: [[TTMP1:%.*]] = load i8, ptr getelementptr inbounds ([[WIDENING1]], ptr @f, i64 0, i32 2), align 1
; CHECK-NEXT: [[CONV2:%.*]] = zext i8 [[TTMP1]] to i32
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]
-; CHECK-NEXT: [[TTMP2:%.*]] = load i8, i8* getelementptr inbounds ([[WIDENING1]], %widening1* @f, i64 0, i32 3), align 2
+; CHECK-NEXT: [[TTMP2:%.*]] = load i8, ptr getelementptr inbounds ([[WIDENING1]], ptr @f, i64 0, i32 3), align 2
; CHECK-NEXT: [[CONV3:%.*]] = zext i8 [[TTMP2]] to i32
; CHECK-NEXT: [[ADD2:%.*]] = add nsw i32 [[ADD]], [[CONV3]]
-; CHECK-NEXT: [[TTMP3:%.*]] = load i8, i8* getelementptr inbounds ([[WIDENING1]], %widening1* @f, i64 0, i32 4), align 1
+; CHECK-NEXT: [[TTMP3:%.*]] = load i8, ptr getelementptr inbounds ([[WIDENING1]], ptr @f, i64 0, i32 4), align 1
; CHECK-NEXT: [[CONV4:%.*]] = zext i8 [[TTMP3]] to i32
; CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[ADD2]], [[CONV4]]
; CHECK-NEXT: ret i32 [[ADD3]]
;
entry:
- %ttmp = load i8, i8* getelementptr inbounds (%widening1, %widening1* @f, i64 0, i32 1), align 4
+ %ttmp = load i8, ptr getelementptr inbounds (%widening1, ptr @f, i64 0, i32 1), align 4
%conv = zext i8 %ttmp to i32
- %ttmp1 = load i8, i8* getelementptr inbounds (%widening1, %widening1* @f, i64 0, i32 2), align 1
+ %ttmp1 = load i8, ptr getelementptr inbounds (%widening1, ptr @f, i64 0, i32 2), align 1
%conv2 = zext i8 %ttmp1 to i32
%add = add nsw i32 %conv, %conv2
- %ttmp2 = load i8, i8* getelementptr inbounds (%widening1, %widening1* @f, i64 0, i32 3), align 2
+ %ttmp2 = load i8, ptr getelementptr inbounds (%widening1, ptr @f, i64 0, i32 3), align 2
%conv3 = zext i8 %ttmp2 to i32
%add2 = add nsw i32 %add, %conv3
- %ttmp3 = load i8, i8* getelementptr inbounds (%widening1, %widening1* @f, i64 0, i32 4), align 1
+ %ttmp3 = load i8, ptr getelementptr inbounds (%widening1, ptr @f, i64 0, i32 4), align 1
%conv4 = zext i8 %ttmp3 to i32
%add3 = add nsw i32 %add2, %conv4
@@ -1246,10 +1241,10 @@ entry:
}
-declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind
+declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) nounwind
-declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
-declare void @llvm.memcpy.p0i8.p1i8.i64(i8* nocapture, i8 addrspace(1)* nocapture, i64, i1) nounwind
+declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
+declare void @llvm.memcpy.p0.p1.i64(ptr nocapture, ptr addrspace(1) nocapture, i64, i1) nounwind
;;===----------------------------------------------------------------------===;;
@@ -1259,25 +1254,25 @@ declare void @llvm.memcpy.p0i8.p1i8.i64(i8* nocapture, i8 addrspace(1)* nocaptur
%class.X = type { [8 x i8] }
- at _ZTV1X = weak_odr constant [5 x i8*] zeroinitializer
- at _ZTV1Y = weak_odr constant [5 x i8*] zeroinitializer
+ at _ZTV1X = weak_odr constant [5 x ptr] zeroinitializer
+ at _ZTV1Y = weak_odr constant [5 x ptr] zeroinitializer
declare void @use()
-declare void @use3(i8***, i8**)
+declare void @use3(ptr, ptr)
; PR8908
define void @test_escape1() nounwind {
; CHECK-LABEL: @test_escape1(
-; CHECK-NEXT: [[X:%.*]] = alloca i8**, align 8
-; CHECK-NEXT: store i8** getelementptr inbounds ([5 x i8*], [5 x i8*]* @_ZTV1X, i64 0, i64 2), i8*** [[X]], align 8
+; CHECK-NEXT: [[X:%.*]] = alloca ptr, align 8
+; CHECK-NEXT: store ptr getelementptr inbounds ([5 x ptr], ptr @_ZTV1X, i64 0, i64 2), ptr [[X]], align 8
; CHECK-NEXT: call void @use() #[[ATTR3]]
-; CHECK-NEXT: call void @use3(i8*** [[X]], i8** getelementptr inbounds ([5 x i8*], [5 x i8*]* @_ZTV1X, i64 0, i64 2)) #[[ATTR3]]
+; CHECK-NEXT: call void @use3(ptr [[X]], ptr getelementptr inbounds ([5 x ptr], ptr @_ZTV1X, i64 0, i64 2)) #[[ATTR3]]
; CHECK-NEXT: ret void
;
- %x = alloca i8**, align 8
- store i8** getelementptr inbounds ([5 x i8*], [5 x i8*]* @_ZTV1X, i64 0, i64 2), i8*** %x, align 8
+ %x = alloca ptr, align 8
+ store ptr getelementptr inbounds ([5 x ptr], ptr @_ZTV1X, i64 0, i64 2), ptr %x, align 8
call void @use() nounwind
- %DEAD = load i8**, i8*** %x, align 8
- call void @use3(i8*** %x, i8** %DEAD) nounwind
+ %DEAD = load ptr, ptr %x, align 8
+ call void @use3(ptr %x, ptr %DEAD) nounwind
ret void
}
diff --git a/llvm/test/Transforms/GVN/PRE/volatile.ll b/llvm/test/Transforms/GVN/PRE/volatile.ll
index d75843d37a283..432bf82461267 100644
--- a/llvm/test/Transforms/GVN/PRE/volatile.ll
+++ b/llvm/test/Transforms/GVN/PRE/volatile.ll
@@ -5,52 +5,52 @@
; Check that we can bypass a volatile load when searching
; for dependencies of a non-volatile load
-define i32 @test1(i32* nocapture %p, i32* nocapture %q) {
+define i32 @test1(ptr nocapture %p, ptr nocapture %q) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr [[Q:%.*]], align 4
; CHECK-NEXT: ret i32 0
;
entry:
- %x = load i32, i32* %p
- load volatile i32, i32* %q
- %y = load i32, i32* %p
+ %x = load i32, ptr %p
+ load volatile i32, ptr %q
+ %y = load i32, ptr %p
%add = sub i32 %y, %x
ret i32 %add
}
; We can not value forward if the query instruction is
; volatile, this would be (in effect) removing the volatile load
-define i32 @test2(i32* nocapture %p, i32* nocapture %q) {
+define i32 @test2(ptr nocapture %p, ptr nocapture %q) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
-; CHECK-NEXT: [[Y:%.*]] = load volatile i32, i32* [[P]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
+; CHECK-NEXT: [[Y:%.*]] = load volatile i32, ptr [[P]], align 4
; CHECK-NEXT: [[ADD:%.*]] = sub i32 [[Y]], [[X]]
; CHECK-NEXT: ret i32 [[ADD]]
;
entry:
- %x = load i32, i32* %p
- %y = load volatile i32, i32* %p
+ %x = load i32, ptr %p
+ %y = load volatile i32, ptr %p
%add = sub i32 %y, %x
ret i32 %add
}
; If the query instruction is itself volatile, we *cannot*
; reorder it even if p and q are noalias
-define i32 @test3(i32* noalias nocapture %p, i32* noalias nocapture %q) {
+define i32 @test3(ptr noalias nocapture %p, ptr noalias nocapture %q) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
-; CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, i32* [[Q:%.*]], align 4
-; CHECK-NEXT: [[Y:%.*]] = load volatile i32, i32* [[P]], align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load volatile i32, ptr [[Q:%.*]], align 4
+; CHECK-NEXT: [[Y:%.*]] = load volatile i32, ptr [[P]], align 4
; CHECK-NEXT: [[ADD:%.*]] = sub i32 [[Y]], [[X]]
; CHECK-NEXT: ret i32 [[ADD]]
;
entry:
- %x = load i32, i32* %p
- load volatile i32, i32* %q
- %y = load volatile i32, i32* %p
+ %x = load i32, ptr %p
+ load volatile i32, ptr %q
+ %y = load volatile i32, ptr %p
%add = sub i32 %y, %x
ret i32 %add
}
@@ -58,46 +58,46 @@ entry:
; If an encountered instruction is both volatile and ordered,
; we need to use the strictest ordering of either. In this
; case, the ordering prevents forwarding.
-define i32 @test4(i32* noalias nocapture %p, i32* noalias nocapture %q) {
+define i32 @test4(ptr noalias nocapture %p, ptr noalias nocapture %q) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P:%.*]], align 4
-; CHECK-NEXT: [[TMP0:%.*]] = load atomic volatile i32, i32* [[Q:%.*]] seq_cst, align 4
-; CHECK-NEXT: [[Y:%.*]] = load atomic i32, i32* [[P]] seq_cst, align 4
+; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P:%.*]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load atomic volatile i32, ptr [[Q:%.*]] seq_cst, align 4
+; CHECK-NEXT: [[Y:%.*]] = load atomic i32, ptr [[P]] seq_cst, align 4
; CHECK-NEXT: [[ADD:%.*]] = sub i32 [[Y]], [[X]]
; CHECK-NEXT: ret i32 [[ADD]]
;
entry:
- %x = load i32, i32* %p
- load atomic volatile i32, i32* %q seq_cst, align 4
- %y = load atomic i32, i32* %p seq_cst, align 4
+ %x = load i32, ptr %p
+ load atomic volatile i32, ptr %q seq_cst, align 4
+ %y = load atomic i32, ptr %p seq_cst, align 4
%add = sub i32 %y, %x
ret i32 %add
}
; Value forwarding from a volatile load is perfectly legal
-define i32 @test5(i32* nocapture %p, i32* nocapture %q) {
+define i32 @test5(ptr nocapture %p, ptr nocapture %q) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[X:%.*]] = load volatile i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load volatile i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: ret i32 0
;
entry:
- %x = load volatile i32, i32* %p
- %y = load i32, i32* %p
+ %x = load volatile i32, ptr %p
+ %y = load i32, ptr %p
%add = sub i32 %y, %x
ret i32 %add
}
; Does cross block redundancy elimination work with volatiles?
-define i32 @test6(i32* noalias nocapture %p, i32* noalias nocapture %q) {
+define i32 @test6(ptr noalias nocapture %p, ptr noalias nocapture %q) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[Y1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[Y1:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: call void @use(i32 [[Y1]])
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
-; CHECK-NEXT: [[X:%.*]] = load volatile i32, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load volatile i32, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[ADD:%.*]] = sub i32 [[Y1]], [[X]]
; CHECK-NEXT: [[CND:%.*]] = icmp eq i32 [[ADD]], 0
; CHECK-NEXT: br i1 [[CND]], label [[EXIT:%.*]], label [[HEADER]]
@@ -105,12 +105,12 @@ define i32 @test6(i32* noalias nocapture %p, i32* noalias nocapture %q) {
; CHECK-NEXT: ret i32 0
;
entry:
- %y1 = load i32, i32* %p
+ %y1 = load i32, ptr %p
call void @use(i32 %y1)
br label %header
header:
- %x = load volatile i32, i32* %q
- %y = load i32, i32* %p
+ %x = load volatile i32, ptr %q
+ %y = load i32, ptr %p
%add = sub i32 %y, %x
%cnd = icmp eq i32 %add, 0
br i1 %cnd, label %exit, label %header
@@ -119,20 +119,20 @@ exit:
}
; Does cross block PRE work with volatiles?
-define i32 @test7(i1 %c, i32* noalias nocapture %p, i32* noalias nocapture %q) {
+define i32 @test7(i1 %c, ptr noalias nocapture %p, ptr noalias nocapture %q) {
; CHECK-LABEL: @test7(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C:%.*]], label [[ENTRY_HEADER_CRIT_EDGE:%.*]], label [[SKIP:%.*]]
; CHECK: entry.header_crit_edge:
-; CHECK-NEXT: [[Y_PRE:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[Y_PRE:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: skip:
-; CHECK-NEXT: [[Y1:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[Y1:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: call void @use(i32 [[Y1]])
; CHECK-NEXT: br label [[HEADER]]
; CHECK: header:
; CHECK-NEXT: [[Y:%.*]] = phi i32 [ [[Y_PRE]], [[ENTRY_HEADER_CRIT_EDGE]] ], [ [[Y]], [[HEADER]] ], [ [[Y1]], [[SKIP]] ]
-; CHECK-NEXT: [[X:%.*]] = load volatile i32, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load volatile i32, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[ADD:%.*]] = sub i32 [[Y]], [[X]]
; CHECK-NEXT: [[CND:%.*]] = icmp eq i32 [[ADD]], 0
; CHECK-NEXT: br i1 [[CND]], label [[EXIT:%.*]], label [[HEADER]]
@@ -142,12 +142,12 @@ define i32 @test7(i1 %c, i32* noalias nocapture %p, i32* noalias nocapture %q) {
entry:
br i1 %c, label %header, label %skip
skip:
- %y1 = load i32, i32* %p
+ %y1 = load i32, ptr %p
call void @use(i32 %y1)
br label %header
header:
- %x = load volatile i32, i32* %q
- %y = load i32, i32* %p
+ %x = load volatile i32, ptr %q
+ %y = load i32, ptr %p
%add = sub i32 %y, %x
%cnd = icmp eq i32 %add, 0
br i1 %cnd, label %exit, label %header
@@ -157,40 +157,40 @@ exit:
; Another volatile PRE case - two paths through a loop
; load in preheader, one path read only, one not
-define i32 @test8(i1 %b, i1 %c, i32* noalias %p, i32* noalias %q) {
+define i32 @test8(i1 %b, i1 %c, ptr noalias %p, ptr noalias %q) {
; CHECK-LABEL: @test8(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[Y1:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[Y1:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: call void @use(i32 [[Y1]])
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
; CHECK-NEXT: [[Y:%.*]] = phi i32 [ [[Y_PRE:%.*]], [[SKIP_HEADER_CRIT_EDGE:%.*]] ], [ [[Y]], [[HEADER]] ], [ [[Y1]], [[ENTRY:%.*]] ]
-; CHECK-NEXT: [[X:%.*]] = load volatile i32, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[X:%.*]] = load volatile i32, ptr [[Q:%.*]], align 4
; CHECK-NEXT: call void @use(i32 [[Y]])
; CHECK-NEXT: br i1 [[B:%.*]], label [[SKIP:%.*]], label [[HEADER]]
; CHECK: skip:
-; CHECK-NEXT: call void @clobber(i32* [[P]], i32* [[Q]])
+; CHECK-NEXT: call void @clobber(ptr [[P]], ptr [[Q]])
; CHECK-NEXT: br i1 [[C:%.*]], label [[SKIP_HEADER_CRIT_EDGE]], label [[EXIT:%.*]]
; CHECK: skip.header_crit_edge:
-; CHECK-NEXT: [[Y_PRE]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: [[Y_PRE]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: br label [[HEADER]]
; CHECK: exit:
; CHECK-NEXT: [[ADD:%.*]] = sub i32 [[Y]], [[X]]
; CHECK-NEXT: ret i32 [[ADD]]
;
entry:
- %y1 = load i32, i32* %p
+ %y1 = load i32, ptr %p
call void @use(i32 %y1)
br label %header
header:
- %x = load volatile i32, i32* %q
- %y = load i32, i32* %p
+ %x = load volatile i32, ptr %q
+ %y = load i32, ptr %p
call void @use(i32 %y)
br i1 %b, label %skip, label %header
skip:
; escaping the arguments is explicitly required since we marked
; them noalias
- call void @clobber(i32* %p, i32* %q)
+ call void @clobber(ptr %p, ptr %q)
br i1 %c, label %header, label %exit
exit:
%add = sub i32 %y, %x
@@ -200,7 +200,7 @@ exit:
; This test checks that we don't optimize away instructions that are
; simplified by SimplifyInstruction(), but are not trivially dead.
-define i32 @test9(i32* %V) {
+define i32 @test9(ptr %V) {
; CHECK-LABEL: @test9(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[LOAD:%.*]] = call i32 undef()
@@ -212,6 +212,6 @@ entry:
}
declare void @use(i32) readonly
-declare void @clobber(i32* %p, i32* %q)
+declare void @clobber(ptr %p, ptr %q)
!0 = !{ i32 0, i32 1 }
diff --git a/llvm/test/Transforms/GVN/addrspacecast.ll b/llvm/test/Transforms/GVN/addrspacecast.ll
index bc950d9d59577..3486a4e012cf1 100644
--- a/llvm/test/Transforms/GVN/addrspacecast.ll
+++ b/llvm/test/Transforms/GVN/addrspacecast.ll
@@ -1,19 +1,19 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=gvn -S | FileCheck %s
-define i32 addrspace(1)* @addrspacecast(i32* %ptr) {
+define ptr addrspace(1) @addrspacecast(ptr %ptr) {
; CHECK-LABEL: @addrspacecast(
; CHECK-NEXT: block1:
-; CHECK-NEXT: [[Z1:%.*]] = addrspacecast i32* [[PTR:%.*]] to i32 addrspace(1)*
-; CHECK-NEXT: store i32 addrspace(1)* [[Z1]], i32 addrspace(1)** undef
-; CHECK-NEXT: ret i32 addrspace(1)* [[Z1]]
+; CHECK-NEXT: [[Z1:%.*]] = addrspacecast ptr [[PTR:%.*]] to ptr addrspace(1)
+; CHECK-NEXT: store ptr addrspace(1) [[Z1]], ptr undef
+; CHECK-NEXT: ret ptr addrspace(1) [[Z1]]
;
block1:
- %z1 = addrspacecast i32* %ptr to i32 addrspace(1)*
- store i32 addrspace(1)* %z1, i32 addrspace(1)** undef
+ %z1 = addrspacecast ptr %ptr to ptr addrspace(1)
+ store ptr addrspace(1) %z1, ptr undef
br label %block2
block2:
- %z2 = addrspacecast i32* %ptr to i32 addrspace(1)*
- ret i32 addrspace(1)* %z2
+ %z2 = addrspacecast ptr %ptr to ptr addrspace(1)
+ ret ptr addrspace(1) %z2
}
diff --git a/llvm/test/Transforms/GVN/assume-equal.ll b/llvm/test/Transforms/GVN/assume-equal.ll
index d2f444d2384d3..2ca8f3384e813 100644
--- a/llvm/test/Transforms/GVN/assume-equal.ll
+++ b/llvm/test/Transforms/GVN/assume-equal.ll
@@ -1,8 +1,8 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
-%struct.A = type { i32 (...)** }
- at _ZTV1A = available_externally unnamed_addr constant [4 x i8*] [i8* null, i8* bitcast (i8** @_ZTI1A to i8*), i8* bitcast (i32 (%struct.A*)* @_ZN1A3fooEv to i8*), i8* bitcast (i32 (%struct.A*)* @_ZN1A3barEv to i8*)], align 8
- at _ZTI1A = external constant i8*
+%struct.A = type { ptr }
+ at _ZTV1A = available_externally unnamed_addr constant [4 x ptr] [ptr null, ptr @_ZTI1A, ptr @_ZN1A3fooEv, ptr @_ZN1A3barEv], align 8
+ at _ZTI1A = external constant ptr
; Checks if indirect calls can be replaced with direct
; assuming that %vtable == @_ZTV1A (with alignment).
@@ -11,32 +11,28 @@
define void @_Z1gb(i1 zeroext %p) {
entry:
- %call = tail call noalias i8* @_Znwm(i64 8) #4
- %0 = bitcast i8* %call to %struct.A*
- tail call void @_ZN1AC1Ev(%struct.A* %0) #1
- %1 = bitcast i8* %call to i8***
- %vtable = load i8**, i8*** %1, align 8
- %cmp.vtables = icmp eq i8** %vtable, getelementptr inbounds ([4 x i8*], [4 x i8*]* @_ZTV1A, i64 0, i64 2)
+ %call = tail call noalias ptr @_Znwm(i64 8) #4
+ tail call void @_ZN1AC1Ev(ptr %call) #1
+ %vtable = load ptr, ptr %call, align 8
+ %cmp.vtables = icmp eq ptr %vtable, getelementptr inbounds ([4 x ptr], ptr @_ZTV1A, i64 0, i64 2)
tail call void @llvm.assume(i1 %cmp.vtables)
br i1 %p, label %if.then, label %if.else
if.then: ; preds = %entry
- %vtable1.cast = bitcast i8** %vtable to i32 (%struct.A*)**
- %2 = load i32 (%struct.A*)*, i32 (%struct.A*)** %vtable1.cast, align 8
+ %0 = load ptr, ptr %vtable, align 8
; CHECK: call i32 @_ZN1A3fooEv(
- %call2 = tail call i32 %2(%struct.A* %0) #1
+ %call2 = tail call i32 %0(ptr %call) #1
br label %if.end
if.else: ; preds = %entry
- %vfn47 = getelementptr inbounds i8*, i8** %vtable, i64 1
- %vfn4 = bitcast i8** %vfn47 to i32 (%struct.A*)**
+ %vfn47 = getelementptr inbounds ptr, ptr %vtable, i64 1
; CHECK: call i32 @_ZN1A3barEv(
- %3 = load i32 (%struct.A*)*, i32 (%struct.A*)** %vfn4, align 8
+ %1 = load ptr, ptr %vfn47, align 8
- %call5 = tail call i32 %3(%struct.A* %0) #1
+ %call5 = tail call i32 %1(ptr %call) #1
br label %if.end
if.end: ; preds = %if.else, %if.then
@@ -47,50 +43,42 @@ if.end: ; preds = %if.else, %if.then
; CHECK-LABEL: define void @invariantGroupHandling(i1 zeroext %p) {
define void @invariantGroupHandling(i1 zeroext %p) {
entry:
- %call = tail call noalias i8* @_Znwm(i64 8) #4
- %0 = bitcast i8* %call to %struct.A*
- tail call void @_ZN1AC1Ev(%struct.A* %0) #1
- %1 = bitcast i8* %call to i8***
- %vtable = load i8**, i8*** %1, align 8, !invariant.group !0
- %cmp.vtables = icmp eq i8** %vtable, getelementptr inbounds ([4 x i8*], [4 x i8*]* @_ZTV1A, i64 0, i64 2)
+ %call = tail call noalias ptr @_Znwm(i64 8) #4
+ tail call void @_ZN1AC1Ev(ptr %call) #1
+ %vtable = load ptr, ptr %call, align 8, !invariant.group !0
+ %cmp.vtables = icmp eq ptr %vtable, getelementptr inbounds ([4 x ptr], ptr @_ZTV1A, i64 0, i64 2)
tail call void @llvm.assume(i1 %cmp.vtables)
br i1 %p, label %if.then, label %if.else
if.then: ; preds = %entry
- %vtable1.cast = bitcast i8** %vtable to i32 (%struct.A*)**
- %2 = load i32 (%struct.A*)*, i32 (%struct.A*)** %vtable1.cast, align 8
+ %0 = load ptr, ptr %vtable, align 8
; CHECK: call i32 @_ZN1A3fooEv(
- %call2 = tail call i32 %2(%struct.A* %0) #1
- %vtable1 = load i8**, i8*** %1, align 8, !invariant.group !0
- %vtable2.cast = bitcast i8** %vtable1 to i32 (%struct.A*)**
- %call1 = load i32 (%struct.A*)*, i32 (%struct.A*)** %vtable2.cast, align 8
+ %call2 = tail call i32 %0(ptr %call) #1
+ %vtable1 = load ptr, ptr %call, align 8, !invariant.group !0
+ %call1 = load ptr, ptr %vtable1, align 8
; CHECK: call i32 @_ZN1A3fooEv(
- %callx = tail call i32 %call1(%struct.A* %0) #1
+ %callx = tail call i32 %call1(ptr %call) #1
- %vtable2 = load i8**, i8*** %1, align 8, !invariant.group !0
- %vtable3.cast = bitcast i8** %vtable2 to i32 (%struct.A*)**
- %call4 = load i32 (%struct.A*)*, i32 (%struct.A*)** %vtable3.cast, align 8
+ %vtable2 = load ptr, ptr %call, align 8, !invariant.group !0
+ %call4 = load ptr, ptr %vtable2, align 8
; CHECK: call i32 @_ZN1A3fooEv(
- %cally = tail call i32 %call4(%struct.A* %0) #1
+ %cally = tail call i32 %call4(ptr %call) #1
- %b = bitcast i8* %call to %struct.A**
- %vtable3 = load %struct.A*, %struct.A** %b, align 8, !invariant.group !0
- %vtable4.cast = bitcast %struct.A* %vtable3 to i32 (%struct.A*)**
- %vfun = load i32 (%struct.A*)*, i32 (%struct.A*)** %vtable4.cast, align 8
+ %vtable3 = load ptr, ptr %call, align 8, !invariant.group !0
+ %vfun = load ptr, ptr %vtable3, align 8
; CHECK: call i32 @_ZN1A3fooEv(
- %unknown = tail call i32 %vfun(%struct.A* %0) #1
+ %unknown = tail call i32 %vfun(ptr %call) #1
br label %if.end
if.else: ; preds = %entry
- %vfn47 = getelementptr inbounds i8*, i8** %vtable, i64 1
- %vfn4 = bitcast i8** %vfn47 to i32 (%struct.A*)**
+ %vfn47 = getelementptr inbounds ptr, ptr %vtable, i64 1
; CHECK: call i32 @_ZN1A3barEv(
- %3 = load i32 (%struct.A*)*, i32 (%struct.A*)** %vfn4, align 8
+ %1 = load ptr, ptr %vfn47, align 8
- %call5 = tail call i32 %3(%struct.A* %0) #1
+ %call5 = tail call i32 %1(ptr %call) #1
br label %if.end
if.end: ; preds = %if.else, %if.then
@@ -103,19 +91,16 @@ if.end: ; preds = %if.else, %if.then
define i32 @main() {
entry:
- %call = tail call noalias i8* @_Znwm(i64 8)
- %0 = bitcast i8* %call to %struct.A*
- tail call void @_ZN1AC1Ev(%struct.A* %0)
- %1 = bitcast i8* %call to i8***
- %vtable = load i8**, i8*** %1, align 8
- %cmp.vtables = icmp eq i8** %vtable, getelementptr inbounds ([4 x i8*], [4 x i8*]* @_ZTV1A, i64 0, i64 2)
+ %call = tail call noalias ptr @_Znwm(i64 8)
+ tail call void @_ZN1AC1Ev(ptr %call)
+ %vtable = load ptr, ptr %call, align 8
+ %cmp.vtables = icmp eq ptr %vtable, getelementptr inbounds ([4 x ptr], ptr @_ZTV1A, i64 0, i64 2)
tail call void @llvm.assume(i1 %cmp.vtables)
- %vtable1.cast = bitcast i8** %vtable to i32 (%struct.A*)**
; CHECK: call i32 @_ZN1A3fooEv(
- %2 = load i32 (%struct.A*)*, i32 (%struct.A*)** %vtable1.cast, align 8
+ %0 = load ptr, ptr %vtable, align 8
- %call2 = tail call i32 %2(%struct.A* %0)
+ %call2 = tail call i32 %0(ptr %call)
ret i32 0
}
@@ -126,11 +111,11 @@ define float @_Z1gf(float %p) {
entry:
%p.addr = alloca float, align 4
%f = alloca float, align 4
- store float %p, float* %p.addr, align 4
+ store float %p, ptr %p.addr, align 4
- store float 3.000000e+00, float* %f, align 4
- %0 = load float, float* %p.addr, align 4
- %1 = load float, float* %f, align 4
+ store float 3.000000e+00, ptr %f, align 4
+ %0 = load float, ptr %p.addr, align 4
+ %1 = load float, ptr %f, align 4
%cmp = fcmp oeq float %1, %0 ; note const on lhs
call void @llvm.assume(i1 %cmp)
@@ -143,9 +128,9 @@ entry:
define float @_Z1hf(float %p) {
entry:
%p.addr = alloca float, align 4
- store float %p, float* %p.addr, align 4
+ store float %p, ptr %p.addr, align 4
- %0 = load float, float* %p.addr, align 4
+ %0 = load float, ptr %p.addr, align 4
%cmp = fcmp nnan ueq float %0, 3.000000e+00
call void @llvm.assume(i1 %cmp)
@@ -157,9 +142,9 @@ entry:
define float @_Z1if(float %p) {
entry:
%p.addr = alloca float, align 4
- store float %p, float* %p.addr, align 4
+ store float %p, ptr %p.addr, align 4
- %0 = load float, float* %p.addr, align 4
+ %0 = load float, ptr %p.addr, align 4
%cmp = fcmp ueq float %0, 3.000000e+00 ; no nnan flag - can't propagate
call void @llvm.assume(i1 %cmp)
@@ -217,7 +202,7 @@ entry:
bb2:
; CHECK-NOT: %cmp3 =
%cmp3 = icmp eq i32 %p, 43
- ; CHECK: store i8 poison, i8* null
+ ; CHECK: store i8 poison, ptr null
call void @llvm.assume(i1 %cmp3)
ret i32 15
bb3:
@@ -264,10 +249,10 @@ meh:
ret i1 %k
}
-declare noalias i8* @_Znwm(i64)
-declare void @_ZN1AC1Ev(%struct.A*)
+declare noalias ptr @_Znwm(i64)
+declare void @_ZN1AC1Ev(ptr)
declare void @llvm.assume(i1)
-declare i32 @_ZN1A3fooEv(%struct.A*)
-declare i32 @_ZN1A3barEv(%struct.A*)
+declare i32 @_ZN1A3fooEv(ptr)
+declare i32 @_ZN1A3barEv(ptr)
!0 = !{!"struct A"}
diff --git a/llvm/test/Transforms/GVN/basic-undef-test.ll b/llvm/test/Transforms/GVN/basic-undef-test.ll
index bfaa3f467bc87..d12c3db4bdf0e 100644
--- a/llvm/test/Transforms/GVN/basic-undef-test.ll
+++ b/llvm/test/Transforms/GVN/basic-undef-test.ll
@@ -2,13 +2,13 @@
; ModuleID = 'test3.ll'
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
-define i32 @main(i32 *%foo) {
+define i32 @main(ptr %foo) {
entry:
-; CHECK: load i32, i32* %foo, align 4
- %0 = load i32, i32* %foo, align 4
- store i32 5, i32* undef, align 4
-; CHECK-NOT: load i32, i32* %foo, align 4
- %1 = load i32, i32* %foo, align 4
+; CHECK: load i32, ptr %foo, align 4
+ %0 = load i32, ptr %foo, align 4
+ store i32 5, ptr undef, align 4
+; CHECK-NOT: load i32, ptr %foo, align 4
+ %1 = load i32, ptr %foo, align 4
; CHECK: add i32 %0, %0
%2 = add i32 %0, %1
ret i32 %2
diff --git a/llvm/test/Transforms/GVN/big-endian.ll b/llvm/test/Transforms/GVN/big-endian.ll
index b13ceb76d98dd..714f901a3bc26 100644
--- a/llvm/test/Transforms/GVN/big-endian.ll
+++ b/llvm/test/Transforms/GVN/big-endian.ll
@@ -6,18 +6,16 @@ target triple = "powerpc64-unknown-linux-gnu"
;; Make sure we use correct bit shift based on storage size for
;; loads reusing a load value.
-define i64 @test1({ i1, i8 }* %predA, { i1, i8 }* %predB) {
+define i64 @test1(ptr %predA, ptr %predB) {
; CHECK-LABEL: @test1(
-; CHECK-NEXT: [[VALUELOADA_FCA_0_GEP:%.*]] = getelementptr inbounds { i1, i8 }, { i1, i8 }* [[PREDA:%.*]], i64 0, i32 0
-; CHECK-NEXT: [[VALUELOADA_FCA_0_LOAD:%.*]] = load i1, i1* [[VALUELOADA_FCA_0_GEP]], align 8
-; CHECK-NEXT: [[VALUELOADB_FCA_0_GEP:%.*]] = getelementptr inbounds { i1, i8 }, { i1, i8 }* [[PREDB:%.*]], i64 0, i32 0
-; CHECK-NEXT: [[VALUELOADB_FCA_0_LOAD:%.*]] = load i1, i1* [[VALUELOADB_FCA_0_GEP]], align 8
+; CHECK-NEXT: [[VALUELOADA_FCA_0_LOAD:%.*]] = load i1, ptr [[PREDA:%.*]], align 8
+; CHECK-NEXT: [[VALUELOADB_FCA_0_LOAD:%.*]] = load i1, ptr [[PREDB:%.*]], align 8
; CHECK-NEXT: [[ISTRUE:%.*]] = and i1 [[VALUELOADA_FCA_0_LOAD]], [[VALUELOADB_FCA_0_LOAD]]
-; CHECK-NEXT: [[VALUELOADA_FCA_1_GEP:%.*]] = getelementptr inbounds { i1, i8 }, { i1, i8 }* [[PREDA]], i64 0, i32 1
-; CHECK-NEXT: [[VALUELOADA_FCA_1_LOAD:%.*]] = load i8, i8* [[VALUELOADA_FCA_1_GEP]], align 1
+; CHECK-NEXT: [[VALUELOADA_FCA_1_GEP:%.*]] = getelementptr inbounds { i1, i8 }, ptr [[PREDA]], i64 0, i32 1
+; CHECK-NEXT: [[VALUELOADA_FCA_1_LOAD:%.*]] = load i8, ptr [[VALUELOADA_FCA_1_GEP]], align 1
; CHECK-NEXT: [[ISNOTNULLA:%.*]] = icmp ne i8 [[VALUELOADA_FCA_1_LOAD]], 0
-; CHECK-NEXT: [[VALUELOADB_FCA_1_GEP:%.*]] = getelementptr inbounds { i1, i8 }, { i1, i8 }* [[PREDB]], i64 0, i32 1
-; CHECK-NEXT: [[VALUELOADB_FCA_1_LOAD:%.*]] = load i8, i8* [[VALUELOADB_FCA_1_GEP]], align 1
+; CHECK-NEXT: [[VALUELOADB_FCA_1_GEP:%.*]] = getelementptr inbounds { i1, i8 }, ptr [[PREDB]], i64 0, i32 1
+; CHECK-NEXT: [[VALUELOADB_FCA_1_LOAD:%.*]] = load i8, ptr [[VALUELOADB_FCA_1_GEP]], align 1
; CHECK-NEXT: [[ISNOTNULLB:%.*]] = icmp ne i8 [[VALUELOADB_FCA_1_LOAD]], 0
; CHECK-NEXT: [[ISNOTNULL:%.*]] = and i1 [[ISNOTNULLA]], [[ISNOTNULLB]]
; CHECK-NEXT: [[ISTRUEANDNOTNULL:%.*]] = and i1 [[ISTRUE]], [[ISNOTNULL]]
@@ -25,16 +23,16 @@ define i64 @test1({ i1, i8 }* %predA, { i1, i8 }* %predB) {
; CHECK-NEXT: ret i64 [[RET]]
;
- %valueLoadA.fca.0.gep = getelementptr inbounds { i1, i8 }, { i1, i8 }* %predA, i64 0, i32 0
- %valueLoadA.fca.0.load = load i1, i1* %valueLoadA.fca.0.gep, align 8
- %valueLoadB.fca.0.gep = getelementptr inbounds { i1, i8 }, { i1, i8 }* %predB, i64 0, i32 0
- %valueLoadB.fca.0.load = load i1, i1* %valueLoadB.fca.0.gep, align 8
+ %valueLoadA.fca.0.gep = getelementptr inbounds { i1, i8 }, ptr %predA, i64 0, i32 0
+ %valueLoadA.fca.0.load = load i1, ptr %valueLoadA.fca.0.gep, align 8
+ %valueLoadB.fca.0.gep = getelementptr inbounds { i1, i8 }, ptr %predB, i64 0, i32 0
+ %valueLoadB.fca.0.load = load i1, ptr %valueLoadB.fca.0.gep, align 8
%isTrue = and i1 %valueLoadA.fca.0.load, %valueLoadB.fca.0.load
- %valueLoadA.fca.1.gep = getelementptr inbounds { i1, i8 }, { i1, i8 }* %predA, i64 0, i32 1
- %valueLoadA.fca.1.load = load i8, i8* %valueLoadA.fca.1.gep, align 1
+ %valueLoadA.fca.1.gep = getelementptr inbounds { i1, i8 }, ptr %predA, i64 0, i32 1
+ %valueLoadA.fca.1.load = load i8, ptr %valueLoadA.fca.1.gep, align 1
%isNotNullA = icmp ne i8 %valueLoadA.fca.1.load, 0
- %valueLoadB.fca.1.gep = getelementptr inbounds { i1, i8 }, { i1, i8 }* %predB, i64 0, i32 1
- %valueLoadB.fca.1.load = load i8, i8* %valueLoadB.fca.1.gep, align 1
+ %valueLoadB.fca.1.gep = getelementptr inbounds { i1, i8 }, ptr %predB, i64 0, i32 1
+ %valueLoadB.fca.1.load = load i8, ptr %valueLoadB.fca.1.gep, align 1
%isNotNullB = icmp ne i8 %valueLoadB.fca.1.load, 0
%isNotNull = and i1 %isNotNullA, %isNotNullB
%isTrueAndNotNull = and i1 %isTrue, %isNotNull
@@ -43,16 +41,14 @@ define i64 @test1({ i1, i8 }* %predA, { i1, i8 }* %predB) {
}
;; And likewise for loads reusing a store value.
-define i1 @test2(i8 %V, i8* %P) {
+define i1 @test2(i8 %V, ptr %P) {
; CHECK-LABEL: @test2(
-; CHECK-NEXT: store i8 [[V:%.*]], i8* [[P:%.*]], align 1
-; CHECK-NEXT: [[P2:%.*]] = bitcast i8* [[P]] to i1*
+; CHECK-NEXT: store i8 [[V:%.*]], ptr [[P:%.*]], align 1
; CHECK-NEXT: [[TMP1:%.*]] = trunc i8 [[V]] to i1
; CHECK-NEXT: ret i1 [[TMP1]]
;
- store i8 %V, i8* %P
- %P2 = bitcast i8* %P to i1*
- %A = load i1, i1* %P2
+ store i8 %V, ptr %P
+ %A = load i1, ptr %P
ret i1 %A
}
diff --git a/llvm/test/Transforms/GVN/callbr-loadpre-critedge.ll b/llvm/test/Transforms/GVN/callbr-loadpre-critedge.ll
index fbc2dbdf5c8fc..726dc214064d2 100644
--- a/llvm/test/Transforms/GVN/callbr-loadpre-critedge.ll
+++ b/llvm/test/Transforms/GVN/callbr-loadpre-critedge.ll
@@ -6,26 +6,25 @@
%struct.pluto = type <{ i8, i8 }>
-define void @widget(%struct.pluto** %tmp1) {
+define void @widget(ptr %tmp1) {
; CHECK-LABEL: @widget(
; CHECK-NEXT: bb:
; CHECK-NEXT: callbr void asm sideeffect "", "!i,!i"()
; CHECK-NEXT: to label [[BB4:%.*]] [label [[BB5:%.*]], label %bb.bb8_crit_edge]
; CHECK: bb.bb8_crit_edge:
-; CHECK-NEXT: [[TMP10_PRE:%.*]] = load %struct.pluto*, %struct.pluto** [[TMP1:%.*]], align 8
+; CHECK-NEXT: [[TMP10_PRE:%.*]] = load ptr, ptr [[TMP1:%.*]], align 8
; CHECK-NEXT: br label [[BB8:%.*]]
; CHECK: bb4:
; CHECK-NEXT: br label [[BB5]]
; CHECK: bb5:
-; CHECK-NEXT: [[TMP6:%.*]] = load %struct.pluto*, %struct.pluto** [[TMP1]], align 8
-; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_PLUTO:%.*]], %struct.pluto* [[TMP6]], i64 0, i32 1
+; CHECK-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP1]], align 8
+; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_PLUTO:%.*]], ptr [[TMP6]], i64 0, i32 1
; CHECK-NEXT: br label [[BB8]]
; CHECK: bb8:
-; CHECK-NEXT: [[TMP10:%.*]] = phi %struct.pluto* [ [[TMP6]], [[BB5]] ], [ [[TMP10_PRE]], [[BB_BB8_CRIT_EDGE:%.*]] ]
-; CHECK-NEXT: [[TMP9:%.*]] = phi i8* [ [[TMP7]], [[BB5]] ], [ null, [[BB_BB8_CRIT_EDGE]] ]
-; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_PLUTO]], %struct.pluto* [[TMP10]], i64 0, i32 0
-; CHECK-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP11]], align 1
-; CHECK-NEXT: tail call void @spam(i8* [[TMP9]], i8 [[TMP12]])
+; CHECK-NEXT: [[TMP10:%.*]] = phi ptr [ [[TMP6]], [[BB5]] ], [ [[TMP10_PRE]], [[BB_BB8_CRIT_EDGE:%.*]] ]
+; CHECK-NEXT: [[TMP9:%.*]] = phi ptr [ [[TMP7]], [[BB5]] ], [ null, [[BB_BB8_CRIT_EDGE]] ]
+; CHECK-NEXT: [[TMP12:%.*]] = load i8, ptr [[TMP10]], align 1
+; CHECK-NEXT: tail call void @spam(ptr [[TMP9]], i8 [[TMP12]])
; CHECK-NEXT: ret void
;
bb:
@@ -36,17 +35,16 @@ bb4: ; preds = %bb
br label %bb5
bb5: ; preds = %bb4, %bb
- %tmp6 = load %struct.pluto*, %struct.pluto** %tmp1
- %tmp7 = getelementptr inbounds %struct.pluto, %struct.pluto* %tmp6, i64 0, i32 1
+ %tmp6 = load ptr, ptr %tmp1
+ %tmp7 = getelementptr inbounds %struct.pluto, ptr %tmp6, i64 0, i32 1
br label %bb8
bb8: ; preds = %bb5, %bb
- %tmp9 = phi i8* [ %tmp7, %bb5 ], [ null, %bb ]
- %tmp10 = load %struct.pluto*, %struct.pluto** %tmp1
- %tmp11 = getelementptr inbounds %struct.pluto, %struct.pluto* %tmp10, i64 0, i32 0
- %tmp12 = load i8, i8* %tmp11
- tail call void @spam(i8* %tmp9, i8 %tmp12)
+ %tmp9 = phi ptr [ %tmp7, %bb5 ], [ null, %bb ]
+ %tmp10 = load ptr, ptr %tmp1
+ %tmp12 = load i8, ptr %tmp10
+ tail call void @spam(ptr %tmp9, i8 %tmp12)
ret void
}
-declare void @spam(i8*, i8)
+declare void @spam(ptr, i8)
diff --git a/llvm/test/Transforms/GVN/callbr-scalarpre-critedge.ll b/llvm/test/Transforms/GVN/callbr-scalarpre-critedge.ll
index 5cae27cce55cb..9c186f7ea36ad 100644
--- a/llvm/test/Transforms/GVN/callbr-scalarpre-critedge.ll
+++ b/llvm/test/Transforms/GVN/callbr-scalarpre-critedge.ll
@@ -4,7 +4,7 @@
; This test checks that we don't hang trying to split a critical edge in scalar
; PRE when the control flow uses a callbr instruction.
-define void @wombat(i64 %arg, i64* %arg1, i64 %arg2, i32* %arg3) {
+define void @wombat(i64 %arg, ptr %arg1, i64 %arg2, ptr %arg3) {
; CHECK-LABEL: @wombat(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[TMP5:%.*]] = or i64 [[ARG2:%.*]], [[ARG:%.*]]
@@ -21,7 +21,7 @@ define void @wombat(i64 %arg, i64* %arg1, i64 %arg2, i32* %arg3) {
; CHECK-NEXT: br label [[BB9]]
; CHECK: bb9:
; CHECK-NEXT: [[TMP10_PRE_PHI:%.*]] = phi i32 [ [[DOTPRE]], [[BB_BB9_CRIT_EDGE:%.*]] ], [ [[TMP8]], [[BB7]] ]
-; CHECK-NEXT: store i32 [[TMP10_PRE_PHI]], i32* [[ARG3:%.*]], align 4
+; CHECK-NEXT: store i32 [[TMP10_PRE_PHI]], ptr [[ARG3:%.*]], align 4
; CHECK-NEXT: ret void
;
bb:
@@ -39,7 +39,7 @@ bb7: ; preds = %bb6, %bb
bb9: ; preds = %bb7, %bb
%tmp10 = trunc i64 %tmp5 to i32
- store i32 %tmp10, i32* %arg3
+ store i32 %tmp10, ptr %arg3
ret void
}
diff --git a/llvm/test/Transforms/GVN/calloc-load-removal.ll b/llvm/test/Transforms/GVN/calloc-load-removal.ll
index 5b0db2ee5024f..3a21344581d39 100644
--- a/llvm/test/Transforms/GVN/calloc-load-removal.ll
+++ b/llvm/test/Transforms/GVN/calloc-load-removal.ll
@@ -5,14 +5,13 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; Function Attrs: nounwind uwtable
define i32 @test1() {
- %1 = tail call noalias i8* @calloc(i64 1, i64 4)
- %2 = bitcast i8* %1 to i32*
+ %1 = tail call noalias ptr @calloc(i64 1, i64 4)
; This load is trivially constant zero
- %3 = load i32, i32* %2, align 4
- ret i32 %3
+ %2 = load i32, ptr %1, align 4
+ ret i32 %2
; CHECK-LABEL: @test1(
-; CHECK-NOT: %3 = load i32, i32* %2, align 4
+; CHECK-NOT: %2 = load i32, ptr %1, align 4
; CHECK: ret i32 0
; CHECK_NO_LIBCALLS-LABEL: @test1(
@@ -21,23 +20,22 @@ define i32 @test1() {
}
-define i32 @as_invoke(i1 %c) personality i32 (...)* undef {
+define i32 @as_invoke(i1 %c) personality ptr undef {
bb3:
- %mem = invoke noalias i8* @calloc(i64 1, i64 4)
+ %mem = invoke noalias ptr @calloc(i64 1, i64 4)
to label %bb4 unwind label %bb1
bb1:
- %lp = landingpad { i8*, i32 } cleanup
+ %lp = landingpad { ptr, i32 } cleanup
ret i32 0
bb4:
- %mem.i32 = bitcast i8* %mem to i32*
; This load is trivially constant zero
- %res = load i32, i32* %mem.i32, align 4
+ %res = load i32, ptr %mem, align 4
ret i32 %res
; CHECK-LABEL: @as_invoke(
-; CHECK-NOT: %3 = load i32, i32* %2, align 4
+; CHECK-NOT: %3 = load i32, ptr %2, align 4
; CHECK: ret i32 0
; CHECK_NO_LIBCALLS-LABEL: @as_invoke(
@@ -45,4 +43,4 @@ bb4:
; CHECK_NO_LIBCALLS: ret i32 %
}
-declare noalias i8* @calloc(i64, i64) allockind("alloc,zeroed") allocsize(0,1)
+declare noalias ptr @calloc(i64, i64) allockind("alloc,zeroed") allocsize(0,1)
diff --git a/llvm/test/Transforms/GVN/calls-nonlocal.ll b/llvm/test/Transforms/GVN/calls-nonlocal.ll
index f7330de12d89c..e8915452d8557 100644
--- a/llvm/test/Transforms/GVN/calls-nonlocal.ll
+++ b/llvm/test/Transforms/GVN/calls-nonlocal.ll
@@ -3,9 +3,9 @@
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9"
-define i32 @test(i32 %g, i8* %P) nounwind {
+define i32 @test(i32 %g, ptr %P) nounwind {
entry:
- %tmp2 = call i32 @strlen( i8* %P ) nounwind readonly ; <i32> [#uses=1]
+ %tmp2 = call i32 @strlen( ptr %P ) nounwind readonly ; <i32> [#uses=1]
%tmp3 = icmp eq i32 %tmp2, 100 ; <i1> [#uses=1]
%tmp34 = zext i1 %tmp3 to i8 ; <i8> [#uses=1]
%toBool = icmp ne i8 %tmp34, 0 ; <i1> [#uses=1]
@@ -16,7 +16,7 @@ bb: ; preds = %entry
bb6: ; preds = %entry
%tmp8 = add i32 %g, 42 ; <i32> [#uses=2]
- %tmp10 = call i32 @strlen( i8* %P ) nounwind readonly ; <i32> [#uses=1]
+ %tmp10 = call i32 @strlen( ptr %P ) nounwind readonly ; <i32> [#uses=1]
%tmp11 = icmp eq i32 %tmp10, 100 ; <i1> [#uses=1]
%tmp1112 = zext i1 %tmp11 to i8 ; <i8> [#uses=1]
%toBool13 = icmp ne i8 %tmp1112, 0 ; <i1> [#uses=1]
@@ -27,7 +27,7 @@ bb14: ; preds = %bb6
bb16: ; preds = %bb6
%tmp18 = mul i32 %tmp8, 2 ; <i32> [#uses=1]
- %tmp20 = call i32 @strlen( i8* %P ) nounwind readonly ; <i32> [#uses=1]
+ %tmp20 = call i32 @strlen( ptr %P ) nounwind readonly ; <i32> [#uses=1]
%tmp21 = icmp eq i32 %tmp20, 100 ; <i1> [#uses=1]
%tmp2122 = zext i1 %tmp21 to i8 ; <i8> [#uses=1]
%toBool23 = icmp ne i8 %tmp2122, 0 ; <i1> [#uses=1]
@@ -47,9 +47,9 @@ return: ; preds = %bb27
ret i32 %tmp.0
}
-; CHECK: define i32 @test(i32 %g, i8* %P) #0 {
+; CHECK: define i32 @test(i32 %g, ptr %P) #0 {
; CHECK: entry:
-; CHECK: %tmp2 = call i32 @strlen(i8* %P) #1
+; CHECK: %tmp2 = call i32 @strlen(ptr %P) #1
; CHECK: %tmp3 = icmp eq i32 %tmp2, 100
; CHECK: %tmp34 = zext i1 %tmp3 to i8
; CHECK: br i1 %tmp3, label %bb, label %bb6
@@ -72,4 +72,4 @@ return: ; preds = %bb27
; CHECK: ret i32 %tmp.0
; CHECK: }
-declare i32 @strlen(i8*) nounwind readonly
+declare i32 @strlen(ptr) nounwind readonly
diff --git a/llvm/test/Transforms/GVN/calls-readonly.ll b/llvm/test/Transforms/GVN/calls-readonly.ll
index 7f8c4d81812cc..5c24740c881b4 100644
--- a/llvm/test/Transforms/GVN/calls-readonly.ll
+++ b/llvm/test/Transforms/GVN/calls-readonly.ll
@@ -4,9 +4,9 @@
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin7"
-define i8* @test(i8* %P, i8* %Q, i32 %x, i32 %y) nounwind readonly {
+define ptr @test(ptr %P, ptr %Q, i32 %x, i32 %y) nounwind readonly {
entry:
- %0 = tail call i32 @strlen(i8* %P) ; <i32> [#uses=2]
+ %0 = tail call i32 @strlen(ptr %P) ; <i32> [#uses=2]
%1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
br i1 %1, label %bb, label %bb1
@@ -16,17 +16,17 @@ bb: ; preds = %entry
bb1: ; preds = %bb, %entry
%x_addr.0 = phi i32 [ %2, %bb ], [ %x, %entry ] ; <i32> [#uses=1]
- %3 = tail call i8* @strchr(i8* %Q, i32 97) ; <i8*> [#uses=1]
- %4 = tail call i32 @strlen(i8* %P) ; <i32> [#uses=1]
+ %3 = tail call ptr @strchr(ptr %Q, i32 97) ; <ptr> [#uses=1]
+ %4 = tail call i32 @strlen(ptr %P) ; <i32> [#uses=1]
%5 = add i32 %x_addr.0, %0 ; <i32> [#uses=1]
%.sum = sub i32 %5, %4 ; <i32> [#uses=1]
- %6 = getelementptr i8, i8* %3, i32 %.sum ; <i8*> [#uses=1]
- ret i8* %6
+ %6 = getelementptr i8, ptr %3, i32 %.sum ; <ptr> [#uses=1]
+ ret ptr %6
}
-; CHECK: define i8* @test(i8* %P, i8* %Q, i32 %x, i32 %y) #0 {
+; CHECK: define ptr @test(ptr %P, ptr %Q, i32 %x, i32 %y) #0 {
; CHECK: entry:
-; CHECK-NEXT: %0 = tail call i32 @strlen(i8* %P)
+; CHECK-NEXT: %0 = tail call i32 @strlen(ptr %P)
; CHECK-NEXT: %1 = icmp eq i32 %0, 0
; CHECK-NEXT: br i1 %1, label %bb, label %bb1
; CHECK: bb:
@@ -34,12 +34,12 @@ bb1: ; preds = %bb, %entry
; CHECK-NEXT: br label %bb1
; CHECK: bb1:
; CHECK-NEXT: %x_addr.0 = phi i32 [ %2, %bb ], [ %x, %entry ]
-; CHECK-NEXT: %3 = tail call i8* @strchr(i8* %Q, i32 97)
+; CHECK-NEXT: %3 = tail call ptr @strchr(ptr %Q, i32 97)
; CHECK-NEXT: %4 = add i32 %x_addr.0, %0
-; CHECK-NEXT: %5 = getelementptr i8, i8* %3, i32 %x_addr.0
-; CHECK-NEXT: ret i8* %5
+; CHECK-NEXT: %5 = getelementptr i8, ptr %3, i32 %x_addr.0
+; CHECK-NEXT: ret ptr %5
; CHECK: }
-declare i32 @strlen(i8*) nounwind readonly
+declare i32 @strlen(ptr) nounwind readonly
-declare i8* @strchr(i8*, i32) nounwind readonly
+declare ptr @strchr(ptr, i32) nounwind readonly
diff --git a/llvm/test/Transforms/GVN/capture-tracking-limit.ll b/llvm/test/Transforms/GVN/capture-tracking-limit.ll
index a1f9e0da1d50c..8d0c742c9fbd7 100644
--- a/llvm/test/Transforms/GVN/capture-tracking-limit.ll
+++ b/llvm/test/Transforms/GVN/capture-tracking-limit.ll
@@ -3,62 +3,62 @@
; RUN: opt -aa-pipeline=basic-aa -passes="gvn" -S -capture-tracking-max-uses-to-explore=20 %s | FileCheck --check-prefixes=CHECK,LIMIT-TOO-SMALL %s
; RUN: opt -aa-pipeline=basic-aa -passes="gvn" -S -capture-tracking-max-uses-to-explore=21 %s | FileCheck --check-prefixes=CHECK,LIMIT %s
-define i32 @test1(i32* %p, i1 %C) {
+define i32 @test1(ptr %p, i1 %C) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: call void @dont_capture(i32* [[A]])
-; CHECK-NEXT: store i32 1, i32* [[A]], align 4
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: call void @dont_capture(ptr [[A]])
+; CHECK-NEXT: store i32 1, ptr [[A]], align 4
; CHECK-NEXT: call void @may_write()
-; LIMIT-TOO-SMALL-NEXT: [[L:%.*]] = load i32, i32* [[A]], align 4
+; LIMIT-TOO-SMALL-NEXT: [[L:%.*]] = load i32, ptr [[A]], align 4
; LIMIT-TOO-SMALL-NEXT: ret i32 [[L]]
; LIMIT-NEXT: ret i32 1
;
entry:
%a = alloca i32
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- call void @dont_capture(i32* %a)
- store i32 1, i32* %a
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ call void @dont_capture(ptr %a)
+ store i32 1, ptr %a
call void @may_write()
- %l = load i32, i32* %a
+ %l = load i32, ptr %a
ret i32 %l
}
-declare void @dont_capture(i32* nocapture)
+declare void @dont_capture(ptr nocapture)
declare void @may_write()
diff --git a/llvm/test/Transforms/GVN/cond_br.ll b/llvm/test/Transforms/GVN/cond_br.ll
index e815d152dd35d..19166d17a8320 100644
--- a/llvm/test/Transforms/GVN/cond_br.ll
+++ b/llvm/test/Transforms/GVN/cond_br.ll
@@ -5,11 +5,11 @@
; Function Attrs: nounwind ssp uwtable
define void @foo(i32 %x) {
; CHECK: @foo(i32 %x)
-; CHECK: %.pre = load i32, i32* @y
+; CHECK: %.pre = load i32, ptr @y
; CHECK: call void @bar(i32 %.pre)
%t = sub i32 %x, %x
- %.pre = load i32, i32* @y, align 4
+ %.pre = load i32, ptr @y, align 4
%cmp = icmp sgt i32 %t, 2
br i1 %cmp, label %if.then, label %entry.if.end_crit_edge
@@ -18,7 +18,7 @@ entry.if.end_crit_edge: ; preds = %entry
if.then: ; preds = %entry
%add = add nsw i32 %x, 3
- store i32 %add, i32* @y, align 4
+ store i32 %add, ptr @y, align 4
br label %if.end
if.end: ; preds = %entry.if.end_crit_edge, %if.then
@@ -29,21 +29,21 @@ if.end: ; preds = %entry.if.end_crit_e
define void @foo2(i32 %x) {
; CHECK: @foo2(i32 %x)
-; CHECK: %.pre = load i32, i32* @y
+; CHECK: %.pre = load i32, ptr @y
; CHECK: tail call void @bar(i32 %.pre)
entry:
%t = sub i32 %x, %x
- %.pre = load i32, i32* @y, align 4
+ %.pre = load i32, ptr @y, align 4
%cmp = icmp sgt i32 %t, 2
br i1 %cmp, label %if.then, label %if.else
if.then: ; preds = %entry
%add = add nsw i32 %x, 3
- store i32 %add, i32* @y, align 4
+ store i32 %add, ptr @y, align 4
br label %if.end
if.else: ; preds = %entry
- store i32 1, i32* @z, align 4
+ store i32 1, ptr @z, align 4
br label %if.end
if.end: ; preds = %if.else, %if.then
diff --git a/llvm/test/Transforms/GVN/cond_br2.ll b/llvm/test/Transforms/GVN/cond_br2.ll
index fa3227fc3408f..420246713882e 100644
--- a/llvm/test/Transforms/GVN/cond_br2.ll
+++ b/llvm/test/Transforms/GVN/cond_br2.ll
@@ -5,11 +5,11 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
%"class.llvm::SmallVectorImpl" = type { %"class.llvm::SmallVectorTemplateBase" }
%"class.llvm::SmallVectorTemplateBase" = type { %"class.llvm::SmallVectorTemplateCommon" }
%"class.llvm::SmallVectorTemplateCommon" = type { %"class.llvm::SmallVectorBase" }
-%"class.llvm::SmallVectorBase" = type { i8*, i8*, i8*, %"union.llvm::SmallVectorBase::U" }
+%"class.llvm::SmallVectorBase" = type { ptr, ptr, ptr, %"union.llvm::SmallVectorBase::U" }
%"union.llvm::SmallVectorBase::U" = type { x86_fp80 }
; Function Attrs: ssp uwtable
-define void @_Z4testv() #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @_Z4testv() #0 personality ptr @__gxx_personality_v0 {
; CHECK: @_Z4testv()
; CHECK: invoke.cont:
; CHECK: br i1 true, label %new.notnull.i11, label %if.end.i14
@@ -17,115 +17,107 @@ define void @_Z4testv() #0 personality i8* bitcast (i32 (...)* @__gxx_personalit
entry:
%sv = alloca %"class.llvm::SmallVector", align 16
- %0 = bitcast %"class.llvm::SmallVector"* %sv to i8*
- call void @llvm.lifetime.start.p0i8(i64 64, i8* %0) #1
- %BeginX.i.i.i.i.i.i = getelementptr inbounds %"class.llvm::SmallVector", %"class.llvm::SmallVector"* %sv, i64 0, i32 0, i32 0, i32 0, i32 0, i32 0
- %FirstEl.i.i.i.i.i.i = getelementptr inbounds %"class.llvm::SmallVector", %"class.llvm::SmallVector"* %sv, i64 0, i32 0, i32 0, i32 0, i32 0, i32 3
- %1 = bitcast %"union.llvm::SmallVectorBase::U"* %FirstEl.i.i.i.i.i.i to i8*
- store i8* %1, i8** %BeginX.i.i.i.i.i.i, align 16, !tbaa !4
- %EndX.i.i.i.i.i.i = getelementptr inbounds %"class.llvm::SmallVector", %"class.llvm::SmallVector"* %sv, i64 0, i32 0, i32 0, i32 0, i32 0, i32 1
- store i8* %1, i8** %EndX.i.i.i.i.i.i, align 8, !tbaa !4
- %CapacityX.i.i.i.i.i.i = getelementptr inbounds %"class.llvm::SmallVector", %"class.llvm::SmallVector"* %sv, i64 0, i32 0, i32 0, i32 0, i32 0, i32 2
- %add.ptr.i.i.i.i2.i.i = getelementptr inbounds %"union.llvm::SmallVectorBase::U", %"union.llvm::SmallVectorBase::U"* %FirstEl.i.i.i.i.i.i, i64 2
- %add.ptr.i.i.i.i.i.i = bitcast %"union.llvm::SmallVectorBase::U"* %add.ptr.i.i.i.i2.i.i to i8*
- store i8* %add.ptr.i.i.i.i.i.i, i8** %CapacityX.i.i.i.i.i.i, align 16, !tbaa !4
- %EndX.i = getelementptr inbounds %"class.llvm::SmallVector", %"class.llvm::SmallVector"* %sv, i64 0, i32 0, i32 0, i32 0, i32 0, i32 1
- %2 = load i8*, i8** %EndX.i, align 8, !tbaa !4
- %CapacityX.i = getelementptr inbounds %"class.llvm::SmallVector", %"class.llvm::SmallVector"* %sv, i64 0, i32 0, i32 0, i32 0, i32 0, i32 2
- %cmp.i = icmp ult i8* %2, %add.ptr.i.i.i.i.i.i
+ call void @llvm.lifetime.start.p0(i64 64, ptr %sv) #1
+ %FirstEl.i.i.i.i.i.i = getelementptr inbounds %"class.llvm::SmallVector", ptr %sv, i64 0, i32 0, i32 0, i32 0, i32 0, i32 3
+ store ptr %FirstEl.i.i.i.i.i.i, ptr %sv, align 16, !tbaa !4
+ %EndX.i.i.i.i.i.i = getelementptr inbounds %"class.llvm::SmallVector", ptr %sv, i64 0, i32 0, i32 0, i32 0, i32 0, i32 1
+ store ptr %FirstEl.i.i.i.i.i.i, ptr %EndX.i.i.i.i.i.i, align 8, !tbaa !4
+ %CapacityX.i.i.i.i.i.i = getelementptr inbounds %"class.llvm::SmallVector", ptr %sv, i64 0, i32 0, i32 0, i32 0, i32 0, i32 2
+ %add.ptr.i.i.i.i2.i.i = getelementptr inbounds %"union.llvm::SmallVectorBase::U", ptr %FirstEl.i.i.i.i.i.i, i64 2
+ store ptr %add.ptr.i.i.i.i2.i.i, ptr %CapacityX.i.i.i.i.i.i, align 16, !tbaa !4
+ %EndX.i = getelementptr inbounds %"class.llvm::SmallVector", ptr %sv, i64 0, i32 0, i32 0, i32 0, i32 0, i32 1
+ %0 = load ptr, ptr %EndX.i, align 8, !tbaa !4
+ %CapacityX.i = getelementptr inbounds %"class.llvm::SmallVector", ptr %sv, i64 0, i32 0, i32 0, i32 0, i32 0, i32 2
+ %cmp.i = icmp ult ptr %0, %add.ptr.i.i.i.i2.i.i
br i1 %cmp.i, label %Retry.i, label %if.end.i
Retry.i: ; preds = %.noexc, %entry
- %3 = phi i8* [ %2, %entry ], [ %.pre.i, %.noexc ]
- %new.isnull.i = icmp eq i8* %3, null
+ %1 = phi ptr [ %0, %entry ], [ %.pre.i, %.noexc ]
+ %new.isnull.i = icmp eq ptr %1, null
br i1 %new.isnull.i, label %invoke.cont, label %new.notnull.i
new.notnull.i: ; preds = %Retry.i
- %4 = bitcast i8* %3 to i32*
- store i32 1, i32* %4, align 4, !tbaa !5
+ store i32 1, ptr %1, align 4, !tbaa !5
br label %invoke.cont
if.end.i: ; preds = %entry
- %5 = getelementptr inbounds %"class.llvm::SmallVector", %"class.llvm::SmallVector"* %sv, i64 0, i32 0, i32 0, i32 0, i32 0
- invoke void @_ZN4llvm15SmallVectorBase8grow_podEmm(%"class.llvm::SmallVectorBase"* %5, i64 0, i64 4)
+ invoke void @_ZN4llvm15SmallVectorBase8grow_podEmm(ptr %sv, i64 0, i64 4)
to label %.noexc unwind label %lpad
.noexc: ; preds = %if.end.i
- %.pre.i = load i8*, i8** %EndX.i, align 8, !tbaa !4
+ %.pre.i = load ptr, ptr %EndX.i, align 8, !tbaa !4
br label %Retry.i
invoke.cont: ; preds = %new.notnull.i, %Retry.i
- %add.ptr.i = getelementptr inbounds i8, i8* %3, i64 4
- store i8* %add.ptr.i, i8** %EndX.i, align 8, !tbaa !4
- %6 = load i8*, i8** %CapacityX.i, align 16, !tbaa !4
- %cmp.i8 = icmp ult i8* %add.ptr.i, %6
+ %add.ptr.i = getelementptr inbounds i8, ptr %1, i64 4
+ store ptr %add.ptr.i, ptr %EndX.i, align 8, !tbaa !4
+ %2 = load ptr, ptr %CapacityX.i, align 16, !tbaa !4
+ %cmp.i8 = icmp ult ptr %add.ptr.i, %2
br i1 %cmp.i8, label %new.notnull.i11, label %if.end.i14
Retry.i10: ; preds = %if.end.i14
- %.pre.i13 = load i8*, i8** %EndX.i, align 8, !tbaa !4
- %new.isnull.i9 = icmp eq i8* %.pre.i13, null
+ %.pre.i13 = load ptr, ptr %EndX.i, align 8, !tbaa !4
+ %new.isnull.i9 = icmp eq ptr %.pre.i13, null
br i1 %new.isnull.i9, label %invoke.cont2, label %new.notnull.i11
new.notnull.i11: ; preds = %invoke.cont, %Retry.i10
- %7 = phi i8* [ %.pre.i13, %Retry.i10 ], [ %add.ptr.i, %invoke.cont ]
- %8 = bitcast i8* %7 to i32*
- store i32 2, i32* %8, align 4, !tbaa !5
+ %3 = phi ptr [ %.pre.i13, %Retry.i10 ], [ %add.ptr.i, %invoke.cont ]
+ store i32 2, ptr %3, align 4, !tbaa !5
br label %invoke.cont2
if.end.i14: ; preds = %invoke.cont
- %9 = getelementptr inbounds %"class.llvm::SmallVector", %"class.llvm::SmallVector"* %sv, i64 0, i32 0, i32 0, i32 0, i32 0
- invoke void @_ZN4llvm15SmallVectorBase8grow_podEmm(%"class.llvm::SmallVectorBase"* %9, i64 0, i64 4)
+ invoke void @_ZN4llvm15SmallVectorBase8grow_podEmm(ptr %sv, i64 0, i64 4)
to label %Retry.i10 unwind label %lpad
invoke.cont2: ; preds = %new.notnull.i11, %Retry.i10
- %10 = phi i8* [ null, %Retry.i10 ], [ %7, %new.notnull.i11 ]
- %add.ptr.i12 = getelementptr inbounds i8, i8* %10, i64 4
- store i8* %add.ptr.i12, i8** %EndX.i, align 8, !tbaa !4
- invoke void @_Z1gRN4llvm11SmallVectorIiLj8EEE(%"class.llvm::SmallVector"* %sv)
+ %4 = phi ptr [ null, %Retry.i10 ], [ %3, %new.notnull.i11 ]
+ %add.ptr.i12 = getelementptr inbounds i8, ptr %4, i64 4
+ store ptr %add.ptr.i12, ptr %EndX.i, align 8, !tbaa !4
+ invoke void @_Z1gRN4llvm11SmallVectorIiLj8EEE(ptr %sv)
to label %invoke.cont3 unwind label %lpad
invoke.cont3: ; preds = %invoke.cont2
- %11 = load i8*, i8** %BeginX.i.i.i.i.i.i, align 16, !tbaa !4
- %cmp.i.i.i.i19 = icmp eq i8* %11, %1
+ %5 = load ptr, ptr %sv, align 16, !tbaa !4
+ %cmp.i.i.i.i19 = icmp eq ptr %5, %FirstEl.i.i.i.i.i.i
br i1 %cmp.i.i.i.i19, label %_ZN4llvm11SmallVectorIiLj8EED1Ev.exit21, label %if.then.i.i.i20
if.then.i.i.i20: ; preds = %invoke.cont3
- call void @free(i8* %11) #1
+ call void @free(ptr %5) #1
br label %_ZN4llvm11SmallVectorIiLj8EED1Ev.exit21
_ZN4llvm11SmallVectorIiLj8EED1Ev.exit21: ; preds = %invoke.cont3, %if.then.i.i.i20
- call void @llvm.lifetime.end.p0i8(i64 64, i8* %0) #1
+ call void @llvm.lifetime.end.p0(i64 64, ptr %sv) #1
ret void
lpad: ; preds = %if.end.i14, %if.end.i, %invoke.cont2
- %12 = landingpad { i8*, i32 }
+ %6 = landingpad { ptr, i32 }
cleanup
- %13 = load i8*, i8** %BeginX.i.i.i.i.i.i, align 16, !tbaa !4
- %cmp.i.i.i.i = icmp eq i8* %13, %1
+ %7 = load ptr, ptr %sv, align 16, !tbaa !4
+ %cmp.i.i.i.i = icmp eq ptr %7, %FirstEl.i.i.i.i.i.i
br i1 %cmp.i.i.i.i, label %eh.resume, label %if.then.i.i.i
if.then.i.i.i: ; preds = %lpad
- call void @free(i8* %13) #1
+ call void @free(ptr %7) #1
br label %eh.resume
eh.resume: ; preds = %if.then.i.i.i, %lpad
- resume { i8*, i32 } %12
+ resume { ptr, i32 } %6
}
; Function Attrs: nounwind
-declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64, ptr nocapture) #1
declare i32 @__gxx_personality_v0(...)
-declare void @_Z1gRN4llvm11SmallVectorIiLj8EEE(%"class.llvm::SmallVector"*) #2
+declare void @_Z1gRN4llvm11SmallVectorIiLj8EEE(ptr) #2
; Function Attrs: nounwind
-declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64, ptr nocapture) #1
-declare void @_ZN4llvm15SmallVectorBase8grow_podEmm(%"class.llvm::SmallVectorBase"*, i64, i64) #2
+declare void @_ZN4llvm15SmallVectorBase8grow_podEmm(ptr, i64, i64) #2
; Function Attrs: nounwind
-declare void @free(i8* nocapture) #3
+declare void @free(ptr nocapture) #3
attributes #0 = { ssp uwtable "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind }
diff --git a/llvm/test/Transforms/GVN/condprop.ll b/llvm/test/Transforms/GVN/condprop.ll
index 2aa67f46db29f..0269e1a95a1bd 100644
--- a/llvm/test/Transforms/GVN/condprop.ll
+++ b/llvm/test/Transforms/GVN/condprop.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=gvn -S | FileCheck %s
- at a = external global i32 ; <i32*> [#uses=7]
+ at a = external global i32 ; <ptr> [#uses=7]
define i32 @test1() nounwind {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 4
; CHECK-NEXT: br i1 [[TMP1]], label [[BB:%.*]], label [[BB1:%.*]]
; CHECK: bb:
@@ -19,13 +19,13 @@ define i32 @test1() nounwind {
; CHECK: bb3:
; CHECK-NEXT: br i1 false, label [[BB4:%.*]], label [[BB5:%.*]]
; CHECK: bb4:
-; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr @a, align 4
; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], 5
; CHECK-NEXT: br label [[BB8]]
; CHECK: bb5:
; CHECK-NEXT: br i1 false, label [[BB6:%.*]], label [[BB7:%.*]]
; CHECK: bb6:
-; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* @a, align 4
+; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr @a, align 4
; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], 4
; CHECK-NEXT: br label [[BB8]]
; CHECK: bb7:
@@ -35,7 +35,7 @@ define i32 @test1() nounwind {
; CHECK-NEXT: ret i32 [[DOT0]]
;
entry:
- %0 = load i32, i32* @a, align 4
+ %0 = load i32, ptr @a, align 4
%1 = icmp eq i32 %0, 4
br i1 %1, label %bb, label %bb1
@@ -43,7 +43,7 @@ bb: ; preds = %entry
br label %bb8
bb1: ; preds = %entry
- %2 = load i32, i32* @a, align 4
+ %2 = load i32, ptr @a, align 4
%3 = icmp eq i32 %2, 5
br i1 %3, label %bb2, label %bb3
@@ -51,27 +51,27 @@ bb2: ; preds = %bb1
br label %bb8
bb3: ; preds = %bb1
- %4 = load i32, i32* @a, align 4
+ %4 = load i32, ptr @a, align 4
%5 = icmp eq i32 %4, 4
br i1 %5, label %bb4, label %bb5
bb4: ; preds = %bb3
- %6 = load i32, i32* @a, align 4
+ %6 = load i32, ptr @a, align 4
%7 = add i32 %6, 5
br label %bb8
bb5: ; preds = %bb3
- %8 = load i32, i32* @a, align 4
+ %8 = load i32, ptr @a, align 4
%9 = icmp eq i32 %8, 5
br i1 %9, label %bb6, label %bb7
bb6: ; preds = %bb5
- %10 = load i32, i32* @a, align 4
+ %10 = load i32, ptr @a, align 4
%11 = add i32 %10, 4
br label %bb8
bb7: ; preds = %bb5
- %12 = load i32, i32* @a, align 4
+ %12 = load i32, ptr @a, align 4
br label %bb8
bb8: ; preds = %bb7, %bb6, %bb4, %bb2, %bb
@@ -515,101 +515,101 @@ ret:
; On the path from entry->if->end we know that ptr1==ptr2, so we can determine
; that gep2 does not alias ptr1 on that path (as it would require that
; ptr2==ptr2+2), so we can perform PRE of the load.
-define i32 @test13(i32* %ptr1, i32* %ptr2) {
+define i32 @test13(ptr %ptr1, ptr %ptr2) {
; CHECK-LABEL: @test13(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i32, i32* [[PTR2:%.*]], i32 1
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i32, i32* [[PTR2]], i32 2
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* [[PTR1:%.*]], [[PTR2]]
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i32, ptr [[PTR2:%.*]], i32 1
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i32, ptr [[PTR2]], i32 2
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq ptr [[PTR1:%.*]], [[PTR2]]
; CHECK-NEXT: br i1 [[CMP]], label [[IF:%.*]], label [[ENTRY_END_CRIT_EDGE:%.*]]
; CHECK: entry.end_crit_edge:
-; CHECK-NEXT: [[VAL2_PRE:%.*]] = load i32, i32* [[GEP2]], align 4
+; CHECK-NEXT: [[VAL2_PRE:%.*]] = load i32, ptr [[GEP2]], align 4
; CHECK-NEXT: br label [[END:%.*]]
; CHECK: if:
-; CHECK-NEXT: [[VAL1:%.*]] = load i32, i32* [[GEP2]], align 4
+; CHECK-NEXT: [[VAL1:%.*]] = load i32, ptr [[GEP2]], align 4
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: [[VAL2:%.*]] = phi i32 [ [[VAL1]], [[IF]] ], [ [[VAL2_PRE]], [[ENTRY_END_CRIT_EDGE]] ]
-; CHECK-NEXT: [[PHI1:%.*]] = phi i32* [ [[PTR2]], [[IF]] ], [ [[GEP1]], [[ENTRY_END_CRIT_EDGE]] ]
+; CHECK-NEXT: [[PHI1:%.*]] = phi ptr [ [[PTR2]], [[IF]] ], [ [[GEP1]], [[ENTRY_END_CRIT_EDGE]] ]
; CHECK-NEXT: [[PHI2:%.*]] = phi i32 [ [[VAL1]], [[IF]] ], [ 0, [[ENTRY_END_CRIT_EDGE]] ]
-; CHECK-NEXT: store i32 0, i32* [[PHI1]], align 4
+; CHECK-NEXT: store i32 0, ptr [[PHI1]], align 4
; CHECK-NEXT: [[RET:%.*]] = add i32 [[PHI2]], [[VAL2]]
; CHECK-NEXT: ret i32 [[RET]]
;
entry:
- %gep1 = getelementptr i32, i32* %ptr2, i32 1
- %gep2 = getelementptr i32, i32* %ptr2, i32 2
- %cmp = icmp eq i32* %ptr1, %ptr2
+ %gep1 = getelementptr i32, ptr %ptr2, i32 1
+ %gep2 = getelementptr i32, ptr %ptr2, i32 2
+ %cmp = icmp eq ptr %ptr1, %ptr2
br i1 %cmp, label %if, label %end
if:
- %val1 = load i32, i32* %gep2, align 4
+ %val1 = load i32, ptr %gep2, align 4
br label %end
end:
- %phi1 = phi i32* [ %ptr1, %if ], [ %gep1, %entry ]
+ %phi1 = phi ptr [ %ptr1, %if ], [ %gep1, %entry ]
%phi2 = phi i32 [ %val1, %if ], [ 0, %entry ]
- store i32 0, i32* %phi1, align 4
- %val2 = load i32, i32* %gep2, align 4
+ store i32 0, ptr %phi1, align 4
+ %val2 = load i32, ptr %gep2, align 4
%ret = add i32 %phi2, %val2
ret i32 %ret
}
-define void @test14(i32* %ptr1, i32* noalias %ptr2) {
+define void @test14(ptr %ptr1, ptr noalias %ptr2) {
; CHECK-LABEL: @test14(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i32, i32* [[PTR1:%.*]], i32 1
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, i32* [[PTR1]], i32 2
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i32, ptr [[PTR1:%.*]], i32 1
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, ptr [[PTR1]], i32 2
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: br i1 undef, label [[LOOP_IF1_CRIT_EDGE:%.*]], label [[THEN:%.*]]
; CHECK: loop.if1_crit_edge:
-; CHECK-NEXT: [[VAL2_PRE:%.*]] = load i32, i32* [[GEP2]], align 4
+; CHECK-NEXT: [[VAL2_PRE:%.*]] = load i32, ptr [[GEP2]], align 4
; CHECK-NEXT: br label [[IF1:%.*]]
; CHECK: if1:
; CHECK-NEXT: [[VAL2:%.*]] = phi i32 [ [[VAL2_PRE]], [[LOOP_IF1_CRIT_EDGE]] ], [ [[VAL3:%.*]], [[LOOP_END:%.*]] ]
-; CHECK-NEXT: store i32 [[VAL2]], i32* [[GEP2]], align 4
-; CHECK-NEXT: store i32 0, i32* [[GEP1]], align 4
+; CHECK-NEXT: store i32 [[VAL2]], ptr [[GEP2]], align 4
+; CHECK-NEXT: store i32 0, ptr [[GEP1]], align 4
; CHECK-NEXT: br label [[THEN]]
; CHECK: then:
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* [[GEP2]], [[PTR2:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq ptr [[GEP2]], [[PTR2:%.*]]
; CHECK-NEXT: br i1 [[CMP]], label [[LOOP_END]], label [[IF2:%.*]]
; CHECK: if2:
; CHECK-NEXT: br label [[LOOP_END]]
; CHECK: loop.end:
-; CHECK-NEXT: [[PHI3:%.*]] = phi i32* [ [[PTR2]], [[THEN]] ], [ [[PTR1]], [[IF2]] ]
-; CHECK-NEXT: [[VAL3]] = load i32, i32* [[GEP2]], align 4
-; CHECK-NEXT: store i32 [[VAL3]], i32* [[PHI3]], align 4
+; CHECK-NEXT: [[PHI3:%.*]] = phi ptr [ [[PTR2]], [[THEN]] ], [ [[PTR1]], [[IF2]] ]
+; CHECK-NEXT: [[VAL3]] = load i32, ptr [[GEP2]], align 4
+; CHECK-NEXT: store i32 [[VAL3]], ptr [[PHI3]], align 4
; CHECK-NEXT: br i1 undef, label [[LOOP]], label [[IF1]]
;
entry:
- %gep1 = getelementptr inbounds i32, i32* %ptr1, i32 1
- %gep2 = getelementptr inbounds i32, i32* %ptr1, i32 2
+ %gep1 = getelementptr inbounds i32, ptr %ptr1, i32 1
+ %gep2 = getelementptr inbounds i32, ptr %ptr1, i32 2
br label %loop
loop:
- %phi1 = phi i32* [ %gep3, %loop.end ], [ %gep1, %entry ]
+ %phi1 = phi ptr [ %gep3, %loop.end ], [ %gep1, %entry ]
br i1 undef, label %if1, label %then
if1:
- %val2 = load i32, i32* %gep2, align 4
- store i32 %val2, i32* %gep2, align 4
- store i32 0, i32* %phi1, align 4
+ %val2 = load i32, ptr %gep2, align 4
+ store i32 %val2, ptr %gep2, align 4
+ store i32 0, ptr %phi1, align 4
br label %then
then:
- %cmp = icmp eq i32* %gep2, %ptr2
+ %cmp = icmp eq ptr %gep2, %ptr2
br i1 %cmp, label %loop.end, label %if2
if2:
br label %loop.end
loop.end:
- %phi3 = phi i32* [ %gep2, %then ], [ %ptr1, %if2 ]
- %val3 = load i32, i32* %gep2, align 4
- store i32 %val3, i32* %phi3, align 4
- %gep3 = getelementptr inbounds i32, i32* %ptr1, i32 1
+ %phi3 = phi ptr [ %gep2, %then ], [ %ptr1, %if2 ]
+ %val3 = load i32, ptr %gep2, align 4
+ store i32 %val3, ptr %phi3, align 4
+ %gep3 = getelementptr inbounds i32, ptr %ptr1, i32 1
br i1 undef, label %loop, label %if1
}
diff --git a/llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash-inseltpoison.ll b/llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash-inseltpoison.ll
index bcec10cb5e0fe..fb2133182503a 100644
--- a/llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash-inseltpoison.ll
+++ b/llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash-inseltpoison.ll
@@ -5,21 +5,21 @@
; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=24278
; Make sure we do not crash when dealing with a vector constant expression.
-define <4 x i64*> @test(i64* %ptr) {
+define <4 x ptr> @test(ptr %ptr) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[L3:%.*]] = load i64, i64* [[PTR:%.*]], align 4
-; CHECK-NEXT: [[I6:%.*]] = insertelement <4 x i64*> getelementptr (i64, i64* null, <4 x i64> <i64 poison, i64 poison, i64 poison, i64 -128>), i64* undef, i64 [[L3]]
-; CHECK-NEXT: ret <4 x i64*> [[I6]]
+; CHECK-NEXT: [[L3:%.*]] = load i64, ptr [[PTR:%.*]], align 4
+; CHECK-NEXT: [[I6:%.*]] = insertelement <4 x ptr> getelementptr (i64, ptr null, <4 x i64> <i64 poison, i64 poison, i64 poison, i64 -128>), ptr undef, i64 [[L3]]
+; CHECK-NEXT: ret <4 x ptr> [[I6]]
;
entry:
%B9 = sdiv i16 -32768, 256
- %L3 = load i64, i64* %ptr, align 4
+ %L3 = load i64, ptr %ptr, align 4
%B3 = sub i16 0, %B9
%0 = insertelement <4 x i16> poison, i16 %B3, i32 3
%1 = sub <4 x i16> zeroinitializer, %0
%2 = sext <4 x i16> %1 to <4 x i32>
- %3 = getelementptr inbounds i64, i64* null, <4 x i32> %2
- %I6 = insertelement <4 x i64*> %3, i64* undef, i64 %L3
- ret <4 x i64*> %I6
+ %3 = getelementptr inbounds i64, ptr null, <4 x i32> %2
+ %I6 = insertelement <4 x ptr> %3, ptr undef, i64 %L3
+ ret <4 x ptr> %I6
}
diff --git a/llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash.ll b/llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash.ll
index b042346582f6d..276008f6348a3 100644
--- a/llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash.ll
+++ b/llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash.ll
@@ -5,19 +5,19 @@
; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=24278
; Make sure we do not crash when dealing with a vector constant expression.
-define <4 x i64*> @test(i64* %ptr) {
+define <4 x ptr> @test(ptr %ptr) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
-; CHECK-NEXT: ret <4 x i64*> getelementptr (i64, i64* null, <4 x i64> <i64 0, i64 0, i64 0, i64 -128>)
+; CHECK-NEXT: ret <4 x ptr> getelementptr (i64, ptr null, <4 x i64> <i64 0, i64 0, i64 0, i64 -128>)
;
entry:
%B9 = sdiv i16 -32768, 256
- %L3 = load i64, i64* %ptr, align 4
+ %L3 = load i64, ptr %ptr, align 4
%B3 = sub i16 0, %B9
%0 = insertelement <4 x i16> undef, i16 %B3, i32 3
%1 = sub <4 x i16> zeroinitializer, %0
%2 = sext <4 x i16> %1 to <4 x i32>
- %3 = getelementptr inbounds i64, i64* null, <4 x i32> %2
- %I6 = insertelement <4 x i64*> %3, i64* undef, i64 %L3
- ret <4 x i64*> %I6
+ %3 = getelementptr inbounds i64, ptr null, <4 x i32> %2
+ %I6 = insertelement <4 x ptr> %3, ptr undef, i64 %L3
+ ret <4 x ptr> %I6
}
diff --git a/llvm/test/Transforms/GVN/crash-no-aa.ll b/llvm/test/Transforms/GVN/crash-no-aa.ll
index 9619c8456e2d4..10e63743858b8 100644
--- a/llvm/test/Transforms/GVN/crash-no-aa.ll
+++ b/llvm/test/Transforms/GVN/crash-no-aa.ll
@@ -4,12 +4,12 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
target triple = "x86_64-unknown-freebsd8.0"
; PR5744
-define i32 @test1({i16, i32} *%P) {
- %P2 = getelementptr {i16, i32}, {i16, i32} *%P, i32 0, i32 0
- store i16 42, i16* %P2
+define i32 @test1(ptr %P) {
+ %P2 = getelementptr {i16, i32}, ptr %P, i32 0, i32 0
+ store i16 42, ptr %P2
- %P3 = getelementptr {i16, i32}, {i16, i32} *%P, i32 0, i32 1
- %V = load i32, i32* %P3
+ %P3 = getelementptr {i16, i32}, ptr %P, i32 0, i32 1
+ %V = load i32, ptr %P3
ret i32 %V
}
diff --git a/llvm/test/Transforms/GVN/crash.ll b/llvm/test/Transforms/GVN/crash.ll
index ce72cd2a738a7..c6419e477dbae 100644
--- a/llvm/test/Transforms/GVN/crash.ll
+++ b/llvm/test/Transforms/GVN/crash.ll
@@ -5,7 +5,7 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0"
-define i32* @test1(i8* %name, i32 %namelen, i32* %o, i32 %expected_type) nounwind ssp {
+define ptr @test1(ptr %name, i32 %namelen, ptr %o, i32 %expected_type) nounwind ssp {
entry:
br i1 undef, label %if.end13, label %while.body.preheader
@@ -17,28 +17,26 @@ while.body.preheader: ; preds = %if.end13, %if.end
br label %while.body
while.body: ; preds = %while.body.backedge, %while.body.preheader
- %o.addr.0 = phi i32* [ undef, %while.body.preheader ], [ %o.addr.0.be, %while.body.backedge ] ; <i32*> [#uses=2]
+ %o.addr.0 = phi ptr [ undef, %while.body.preheader ], [ %o.addr.0.be, %while.body.backedge ] ; <ptr> [#uses=2]
br i1 false, label %return.loopexit, label %lor.lhs.false
lor.lhs.false: ; preds = %while.body
- %tmp20 = bitcast i32* %o.addr.0 to i32* ; <i32*> [#uses=1]
- %tmp22 = load i32, i32* %tmp20 ; <i32> [#uses=0]
+ %tmp22 = load i32, ptr %o.addr.0 ; <i32> [#uses=0]
br i1 undef, label %land.lhs.true24, label %if.end31
land.lhs.true24: ; preds = %lor.lhs.false
- %call28 = call i32* @parse_object(i8* undef) nounwind ; <i32*> [#uses=0]
+ %call28 = call ptr @parse_object(ptr undef) nounwind ; <ptr> [#uses=0]
br i1 undef, label %return.loopexit, label %if.end31
if.end31: ; preds = %land.lhs.true24, %lor.lhs.false
br i1 undef, label %return.loopexit, label %if.end41
if.end41: ; preds = %if.end31
- %tmp43 = bitcast i32* %o.addr.0 to i32* ; <i32*> [#uses=1]
- %tmp45 = load i32, i32* %tmp43 ; <i32> [#uses=0]
+ %tmp45 = load i32, ptr %o.addr.0 ; <i32> [#uses=0]
br i1 undef, label %if.then50, label %if.else
if.then50: ; preds = %if.end41
- %tmp53 = load i32*, i32** undef ; <i32*> [#uses=1]
+ %tmp53 = load ptr, ptr undef ; <ptr> [#uses=1]
br label %while.body.backedge
if.else: ; preds = %if.end41
@@ -48,42 +46,42 @@ if.then62: ; preds = %if.else
br label %while.body.backedge
while.body.backedge: ; preds = %if.then62, %if.then50
- %o.addr.0.be = phi i32* [ %tmp53, %if.then50 ], [ undef, %if.then62 ] ; <i32*> [#uses=1]
+ %o.addr.0.be = phi ptr [ %tmp53, %if.then50 ], [ undef, %if.then62 ] ; <ptr> [#uses=1]
br label %while.body
if.else67: ; preds = %if.else
- ret i32* null
+ ret ptr null
return.loopexit: ; preds = %if.end31, %land.lhs.true24, %while.body
- ret i32* undef
+ ret ptr undef
}
-declare i32* @parse_object(i8*)
+declare ptr @parse_object(ptr)
-%struct.attribute_spec = type { i8*, i32, i32, i8, i8, i8 }
+%struct.attribute_spec = type { ptr, i32, i32, i8, i8, i8 }
- at attribute_tables = external global [4 x %struct.attribute_spec*] ; <[4 x %struct.attribute_spec*]*> [#uses=2]
+ at attribute_tables = external global [4 x ptr] ; <ptr> [#uses=2]
define void @test2() nounwind {
entry:
br label %bb69.i
bb69.i: ; preds = %bb57.i.preheader
- %tmp4 = getelementptr inbounds [4 x %struct.attribute_spec*], [4 x %struct.attribute_spec*]* @attribute_tables, i32 0, i32 undef ; <%struct.attribute_spec**> [#uses=1]
- %tmp3 = load %struct.attribute_spec*, %struct.attribute_spec** %tmp4, align 4 ; <%struct.attribute_spec*> [#uses=1]
+ %tmp4 = getelementptr inbounds [4 x ptr], ptr @attribute_tables, i32 0, i32 undef ; <ptr> [#uses=1]
+ %tmp3 = load ptr, ptr %tmp4, align 4 ; <ptr> [#uses=1]
br label %bb65.i
bb65.i: ; preds = %bb65.i.preheader, %bb64.i
%storemerge6.i = phi i32 [ 1, %bb64.i ], [ 0, %bb69.i ] ; <i32> [#uses=3]
- %scevgep14 = getelementptr inbounds %struct.attribute_spec, %struct.attribute_spec* %tmp3, i32 %storemerge6.i, i32 0 ; <i8**> [#uses=1]
- %tmp2 = load i8*, i8** %scevgep14, align 4 ; <i8*> [#uses=0]
- %tmp = load %struct.attribute_spec*, %struct.attribute_spec** %tmp4, align 4 ; <%struct.attribute_spec*> [#uses=1]
- %scevgep1516 = getelementptr inbounds %struct.attribute_spec, %struct.attribute_spec* %tmp, i32 %storemerge6.i, i32 0 ; <i8**> [#uses=0]
+ %scevgep14 = getelementptr inbounds %struct.attribute_spec, ptr %tmp3, i32 %storemerge6.i, i32 0 ; <ptr> [#uses=1]
+ %tmp2 = load ptr, ptr %scevgep14, align 4 ; <ptr> [#uses=0]
+ %tmp = load ptr, ptr %tmp4, align 4 ; <ptr> [#uses=1]
+ %scevgep1516 = getelementptr inbounds %struct.attribute_spec, ptr %tmp, i32 %storemerge6.i, i32 0 ; <ptr> [#uses=0]
unreachable
bb64.i: ; Unreachable
@@ -99,23 +97,19 @@ bb66.i: ; Unreachable
@g = external global i64, align 8
-define i32* @test3() {
+define ptr @test3() {
do.end17.i:
- %tmp18.i = load i7*, i7** undef
- %tmp1 = bitcast i7* %tmp18.i to i8*
+ %tmp18.i = load ptr, ptr undef
br i1 undef, label %do.body36.i, label %if.then21.i
if.then21.i:
- %tmp2 = bitcast i7* %tmp18.i to i8*
- ret i32* undef
+ ret ptr undef
do.body36.i:
- %ivar38.i = load i64, i64* @g
- %tmp3 = bitcast i7* %tmp18.i to i8*
+ %ivar38.i = load i64, ptr @g
%add.ptr39.sum.i = add i64 %ivar38.i, 8
- %tmp40.i = getelementptr inbounds i8, i8* %tmp3, i64 %add.ptr39.sum.i
- %tmp4 = bitcast i8* %tmp40.i to i64*
- %tmp41.i = load i64, i64* %tmp4
+ %tmp40.i = getelementptr inbounds i8, ptr %tmp18.i, i64 %add.ptr39.sum.i
+ %tmp41.i = load i64, ptr %tmp40.i
br i1 undef, label %if.then48.i, label %do.body57.i
if.then48.i:
@@ -123,14 +117,12 @@ if.then48.i:
br label %do.body57.i
do.body57.i:
- %tmp58.i = load i7*, i7** undef
- %ivar59.i = load i64, i64* @g
- %tmp5 = bitcast i7* %tmp58.i to i8*
+ %tmp58.i = load ptr, ptr undef
+ %ivar59.i = load i64, ptr @g
%add.ptr65.sum.i = add i64 %ivar59.i, 8
- %tmp66.i = getelementptr inbounds i8, i8* %tmp5, i64 %add.ptr65.sum.i
- %tmp6 = bitcast i8* %tmp66.i to i64*
- %tmp67.i = load i64, i64* %tmp6
- ret i32* undef
+ %tmp66.i = getelementptr inbounds i8, ptr %tmp58.i, i64 %add.ptr65.sum.i
+ %tmp67.i = load i64, ptr %tmp66.i
+ ret ptr undef
}
declare i32 @foo2()
@@ -142,10 +134,10 @@ entry:
ret i32 0
dead:
- %P2 = getelementptr i32, i32 *%P2, i32 52
- %Q2 = getelementptr i32, i32 *%Q2, i32 52
- store i32 4, i32* %P2
- %A = load i32, i32* %Q2
+ %P2 = getelementptr i32, ptr %P2, i32 52
+ %Q2 = getelementptr i32, ptr %Q2, i32 52
+ store i32 4, ptr %P2
+ %A = load i32, ptr %Q2
br i1 true, label %dead, label %dead2
dead2:
@@ -154,12 +146,12 @@ dead2:
; PR9841
-define fastcc i8 @test5(i8* %P) nounwind {
+define fastcc i8 @test5(ptr %P) nounwind {
entry:
- %0 = load i8, i8* %P, align 2
+ %0 = load i8, ptr %P, align 2
- %Q = getelementptr i8, i8* %P, i32 1
- %1 = load i8, i8* %Q, align 1
+ %Q = getelementptr i8, ptr %P, i32 1
+ %1 = load i8, ptr %Q, align 1
ret i8 %1
}
@@ -178,16 +170,15 @@ entry:
;; Unreachable code.
unreachable.bb:
- %gep.val = getelementptr inbounds %struct.type, %struct.type* %gep.val, i64 1
+ %gep.val = getelementptr inbounds %struct.type, ptr %gep.val, i64 1
br i1 undef, label %u2.bb, label %u1.bb
u1.bb:
- %tmp1 = getelementptr inbounds %struct.type, %struct.type* %gep.val, i64 0, i32 0
- store i64 -1, i64* %tmp1, align 8
+ store i64 -1, ptr %gep.val, align 8
br label %unreachable.bb
u2.bb:
- %0 = load i32, i32* undef, align 4
+ %0 = load i32, ptr undef, align 4
%conv.i.i.i.i.i = zext i32 %0 to i64
br label %u2.bb
diff --git a/llvm/test/Transforms/GVN/critical-edge-split-failure.ll b/llvm/test/Transforms/GVN/critical-edge-split-failure.ll
index 2207c41eb9e2f..8eac5fef25a5f 100644
--- a/llvm/test/Transforms/GVN/critical-edge-split-failure.ll
+++ b/llvm/test/Transforms/GVN/critical-edge-split-failure.ll
@@ -3,7 +3,7 @@
%struct.sk_buff = type opaque
@l2tp_recv_dequeue_session = external dso_local local_unnamed_addr global i32, align 4
- at l2tp_recv_dequeue_skb = external dso_local local_unnamed_addr global %struct.sk_buff*, align 8
+ at l2tp_recv_dequeue_skb = external dso_local local_unnamed_addr global ptr, align 8
@l2tp_recv_dequeue_session_2 = external dso_local local_unnamed_addr global i32, align 4
@l2tp_recv_dequeue_session_0 = external dso_local local_unnamed_addr global i32, align 4
@@ -11,22 +11,21 @@ declare void @llvm.assume(i1 noundef)
define dso_local void @l2tp_recv_dequeue() local_unnamed_addr {
entry:
- %0 = load i32, i32* @l2tp_recv_dequeue_session, align 4
+ %0 = load i32, ptr @l2tp_recv_dequeue_session, align 4
%conv = sext i32 %0 to i64
- %1 = inttoptr i64 %conv to %struct.sk_buff*
- %2 = load i32, i32* @l2tp_recv_dequeue_session_2, align 4
+ %1 = inttoptr i64 %conv to ptr
+ %2 = load i32, ptr @l2tp_recv_dequeue_session_2, align 4
%tobool.not = icmp eq i32 %2, 0
br label %for.cond
for.cond: ; preds = %if.end, %entry
- %storemerge = phi %struct.sk_buff* [ %1, %entry ], [ null, %if.end ]
- store %struct.sk_buff* %storemerge, %struct.sk_buff** @l2tp_recv_dequeue_skb, align 8
+ %storemerge = phi ptr [ %1, %entry ], [ null, %if.end ]
+ store ptr %storemerge, ptr @l2tp_recv_dequeue_skb, align 8
br i1 %tobool.not, label %if.end, label %if.then
if.then: ; preds = %for.cond
- %ns = bitcast %struct.sk_buff* %storemerge to i32*
- %3 = load i32, i32* %ns, align 4
- store i32 %3, i32* @l2tp_recv_dequeue_session_0, align 4
+ %3 = load i32, ptr %storemerge, align 4
+ store i32 %3, ptr @l2tp_recv_dequeue_session_0, align 4
; Splitting the critical edge from if.then to if.end will fail, but should not
; cause an infinite loop in GVN. If we can one day split edges of callbr
; indirect targets, great!
@@ -39,8 +38,7 @@ asm.fallthrough.i: ; preds = %if.then
br label %if.end
if.end: ; preds = %asm.fallthrough.i, %if.then, %for.cond
- %ns1 = bitcast %struct.sk_buff* %storemerge to i32*
- %4 = load i32, i32* %ns1, align 4
+ %4 = load i32, ptr %storemerge, align 4
%tobool2.not = icmp eq i32 %4, 0
tail call void @llvm.assume(i1 %tobool2.not)
br label %for.cond
diff --git a/llvm/test/Transforms/GVN/critical-edge-split-indbr-pred-in-loop.ll b/llvm/test/Transforms/GVN/critical-edge-split-indbr-pred-in-loop.ll
index 35bac648cbad2..b64506652e49f 100644
--- a/llvm/test/Transforms/GVN/critical-edge-split-indbr-pred-in-loop.ll
+++ b/llvm/test/Transforms/GVN/critical-edge-split-indbr-pred-in-loop.ll
@@ -6,21 +6,21 @@
declare i1 @cond()
-define i32 @foo(i8* %p1, i8* %p2, i32* %p3) {
+define i32 @foo(ptr %p1, ptr %p2, ptr %p3) {
; CHECK-LABEL: @foo(
; CHECK-NEXT: bb:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
-; CHECK-NEXT: store i32 0, i32* [[P3:%.*]], align 4
-; CHECK-NEXT: indirectbr i8* [[P1:%.*]], [label [[LOOP_LATCH1:%.*]], label %loop.latch2]
+; CHECK-NEXT: store i32 0, ptr [[P3:%.*]], align 4
+; CHECK-NEXT: indirectbr ptr [[P1:%.*]], [label [[LOOP_LATCH1:%.*]], label %loop.latch2]
; CHECK: loop.latch1:
; CHECK-NEXT: [[C:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[LOOP_LATCH1_EXIT_CRIT_EDGE:%.*]]
; CHECK: loop.latch1.exit_crit_edge:
-; CHECK-NEXT: [[X_PRE:%.*]] = load i32, i32* [[P3]], align 4
+; CHECK-NEXT: [[X_PRE:%.*]] = load i32, ptr [[P3]], align 4
; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: loop.latch2:
-; CHECK-NEXT: indirectbr i8* [[P2:%.*]], [label [[LOOP_HEADER]], label %exit]
+; CHECK-NEXT: indirectbr ptr [[P2:%.*]], [label [[LOOP_HEADER]], label %exit]
; CHECK: exit:
; CHECK-NEXT: [[X:%.*]] = phi i32 [ [[X_PRE]], [[LOOP_LATCH1_EXIT_CRIT_EDGE]] ], [ 0, [[LOOP_LATCH2:%.*]] ]
; CHECK-NEXT: ret i32 [[X]]
@@ -29,18 +29,18 @@ bb:
br label %loop.header
loop.header: ; preds = %loop.latch2, %loop.latch1, %bb
- store i32 0, i32* %p3, align 4
- indirectbr i8* %p1, [label %loop.latch1, label %loop.latch2]
+ store i32 0, ptr %p3, align 4
+ indirectbr ptr %p1, [label %loop.latch1, label %loop.latch2]
loop.latch1: ; preds = %loop.header
%c = call i1 @cond()
br i1 %c, label %loop.header, label %exit
loop.latch2: ; preds = %loop.header
- indirectbr i8* %p2, [label %loop.header, label %exit]
+ indirectbr ptr %p2, [label %loop.header, label %exit]
exit: ; preds = %loop.latch2, %loop.latch1
- %x = load i32, i32* %p3, align 4
+ %x = load i32, ptr %p3, align 4
%y = add i32 %x, 0
ret i32 %y
}
diff --git a/llvm/test/Transforms/GVN/dbg-redundant-load.ll b/llvm/test/Transforms/GVN/dbg-redundant-load.ll
index 559220f220581..1ba4e8b73dcac 100644
--- a/llvm/test/Transforms/GVN/dbg-redundant-load.ll
+++ b/llvm/test/Transforms/GVN/dbg-redundant-load.ll
@@ -8,20 +8,20 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
; CHECK: @test_redundant_load(
; CHECK-LABEL: entry:
-; CHECK-NEXT: load i32, i32* %Y, align 4, !dbg ![[LOC:[0-9]+]]
+; CHECK-NEXT: load i32, ptr %Y, align 4, !dbg ![[LOC:[0-9]+]]
; CHECK-LABEL: if.then:
; CHECK-NOT: load
; CHECK-LABEL: if.end:
; CHECK: ![[LOC]] = !DILocation(line: 3, scope: !{{.*}})
-define i32 @test_redundant_load(i32 %X, i32* %Y) !dbg !6 {
+define i32 @test_redundant_load(i32 %X, ptr %Y) !dbg !6 {
entry:
- %0 = load i32, i32* %Y, align 4, !dbg !8
+ %0 = load i32, ptr %Y, align 4, !dbg !8
%cmp = icmp sgt i32 %X, -1, !dbg !9
br i1 %cmp, label %if.then, label %if.end, !dbg !9
if.then: ; preds = %entry
- %1 = load i32, i32* %Y, align 4, !dbg !10
+ %1 = load i32, ptr %Y, align 4, !dbg !10
%add = add nsw i32 %0, %1, !dbg !10
call void @foo(), !dbg !11
br label %if.end, !dbg !12
diff --git a/llvm/test/Transforms/GVN/debugloc.ll b/llvm/test/Transforms/GVN/debugloc.ll
index 4353345c6b7bc..0a50d3e9252e3 100644
--- a/llvm/test/Transforms/GVN/debugloc.ll
+++ b/llvm/test/Transforms/GVN/debugloc.ll
@@ -15,7 +15,7 @@ define void @foo(i32 %x, i32 %y, i32 %z) local_unnamed_addr #0 !dbg !4 {
entry:
%not.tobool = icmp eq i32 %x, 0, !dbg !8
%.sink = zext i1 %not.tobool to i32, !dbg !8
- store i32 %.sink, i32* @g, align 4, !tbaa !9
+ store i32 %.sink, ptr @g, align 4, !tbaa !9
%cmp8 = icmp sgt i32 %y, 0, !dbg !13
br i1 %cmp8, label %for.body.preheader, label %for.end, !dbg !17
@@ -28,9 +28,9 @@ for.body: ; preds = %for.body.preheader,
br i1 %cmp1, label %if.then2, label %for.inc, !dbg !21
if.then2: ; preds = %for.body
- %0 = load i32, i32* @g, align 4, !dbg !22, !tbaa !9
+ %0 = load i32, ptr @g, align 4, !dbg !22, !tbaa !9
%inc = add nsw i32 %0, 1, !dbg !22
- store i32 %inc, i32* @g, align 4, !dbg !22, !tbaa !9
+ store i32 %inc, ptr @g, align 4, !dbg !22, !tbaa !9
br label %for.inc, !dbg !23
for.inc: ; preds = %for.body, %if.then2
diff --git a/llvm/test/Transforms/GVN/duplicate-phis.ll b/llvm/test/Transforms/GVN/duplicate-phis.ll
index 4879c3a372bd7..c0f9c38e19453 100644
--- a/llvm/test/Transforms/GVN/duplicate-phis.ll
+++ b/llvm/test/Transforms/GVN/duplicate-phis.ll
@@ -5,16 +5,16 @@ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16
declare void @foo(i64 %v) readonly
-define void @non_local_load(i32* %ptr) {
+define void @non_local_load(ptr %ptr) {
; CHECK-LABEL: @non_local_load(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i32 0, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: store i32 0, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[VAL:%.*]] = phi i32 [ [[VAL_INC:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
; CHECK-NEXT: [[VAL_INC]] = add i32 [[VAL]], 1
-; CHECK-NEXT: store i32 [[VAL_INC]], i32* [[PTR]], align 4
+; CHECK-NEXT: store i32 [[VAL_INC]], ptr [[PTR]], align 4
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[IV]], 1000
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[EXIT:%.*]], label [[LOOP]]
@@ -22,14 +22,14 @@ define void @non_local_load(i32* %ptr) {
; CHECK-NEXT: ret void
;
entry:
- store i32 0, i32* %ptr
+ store i32 0, ptr %ptr
br label %loop
loop:
%iv = phi i32 [ %iv.next, %loop ], [ 0, %entry ]
- %val = load i32, i32* %ptr
+ %val = load i32, ptr %ptr
%val.inc = add i32 %val, 1
- store i32 %val.inc, i32* %ptr
+ store i32 %val.inc, ptr %ptr
%iv.next = add i32 %iv, 1
%loop.cond = icmp eq i32 %iv, 1000
br i1 %loop.cond, label %exit, label %loop
@@ -38,16 +38,16 @@ exit:
ret void
}
-define void @non_local_load_with_iv_zext(i32* %ptr) {
+define void @non_local_load_with_iv_zext(ptr %ptr) {
; CHECK-LABEL: @non_local_load_with_iv_zext(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i32 0, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: store i32 0, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[VAL:%.*]] = phi i32 [ [[VAL_INC:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
; CHECK-NEXT: [[VAL_INC]] = add i32 [[VAL]], 1
-; CHECK-NEXT: store i32 [[VAL_INC]], i32* [[PTR]], align 4
+; CHECK-NEXT: store i32 [[VAL_INC]], ptr [[PTR]], align 4
; CHECK-NEXT: [[IV_WIDE:%.*]] = zext i32 [[IV]] to i64
; CHECK-NEXT: call void @foo(i64 [[IV_WIDE]])
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
@@ -57,14 +57,14 @@ define void @non_local_load_with_iv_zext(i32* %ptr) {
; CHECK-NEXT: ret void
;
entry:
- store i32 0, i32* %ptr
+ store i32 0, ptr %ptr
br label %loop
loop:
%iv = phi i32 [ %iv.next, %loop ], [ 0, %entry ]
- %val = load i32, i32* %ptr
+ %val = load i32, ptr %ptr
%val.inc = add i32 %val, 1
- store i32 %val.inc, i32* %ptr
+ store i32 %val.inc, ptr %ptr
%iv.wide = zext i32 %iv to i64
call void @foo(i64 %iv.wide)
%iv.next = add i32 %iv, 1
@@ -75,21 +75,21 @@ exit:
ret void
}
-define void @two_non_local_loads(i32* %ptr1) {
+define void @two_non_local_loads(ptr %ptr1) {
; CHECK-LABEL: @two_non_local_loads(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[PTR2:%.*]] = getelementptr inbounds i32, i32* [[PTR1:%.*]], i64 1
-; CHECK-NEXT: store i32 0, i32* [[PTR1]], align 4
-; CHECK-NEXT: store i32 0, i32* [[PTR2]], align 4
+; CHECK-NEXT: [[PTR2:%.*]] = getelementptr inbounds i32, ptr [[PTR1:%.*]], i64 1
+; CHECK-NEXT: store i32 0, ptr [[PTR1]], align 4
+; CHECK-NEXT: store i32 0, ptr [[PTR2]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[VAL2:%.*]] = phi i32 [ [[VAL2_INC:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[VAL1:%.*]] = phi i32 [ [[VAL1_INC:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY]] ]
; CHECK-NEXT: [[VAL1_INC]] = add i32 [[VAL1]], 1
-; CHECK-NEXT: store i32 [[VAL1_INC]], i32* [[PTR1]], align 4
+; CHECK-NEXT: store i32 [[VAL1_INC]], ptr [[PTR1]], align 4
; CHECK-NEXT: [[VAL2_INC]] = add i32 [[VAL2]], 1
-; CHECK-NEXT: store i32 [[VAL2_INC]], i32* [[PTR2]], align 4
+; CHECK-NEXT: store i32 [[VAL2_INC]], ptr [[PTR2]], align 4
; CHECK-NEXT: [[IV_WIDE:%.*]] = zext i32 [[IV]] to i64
; CHECK-NEXT: call void @foo(i64 [[IV_WIDE]])
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
@@ -99,19 +99,19 @@ define void @two_non_local_loads(i32* %ptr1) {
; CHECK-NEXT: ret void
;
entry:
- %ptr2 = getelementptr inbounds i32, i32* %ptr1, i64 1
- store i32 0, i32* %ptr1
- store i32 0, i32* %ptr2
+ %ptr2 = getelementptr inbounds i32, ptr %ptr1, i64 1
+ store i32 0, ptr %ptr1
+ store i32 0, ptr %ptr2
br label %loop
loop:
%iv = phi i32 [ %iv.next, %loop ], [ 0, %entry ]
- %val1 = load i32, i32* %ptr1
+ %val1 = load i32, ptr %ptr1
%val1.inc = add i32 %val1, 1
- store i32 %val1.inc, i32* %ptr1
- %val2 = load i32, i32* %ptr2
+ store i32 %val1.inc, ptr %ptr1
+ %val2 = load i32, ptr %ptr2
%val2.inc = add i32 %val2, 1
- store i32 %val2.inc, i32* %ptr2
+ store i32 %val2.inc, ptr %ptr2
%iv.wide = zext i32 %iv to i64
call void @foo(i64 %iv.wide)
%iv.next = add i32 %iv, 1
diff --git a/llvm/test/Transforms/GVN/edge.ll b/llvm/test/Transforms/GVN/edge.ll
index a0f24750e1e48..94a25b94707ba 100644
--- a/llvm/test/Transforms/GVN/edge.ll
+++ b/llvm/test/Transforms/GVN/edge.ll
@@ -45,15 +45,15 @@ bb2:
}
declare void @g(i1)
-define void @f4(i8 * %x) {
+define void @f4(ptr %x) {
; CHECK-LABEL: define void @f4(
bb0:
- %y = icmp eq i8* null, %x
+ %y = icmp eq ptr null, %x
br i1 %y, label %bb2, label %bb1
bb1:
br label %bb2
bb2:
- %zed = icmp eq i8* null, %x
+ %zed = icmp eq ptr null, %x
call void @g(i1 %zed)
; CHECK: call void @g(i1 %y)
ret void
diff --git a/llvm/test/Transforms/GVN/equality-assume.ll b/llvm/test/Transforms/GVN/equality-assume.ll
index ef6bd69791376..510c64595af70 100644
--- a/llvm/test/Transforms/GVN/equality-assume.ll
+++ b/llvm/test/Transforms/GVN/equality-assume.ll
@@ -1,117 +1,117 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -passes=gvn < %s | FileCheck %s
-define i32 @test(i32* %p, i32 %v) {
+define i32 @test(ptr %p, i32 %v) {
; CHECK-LABEL: @test(
-; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[P:%.*]]
+; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P:%.*]]
; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[LOAD]], [[V:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C]])
; CHECK-NEXT: ret i32 [[V]]
;
- %load = load i32, i32* %p
+ %load = load i32, ptr %p
%c = icmp eq i32 %load, %v
call void @llvm.assume(i1 %c)
ret i32 %load
}
-define i32 @reverse(i32* %p, i32 %v) {
+define i32 @reverse(ptr %p, i32 %v) {
; CHECK-LABEL: @reverse(
-; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[P:%.*]]
+; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P:%.*]]
; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[LOAD]], [[V:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C]])
; CHECK-NEXT: ret i32 [[V]]
;
- %load = load i32, i32* %p
+ %load = load i32, ptr %p
%c = icmp eq i32 %load, %v
call void @llvm.assume(i1 %c)
ret i32 %v
}
; Lack of equivalance due to +0.0 vs -0.0
-define float @neg_float_oeq(float* %p, float %v) {
+define float @neg_float_oeq(ptr %p, float %v) {
; CHECK-LABEL: @neg_float_oeq(
-; CHECK-NEXT: [[LOAD:%.*]] = load float, float* [[P:%.*]]
+; CHECK-NEXT: [[LOAD:%.*]] = load float, ptr [[P:%.*]]
; CHECK-NEXT: [[C:%.*]] = fcmp oeq float [[LOAD]], [[V:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C]])
; CHECK-NEXT: ret float [[LOAD]]
;
- %load = load float, float* %p
+ %load = load float, ptr %p
%c = fcmp oeq float %load, %v
call void @llvm.assume(i1 %c)
ret float %load
}
; Lack of equivalance due to +0.0 vs -0.0
-define float @neg_float_ueq(float* %p, float %v) {
+define float @neg_float_ueq(ptr %p, float %v) {
; CHECK-LABEL: @neg_float_ueq(
-; CHECK-NEXT: [[LOAD:%.*]] = load float, float* [[P:%.*]]
+; CHECK-NEXT: [[LOAD:%.*]] = load float, ptr [[P:%.*]]
; CHECK-NEXT: [[C:%.*]] = fcmp ueq float [[LOAD]], [[V:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C]])
; CHECK-NEXT: ret float [[LOAD]]
;
- %load = load float, float* %p
+ %load = load float, ptr %p
%c = fcmp ueq float %load, %v
call void @llvm.assume(i1 %c)
ret float %load
}
-define float @float_oeq_constant(float* %p) {
+define float @float_oeq_constant(ptr %p) {
; CHECK-LABEL: @float_oeq_constant(
-; CHECK-NEXT: [[LOAD:%.*]] = load float, float* [[P:%.*]]
+; CHECK-NEXT: [[LOAD:%.*]] = load float, ptr [[P:%.*]]
; CHECK-NEXT: [[C:%.*]] = fcmp oeq float [[LOAD]], 5.000000e+00
; CHECK-NEXT: call void @llvm.assume(i1 [[C]])
; CHECK-NEXT: ret float 5.000000e+00
;
- %load = load float, float* %p
+ %load = load float, ptr %p
%c = fcmp oeq float %load, 5.0
call void @llvm.assume(i1 %c)
ret float %load
}
; Lack of equivalance due to Nan
-define float @neq_float_ueq_constant(float* %p) {
+define float @neq_float_ueq_constant(ptr %p) {
; CHECK-LABEL: @neq_float_ueq_constant(
-; CHECK-NEXT: [[LOAD:%.*]] = load float, float* [[P:%.*]]
+; CHECK-NEXT: [[LOAD:%.*]] = load float, ptr [[P:%.*]]
; CHECK-NEXT: [[C:%.*]] = fcmp ueq float [[LOAD]], 5.000000e+00
; CHECK-NEXT: call void @llvm.assume(i1 [[C]])
; CHECK-NEXT: ret float [[LOAD]]
;
- %load = load float, float* %p
+ %load = load float, ptr %p
%c = fcmp ueq float %load, 5.0
call void @llvm.assume(i1 %c)
ret float %load
}
-define float @float_ueq_constant_nnas(float* %p) {
+define float @float_ueq_constant_nnas(ptr %p) {
; CHECK-LABEL: @float_ueq_constant_nnas(
-; CHECK-NEXT: [[LOAD:%.*]] = load float, float* [[P:%.*]]
+; CHECK-NEXT: [[LOAD:%.*]] = load float, ptr [[P:%.*]]
; CHECK-NEXT: [[C:%.*]] = fcmp nnan ueq float [[LOAD]], 5.000000e+00
; CHECK-NEXT: call void @llvm.assume(i1 [[C]])
; CHECK-NEXT: ret float 5.000000e+00
;
- %load = load float, float* %p
+ %load = load float, ptr %p
%c = fcmp nnan ueq float %load, 5.0
call void @llvm.assume(i1 %c)
ret float %load
}
-define i32 @test2(i32* %p, i32 %v) {
+define i32 @test2(ptr %p, i32 %v) {
; CHECK-LABEL: @test2(
-; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[P:%.*]]
+; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P:%.*]]
; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[LOAD]], [[V:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C]])
; CHECK-NEXT: ret i32 [[V]]
;
- %load = load i32, i32* %p
+ %load = load i32, ptr %p
%c = icmp eq i32 %load, %v
call void @llvm.assume(i1 %c)
- %load2 = load i32, i32* %p
+ %load2 = load i32, ptr %p
ret i32 %load2
}
-define i32 @test3(i32* %p, i32 %v) {
+define i32 @test3(ptr %p, i32 %v) {
; CHECK-LABEL: @test3(
-; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[P:%.*]]
+; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P:%.*]]
; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[LOAD]], [[V:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[C]])
; CHECK-NEXT: br i1 undef, label [[TAKEN:%.*]], label [[MERGE:%.*]]
@@ -120,7 +120,7 @@ define i32 @test3(i32* %p, i32 %v) {
; CHECK: merge:
; CHECK-NEXT: ret i32 [[V]]
;
- %load = load i32, i32* %p
+ %load = load i32, ptr %p
%c = icmp eq i32 %load, %v
call void @llvm.assume(i1 %c)
br i1 undef, label %taken, label %merge
@@ -130,7 +130,7 @@ merge:
ret i32 %load
}
-define i32 @trivial_constants(i32* %p) {
+define i32 @trivial_constants(ptr %p) {
; CHECK-LABEL: @trivial_constants(
; CHECK-NEXT: br i1 undef, label [[TAKEN:%.*]], label [[MERGE:%.*]]
; CHECK: taken:
@@ -147,9 +147,9 @@ merge:
ret i32 0
}
-define i32 @conflicting_constants(i32* %p) {
+define i32 @conflicting_constants(ptr %p) {
; CHECK-LABEL: @conflicting_constants(
-; CHECK-NEXT: store i8 poison, i8* null
+; CHECK-NEXT: store i8 poison, ptr null
; CHECK-NEXT: br i1 undef, label [[TAKEN:%.*]], label [[MERGE:%.*]]
; CHECK: taken:
; CHECK-NEXT: br label [[MERGE]]
diff --git a/llvm/test/Transforms/GVN/fence.ll b/llvm/test/Transforms/GVN/fence.ll
index a2aa7aba70614..ef26dde4520a3 100644
--- a/llvm/test/Transforms/GVN/fence.ll
+++ b/llvm/test/Transforms/GVN/fence.ll
@@ -3,27 +3,27 @@
@a = external constant i32
; We can value forward across the fence since we can (semantically)
; reorder the following load before the fence.
-define i32 @test(i32* %addr.i) {
+define i32 @test(ptr %addr.i) {
; CHECK-LABEL: @test
; CHECK: store
; CHECK: fence
; CHECK-NOT: load
; CHECK: ret
- store i32 5, i32* %addr.i, align 4
+ store i32 5, ptr %addr.i, align 4
fence release
- %a = load i32, i32* %addr.i, align 4
+ %a = load i32, ptr %addr.i, align 4
ret i32 %a
}
; Same as above
-define i32 @test2(i32* %addr.i) {
+define i32 @test2(ptr %addr.i) {
; CHECK-LABEL: @test2
; CHECK-NEXT: fence
; CHECK-NOT: load
; CHECK: ret
- %a = load i32, i32* %addr.i, align 4
+ %a = load i32, ptr %addr.i, align 4
fence release
- %a2 = load i32, i32* %addr.i, align 4
+ %a2 = load i32, ptr %addr.i, align 4
%res = sub i32 %a, %a2
ret i32 %res
}
@@ -34,7 +34,7 @@ define i32 @test2(i32* %addr.i) {
; ordering property (though it is that too), but a liveness
; property. We expect to eventually see the value of store by
; another thread when spinning on that location.
-define i32 @test3(i32* noalias %addr.i, i32* noalias %otheraddr) {
+define i32 @test3(ptr noalias %addr.i, ptr noalias %otheraddr) {
; CHECK-LABEL: @test3
; CHECK: load
; CHECK: fence
@@ -46,9 +46,9 @@ define i32 @test3(i32* noalias %addr.i, i32* noalias %otheraddr) {
; It's hopefully clear that allowing PRE to turn this into:
; if (!*%addr.i) while(true) {} would be unfortunate
fence acquire
- %a = load i32, i32* %addr.i, align 4
+ %a = load i32, ptr %addr.i, align 4
fence acquire
- %a2 = load i32, i32* %addr.i, align 4
+ %a2 = load i32, ptr %addr.i, align 4
%res = sub i32 %a, %a2
ret i32 %res
}
@@ -56,18 +56,18 @@ define i32 @test3(i32* noalias %addr.i, i32* noalias %otheraddr) {
; We can forward the value forward the load
; across both the fences, because the load is from
; a constant memory location.
-define i32 @test4(i32* %addr) {
+define i32 @test4(ptr %addr) {
; CHECK-LABEL: @test4
; CHECK-NOT: load
; CHECK: fence release
; CHECK: store
; CHECK: fence seq_cst
; CHECK: ret i32 0
- %var = load i32, i32* @a
+ %var = load i32, ptr @a
fence release
- store i32 42, i32* %addr, align 8
+ store i32 42, ptr %addr, align 8
fence seq_cst
- %var2 = load i32, i32* @a
+ %var2 = load i32, ptr @a
%var3 = sub i32 %var, %var2
ret i32 %var3
}
diff --git a/llvm/test/Transforms/GVN/fold-const-expr.ll b/llvm/test/Transforms/GVN/fold-const-expr.ll
index 5e95cfa844058..9e1129eb5bd22 100644
--- a/llvm/test/Transforms/GVN/fold-const-expr.ll
+++ b/llvm/test/Transforms/GVN/fold-const-expr.ll
@@ -8,11 +8,10 @@
%2 = type { i32, i32, i32, i32, i32 }
define i32 @_Z16vector3util_mainv(i32 %x, i32 %y) {
%tmp1 = alloca %2, align 4
- %tmp114 = getelementptr inbounds %2, %2* %tmp1, i64 0, i32 1
- %tmp115 = bitcast i32* %tmp114 to <4 x i32>*
- store <4 x i32> <i32 234567891, i32 345678912, i32 456789123, i32 0>, <4 x i32>* %tmp115, align 4
- %tmp1683 = getelementptr inbounds %2, %2* %tmp1, i64 0, i32 1
- %tmp1688 = load i32, i32* %tmp1683, align 4
+ %tmp114 = getelementptr inbounds %2, ptr %tmp1, i64 0, i32 1
+ store <4 x i32> <i32 234567891, i32 345678912, i32 456789123, i32 0>, ptr %tmp114, align 4
+ %tmp1683 = getelementptr inbounds %2, ptr %tmp1, i64 0, i32 1
+ %tmp1688 = load i32, ptr %tmp1683, align 4
%tmp1693 = shl i32 %tmp1688, 5
%tmp1694 = xor i32 %tmp1693, %tmp1688
%tmp1695 = lshr i32 %tmp1694, 7
@@ -37,10 +36,10 @@ define i32 @_Z16vector3util_mainv(i32 %x, i32 %y) {
%tmp1738 = xor i32 %tmp1737, %tmp1736
%tmp1739 = shl i32 %tmp1738, 22
%tmp1740 = xor i32 %tmp1739, %tmp1738
- store i32 %tmp1740, i32* %tmp1683, align 4
-; CHECK: store i32 310393545, i32* %tmp114, align 4
- %tmp1756 = getelementptr inbounds %2, %2* %tmp1, i64 0, i32 1
- %tmp1761 = load i32, i32* %tmp1756, align 4
+ store i32 %tmp1740, ptr %tmp1683, align 4
+; CHECK: store i32 310393545, ptr %tmp114, align 4
+ %tmp1756 = getelementptr inbounds %2, ptr %tmp1, i64 0, i32 1
+ %tmp1761 = load i32, ptr %tmp1756, align 4
%tmp1766 = shl i32 %tmp1761, 5
%tmp1767 = xor i32 %tmp1766, %tmp1761
%tmp1768 = lshr i32 %tmp1767, 7
@@ -65,10 +64,10 @@ define i32 @_Z16vector3util_mainv(i32 %x, i32 %y) {
%tmp1811 = xor i32 %tmp1810, %tmp1809
%tmp1812 = shl i32 %tmp1811, 22
%tmp1813 = xor i32 %tmp1812, %tmp1811
- store i32 %tmp1813, i32* %tmp1756, align 4
-; CHECK: store i32 -383584258, i32* %tmp114, align 4
- %tmp2645 = getelementptr inbounds %2, %2* %tmp1, i64 0, i32 1
- %tmp2650 = load i32, i32* %tmp2645, align 4
+ store i32 %tmp1813, ptr %tmp1756, align 4
+; CHECK: store i32 -383584258, ptr %tmp114, align 4
+ %tmp2645 = getelementptr inbounds %2, ptr %tmp1, i64 0, i32 1
+ %tmp2650 = load i32, ptr %tmp2645, align 4
%tmp2655 = shl i32 %tmp2650, 5
%tmp2656 = xor i32 %tmp2655, %tmp2650
%tmp2657 = lshr i32 %tmp2656, 7
@@ -93,7 +92,7 @@ define i32 @_Z16vector3util_mainv(i32 %x, i32 %y) {
%tmp2700 = xor i32 %tmp2699, %tmp2698
%tmp2701 = shl i32 %tmp2700, 22
%tmp2702 = xor i32 %tmp2701, %tmp2700
- store i32 %tmp2702, i32* %tmp2645, align 4
-; CHECK: store i32 -57163022, i32* %tmp114, align 4
+ store i32 %tmp2702, ptr %tmp2645, align 4
+; CHECK: store i32 -57163022, ptr %tmp114, align 4
ret i32 0
}
diff --git a/llvm/test/Transforms/GVN/funclet.ll b/llvm/test/Transforms/GVN/funclet.ll
index afff0d5db9f60..8ef4c969eadc6 100644
--- a/llvm/test/Transforms/GVN/funclet.ll
+++ b/llvm/test/Transforms/GVN/funclet.ll
@@ -2,31 +2,31 @@
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i686-pc-windows-msvc"
-%eh.ThrowInfo = type { i32, i8*, i8*, i8* }
-%struct.A = type { i32* }
+%eh.ThrowInfo = type { i32, ptr, ptr, ptr }
+%struct.A = type { ptr }
@"_TI1?AUA@@" = external constant %eh.ThrowInfo
-define i8 @f() personality i32 (...)* @__CxxFrameHandler3 {
+define i8 @f() personality ptr @__CxxFrameHandler3 {
entry:
%b = alloca i8
%c = alloca i8
- store i8 42, i8* %b
- store i8 13, i8* %c
- invoke void @_CxxThrowException(i8* %b, %eh.ThrowInfo* nonnull @"_TI1?AUA@@")
+ store i8 42, ptr %b
+ store i8 13, ptr %c
+ invoke void @_CxxThrowException(ptr %b, ptr nonnull @"_TI1?AUA@@")
to label %unreachable unwind label %catch.dispatch
catch.dispatch: ; preds = %entry
%cs1 = catchswitch within none [label %catch] unwind to caller
catch: ; preds = %catch.dispatch
- %catchpad = catchpad within %cs1 [i8* null, i32 64, i8* null]
- store i8 5, i8* %b
+ %catchpad = catchpad within %cs1 [ptr null, i32 64, ptr null]
+ store i8 5, ptr %b
catchret from %catchpad to label %try.cont
try.cont: ; preds = %catch
- %load_b = load i8, i8* %b
- %load_c = load i8, i8* %c
+ %load_b = load i8, ptr %b
+ %load_c = load i8, ptr %c
%add = add i8 %load_b, %load_c
ret i8 %add
@@ -34,11 +34,11 @@ unreachable: ; preds = %entry
unreachable
}
; CHECK-LABEL: define i8 @f(
-; CHECK: %[[load_b:.*]] = load i8, i8* %b
-; CHECK-NEXT: %[[load_c:.*]] = load i8, i8* %c
+; CHECK: %[[load_b:.*]] = load i8, ptr %b
+; CHECK-NEXT: %[[load_c:.*]] = load i8, ptr %c
; CHECK-NEXT: %[[add:.*]] = add i8 %[[load_b]], %[[load_c]]
; CHECK-NEXT: ret i8 %[[add]]
declare i32 @__CxxFrameHandler3(...)
-declare x86_stdcallcc void @_CxxThrowException(i8*, %eh.ThrowInfo*)
+declare x86_stdcallcc void @_CxxThrowException(ptr, ptr)
diff --git a/llvm/test/Transforms/GVN/gc_relocate.ll b/llvm/test/Transforms/GVN/gc_relocate.ll
index c50dcb19bba0e..6bc71f5da53fb 100644
--- a/llvm/test/Transforms/GVN/gc_relocate.ll
+++ b/llvm/test/Transforms/GVN/gc_relocate.ll
@@ -4,153 +4,153 @@
declare void @func()
declare i32 @"personality_function"()
-define i1 @test_trivial(i32 addrspace(1)* %in) gc "statepoint-example" {
+define i1 @test_trivial(ptr addrspace(1) %in) gc "statepoint-example" {
; CHECK-LABEL: @test_trivial(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SAFEPOINT_TOKEN:%.*]] = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(i32 addrspace(1)* [[IN:%.*]]) ]
-; CHECK-NEXT: [[A:%.*]] = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token [[SAFEPOINT_TOKEN]], i32 0, i32 0)
-; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 addrspace(1)* [[A]], null
+; CHECK-NEXT: [[SAFEPOINT_TOKEN:%.*]] = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(ptr addrspace(1) [[IN:%.*]]) ]
+; CHECK-NEXT: [[A:%.*]] = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token [[SAFEPOINT_TOKEN]], i32 0, i32 0)
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq ptr addrspace(1) [[A]], null
; CHECK-NEXT: ret i1 [[CMP1]]
;
entry:
- %safepoint_token = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(i32 addrspace(1)* %in)]
- %a = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token, i32 0, i32 0)
- %b = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token, i32 0, i32 0)
- %cmp1 = icmp eq i32 addrspace(1)* %a, null
- %cmp2 = icmp eq i32 addrspace(1)* %b, null
+ %safepoint_token = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(ptr addrspace(1) %in)]
+ %a = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token, i32 0, i32 0)
+ %b = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token, i32 0, i32 0)
+ %cmp1 = icmp eq ptr addrspace(1) %a, null
+ %cmp2 = icmp eq ptr addrspace(1) %b, null
%cmp = and i1 %cmp1, %cmp2
ret i1 %cmp
}
@G = external global i32
-define i1 @test_readnone(i32 addrspace(1)* %in) gc "statepoint-example" {
+define i1 @test_readnone(ptr addrspace(1) %in) gc "statepoint-example" {
; CHECK-LABEL: @test_readnone(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SAFEPOINT_TOKEN:%.*]] = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(i32 addrspace(1)* [[IN:%.*]]) ]
-; CHECK-NEXT: [[A:%.*]] = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token [[SAFEPOINT_TOKEN]], i32 0, i32 0)
-; CHECK-NEXT: store i32 0, i32* @G, align 4
-; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 addrspace(1)* [[A]], null
+; CHECK-NEXT: [[SAFEPOINT_TOKEN:%.*]] = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(ptr addrspace(1) [[IN:%.*]]) ]
+; CHECK-NEXT: [[A:%.*]] = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token [[SAFEPOINT_TOKEN]], i32 0, i32 0)
+; CHECK-NEXT: store i32 0, ptr @G, align 4
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq ptr addrspace(1) [[A]], null
; CHECK-NEXT: ret i1 [[CMP1]]
;
entry:
- %safepoint_token = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(i32 addrspace(1)* %in)]
- %a = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token, i32 0, i32 0)
- store i32 0, i32* @G
- %b = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token, i32 0, i32 0)
- %cmp1 = icmp eq i32 addrspace(1)* %a, null
- %cmp2 = icmp eq i32 addrspace(1)* %b, null
+ %safepoint_token = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(ptr addrspace(1) %in)]
+ %a = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token, i32 0, i32 0)
+ store i32 0, ptr @G
+ %b = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token, i32 0, i32 0)
+ %cmp1 = icmp eq ptr addrspace(1) %a, null
+ %cmp2 = icmp eq ptr addrspace(1) %b, null
%cmp = and i1 %cmp1, %cmp2
ret i1 %cmp
}
-define i1 @test_call(i32 addrspace(1)* %in) gc "statepoint-example" {
+define i1 @test_call(ptr addrspace(1) %in) gc "statepoint-example" {
; CHECK-LABEL: @test_call(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SAFEPOINT_TOKEN:%.*]] = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(i32 addrspace(1)* [[IN:%.*]], i32 addrspace(1)* [[IN]]) ]
-; CHECK-NEXT: [[BASE:%.*]] = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token [[SAFEPOINT_TOKEN]], i32 0, i32 0)
-; CHECK-NEXT: [[SAFEPOINT_TOKEN2:%.*]] = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(i32 addrspace(1)* [[BASE]], i32 addrspace(1)* [[BASE]]) ]
-; CHECK-NEXT: [[BASE_RELOC:%.*]] = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token [[SAFEPOINT_TOKEN2]], i32 0, i32 0)
-; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 addrspace(1)* [[BASE_RELOC]], null
+; CHECK-NEXT: [[SAFEPOINT_TOKEN:%.*]] = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(ptr addrspace(1) [[IN:%.*]], ptr addrspace(1) [[IN]]) ]
+; CHECK-NEXT: [[BASE:%.*]] = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token [[SAFEPOINT_TOKEN]], i32 0, i32 0)
+; CHECK-NEXT: [[SAFEPOINT_TOKEN2:%.*]] = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(ptr addrspace(1) [[BASE]], ptr addrspace(1) [[BASE]]) ]
+; CHECK-NEXT: [[BASE_RELOC:%.*]] = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token [[SAFEPOINT_TOKEN2]], i32 0, i32 0)
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq ptr addrspace(1) [[BASE_RELOC]], null
; CHECK-NEXT: ret i1 [[CMP1]]
;
entry:
- %safepoint_token = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(i32 addrspace(1)* %in, i32 addrspace(1)* %in)]
- %base = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token, i32 0, i32 0)
- %derived = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token, i32 0, i32 1)
- %safepoint_token2 = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(i32 addrspace(1)* %base, i32 addrspace(1)* %derived)]
+ %safepoint_token = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(ptr addrspace(1) %in, ptr addrspace(1) %in)]
+ %base = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token, i32 0, i32 0)
+ %derived = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token, i32 0, i32 1)
+ %safepoint_token2 = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(ptr addrspace(1) %base, ptr addrspace(1) %derived)]
br label %next
next:
- %base_reloc = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token2, i32 0, i32 0)
- %derived_reloc = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token2, i32 0, i32 1)
- %cmp1 = icmp eq i32 addrspace(1)* %base_reloc, null
- %cmp2 = icmp eq i32 addrspace(1)* %derived_reloc, null
+ %base_reloc = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token2, i32 0, i32 0)
+ %derived_reloc = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token2, i32 0, i32 1)
+ %cmp1 = icmp eq ptr addrspace(1) %base_reloc, null
+ %cmp2 = icmp eq ptr addrspace(1) %derived_reloc, null
%cmp = and i1 %cmp1, %cmp2
ret i1 %cmp
}
; Negative test: Check that relocates from
diff erent statepoints are not CSE'd
-define i1 @test_two_calls(i32 addrspace(1)* %in1, i32 addrspace(1)* %in2) gc "statepoint-example" {
+define i1 @test_two_calls(ptr addrspace(1) %in1, ptr addrspace(1) %in2) gc "statepoint-example" {
; CHECK-LABEL: @test_two_calls(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SAFEPOINT_TOKEN:%.*]] = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(i32 addrspace(1)* [[IN1:%.*]], i32 addrspace(1)* [[IN2:%.*]]) ]
-; CHECK-NEXT: [[IN1_RELOC1:%.*]] = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token [[SAFEPOINT_TOKEN]], i32 0, i32 0)
-; CHECK-NEXT: [[IN2_RELOC1:%.*]] = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token [[SAFEPOINT_TOKEN]], i32 1, i32 1)
-; CHECK-NEXT: [[SAFEPOINT_TOKEN2:%.*]] = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(i32 addrspace(1)* [[IN1_RELOC1]], i32 addrspace(1)* [[IN2_RELOC1]]) ]
-; CHECK-NEXT: [[IN1_RELOC2:%.*]] = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token [[SAFEPOINT_TOKEN2]], i32 0, i32 1)
-; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 addrspace(1)* [[IN1_RELOC2]], null
+; CHECK-NEXT: [[SAFEPOINT_TOKEN:%.*]] = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(ptr addrspace(1) [[IN1:%.*]], ptr addrspace(1) [[IN2:%.*]]) ]
+; CHECK-NEXT: [[IN1_RELOC1:%.*]] = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token [[SAFEPOINT_TOKEN]], i32 0, i32 0)
+; CHECK-NEXT: [[IN2_RELOC1:%.*]] = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token [[SAFEPOINT_TOKEN]], i32 1, i32 1)
+; CHECK-NEXT: [[SAFEPOINT_TOKEN2:%.*]] = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(ptr addrspace(1) [[IN1_RELOC1]], ptr addrspace(1) [[IN2_RELOC1]]) ]
+; CHECK-NEXT: [[IN1_RELOC2:%.*]] = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token [[SAFEPOINT_TOKEN2]], i32 0, i32 1)
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq ptr addrspace(1) [[IN1_RELOC2]], null
; CHECK-NEXT: ret i1 [[CMP1]]
;
entry:
- %safepoint_token = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(i32 addrspace(1)* %in1, i32 addrspace(1)* %in2)]
- %in1.reloc1 = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token, i32 0, i32 0)
- %in2.reloc1 = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token, i32 1, i32 1)
- %safepoint_token2 = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(i32 addrspace(1)* %in1.reloc1, i32 addrspace(1)* %in2.reloc1)]
- %in1.reloc2 = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token2, i32 0, i32 1)
- %in2.reloc2 = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token2, i32 0, i32 1)
- %cmp1 = icmp eq i32 addrspace(1)* %in1.reloc2, null
- %cmp2 = icmp eq i32 addrspace(1)* %in2.reloc2, null
+ %safepoint_token = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(ptr addrspace(1) %in1, ptr addrspace(1) %in2)]
+ %in1.reloc1 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token, i32 0, i32 0)
+ %in2.reloc1 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token, i32 1, i32 1)
+ %safepoint_token2 = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(ptr addrspace(1) %in1.reloc1, ptr addrspace(1) %in2.reloc1)]
+ %in1.reloc2 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token2, i32 0, i32 1)
+ %in2.reloc2 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token2, i32 0, i32 1)
+ %cmp1 = icmp eq ptr addrspace(1) %in1.reloc2, null
+ %cmp2 = icmp eq ptr addrspace(1) %in2.reloc2, null
%cmp = and i1 %cmp1, %cmp2
ret i1 %cmp
}
; Negative test: Check that relocates from normal and exceptional pathes are not be CSE'd
-define i32 addrspace(1)* @test_invoke(i32 addrspace(1)* %in) gc "statepoint-example" personality i32 ()* @"personality_function" {
+define ptr addrspace(1) @test_invoke(ptr addrspace(1) %in) gc "statepoint-example" personality ptr @"personality_function" {
; CHECK-LABEL: @test_invoke(
-; CHECK-NEXT: [[SAFEPOINT_TOKEN:%.*]] = invoke token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(i32 addrspace(1)* [[IN:%.*]]) ]
+; CHECK-NEXT: [[SAFEPOINT_TOKEN:%.*]] = invoke token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(ptr addrspace(1) [[IN:%.*]]) ]
; CHECK-NEXT: to label [[INVOKE_NORMAL_DEST:%.*]] unwind label [[EXCEPTIONAL_RETURN:%.*]]
; CHECK: invoke_normal_dest:
-; CHECK-NEXT: [[OUT:%.*]] = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token [[SAFEPOINT_TOKEN]], i32 0, i32 0)
-; CHECK-NEXT: ret i32 addrspace(1)* [[OUT]]
+; CHECK-NEXT: [[OUT:%.*]] = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token [[SAFEPOINT_TOKEN]], i32 0, i32 0)
+; CHECK-NEXT: ret ptr addrspace(1) [[OUT]]
; CHECK: exceptional_return:
; CHECK-NEXT: [[LANDING_PAD:%.*]] = landingpad token
; CHECK-NEXT: cleanup
-; CHECK-NEXT: [[OUT1:%.*]] = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token [[LANDING_PAD]], i32 0, i32 0)
-; CHECK-NEXT: ret i32 addrspace(1)* [[OUT1]]
+; CHECK-NEXT: [[OUT1:%.*]] = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token [[LANDING_PAD]], i32 0, i32 0)
+; CHECK-NEXT: ret ptr addrspace(1) [[OUT1]]
;
- %safepoint_token = invoke token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(i32 addrspace(1)* %in)]
+ %safepoint_token = invoke token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(ptr addrspace(1) %in)]
to label %invoke_normal_dest unwind label %exceptional_return
invoke_normal_dest:
- %out = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token, i32 0, i32 0)
- ret i32 addrspace(1)* %out
+ %out = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token, i32 0, i32 0)
+ ret ptr addrspace(1) %out
exceptional_return:
%landing_pad = landingpad token
cleanup
- %out1 = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %landing_pad, i32 0, i32 0)
- ret i32 addrspace(1)* %out1
+ %out1 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %landing_pad, i32 0, i32 0)
+ ret ptr addrspace(1) %out1
}
; negative test - neither dominates the other
-define i1 @test_non_dominating(i1 %c, i32 addrspace(1)* %in) gc "statepoint-example" {
+define i1 @test_non_dominating(i1 %c, ptr addrspace(1) %in) gc "statepoint-example" {
;
; CHECK-LABEL: @test_non_dominating(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[SAFEPOINT_TOKEN:%.*]] = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(i32 addrspace(1)* [[IN:%.*]]) ]
+; CHECK-NEXT: [[SAFEPOINT_TOKEN:%.*]] = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(ptr addrspace(1) [[IN:%.*]]) ]
; CHECK-NEXT: br i1 [[C:%.*]], label [[TAKEN:%.*]], label [[UNTAKEN:%.*]]
; CHECK: taken:
-; CHECK-NEXT: [[A:%.*]] = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token [[SAFEPOINT_TOKEN]], i32 0, i32 0)
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 addrspace(1)* [[A]], null
+; CHECK-NEXT: [[A:%.*]] = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token [[SAFEPOINT_TOKEN]], i32 0, i32 0)
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq ptr addrspace(1) [[A]], null
; CHECK-NEXT: ret i1 [[CMP]]
; CHECK: untaken:
-; CHECK-NEXT: [[B:%.*]] = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token [[SAFEPOINT_TOKEN]], i32 0, i32 0)
-; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 addrspace(1)* [[B]], null
+; CHECK-NEXT: [[B:%.*]] = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token [[SAFEPOINT_TOKEN]], i32 0, i32 0)
+; CHECK-NEXT: [[CMP2:%.*]] = icmp eq ptr addrspace(1) [[B]], null
; CHECK-NEXT: ret i1 [[CMP2]]
;
entry:
- %safepoint_token = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(i32 addrspace(1)* %in)]
+ %safepoint_token = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) ["gc-live"(ptr addrspace(1) %in)]
br i1 %c, label %taken, label %untaken
taken:
- %a = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token, i32 0, i32 0)
- %cmp = icmp eq i32 addrspace(1)* %a, null
+ %a = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token, i32 0, i32 0)
+ %cmp = icmp eq ptr addrspace(1) %a, null
ret i1 %cmp
untaken:
- %b = call i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token %safepoint_token, i32 0, i32 0)
- %cmp2 = icmp eq i32 addrspace(1)* %b, null
+ %b = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %safepoint_token, i32 0, i32 0)
+ %cmp2 = icmp eq ptr addrspace(1) %b, null
ret i1 %cmp2
}
-declare token @llvm.experimental.gc.statepoint.p0f_isVoidf(i64, i32, void ()*, i32, i32, ...)
-declare i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32, i32)
+declare token @llvm.experimental.gc.statepoint.p0(i64, i32, ptr, i32, i32, ...)
+declare ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token, i32, i32)
diff --git a/llvm/test/Transforms/GVN/gvn-loop-load-pre-order.ll b/llvm/test/Transforms/GVN/gvn-loop-load-pre-order.ll
index 87b699a240931..2eac0828098b8 100644
--- a/llvm/test/Transforms/GVN/gvn-loop-load-pre-order.ll
+++ b/llvm/test/Transforms/GVN/gvn-loop-load-pre-order.ll
@@ -7,7 +7,7 @@
define void @main(i1 %cond) {
; CHECK-PRE-LABEL: @main(
; CHECK-PRE-NEXT: entry:
-; CHECK-PRE-NEXT: store i32 0, i32* @b, align 4
+; CHECK-PRE-NEXT: store i32 0, ptr @b, align 4
; CHECK-PRE-NEXT: br label [[WHILE_BODY3:%.*]]
; CHECK-PRE: while.cond.loopexit.loopexit:
; CHECK-PRE-NEXT: ret void
@@ -17,7 +17,7 @@ define void @main(i1 %cond) {
; CHECK-PRE-NEXT: br i1 [[TOBOOL4_NOT]], label [[IF_END]], label [[IF_THEN:%.*]]
; CHECK-PRE: if.then:
; CHECK-PRE-NEXT: tail call void @foo()
-; CHECK-PRE-NEXT: [[DOTPRE:%.*]] = load i32, i32* @b, align 4
+; CHECK-PRE-NEXT: [[DOTPRE:%.*]] = load i32, ptr @b, align 4
; CHECK-PRE-NEXT: br label [[IF_END]]
; CHECK-PRE: if.end:
; CHECK-PRE-NEXT: [[TMP1]] = phi i32 [ [[DOTPRE]], [[IF_THEN]] ], [ 0, [[WHILE_BODY3]] ]
@@ -25,7 +25,7 @@ define void @main(i1 %cond) {
;
; CHECK-SCCP-LABEL: @main(
; CHECK-SCCP-NEXT: entry:
-; CHECK-SCCP-NEXT: store i32 0, i32* @b, align 4
+; CHECK-SCCP-NEXT: store i32 0, ptr @b, align 4
; CHECK-SCCP-NEXT: br label [[WHILE_BODY3:%.*]]
; CHECK-SCCP: while.cond.loopexit.loopexit:
; CHECK-SCCP-NEXT: ret void
@@ -35,19 +35,19 @@ define void @main(i1 %cond) {
; CHECK-SCCP-NEXT: br i1 [[COND:%.*]], label [[WHILE_COND_LOOPEXIT_LOOPEXIT:%.*]], label [[WHILE_BODY3]]
;
entry:
- store i32 0, i32* @b
+ store i32 0, ptr @b
br label %while.body3.lr.ph
while.cond.loopexit.loopexit: ; preds = %if.end
ret void
while.body3.lr.ph: ; preds = %while.cond1.preheader
- %0 = load i32, i32* @b, align 4
+ %0 = load i32, ptr @b, align 4
%1 = icmp eq i32 %0, 0
br label %while.body3
while.body3: ; preds = %if.end, %while.body3.lr.ph
- %2 = load i32, i32* @b, align 4
+ %2 = load i32, ptr @b, align 4
%tobool4.not = icmp eq i32 %2, 0
br i1 %tobool4.not, label %if.end, label %if.then
diff --git a/llvm/test/Transforms/GVN/int_sideeffect.ll b/llvm/test/Transforms/GVN/int_sideeffect.ll
index 1163d8e4f5a8c..513533af38c4e 100644
--- a/llvm/test/Transforms/GVN/int_sideeffect.ll
+++ b/llvm/test/Transforms/GVN/int_sideeffect.ll
@@ -6,10 +6,10 @@ declare void @llvm.sideeffect()
; CHECK-LABEL: s2l
; CHECK-NOT: load
-define float @s2l(float* %p) {
- store float 0.0, float* %p
+define float @s2l(ptr %p) {
+ store float 0.0, ptr %p
call void @llvm.sideeffect()
- %t = load float, float* %p
+ %t = load float, ptr %p
ret float %t
}
@@ -18,10 +18,10 @@ define float @s2l(float* %p) {
; CHECK-LABEL: rle
; CHECK: load
; CHECK-NOT: load
-define float @rle(float* %p) {
- %r = load float, float* %p
+define float @rle(ptr %p) {
+ %r = load float, ptr %p
call void @llvm.sideeffect()
- %s = load float, float* %p
+ %s = load float, ptr %p
%t = fadd float %r, %s
ret float %t
}
@@ -32,7 +32,7 @@ define float @rle(float* %p) {
; CHECK: load
; CHECK: loop:
; CHECK-NOT: load
-define float @licm(i64 %n, float* nocapture readonly %p) #0 {
+define float @licm(i64 %n, ptr nocapture readonly %p) #0 {
bb0:
br label %loop
@@ -40,7 +40,7 @@ loop:
%i = phi i64 [ 0, %bb0 ], [ %t5, %loop ]
%sum = phi float [ 0.000000e+00, %bb0 ], [ %t4, %loop ]
call void @llvm.sideeffect()
- %t3 = load float, float* %p
+ %t3 = load float, ptr %p
%t4 = fadd float %sum, %t3
%t5 = add i64 %i, 1
%t6 = icmp ult i64 %t5, %n
diff --git a/llvm/test/Transforms/GVN/invariant.group.ll b/llvm/test/Transforms/GVN/invariant.group.ll
index 1226203961cac..9c673ba1ced42 100644
--- a/llvm/test/Transforms/GVN/invariant.group.ll
+++ b/llvm/test/Transforms/GVN/invariant.group.ll
@@ -1,8 +1,8 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
-%struct.A = type { i32 (...)** }
- at _ZTV1A = available_externally unnamed_addr constant [3 x i8*] [i8* null, i8* bitcast (i8** @_ZTI1A to i8*), i8* bitcast (void (%struct.A*)* @_ZN1A3fooEv to i8*)], align 8
- at _ZTI1A = external constant i8*
+%struct.A = type { ptr }
+ at _ZTV1A = available_externally unnamed_addr constant [3 x ptr] [ptr null, ptr @_ZTI1A, ptr @_ZN1A3fooEv], align 8
+ at _ZTI1A = external constant ptr
@unknownPtr = external global i8
@@ -10,12 +10,12 @@
define i8 @simple() {
entry:
%ptr = alloca i8
- store i8 42, i8* %ptr, !invariant.group !0
- call void @foo(i8* %ptr)
+ store i8 42, ptr %ptr, !invariant.group !0
+ call void @foo(ptr %ptr)
- %a = load i8, i8* %ptr, !invariant.group !0
- %b = load i8, i8* %ptr, !invariant.group !0
- %c = load i8, i8* %ptr, !invariant.group !0
+ %a = load i8, ptr %ptr, !invariant.group !0
+ %b = load i8, ptr %ptr, !invariant.group !0
+ %c = load i8, ptr %ptr, !invariant.group !0
; CHECK: ret i8 42
ret i8 %a
}
@@ -24,11 +24,11 @@ entry:
define i8 @optimizable1() {
entry:
%ptr = alloca i8
- store i8 42, i8* %ptr, !invariant.group !0
- %ptr2 = call i8* @llvm.launder.invariant.group.p0i8(i8* %ptr)
- %a = load i8, i8* %ptr, !invariant.group !0
+ store i8 42, ptr %ptr, !invariant.group !0
+ %ptr2 = call ptr @llvm.launder.invariant.group.p0(ptr %ptr)
+ %a = load i8, ptr %ptr, !invariant.group !0
- call void @foo(i8* %ptr2); call to use %ptr2
+ call void @foo(ptr %ptr2); call to use %ptr2
; CHECK: ret i8 42
ret i8 %a
}
@@ -37,29 +37,29 @@ entry:
define i8 @optimizable2() {
entry:
%ptr = alloca i8
- store i8 42, i8* %ptr, !invariant.group !0
- call void @foo(i8* %ptr)
+ store i8 42, ptr %ptr, !invariant.group !0
+ call void @foo(ptr %ptr)
- store i8 13, i8* %ptr ; can't use this store with invariant.group
- %a = load i8, i8* %ptr
+ store i8 13, ptr %ptr ; can't use this store with invariant.group
+ %a = load i8, ptr %ptr
call void @bar(i8 %a) ; call to use %a
- call void @foo(i8* %ptr)
- %b = load i8, i8* %ptr, !invariant.group !0
+ call void @foo(ptr %ptr)
+ %b = load i8, ptr %ptr, !invariant.group !0
; CHECK: ret i8 42
ret i8 %b
}
; CHECK-LABEL: define i1 @proveEqualityForStrip(
-define i1 @proveEqualityForStrip(i8* %a) {
+define i1 @proveEqualityForStrip(ptr %a) {
; FIXME: The first call could be also removed by GVN. Right now
; DCE removes it. The second call is CSE'd with the first one.
-; CHECK: %b1 = call i8* @llvm.strip.invariant.group.p0i8(i8* %a)
- %b1 = call i8* @llvm.strip.invariant.group.p0i8(i8* %a)
+; CHECK: %b1 = call ptr @llvm.strip.invariant.group.p0(ptr %a)
+ %b1 = call ptr @llvm.strip.invariant.group.p0(ptr %a)
; CHECK-NOT: llvm.strip.invariant.group
- %b2 = call i8* @llvm.strip.invariant.group.p0i8(i8* %a)
- %r = icmp eq i8* %b1, %b2
+ %b2 = call ptr @llvm.strip.invariant.group.p0(ptr %a)
+ %r = icmp eq ptr %b1, %b2
; CHECK: ret i1 true
ret i1 %r
}
@@ -67,9 +67,9 @@ define i1 @proveEqualityForStrip(i8* %a) {
define i8 @unoptimizable1() {
entry:
%ptr = alloca i8
- store i8 42, i8* %ptr
- call void @foo(i8* %ptr)
- %a = load i8, i8* %ptr, !invariant.group !0
+ store i8 42, ptr %ptr
+ call void @foo(ptr %ptr)
+ %a = load i8, ptr %ptr, !invariant.group !0
; CHECK: ret i8 %a
ret i8 %a
}
@@ -77,52 +77,41 @@ entry:
; CHECK-LABEL: define void @indirectLoads() {
define void @indirectLoads() {
entry:
- %a = alloca %struct.A*, align 8
- %0 = bitcast %struct.A** %a to i8*
+ %a = alloca ptr, align 8
- %call = call i8* @getPointer(i8* null)
- %1 = bitcast i8* %call to %struct.A*
- call void @_ZN1AC1Ev(%struct.A* %1)
- %2 = bitcast %struct.A* %1 to i8***
+ %call = call ptr @getPointer(ptr null)
+ call void @_ZN1AC1Ev(ptr %call)
; CHECK: %vtable = load {{.*}} !invariant.group
- %vtable = load i8**, i8*** %2, align 8, !invariant.group !0
- %cmp.vtables = icmp eq i8** %vtable, getelementptr inbounds ([3 x i8*], [3 x i8*]* @_ZTV1A, i64 0, i64 2)
+ %vtable = load ptr, ptr %call, align 8, !invariant.group !0
+ %cmp.vtables = icmp eq ptr %vtable, getelementptr inbounds ([3 x ptr], ptr @_ZTV1A, i64 0, i64 2)
call void @llvm.assume(i1 %cmp.vtables)
- store %struct.A* %1, %struct.A** %a, align 8
- %3 = load %struct.A*, %struct.A** %a, align 8
- %4 = bitcast %struct.A* %3 to void (%struct.A*)***
+ store ptr %call, ptr %a, align 8
+ %0 = load ptr, ptr %a, align 8
; CHECK: call void @_ZN1A3fooEv(
- %vtable1 = load void (%struct.A*)**, void (%struct.A*)*** %4, align 8, !invariant.group !0
- %vfn = getelementptr inbounds void (%struct.A*)*, void (%struct.A*)** %vtable1, i64 0
- %5 = load void (%struct.A*)*, void (%struct.A*)** %vfn, align 8
- call void %5(%struct.A* %3)
- %6 = load %struct.A*, %struct.A** %a, align 8
- %7 = bitcast %struct.A* %6 to void (%struct.A*)***
+ %vtable1 = load ptr, ptr %0, align 8, !invariant.group !0
+ %1 = load ptr, ptr %vtable1, align 8
+ call void %1(ptr %0)
+ %2 = load ptr, ptr %a, align 8
; CHECK: call void @_ZN1A3fooEv(
- %vtable2 = load void (%struct.A*)**, void (%struct.A*)*** %7, align 8, !invariant.group !0
- %vfn3 = getelementptr inbounds void (%struct.A*)*, void (%struct.A*)** %vtable2, i64 0
- %8 = load void (%struct.A*)*, void (%struct.A*)** %vfn3, align 8
+ %vtable2 = load ptr, ptr %2, align 8, !invariant.group !0
+ %3 = load ptr, ptr %vtable2, align 8
- call void %8(%struct.A* %6)
- %9 = load %struct.A*, %struct.A** %a, align 8
- %10 = bitcast %struct.A* %9 to void (%struct.A*)***
+ call void %3(ptr %2)
+ %4 = load ptr, ptr %a, align 8
- %vtable4 = load void (%struct.A*)**, void (%struct.A*)*** %10, align 8, !invariant.group !0
- %vfn5 = getelementptr inbounds void (%struct.A*)*, void (%struct.A*)** %vtable4, i64 0
- %11 = load void (%struct.A*)*, void (%struct.A*)** %vfn5, align 8
+ %vtable4 = load ptr, ptr %4, align 8, !invariant.group !0
+ %5 = load ptr, ptr %vtable4, align 8
; CHECK: call void @_ZN1A3fooEv(
- call void %11(%struct.A* %9)
+ call void %5(ptr %4)
- %vtable5 = load i8**, i8*** %2, align 8, !invariant.group !0
- %vfn6 = getelementptr inbounds i8*, i8** %vtable5, i64 0
- %12 = bitcast i8** %vfn6 to void (%struct.A*)**
- %13 = load void (%struct.A*)*, void (%struct.A*)** %12, align 8
+ %vtable5 = load ptr, ptr %call, align 8, !invariant.group !0
+ %6 = load ptr, ptr %vtable5, align 8
; CHECK: call void @_ZN1A3fooEv(
- call void %13(%struct.A* %9)
+ call void %6(ptr %4)
ret void
}
@@ -130,27 +119,22 @@ entry:
; CHECK-LABEL: define void @combiningBitCastWithLoad() {
define void @combiningBitCastWithLoad() {
entry:
- %a = alloca %struct.A*, align 8
- %0 = bitcast %struct.A** %a to i8*
+ %a = alloca ptr, align 8
- %call = call i8* @getPointer(i8* null)
- %1 = bitcast i8* %call to %struct.A*
- call void @_ZN1AC1Ev(%struct.A* %1)
- %2 = bitcast %struct.A* %1 to i8***
+ %call = call ptr @getPointer(ptr null)
+ call void @_ZN1AC1Ev(ptr %call)
; CHECK: %vtable = load {{.*}} !invariant.group
- %vtable = load i8**, i8*** %2, align 8, !invariant.group !0
- %cmp.vtables = icmp eq i8** %vtable, getelementptr inbounds ([3 x i8*], [3 x i8*]* @_ZTV1A, i64 0, i64 2)
+ %vtable = load ptr, ptr %call, align 8, !invariant.group !0
+ %cmp.vtables = icmp eq ptr %vtable, getelementptr inbounds ([3 x ptr], ptr @_ZTV1A, i64 0, i64 2)
- store %struct.A* %1, %struct.A** %a, align 8
+ store ptr %call, ptr %a, align 8
; CHECK-NOT: !invariant.group
- %3 = load %struct.A*, %struct.A** %a, align 8
- %4 = bitcast %struct.A* %3 to void (%struct.A*)***
+ %0 = load ptr, ptr %a, align 8
- %vtable1 = load void (%struct.A*)**, void (%struct.A*)*** %4, align 8, !invariant.group !0
- %vfn = getelementptr inbounds void (%struct.A*)*, void (%struct.A*)** %vtable1, i64 0
- %5 = load void (%struct.A*)*, void (%struct.A*)** %vfn, align 8
- call void %5(%struct.A* %3)
+ %vtable1 = load ptr, ptr %0, align 8, !invariant.group !0
+ %1 = load ptr, ptr %vtable1, align 8
+ call void %1(ptr %0)
ret void
}
@@ -159,12 +143,12 @@ entry:
define void @loadCombine() {
enter:
%ptr = alloca i8
- store i8 42, i8* %ptr
- call void @foo(i8* %ptr)
-; CHECK: %[[A:.*]] = load i8, i8* %ptr, align 1, !invariant.group
- %a = load i8, i8* %ptr, !invariant.group !0
+ store i8 42, ptr %ptr
+ call void @foo(ptr %ptr)
+; CHECK: %[[A:.*]] = load i8, ptr %ptr, align 1, !invariant.group
+ %a = load i8, ptr %ptr, !invariant.group !0
; CHECK-NOT: load
- %b = load i8, i8* %ptr, !invariant.group !0
+ %b = load i8, ptr %ptr, !invariant.group !0
; CHECK: call void @bar(i8 %[[A]])
call void @bar(i8 %a)
; CHECK: call void @bar(i8 %[[A]])
@@ -176,12 +160,12 @@ enter:
define void @loadCombine1() {
enter:
%ptr = alloca i8
- store i8 42, i8* %ptr
- call void @foo(i8* %ptr)
-; CHECK: %[[D:.*]] = load i8, i8* %ptr, align 1, !invariant.group
- %c = load i8, i8* %ptr
+ store i8 42, ptr %ptr
+ call void @foo(ptr %ptr)
+; CHECK: %[[D:.*]] = load i8, ptr %ptr, align 1, !invariant.group
+ %c = load i8, ptr %ptr
; CHECK-NOT: load
- %d = load i8, i8* %ptr, !invariant.group !0
+ %d = load i8, ptr %ptr, !invariant.group !0
; CHECK: call void @bar(i8 %[[D]])
call void @bar(i8 %c)
; CHECK: call void @bar(i8 %[[D]])
@@ -193,12 +177,12 @@ enter:
define void @loadCombine2() {
enter:
%ptr = alloca i8
- store i8 42, i8* %ptr
- call void @foo(i8* %ptr)
-; CHECK: %[[E:.*]] = load i8, i8* %ptr, align 1, !invariant.group
- %e = load i8, i8* %ptr, !invariant.group !0
+ store i8 42, ptr %ptr
+ call void @foo(ptr %ptr)
+; CHECK: %[[E:.*]] = load i8, ptr %ptr, align 1, !invariant.group
+ %e = load i8, ptr %ptr, !invariant.group !0
; CHECK-NOT: load
- %f = load i8, i8* %ptr
+ %f = load i8, ptr %ptr
; CHECK: call void @bar(i8 %[[E]])
call void @bar(i8 %e)
; CHECK: call void @bar(i8 %[[E]])
@@ -210,12 +194,12 @@ enter:
define void @loadCombine3() {
enter:
%ptr = alloca i8
- store i8 42, i8* %ptr
- call void @foo(i8* %ptr)
-; CHECK: %[[E:.*]] = load i8, i8* %ptr, align 1, !invariant.group
- %e = load i8, i8* %ptr, !invariant.group !0
+ store i8 42, ptr %ptr
+ call void @foo(ptr %ptr)
+; CHECK: %[[E:.*]] = load i8, ptr %ptr, align 1, !invariant.group
+ %e = load i8, ptr %ptr, !invariant.group !0
; CHECK-NOT: load
- %f = load i8, i8* %ptr, !invariant.group !0
+ %f = load i8, ptr %ptr, !invariant.group !0
; CHECK: call void @bar(i8 %[[E]])
call void @bar(i8 %e)
; CHECK: call void @bar(i8 %[[E]])
@@ -227,11 +211,11 @@ enter:
define i8 @unoptimizable2() {
entry:
%ptr = alloca i8
- store i8 42, i8* %ptr
- call void @foo(i8* %ptr)
- %a = load i8, i8* %ptr
- call void @foo(i8* %ptr)
- %b = load i8, i8* %ptr, !invariant.group !0
+ store i8 42, ptr %ptr
+ call void @foo(ptr %ptr)
+ %a = load i8, ptr %ptr
+ call void @foo(ptr %ptr)
+ %b = load i8, ptr %ptr, !invariant.group !0
; CHECK: ret i8 %a
ret i8 %a
@@ -241,9 +225,9 @@ entry:
define i8 @unoptimizable3() {
entry:
%ptr = alloca i8
- store i8 42, i8* %ptr, !invariant.group !0
- %ptr2 = call i8* @getPointer(i8* %ptr)
- %a = load i8, i8* %ptr2, !invariant.group !0
+ store i8 42, ptr %ptr, !invariant.group !0
+ %ptr2 = call ptr @getPointer(ptr %ptr)
+ %a = load i8, ptr %ptr2, !invariant.group !0
; CHECK: ret i8 %a
ret i8 %a
@@ -253,10 +237,10 @@ entry:
define i8 @optimizable4() {
entry:
%ptr = alloca i8
- store i8 42, i8* %ptr, !invariant.group !0
- %ptr2 = call i8* @llvm.launder.invariant.group.p0i8(i8* %ptr)
+ store i8 42, ptr %ptr, !invariant.group !0
+ %ptr2 = call ptr @llvm.launder.invariant.group.p0(ptr %ptr)
; CHECK-NOT: load
- %a = load i8, i8* %ptr2, !invariant.group !0
+ %a = load i8, ptr %ptr2, !invariant.group !0
; CHECK: ret i8 42
ret i8 %a
@@ -266,14 +250,14 @@ entry:
define i8 @volatile1() {
entry:
%ptr = alloca i8
- store i8 42, i8* %ptr, !invariant.group !0
- call void @foo(i8* %ptr)
- %a = load i8, i8* %ptr, !invariant.group !0
- %b = load volatile i8, i8* %ptr
+ store i8 42, ptr %ptr, !invariant.group !0
+ call void @foo(ptr %ptr)
+ %a = load i8, ptr %ptr, !invariant.group !0
+ %b = load volatile i8, ptr %ptr
; CHECK: call void @bar(i8 %b)
call void @bar(i8 %b)
- %c = load volatile i8, i8* %ptr, !invariant.group !0
+ %c = load volatile i8, ptr %ptr, !invariant.group !0
; FIXME: we could change %c to 42, preserving volatile load
; CHECK: call void @bar(i8 %c)
call void @bar(i8 %c)
@@ -285,14 +269,14 @@ entry:
define i8 @volatile2() {
entry:
%ptr = alloca i8
- store i8 42, i8* %ptr, !invariant.group !0
- call void @foo(i8* %ptr)
- %a = load i8, i8* %ptr, !invariant.group !0
- %b = load volatile i8, i8* %ptr
+ store i8 42, ptr %ptr, !invariant.group !0
+ call void @foo(ptr %ptr)
+ %a = load i8, ptr %ptr, !invariant.group !0
+ %b = load volatile i8, ptr %ptr
; CHECK: call void @bar(i8 %b)
call void @bar(i8 %b)
- %c = load volatile i8, i8* %ptr, !invariant.group !0
+ %c = load volatile i8, ptr %ptr, !invariant.group !0
; FIXME: we could change %c to 42, preserving volatile load
; CHECK: call void @bar(i8 %c)
call void @bar(i8 %c)
@@ -304,26 +288,26 @@ entry:
define i8 @fun() {
entry:
%ptr = alloca i8
- store i8 42, i8* %ptr, !invariant.group !0
- call void @foo(i8* %ptr)
+ store i8 42, ptr %ptr, !invariant.group !0
+ call void @foo(ptr %ptr)
- %a = load i8, i8* %ptr, !invariant.group !0 ; Can assume that value under %ptr didn't change
+ %a = load i8, ptr %ptr, !invariant.group !0 ; Can assume that value under %ptr didn't change
; CHECK: call void @bar(i8 42)
call void @bar(i8 %a)
- %newPtr = call i8* @getPointer(i8* %ptr)
- %c = load i8, i8* %newPtr, !invariant.group !0 ; Can't assume anything, because we only have information about %ptr
+ %newPtr = call ptr @getPointer(ptr %ptr)
+ %c = load i8, ptr %newPtr, !invariant.group !0 ; Can't assume anything, because we only have information about %ptr
; CHECK: call void @bar(i8 %c)
call void @bar(i8 %c)
- %unknownValue = load i8, i8* @unknownPtr
+ %unknownValue = load i8, ptr @unknownPtr
; FIXME: Can assume that %unknownValue == 42
-; CHECK: store i8 %unknownValue, i8* %ptr, align 1, !invariant.group !0
- store i8 %unknownValue, i8* %ptr, !invariant.group !0
+; CHECK: store i8 %unknownValue, ptr %ptr, align 1, !invariant.group !0
+ store i8 %unknownValue, ptr %ptr, !invariant.group !0
- %newPtr2 = call i8* @llvm.launder.invariant.group.p0i8(i8* %ptr)
+ %newPtr2 = call ptr @llvm.launder.invariant.group.p0(ptr %ptr)
; CHECK-NOT: load
- %d = load i8, i8* %newPtr2, !invariant.group !0
+ %d = load i8, ptr %newPtr2, !invariant.group !0
; CHECK: ret i8 %unknownValue
ret i8 %d
}
@@ -332,24 +316,21 @@ entry:
; CHECK-LABEL: define void @testGEP0() {
define void @testGEP0() {
%a = alloca %struct.A, align 8
- %1 = bitcast %struct.A* %a to i8*
- %2 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 0
- store i32 (...)** bitcast (i8** getelementptr inbounds ([3 x i8*], [3 x i8*]* @_ZTV1A, i64 0, i64 2) to i32 (...)**), i32 (...)*** %2, align 8, !invariant.group !0
-; CHECK: call void @_ZN1A3fooEv(%struct.A* nonnull dereferenceable(8) %a)
- call void @_ZN1A3fooEv(%struct.A* nonnull dereferenceable(8) %a) ; This call may change vptr
- %3 = load i8, i8* @unknownPtr, align 4
- %4 = icmp eq i8 %3, 0
- br i1 %4, label %_Z1gR1A.exit, label %5
+ store ptr getelementptr inbounds ([3 x ptr], ptr @_ZTV1A, i64 0, i64 2), ptr %a, align 8, !invariant.group !0
+; CHECK: call void @_ZN1A3fooEv(ptr nonnull dereferenceable(8) %a)
+ call void @_ZN1A3fooEv(ptr nonnull dereferenceable(8) %a) ; This call may change vptr
+ %1 = load i8, ptr @unknownPtr, align 4
+ %2 = icmp eq i8 %1, 0
+ br i1 %2, label %_Z1gR1A.exit, label %3
; This should be devirtualized by invariant.group
- %6 = bitcast %struct.A* %a to void (%struct.A*)***
- %7 = load void (%struct.A*)**, void (%struct.A*)*** %6, align 8, !invariant.group !0
- %8 = load void (%struct.A*)*, void (%struct.A*)** %7, align 8
-; CHECK: call void @_ZN1A3fooEv(%struct.A* nonnull %a)
- call void %8(%struct.A* nonnull %a)
+ %4 = load ptr, ptr %a, align 8, !invariant.group !0
+ %5 = load ptr, ptr %4, align 8
+; CHECK: call void @_ZN1A3fooEv(ptr nonnull %a)
+ call void %5(ptr nonnull %a)
br label %_Z1gR1A.exit
-_Z1gR1A.exit: ; preds = %0, %5
+_Z1gR1A.exit: ; preds = %0, %3
ret void
}
@@ -358,79 +339,74 @@ _Z1gR1A.exit: ; preds = %0, %5
; from the same function.
; CHECK-LABEL: define void @testGlobal() {
define void @testGlobal() {
-; CHECK: %a = load i8, i8* @unknownPtr, align 1, !invariant.group !0
- %a = load i8, i8* @unknownPtr, !invariant.group !0
- call void @foo2(i8* @unknownPtr, i8 %a)
-; CHECK: %1 = load i8, i8* @unknownPtr, align 1, !invariant.group !0
- %1 = load i8, i8* @unknownPtr, !invariant.group !0
+; CHECK: %a = load i8, ptr @unknownPtr, align 1, !invariant.group !0
+ %a = load i8, ptr @unknownPtr, !invariant.group !0
+ call void @foo2(ptr @unknownPtr, i8 %a)
+; CHECK: %1 = load i8, ptr @unknownPtr, align 1, !invariant.group !0
+ %1 = load i8, ptr @unknownPtr, !invariant.group !0
call void @bar(i8 %1)
- %b0 = bitcast i8* @unknownPtr to i1*
- call void @fooBit(i1* %b0, i1 1)
+ call void @fooBit(ptr @unknownPtr, i1 1)
; Adding regex because of canonicalization of bitcasts
-; CHECK: %2 = load i1, i1* {{.*}}, !invariant.group !0
- %2 = load i1, i1* %b0, !invariant.group !0
- call void @fooBit(i1* %b0, i1 %2)
-; CHECK: %3 = load i1, i1* {{.*}}, !invariant.group !0
- %3 = load i1, i1* %b0, !invariant.group !0
- call void @fooBit(i1* %b0, i1 %3)
+; CHECK: %2 = load i1, ptr {{.*}}, !invariant.group !0
+ %2 = load i1, ptr @unknownPtr, !invariant.group !0
+ call void @fooBit(ptr @unknownPtr, i1 %2)
+; CHECK: %3 = load i1, ptr {{.*}}, !invariant.group !0
+ %3 = load i1, ptr @unknownPtr, !invariant.group !0
+ call void @fooBit(ptr @unknownPtr, i1 %3)
ret void
}
; And in the case it is not global
; CHECK-LABEL: define void @testNotGlobal() {
define void @testNotGlobal() {
%a = alloca i8
- call void @foo(i8* %a)
-; CHECK: %b = load i8, i8* %a, align 1, !invariant.group !0
- %b = load i8, i8* %a, !invariant.group !0
- call void @foo2(i8* %a, i8 %b)
+ call void @foo(ptr %a)
+; CHECK: %b = load i8, ptr %a, align 1, !invariant.group !0
+ %b = load i8, ptr %a, !invariant.group !0
+ call void @foo2(ptr %a, i8 %b)
- %1 = load i8, i8* %a, !invariant.group !0
+ %1 = load i8, ptr %a, !invariant.group !0
; CHECK: call void @bar(i8 %b)
call void @bar(i8 %1)
- %b0 = bitcast i8* %a to i1*
- call void @fooBit(i1* %b0, i1 1)
+ call void @fooBit(ptr %a, i1 1)
; CHECK: %1 = trunc i8 %b to i1
- %2 = load i1, i1* %b0, !invariant.group !0
-; CHECK-NEXT: call void @fooBit(i1* %b0, i1 %1)
- call void @fooBit(i1* %b0, i1 %2)
- %3 = load i1, i1* %b0, !invariant.group !0
-; CHECK-NEXT: call void @fooBit(i1* %b0, i1 %1)
- call void @fooBit(i1* %b0, i1 %3)
+ %2 = load i1, ptr %a, !invariant.group !0
+; CHECK-NEXT: call void @fooBit(ptr %a, i1 %1)
+ call void @fooBit(ptr %a, i1 %2)
+ %3 = load i1, ptr %a, !invariant.group !0
+; CHECK-NEXT: call void @fooBit(ptr %a, i1 %1)
+ call void @fooBit(ptr %a, i1 %3)
ret void
}
; CHECK-LABEL: define void @handling_loops()
define void @handling_loops() {
%a = alloca %struct.A, align 8
- %1 = bitcast %struct.A* %a to i8*
- %2 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 0
- store i32 (...)** bitcast (i8** getelementptr inbounds ([3 x i8*], [3 x i8*]* @_ZTV1A, i64 0, i64 2) to i32 (...)**), i32 (...)*** %2, align 8, !invariant.group !0
- %3 = load i8, i8* @unknownPtr, align 4
- %4 = icmp sgt i8 %3, 0
- br i1 %4, label %.lr.ph.i, label %_Z2g2R1A.exit
+ store ptr getelementptr inbounds ([3 x ptr], ptr @_ZTV1A, i64 0, i64 2), ptr %a, align 8, !invariant.group !0
+ %1 = load i8, ptr @unknownPtr, align 4
+ %2 = icmp sgt i8 %1, 0
+ br i1 %2, label %.lr.ph.i, label %_Z2g2R1A.exit
.lr.ph.i: ; preds = %0
- %5 = bitcast %struct.A* %a to void (%struct.A*)***
- %6 = load i8, i8* @unknownPtr, align 4
- %7 = icmp sgt i8 %6, 1
- br i1 %7, label %._crit_edge.preheader, label %_Z2g2R1A.exit
+ %3 = load i8, ptr @unknownPtr, align 4
+ %4 = icmp sgt i8 %3, 1
+ br i1 %4, label %._crit_edge.preheader, label %_Z2g2R1A.exit
._crit_edge.preheader: ; preds = %.lr.ph.i
br label %._crit_edge
._crit_edge: ; preds = %._crit_edge.preheader, %._crit_edge
- %8 = phi i8 [ %10, %._crit_edge ], [ 1, %._crit_edge.preheader ]
- %.pre = load void (%struct.A*)**, void (%struct.A*)*** %5, align 8, !invariant.group !0
- %9 = load void (%struct.A*)*, void (%struct.A*)** %.pre, align 8
- ; CHECK: call void @_ZN1A3fooEv(%struct.A* nonnull %a)
- call void %9(%struct.A* nonnull %a) #3
+ %5 = phi i8 [ %7, %._crit_edge ], [ 1, %._crit_edge.preheader ]
+ %.pre = load ptr, ptr %a, align 8, !invariant.group !0
+ %6 = load ptr, ptr %.pre, align 8
+ ; CHECK: call void @_ZN1A3fooEv(ptr nonnull %a)
+ call void %6(ptr nonnull %a) #3
; CHECK-NOT: call void %
- %10 = add nuw nsw i8 %8, 1
- %11 = load i8, i8* @unknownPtr, align 4
- %12 = icmp slt i8 %10, %11
- br i1 %12, label %._crit_edge, label %_Z2g2R1A.exit.loopexit
+ %7 = add nuw nsw i8 %5, 1
+ %8 = load i8, ptr @unknownPtr, align 4
+ %9 = icmp slt i8 %7, %8
+ br i1 %9, label %._crit_edge, label %_Z2g2R1A.exit.loopexit
_Z2g2R1A.exit.loopexit: ; preds = %._crit_edge
br label %_Z2g2R1A.exit
@@ -440,16 +416,16 @@ _Z2g2R1A.exit: ; preds = %_Z2g2R1A.exit.loope
}
-declare void @foo(i8*)
-declare void @foo2(i8*, i8)
+declare void @foo(ptr)
+declare void @foo2(ptr, i8)
declare void @bar(i8)
-declare i8* @getPointer(i8*)
-declare void @_ZN1A3fooEv(%struct.A*)
-declare void @_ZN1AC1Ev(%struct.A*)
-declare void @fooBit(i1*, i1)
+declare ptr @getPointer(ptr)
+declare void @_ZN1A3fooEv(ptr)
+declare void @_ZN1AC1Ev(ptr)
+declare void @fooBit(ptr, i1)
-declare i8* @llvm.launder.invariant.group.p0i8(i8*)
-declare i8* @llvm.strip.invariant.group.p0i8(i8*)
+declare ptr @llvm.launder.invariant.group.p0(ptr)
+declare ptr @llvm.strip.invariant.group.p0(ptr)
declare void @llvm.assume(i1 %cmp.vtables)
diff --git a/llvm/test/Transforms/GVN/invariant.start.ll b/llvm/test/Transforms/GVN/invariant.start.ll
index b482d0941d91e..f2d7dd05a01d4 100644
--- a/llvm/test/Transforms/GVN/invariant.start.ll
+++ b/llvm/test/Transforms/GVN/invariant.start.ll
@@ -2,58 +2,58 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
-declare {}* @llvm.invariant.start.p0i8(i64, i8* nocapture) nounwind readonly
-declare void @llvm.invariant.end.p0i8({}*, i64, i8* nocapture) nounwind
+declare ptr @llvm.invariant.start.p0(i64, ptr nocapture) nounwind readonly
+declare void @llvm.invariant.end.p0(ptr, i64, ptr nocapture) nounwind
; We forward store to the load across the invariant.start intrinsic
define i8 @forward_store() {
; CHECK-LABEL: @forward_store
-; CHECK: call {}* @llvm.invariant.start.p0i8(i64 1, i8* %a)
+; CHECK: call ptr @llvm.invariant.start.p0(i64 1, ptr %a)
; CHECK-NOT: load
; CHECK: ret i8 0
%a = alloca i8
- store i8 0, i8* %a
- %i = call {}* @llvm.invariant.start.p0i8(i64 1, i8* %a)
- %r = load i8, i8* %a
+ store i8 0, ptr %a
+ %i = call ptr @llvm.invariant.start.p0(i64 1, ptr %a)
+ %r = load i8, ptr %a
ret i8 %r
}
-declare i8 @dummy(i8* nocapture) nounwind readonly
+declare i8 @dummy(ptr nocapture) nounwind readonly
; We forward store to the load in the non-local analysis case,
; i.e. invariant.start is in another basic block.
define i8 @forward_store_nonlocal(i1 %cond) {
; CHECK-LABEL: forward_store_nonlocal
-; CHECK: call {}* @llvm.invariant.start.p0i8(i64 1, i8* %a)
+; CHECK: call ptr @llvm.invariant.start.p0(i64 1, ptr %a)
; CHECK: ret i8 0
; CHECK: ret i8 %val
%a = alloca i8
- store i8 0, i8* %a
- %i = call {}* @llvm.invariant.start.p0i8(i64 1, i8* %a)
+ store i8 0, ptr %a
+ %i = call ptr @llvm.invariant.start.p0(i64 1, ptr %a)
br i1 %cond, label %loadblock, label %exit
loadblock:
- %r = load i8, i8* %a
+ %r = load i8, ptr %a
ret i8 %r
exit:
- %val = call i8 @dummy(i8* %a)
+ %val = call i8 @dummy(ptr %a)
ret i8 %val
}
; We should not value forward %foo to the invariant.end corresponding to %bar.
define i8 @forward_store1() {
; CHECK-LABEL: forward_store1
-; CHECK: %foo = call {}* @llvm.invariant.start.p0i8
+; CHECK: %foo = call ptr @llvm.invariant.start.p0
; CHECK-NOT: load
-; CHECK: %bar = call {}* @llvm.invariant.start.p0i8
-; CHECK: call void @llvm.invariant.end.p0i8({}* %bar, i64 1, i8* %a)
+; CHECK: %bar = call ptr @llvm.invariant.start.p0
+; CHECK: call void @llvm.invariant.end.p0(ptr %bar, i64 1, ptr %a)
; CHECK: ret i8 0
%a = alloca i8
- store i8 0, i8* %a
- %foo = call {}* @llvm.invariant.start.p0i8(i64 1, i8* %a)
- %r = load i8, i8* %a
- %bar = call {}* @llvm.invariant.start.p0i8(i64 1, i8* %a)
- call void @llvm.invariant.end.p0i8({}* %bar, i64 1, i8* %a)
+ store i8 0, ptr %a
+ %foo = call ptr @llvm.invariant.start.p0(i64 1, ptr %a)
+ %r = load i8, ptr %a
+ %bar = call ptr @llvm.invariant.start.p0(i64 1, ptr %a)
+ call void @llvm.invariant.end.p0(ptr %bar, i64 1, ptr %a)
ret i8 %r
}
diff --git a/llvm/test/Transforms/GVN/lifetime-simple.ll b/llvm/test/Transforms/GVN/lifetime-simple.ll
index d75699120ceaf..bf7a6ef754b02 100644
--- a/llvm/test/Transforms/GVN/lifetime-simple.ll
+++ b/llvm/test/Transforms/GVN/lifetime-simple.ll
@@ -3,18 +3,18 @@
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin7"
-define i8 @test(i8* %P) nounwind {
+define i8 @test(ptr %P) nounwind {
; CHECK: lifetime.start
; CHECK-NOT: load
; CHECK: lifetime.end
entry:
- call void @llvm.lifetime.start.p0i8(i64 32, i8* %P)
- %0 = load i8, i8* %P
- store i8 1, i8* %P
- call void @llvm.lifetime.end.p0i8(i64 32, i8* %P)
- %1 = load i8, i8* %P
+ call void @llvm.lifetime.start.p0(i64 32, ptr %P)
+ %0 = load i8, ptr %P
+ store i8 1, ptr %P
+ call void @llvm.lifetime.end.p0(i64 32, ptr %P)
+ %1 = load i8, ptr %P
ret i8 %1
}
-declare void @llvm.lifetime.start.p0i8(i64 %S, i8* nocapture %P) readonly
-declare void @llvm.lifetime.end.p0i8(i64 %S, i8* nocapture %P)
+declare void @llvm.lifetime.start.p0(i64 %S, ptr nocapture %P) readonly
+declare void @llvm.lifetime.end.p0(i64 %S, ptr nocapture %P)
diff --git a/llvm/test/Transforms/GVN/load-constant-mem.ll b/llvm/test/Transforms/GVN/load-constant-mem.ll
index 18f4215ab978f..d5858d6c6113b 100644
--- a/llvm/test/Transforms/GVN/load-constant-mem.ll
+++ b/llvm/test/Transforms/GVN/load-constant-mem.ll
@@ -2,18 +2,18 @@
; PR4189
@G = external constant [4 x i32]
-define i32 @test(i8* %p, i32 %i) nounwind {
+define i32 @test(ptr %p, i32 %i) nounwind {
entry:
- %P = getelementptr [4 x i32], [4 x i32]* @G, i32 0, i32 %i
- %A = load i32, i32* %P
- store i8 4, i8* %p
- %B = load i32, i32* %P
+ %P = getelementptr [4 x i32], ptr @G, i32 0, i32 %i
+ %A = load i32, ptr %P
+ store i8 4, ptr %p
+ %B = load i32, ptr %P
%C = sub i32 %A, %B
ret i32 %C
}
-; CHECK: define i32 @test(i8* %p, i32 %i) #0 {
+; CHECK: define i32 @test(ptr %p, i32 %i) #0 {
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i8 4, i8* %p, align 1
+; CHECK-NEXT: store i8 4, ptr %p, align 1
; CHECK-NEXT: ret i32 0
; CHECK-NEXT: }
diff --git a/llvm/test/Transforms/GVN/load-dead-block.ll b/llvm/test/Transforms/GVN/load-dead-block.ll
index 90688a559ad81..e2454f669002b 100644
--- a/llvm/test/Transforms/GVN/load-dead-block.ll
+++ b/llvm/test/Transforms/GVN/load-dead-block.ll
@@ -1,36 +1,36 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -passes=gvn < %s | FileCheck %s
-define i64 @test(i64** noalias %p, i64* noalias %q) {
+define i64 @test(ptr noalias %p, ptr noalias %q) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i64* [[Q:%.*]], i64** [[P:%.*]], align 8
+; CHECK-NEXT: store ptr [[Q:%.*]], ptr [[P:%.*]], align 8
; CHECK-NEXT: br i1 false, label [[IF:%.*]], label [[MERGE:%.*]]
; CHECK: if:
-; CHECK-NEXT: call void @clobber(i64** [[P]])
+; CHECK-NEXT: call void @clobber(ptr [[P]])
; CHECK-NEXT: br label [[MERGE]]
; CHECK: merge:
-; CHECK-NEXT: store i64 1, i64* [[Q]], align 4
-; CHECK-NEXT: [[Q3:%.*]] = getelementptr i64, i64* [[Q]], i64 1
-; CHECK-NEXT: store i64 2, i64* [[Q3]], align 4
+; CHECK-NEXT: store i64 1, ptr [[Q]], align 4
+; CHECK-NEXT: [[Q3:%.*]] = getelementptr i64, ptr [[Q]], i64 1
+; CHECK-NEXT: store i64 2, ptr [[Q3]], align 4
; CHECK-NEXT: ret i64 1
;
entry:
- store i64* %q, i64** %p
+ store ptr %q, ptr %p
br i1 false, label %if, label %merge
if:
- call void @clobber(i64** %p)
+ call void @clobber(ptr %p)
br label %merge
merge:
- %q2 = load i64*, i64** %p
- store i64 1, i64* %q2
- %v = load i64, i64* %q
- %q3 = getelementptr i64, i64* %q, i64 %v
- store i64 2, i64* %q3
- %v2 = load i64, i64* %q
+ %q2 = load ptr, ptr %p
+ store i64 1, ptr %q2
+ %v = load i64, ptr %q
+ %q3 = getelementptr i64, ptr %q, i64 %v
+ store i64 2, ptr %q3
+ %v2 = load i64, ptr %q
ret i64 %v2
}
-declare void @clobber(i64** %p)
+declare void @clobber(ptr %p)
diff --git a/llvm/test/Transforms/GVN/load-from-unreachable-predecessor.ll b/llvm/test/Transforms/GVN/load-from-unreachable-predecessor.ll
index d76f250b0455c..6ad0f59dbe292 100644
--- a/llvm/test/Transforms/GVN/load-from-unreachable-predecessor.ll
+++ b/llvm/test/Transforms/GVN/load-from-unreachable-predecessor.ll
@@ -3,18 +3,18 @@
; Check that an unreachable predecessor to a PHI node doesn't cause a crash.
; PR21625.
-define i32 @f(i32** %f) {
+define i32 @f(ptr %f) {
; CHECK: bb0:
; Load should be removed, since it's ignored.
; CHECK-NEXT: br label
bb0:
- %bar = load i32*, i32** %f
+ %bar = load ptr, ptr %f
br label %bb2
bb1:
- %zed = load i32*, i32** %f
+ %zed = load ptr, ptr %f
br i1 false, label %bb1, label %bb2
bb2:
- %foo = phi i32* [ null, %bb0 ], [ %zed, %bb1 ]
- %storemerge = load i32, i32* %foo
+ %foo = phi ptr [ null, %bb0 ], [ %zed, %bb1 ]
+ %storemerge = load i32, ptr %foo
ret i32 %storemerge
}
diff --git a/llvm/test/Transforms/GVN/load-of-pointer-select-available.ll b/llvm/test/Transforms/GVN/load-of-pointer-select-available.ll
index 4db9e34dab389..6cde5d19f2c82 100644
--- a/llvm/test/Transforms/GVN/load-of-pointer-select-available.ll
+++ b/llvm/test/Transforms/GVN/load-of-pointer-select-available.ll
@@ -1,247 +1,247 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes='gvn' -S %s | FileCheck %s
-define i32 @load_of_ptr_select_can_be_replaced_by_value_select(i32* %ptr, i32* %end) {
+define i32 @load_of_ptr_select_can_be_replaced_by_value_select(ptr %ptr, ptr %end) {
; CHECK-LABEL: @load_of_ptr_select_can_be_replaced_by_value_select(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @
diff erent_phis_1(i32* %ptr, i32* %end) {
+define i32 @
diff erent_phis_1(ptr %ptr, ptr %end) {
; CHECK-LABEL: @
diff erent_phis_1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ null, [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ null, [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ null, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ null, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @
diff erent_phi_2(i32* %ptr, i32* %end) {
+define i32 @
diff erent_phi_2(ptr %ptr, ptr %end) {
; CHECK-LABEL: @
diff erent_phi_2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[START_PTR]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[START_PTR]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT:%.*]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %start.ptr, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %start.ptr, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @
diff erent_phis_3(i32* %ptr, i32* %end) {
+define i32 @
diff erent_phis_3(ptr %ptr, ptr %end) {
; CHECK-LABEL: @
diff erent_phis_3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ 19, [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
br label %loop
loop:
%l.2 = phi i32 [ 19, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @
diff erent_phis_4(i32* %ptr, i32* %end) {
+define i32 @
diff erent_phis_4(ptr %ptr, ptr %end) {
; CHECK-LABEL: @
diff erent_phis_4(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ 10, [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL:%.*]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ 10, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @load_before_loop_in_
diff erent_block(i32* %ptr, i32* %end, i1 %c) {
+define i32 @load_before_loop_in_
diff erent_block(ptr %ptr, ptr %end, i1 %c) {
; CHECK-LABEL: @load_before_loop_in_
diff erent_block(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br i1 [[C:%.*]], label [[PH:%.*]], label [[EXIT_2:%.*]]
; CHECK: ph:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[PH]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[PH]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[PH]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[PH]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[PH]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
; CHECK: exit.2:
; CHECK-NEXT: ret i32 0
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br i1 %c, label %ph, label %exit.2
ph:
@@ -249,696 +249,696 @@ ph:
loop:
%l.2 = phi i32 [ %l.2.pre, %ph ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %ph ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %ph ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %ph ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %ph ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
exit.2:
ret i32 0
}
-define i32 @selects_use_
diff erent_compares(i32* %ptr, i32* %end) {
+define i32 @selects_use_
diff erent_compares(ptr %ptr, ptr %end) {
; CHECK-LABEL: @selects_use_
diff erent_compares(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[CMP_2:%.*]] = icmp ult i32 [[L_1]], 10
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_2]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%cmp.2 = icmp ult i32 %l.1, 10
%min.val = select i1 %cmp.2, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @value_select_
diff erent_value_1(i32* %ptr, i32* %end) {
+define i32 @value_select_
diff erent_value_1(ptr %ptr, ptr %end) {
; CHECK-LABEL: @value_select_
diff erent_value_1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 10
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 10
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @value_select_
diff erent_value_2(i32* %ptr, i32* %end, i32* %ptr.2) {
+define i32 @value_select_
diff erent_value_2(ptr %ptr, ptr %end, ptr %ptr.2) {
; CHECK-LABEL: @value_select_
diff erent_value_2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
-; CHECK-NEXT: [[L_1_PRE:%.*]] = load i32, i32* [[PTR_2:%.*]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
+; CHECK-NEXT: [[L_1_PRE:%.*]] = load i32, ptr [[PTR_2:%.*]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1_PRE]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1_PRE]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.2, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.2, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @pointer_select_clobbered_1(i32* %ptr, i32* %end) {
+define i32 @pointer_select_clobbered_1(ptr %ptr, ptr %end) {
; CHECK-LABEL: @pointer_select_clobbered_1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
-; CHECK-NEXT: store i32 99, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
+; CHECK-NEXT: store i32 99, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
- store i32 99, i32* %ptr
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
+ store i32 99, ptr %ptr
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @pointer_select_clobbered_in_loop(i32* %ptr, i32* %end) {
+define i32 @pointer_select_clobbered_in_loop(ptr %ptr, ptr %end) {
; CHECK-LABEL: @pointer_select_clobbered_in_loop(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: store i32 99, i32* [[PTR]], align 4
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: store i32 99, ptr [[PTR]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- store i32 99, i32* %ptr
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ store i32 99, ptr %ptr
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @pointer_select_clobbered_in_loop_2(i32* %ptr, i32* %end) {
+define i32 @pointer_select_clobbered_in_loop_2(ptr %ptr, ptr %end) {
; CHECK-LABEL: @pointer_select_clobbered_in_loop_2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
-; CHECK-NEXT: store i32 99, i32* [[PTR]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
+; CHECK-NEXT: store i32 99, ptr [[PTR]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- store i32 99, i32* %ptr
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ store i32 99, ptr %ptr
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @pointer_select_clobbered_in_loop_3(i32* %ptr, i32* %end) {
+define i32 @pointer_select_clobbered_in_loop_3(ptr %ptr, ptr %end) {
; CHECK-LABEL: @pointer_select_clobbered_in_loop_3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
-; CHECK-NEXT: store i32 99, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
+; CHECK-NEXT: store i32 99, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
- store i32 99, i32* %ptr.iv
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
+ store i32 99, ptr %ptr.iv
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @pointer_select_clobbered_in_loop_4(i32* %ptr, i32* %end, i32* %ptr.2) {
+define i32 @pointer_select_clobbered_in_loop_4(ptr %ptr, ptr %end, ptr %ptr.2) {
; CHECK-LABEL: @pointer_select_clobbered_in_loop_4(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: store i32 99, i32* [[PTR_2:%.*]], align 4
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: store i32 99, ptr [[PTR_2:%.*]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- store i32 99, i32* %ptr.2
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ store i32 99, ptr %ptr.2
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
declare void @may_write()
-define i32 @pointer_select_clobbered_by_call_before_loop(i32* %ptr, i32* %end, i32* %ptr.2) {
+define i32 @pointer_select_clobbered_by_call_before_loop(ptr %ptr, ptr %end, ptr %ptr.2) {
; CHECK-LABEL: @pointer_select_clobbered_by_call_before_loop(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: call void @may_write()
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
call void @may_write()
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @pointer_select_clobbered_by_call_in_loop(i32* %ptr, i32* %end, i32* %ptr.2) {
+define i32 @pointer_select_clobbered_by_call_in_loop(ptr %ptr, ptr %end, ptr %ptr.2) {
; CHECK-LABEL: @pointer_select_clobbered_by_call_in_loop(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
; CHECK-NEXT: call void @may_write()
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
call void @may_write()
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @pointer_select_clobbered_by_call_after_loop(i32* %ptr, i32* %end, i32* %ptr.2) {
+define i32 @pointer_select_clobbered_by_call_after_loop(ptr %ptr, ptr %end, ptr %ptr.2) {
; CHECK-LABEL: @pointer_select_clobbered_by_call_after_loop(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
; CHECK-NEXT: call void @may_write()
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
call void @may_write()
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @pointer_select_clobbered_after_loop(i32* %ptr, i32* %end) {
+define i32 @pointer_select_clobbered_after_loop(ptr %ptr, ptr %end) {
; CHECK-LABEL: @pointer_select_clobbered_after_loop(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: store i32 99, i32* [[PTR]], align 4
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: store i32 99, ptr [[PTR]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- store i32 99, i32* %ptr
- %res = load i32, i32* %min.select, align 4
+ store i32 99, ptr %ptr
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
declare void @may_throw() readonly
-define i32 @pointer_select_may_throw_before_loop(i32* %ptr, i32* %end) {
+define i32 @pointer_select_may_throw_before_loop(ptr %ptr, ptr %end) {
; CHECK-LABEL: @pointer_select_may_throw_before_loop(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: call void @may_throw()
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
call void @may_throw()
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @pointer_select_may_throw_in_loop(i32* %ptr, i32* %end) {
+define i32 @pointer_select_may_throw_in_loop(ptr %ptr, ptr %end) {
; CHECK-LABEL: @pointer_select_may_throw_in_loop(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: call void @may_throw()
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
call void @may_throw()
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
-define i32 @pointer_select_may_throw_after_loop(i32* %ptr, i32* %end) {
+define i32 @pointer_select_may_throw_after_loop(ptr %ptr, ptr %end) {
; CHECK-LABEL: @pointer_select_may_throw_after_loop(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[START_PTR:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
+; CHECK-NEXT: [[L_2_PRE:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[L_2:%.*]] = phi i32 [ [[L_2_PRE]], [[ENTRY:%.*]] ], [ [[MIN_VAL:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[PTR_IV:%.*]] = phi i32* [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[MIN_PTR:%.*]] = phi i32* [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[L_1:%.*]] = load i32, i32* [[PTR_IV]], align 4
+; CHECK-NEXT: [[PTR_IV:%.*]] = phi ptr [ [[START_PTR]], [[ENTRY]] ], [ [[PTR_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[MIN_PTR:%.*]] = phi ptr [ [[PTR]], [[ENTRY]] ], [ [[MIN_SELECT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[L_1:%.*]] = load i32, ptr [[PTR_IV]], align 4
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[L_1]], [[L_2]]
; CHECK-NEXT: [[MIN_VAL]] = select i1 [[CMP_1]], i32 [[L_1]], i32 [[L_2]]
-; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], i32* [[PTR_IV]], i32* [[MIN_PTR]]
-; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, i32* [[PTR_IV]], i64 1
-; CHECK-NEXT: [[EC:%.*]] = icmp eq i32* [[PTR_IV_NEXT]], [[END:%.*]]
+; CHECK-NEXT: [[MIN_SELECT]] = select i1 [[CMP_1]], ptr [[PTR_IV]], ptr [[MIN_PTR]]
+; CHECK-NEXT: [[PTR_IV_NEXT]] = getelementptr inbounds i32, ptr [[PTR_IV]], i64 1
+; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[PTR_IV_NEXT]], [[END:%.*]]
; CHECK-NEXT: br i1 [[EC]], label [[EXIT:%.*]], label [[LOOP]]
; CHECK: exit:
; CHECK-NEXT: call void @may_throw()
-; CHECK-NEXT: [[RES:%.*]] = load i32, i32* [[MIN_SELECT]], align 4
+; CHECK-NEXT: [[RES:%.*]] = load i32, ptr [[MIN_SELECT]], align 4
; CHECK-NEXT: ret i32 [[RES]]
;
entry:
- %start.ptr = getelementptr inbounds i32, i32* %ptr, i64 1
- %l.2.pre = load i32, i32* %ptr, align 4
+ %start.ptr = getelementptr inbounds i32, ptr %ptr, i64 1
+ %l.2.pre = load i32, ptr %ptr, align 4
br label %loop
loop:
%l.2 = phi i32 [ %l.2.pre, %entry ], [ %min.val, %loop ]
- %ptr.iv = phi i32* [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
- %min.ptr = phi i32* [ %ptr, %entry ], [ %min.select, %loop ]
- %l.1 = load i32, i32* %ptr.iv, align 4
+ %ptr.iv = phi ptr [ %start.ptr, %entry ], [ %ptr.iv.next, %loop ]
+ %min.ptr = phi ptr [ %ptr, %entry ], [ %min.select, %loop ]
+ %l.1 = load i32, ptr %ptr.iv, align 4
%cmp.1 = icmp ult i32 %l.1, %l.2
%min.val = select i1 %cmp.1, i32 %l.1, i32 %l.2
- %min.select = select i1 %cmp.1, i32* %ptr.iv, i32* %min.ptr
- %ptr.iv.next = getelementptr inbounds i32, i32* %ptr.iv, i64 1
- %ec = icmp eq i32* %ptr.iv.next, %end
+ %min.select = select i1 %cmp.1, ptr %ptr.iv, ptr %min.ptr
+ %ptr.iv.next = getelementptr inbounds i32, ptr %ptr.iv, i64 1
+ %ec = icmp eq ptr %ptr.iv.next, %end
br i1 %ec, label %exit, label %loop
exit:
call void @may_throw()
- %res = load i32, i32* %min.select, align 4
+ %res = load i32, ptr %min.select, align 4
ret i32 %res
}
diff --git a/llvm/test/Transforms/GVN/loadpre-context.ll b/llvm/test/Transforms/GVN/loadpre-context.ll
index 368aeab0aefa8..b0738892d8400 100644
--- a/llvm/test/Transforms/GVN/loadpre-context.ll
+++ b/llvm/test/Transforms/GVN/loadpre-context.ll
@@ -3,20 +3,20 @@
; load may be speculated, address is not null using context search.
; There is a critical edge.
-define i32 @loadpre_critical_edge(i32* align 8 dereferenceable_or_null(48) %arg, i32 %N) nofree nosync {
+define i32 @loadpre_critical_edge(ptr align 8 dereferenceable_or_null(48) %arg, i32 %N) nofree nosync {
; CHECK-LABEL: @loadpre_critical_edge(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* [[ARG:%.*]], null
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq ptr [[ARG:%.*]], null
; CHECK-NEXT: br i1 [[CMP]], label [[NULL_EXIT:%.*]], label [[ENTRY_HEADER_CRIT_EDGE:%.*]]
; CHECK: entry.header_crit_edge:
-; CHECK-NEXT: [[V_PRE:%.*]] = load i32, i32* [[ARG]], align 4
+; CHECK-NEXT: [[V_PRE:%.*]] = load i32, ptr [[ARG]], align 4
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
; CHECK-NEXT: [[V:%.*]] = phi i32 [ [[V_PRE]], [[ENTRY_HEADER_CRIT_EDGE]] ], [ [[SUM:%.*]], [[HEADER]] ]
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_HEADER_CRIT_EDGE]] ], [ [[IV_NEXT:%.*]], [[HEADER]] ]
; CHECK-NEXT: [[NEW_V:%.*]] = call i32 @ro_foo(i32 [[IV]]) #[[ATTR0:[0-9]+]]
; CHECK-NEXT: [[SUM]] = add i32 [[NEW_V]], [[V]]
-; CHECK-NEXT: store i32 [[SUM]], i32* [[ARG]], align 4
+; CHECK-NEXT: store i32 [[SUM]], ptr [[ARG]], align 4
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N:%.*]]
; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[HEADER]]
@@ -26,16 +26,16 @@ define i32 @loadpre_critical_edge(i32* align 8 dereferenceable_or_null(48) %arg,
; CHECK-NEXT: ret i32 0
;
entry:
- %cmp = icmp eq i32* %arg, null
+ %cmp = icmp eq ptr %arg, null
br i1 %cmp, label %null_exit, label %header
header:
%iv = phi i32 [0, %entry], [%iv.next, %header]
; Call prevents to move load over due to it does not guarantee to return.
%new_v = call i32 @ro_foo(i32 %iv) readnone
- %v = load i32, i32* %arg
+ %v = load i32, ptr %arg
%sum = add i32 %new_v, %v
- store i32 %sum, i32* %arg
+ store i32 %sum, ptr %arg
%iv.next = add i32 %iv, 1
%cond = icmp eq i32 %iv.next, %N
br i1 %cond, label %exit, label %header
@@ -48,20 +48,20 @@ null_exit:
}
; load may be speculated, address is not null using context search.
-define i32 @loadpre_basic(i32* align 8 dereferenceable_or_null(48) %arg, i32 %N) nofree nosync {
+define i32 @loadpre_basic(ptr align 8 dereferenceable_or_null(48) %arg, i32 %N) nofree nosync {
; CHECK-LABEL: @loadpre_basic(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* [[ARG:%.*]], null
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq ptr [[ARG:%.*]], null
; CHECK-NEXT: br i1 [[CMP]], label [[NULL_EXIT:%.*]], label [[PREHEADER:%.*]]
; CHECK: preheader:
-; CHECK-NEXT: [[V_PRE:%.*]] = load i32, i32* [[ARG]], align 4
+; CHECK-NEXT: [[V_PRE:%.*]] = load i32, ptr [[ARG]], align 4
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
; CHECK-NEXT: [[V:%.*]] = phi i32 [ [[V_PRE]], [[PREHEADER]] ], [ [[SUM:%.*]], [[HEADER]] ]
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[PREHEADER]] ], [ [[IV_NEXT:%.*]], [[HEADER]] ]
; CHECK-NEXT: [[NEW_V:%.*]] = call i32 @ro_foo(i32 [[IV]]) #[[ATTR0]]
; CHECK-NEXT: [[SUM]] = add i32 [[NEW_V]], [[V]]
-; CHECK-NEXT: store i32 [[SUM]], i32* [[ARG]], align 4
+; CHECK-NEXT: store i32 [[SUM]], ptr [[ARG]], align 4
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N:%.*]]
; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[HEADER]]
@@ -71,7 +71,7 @@ define i32 @loadpre_basic(i32* align 8 dereferenceable_or_null(48) %arg, i32 %N)
; CHECK-NEXT: ret i32 0
;
entry:
- %cmp = icmp eq i32* %arg, null
+ %cmp = icmp eq ptr %arg, null
br i1 %cmp, label %null_exit, label %preheader
preheader:
@@ -81,9 +81,9 @@ header:
%iv = phi i32 [0, %preheader], [%iv.next, %header]
; Call prevents to move load over due to it does not guarantee to return.
%new_v = call i32 @ro_foo(i32 %iv) readnone
- %v = load i32, i32* %arg
+ %v = load i32, ptr %arg
%sum = add i32 %new_v, %v
- store i32 %sum, i32* %arg
+ store i32 %sum, ptr %arg
%iv.next = add i32 %iv, 1
%cond = icmp eq i32 %iv.next, %N
br i1 %cond, label %exit, label %header
@@ -96,21 +96,21 @@ null_exit:
}
; load cannot be speculated, check "address is not null" does not dominate the loop.
-define i32 @loadpre_maybe_null(i32* align 8 dereferenceable_or_null(48) %arg, i32 %N, i1 %c) nofree nosync {
+define i32 @loadpre_maybe_null(ptr align 8 dereferenceable_or_null(48) %arg, i32 %N, i1 %c) nofree nosync {
; CHECK-LABEL: @loadpre_maybe_null(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C:%.*]], label [[NULL_CHECK:%.*]], label [[PREHEADER:%.*]]
; CHECK: null_check:
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* [[ARG:%.*]], null
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq ptr [[ARG:%.*]], null
; CHECK-NEXT: br i1 [[CMP]], label [[NULL_EXIT:%.*]], label [[PREHEADER]]
; CHECK: preheader:
; CHECK-NEXT: br label [[HEADER:%.*]]
; CHECK: header:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[PREHEADER]] ], [ [[IV_NEXT:%.*]], [[HEADER]] ]
; CHECK-NEXT: [[NEW_V:%.*]] = call i32 @ro_foo(i32 [[IV]]) #[[ATTR0]]
-; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[ARG]], align 4
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[ARG]], align 4
; CHECK-NEXT: [[SUM:%.*]] = add i32 [[NEW_V]], [[V]]
-; CHECK-NEXT: store i32 [[SUM]], i32* [[ARG]], align 4
+; CHECK-NEXT: store i32 [[SUM]], ptr [[ARG]], align 4
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N:%.*]]
; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[HEADER]]
@@ -123,7 +123,7 @@ entry:
br i1 %c, label %null_check, label %preheader
null_check:
- %cmp = icmp eq i32* %arg, null
+ %cmp = icmp eq ptr %arg, null
br i1 %cmp, label %null_exit, label %preheader
preheader:
@@ -133,9 +133,9 @@ header:
%iv = phi i32 [0, %preheader], [%iv.next, %header]
; Call prevents to move load over due to it does not guarantee to return.
%new_v = call i32 @ro_foo(i32 %iv) readnone
- %v = load i32, i32* %arg
+ %v = load i32, ptr %arg
%sum = add i32 %new_v, %v
- store i32 %sum, i32* %arg
+ store i32 %sum, ptr %arg
%iv.next = add i32 %iv, 1
%cond = icmp eq i32 %iv.next, %N
br i1 %cond, label %exit, label %header
diff --git a/llvm/test/Transforms/GVN/loadpre-missed-opportunity.ll b/llvm/test/Transforms/GVN/loadpre-missed-opportunity.ll
index 306a886cbe419..15a392bcf59db 100644
--- a/llvm/test/Transforms/GVN/loadpre-missed-opportunity.ll
+++ b/llvm/test/Transforms/GVN/loadpre-missed-opportunity.ll
@@ -2,18 +2,18 @@
; RUN: opt < %s -passes=gvn -gvn-max-block-speculations=1 -S | FileCheck -check-prefix=PRE %s
; RUN: opt < %s -passes=gvn -gvn-max-block-speculations=0 -S | FileCheck -check-prefix=CHECK %s
-define i32 @loadpre_opportunity(i32** %arg, i1 %arg1, i1 %arg2, i1 %arg3) {
+define i32 @loadpre_opportunity(ptr %arg, i1 %arg1, i1 %arg2, i1 %arg3) {
; PRE-LABEL: @loadpre_opportunity(
; PRE-NEXT: bb:
-; PRE-NEXT: [[I:%.*]] = load i32*, i32** [[ARG:%.*]], align 8
-; PRE-NEXT: [[I6:%.*]] = call i32 @use(i32* [[I]])
+; PRE-NEXT: [[I:%.*]] = load ptr, ptr [[ARG:%.*]], align 8
+; PRE-NEXT: [[I6:%.*]] = call i32 @use(ptr [[I]])
; PRE-NEXT: br label [[BB11:%.*]]
; PRE: bb7:
-; PRE-NEXT: [[I8:%.*]] = phi i32* [ [[I8_PRE:%.*]], [[BB17_BB7_CRIT_EDGE:%.*]] ], [ [[I81:%.*]], [[BB11]] ]
-; PRE-NEXT: [[I10:%.*]] = call i32 @use(i32* [[I8]])
+; PRE-NEXT: [[I8:%.*]] = phi ptr [ [[I8_PRE:%.*]], [[BB17_BB7_CRIT_EDGE:%.*]] ], [ [[I81:%.*]], [[BB11]] ]
+; PRE-NEXT: [[I10:%.*]] = call i32 @use(ptr [[I8]])
; PRE-NEXT: br label [[BB11]]
; PRE: bb11:
-; PRE-NEXT: [[I81]] = phi i32* [ [[I]], [[BB:%.*]] ], [ [[I8]], [[BB7:%.*]] ]
+; PRE-NEXT: [[I81]] = phi ptr [ [[I]], [[BB:%.*]] ], [ [[I8]], [[BB7:%.*]] ]
; PRE-NEXT: [[I12:%.*]] = phi i32 [ [[I6]], [[BB]] ], [ [[I10]], [[BB7]] ]
; PRE-NEXT: br i1 [[ARG1:%.*]], label [[BB7]], label [[BB13:%.*]]
; PRE: bb13:
@@ -29,19 +29,19 @@ define i32 @loadpre_opportunity(i32** %arg, i1 %arg1, i1 %arg2, i1 %arg3) {
; PRE-NEXT: [[I18:%.*]] = call i1 @cond()
; PRE-NEXT: br i1 [[I18]], label [[BB17_BB7_CRIT_EDGE]], label [[BB19:%.*]]
; PRE: bb17.bb7_crit_edge:
-; PRE-NEXT: [[I8_PRE]] = load i32*, i32** [[ARG]], align 8
+; PRE-NEXT: [[I8_PRE]] = load ptr, ptr [[ARG]], align 8
; PRE-NEXT: br label [[BB7]]
; PRE: bb19:
; PRE-NEXT: ret i32 [[I12]]
;
; CHECK-LABEL: @loadpre_opportunity(
; CHECK-NEXT: bb:
-; CHECK-NEXT: [[I:%.*]] = load i32*, i32** [[ARG:%.*]], align 8
-; CHECK-NEXT: [[I6:%.*]] = call i32 @use(i32* [[I]])
+; CHECK-NEXT: [[I:%.*]] = load ptr, ptr [[ARG:%.*]], align 8
+; CHECK-NEXT: [[I6:%.*]] = call i32 @use(ptr [[I]])
; CHECK-NEXT: br label [[BB11:%.*]]
; CHECK: bb7:
-; CHECK-NEXT: [[I8:%.*]] = load i32*, i32** [[ARG]], align 8
-; CHECK-NEXT: [[I10:%.*]] = call i32 @use(i32* [[I8]])
+; CHECK-NEXT: [[I8:%.*]] = load ptr, ptr [[ARG]], align 8
+; CHECK-NEXT: [[I10:%.*]] = call i32 @use(ptr [[I8]])
; CHECK-NEXT: br label [[BB11]]
; CHECK: bb11:
; CHECK-NEXT: [[I12:%.*]] = phi i32 [ [[I6]], [[BB:%.*]] ], [ [[I10]], [[BB7:%.*]] ]
@@ -62,18 +62,16 @@ define i32 @loadpre_opportunity(i32** %arg, i1 %arg1, i1 %arg2, i1 %arg3) {
; CHECK-NEXT: ret i32 [[I12]]
;
bb:
- %i = load i32*, i32** %arg, align 8
- %i4 = getelementptr inbounds i32, i32* %i, i64 0
+ %i = load ptr, ptr %arg, align 8
br label %bb5
bb5:
- %i6 = call i32 @use(i32* %i4)
+ %i6 = call i32 @use(ptr %i)
br label %bb11
bb7:
- %i8 = load i32*, i32** %arg, align 8
- %i9 = getelementptr inbounds i32, i32* %i8, i64 0
- %i10 = call i32 @use(i32* %i9)
+ %i8 = load ptr, ptr %arg, align 8
+ %i10 = call i32 @use(ptr %i8)
br label %bb11
bb11:
@@ -102,5 +100,5 @@ bb19:
}
declare void @somecall()
-declare i32 @use(i32*) readnone
+declare i32 @use(ptr) readnone
declare i1 @cond() readnone
diff --git a/llvm/test/Transforms/GVN/malloc-load-removal.ll b/llvm/test/Transforms/GVN/malloc-load-removal.ll
index 39a674be74d09..96b5bef5031e7 100644
--- a/llvm/test/Transforms/GVN/malloc-load-removal.ll
+++ b/llvm/test/Transforms/GVN/malloc-load-removal.ll
@@ -4,21 +4,21 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.8.0"
-declare noalias i8* @malloc(i64) nounwind allockind("alloc,uninitialized") allocsize(0)
+declare noalias ptr @malloc(i64) nounwind allockind("alloc,uninitialized") allocsize(0)
-define noalias i8* @test1() nounwind uwtable ssp {
+define noalias ptr @test1() nounwind uwtable ssp {
entry:
- %call = tail call i8* @malloc(i64 100) nounwind
- %0 = load i8, i8* %call, align 1
+ %call = tail call ptr @malloc(i64 100) nounwind
+ %0 = load i8, ptr %call, align 1
%tobool = icmp eq i8 %0, 0
br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry
- store i8 0, i8* %call, align 1
+ store i8 0, ptr %call, align 1
br label %if.end
if.end: ; preds = %if.then, %entry
- ret i8* %call
+ ret ptr %call
; CHECK-LABEL: @test1(
; CHECK-NOT: load
@@ -29,21 +29,21 @@ if.end: ; preds = %if.then, %entry
; CHECK_NO_LIBCALLS: icmp
}
-declare noalias i8* @_Znwm(i64) nounwind
+declare noalias ptr @_Znwm(i64) nounwind
-define noalias i8* @test2() nounwind uwtable ssp {
+define noalias ptr @test2() nounwind uwtable ssp {
entry:
- %call = tail call i8* @_Znwm(i64 100) nounwind
- %0 = load i8, i8* %call, align 1
+ %call = tail call ptr @_Znwm(i64 100) nounwind
+ %0 = load i8, ptr %call, align 1
%tobool = icmp eq i8 %0, 0
br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry
- store i8 0, i8* %call, align 1
+ store i8 0, ptr %call, align 1
br label %if.end
if.end: ; preds = %if.then, %entry
- ret i8* %call
+ ret ptr %call
; CHECK-LABEL: @test2(
; CHECK-NOT: load
@@ -54,21 +54,21 @@ if.end: ; preds = %if.then, %entry
; CHECK_NO_LIBCALLS: icmp
}
-declare noalias i8* @aligned_alloc(i64 allocalign, i64) nounwind allockind("alloc,uninitialized,aligned") allocsize(1)
+declare noalias ptr @aligned_alloc(i64 allocalign, i64) nounwind allockind("alloc,uninitialized,aligned") allocsize(1)
-define noalias i8* @test3() nounwind uwtable ssp {
+define noalias ptr @test3() nounwind uwtable ssp {
entry:
- %call = tail call i8* @aligned_alloc(i64 256, i64 32) nounwind
- %0 = load i8, i8* %call, align 32
+ %call = tail call ptr @aligned_alloc(i64 256, i64 32) nounwind
+ %0 = load i8, ptr %call, align 32
%tobool = icmp eq i8 %0, 0
br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry
- store i8 0, i8* %call, align 1
+ store i8 0, ptr %call, align 1
br label %if.end
if.end: ; preds = %if.then, %entry
- ret i8* %call
+ ret ptr %call
; CHECK-LABEL: @test3(
; CHECK-NOT: load
diff --git a/llvm/test/Transforms/GVN/masked-load-store-vn-crash.ll b/llvm/test/Transforms/GVN/masked-load-store-vn-crash.ll
index 334d2b9b0fb41..466f787896c09 100644
--- a/llvm/test/Transforms/GVN/masked-load-store-vn-crash.ll
+++ b/llvm/test/Transforms/GVN/masked-load-store-vn-crash.ll
@@ -5,16 +5,16 @@
define fastcc void @test() {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[WIDE_MASKED_LOAD_1_I:%.*]] = tail call <4 x i64> @llvm.masked.load.v4i64.p0v4i64(<4 x i64>* nonnull bitcast (i64* getelementptr inbounds ([8 x i64], [8 x i64]* @file_mask, i64 0, i64 7) to <4 x i64>*), i32 8, <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i64> undef)
+; CHECK-NEXT: [[WIDE_MASKED_LOAD_1_I:%.*]] = tail call <4 x i64> @llvm.masked.load.v4i64.p0(ptr nonnull getelementptr inbounds ([8 x i64], ptr @file_mask, i64 0, i64 7), i32 8, <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i64> undef)
; CHECK-NEXT: unreachable
;
entry:
- %wide.masked.load.1.i = tail call <4 x i64> @llvm.masked.load.v4i64.p0v4i64(<4 x i64>* nonnull bitcast (i64* getelementptr inbounds ([8 x i64], [8 x i64]* @file_mask, i64 0, i64 7) to <4 x i64>*), i32 8, <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i64> undef) #2
- %.pre392.i = load i64, i64* getelementptr inbounds ([8 x i64], [8 x i64]* @file_mask, i64 0, i64 7), align 8
+ %wide.masked.load.1.i = tail call <4 x i64> @llvm.masked.load.v4i64.p0(ptr nonnull getelementptr inbounds ([8 x i64], ptr @file_mask, i64 0, i64 7), i32 8, <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i64> undef) #2
+ %.pre392.i = load i64, ptr getelementptr inbounds ([8 x i64], ptr @file_mask, i64 0, i64 7), align 8
%or156.4.i = or i64 %.pre392.i, undef
- %wide.masked.load614.1.i = tail call <4 x i64> @llvm.masked.load.v4i64.p0v4i64(<4 x i64>* nonnull bitcast (i64* getelementptr inbounds ([8 x i64], [8 x i64]* @file_mask, i64 0, i64 7) to <4 x i64>*), i32 8, <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i64> undef) #2
+ %wide.masked.load614.1.i = tail call <4 x i64> @llvm.masked.load.v4i64.p0(ptr nonnull getelementptr inbounds ([8 x i64], ptr @file_mask, i64 0, i64 7), i32 8, <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i64> undef) #2
unreachable
}
; Function Attrs: argmemonly nounwind readonly willreturn
-declare <4 x i64> @llvm.masked.load.v4i64.p0v4i64(<4 x i64>*, i32 immarg, <4 x i1>, <4 x i64>)
+declare <4 x i64> @llvm.masked.load.v4i64.p0(ptr, i32 immarg, <4 x i1>, <4 x i64>)
diff --git a/llvm/test/Transforms/GVN/masked-load-store.ll b/llvm/test/Transforms/GVN/masked-load-store.ll
index 8570911b8fc55..984a756591701 100644
--- a/llvm/test/Transforms/GVN/masked-load-store.ll
+++ b/llvm/test/Transforms/GVN/masked-load-store.ll
@@ -4,38 +4,38 @@
; Check that in both cases the second load is recognized as redundant
; and is removed.
-define <128 x i8> @f0(<128 x i8>* %a0, <128 x i8> %a1, <128 x i8> %a2) {
+define <128 x i8> @f0(ptr %a0, <128 x i8> %a1, <128 x i8> %a2) {
; CHECK-LABEL: @f0(
; CHECK-NEXT: [[V0:%.*]] = icmp eq <128 x i8> [[A1:%.*]], [[A2:%.*]]
-; CHECK-NEXT: [[V1:%.*]] = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* [[A0:%.*]], i32 4, <128 x i1> [[V0]], <128 x i8> undef)
+; CHECK-NEXT: [[V1:%.*]] = call <128 x i8> @llvm.masked.load.v128i8.p0(ptr [[A0:%.*]], i32 4, <128 x i1> [[V0]], <128 x i8> undef)
; CHECK-NEXT: [[V3:%.*]] = add <128 x i8> [[V1]], [[V1]]
; CHECK-NEXT: ret <128 x i8> [[V3]]
;
%v0 = icmp eq <128 x i8> %a1, %a2
- %v1 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
- %v2 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
+ %v1 = call <128 x i8> @llvm.masked.load.v128i8.p0(ptr %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
+ %v2 = call <128 x i8> @llvm.masked.load.v128i8.p0(ptr %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
%v3 = add <128 x i8> %v1, %v2
ret <128 x i8> %v3
}
-define <128 x i8> @f1(<128 x i8>* %a0, <128 x i8> %a1, <128 x i8> %a2) {
+define <128 x i8> @f1(ptr %a0, <128 x i8> %a1, <128 x i8> %a2) {
; CHECK-LABEL: @f1(
; CHECK-NEXT: [[V0:%.*]] = icmp eq <128 x i8> [[A1:%.*]], [[A2:%.*]]
-; CHECK-NEXT: [[V1:%.*]] = getelementptr <128 x i8>, <128 x i8>* [[A0:%.*]], i32 1
-; CHECK-NEXT: [[V2:%.*]] = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* [[A0]], i32 4, <128 x i1> [[V0]], <128 x i8> undef)
-; CHECK-NEXT: call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> [[A2]], <128 x i8>* [[V1]], i32 4, <128 x i1> [[V0]])
+; CHECK-NEXT: [[V1:%.*]] = getelementptr <128 x i8>, ptr [[A0:%.*]], i32 1
+; CHECK-NEXT: [[V2:%.*]] = call <128 x i8> @llvm.masked.load.v128i8.p0(ptr [[A0]], i32 4, <128 x i1> [[V0]], <128 x i8> undef)
+; CHECK-NEXT: call void @llvm.masked.store.v128i8.p0(<128 x i8> [[A2]], ptr [[V1]], i32 4, <128 x i1> [[V0]])
; CHECK-NEXT: [[V4:%.*]] = add <128 x i8> [[V2]], [[V2]]
; CHECK-NEXT: ret <128 x i8> [[V4]]
;
%v0 = icmp eq <128 x i8> %a1, %a2
- %v1 = getelementptr <128 x i8>, <128 x i8>* %a0, i32 1
- %v2 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
- call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> %a2, <128 x i8>* %v1, i32 4, <128 x i1> %v0)
- %v3 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
+ %v1 = getelementptr <128 x i8>, ptr %a0, i32 1
+ %v2 = call <128 x i8> @llvm.masked.load.v128i8.p0(ptr %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
+ call void @llvm.masked.store.v128i8.p0(<128 x i8> %a2, ptr %v1, i32 4, <128 x i1> %v0)
+ %v3 = call <128 x i8> @llvm.masked.load.v128i8.p0(ptr %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
%v4 = add <128 x i8> %v2, %v3
ret <128 x i8> %v4
}
-declare <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>*, i32, <128 x i1>, <128 x i8>)
-declare void @llvm.masked.store.v128i8.p0v128i8(<128 x i8>, <128 x i8>*, i32, <128 x i1>)
+declare <128 x i8> @llvm.masked.load.v128i8.p0(ptr, i32, <128 x i1>, <128 x i8>)
+declare void @llvm.masked.store.v128i8.p0(<128 x i8>, ptr, i32, <128 x i1>)
diff --git a/llvm/test/Transforms/GVN/mssa-update-dead-def.ll b/llvm/test/Transforms/GVN/mssa-update-dead-def.ll
index db7a4a3a30c4f..ad71a04f64664 100644
--- a/llvm/test/Transforms/GVN/mssa-update-dead-def.ll
+++ b/llvm/test/Transforms/GVN/mssa-update-dead-def.ll
@@ -4,7 +4,7 @@
; Make sure that we don't crash and end up with a valid MemorySSA.
; CHECK: @test()
-define void @test() personality i32* ()* null {
+define void @test() personality ptr null {
invoke void @bar()
to label %bar.normal unwind label %exceptional
@@ -22,7 +22,7 @@ baz.normal:
ret void
exceptional:
- %tmp9 = landingpad { i8*, i32 }
+ %tmp9 = landingpad { ptr, i32 }
cleanup
call void @foo()
ret void
diff --git a/llvm/test/Transforms/GVN/no-mem-dep-info.ll b/llvm/test/Transforms/GVN/no-mem-dep-info.ll
index dd366cf6a2359..0380b7ef10733 100644
--- a/llvm/test/Transforms/GVN/no-mem-dep-info.ll
+++ b/llvm/test/Transforms/GVN/no-mem-dep-info.ll
@@ -7,18 +7,18 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind readonly
-declare <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float>, i8*, <8 x i32>, <8 x float>, i8) #0
+declare <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float>, ptr, <8 x i32>, <8 x float>, i8) #0
; Function Attrs: nounwind
-define <8 x float> @foo1(i8* noalias readonly %arr.ptr, <8 x i32>* noalias readonly %vix.ptr, i8* noalias %t2.ptr) #1 {
+define <8 x float> @foo1(ptr noalias readonly %arr.ptr, ptr noalias readonly %vix.ptr, ptr noalias %t2.ptr) #1 {
allocas:
- %vix = load <8 x i32>, <8 x i32>* %vix.ptr, align 4
- %t1.ptr = getelementptr i8, i8* %arr.ptr, i8 4
+ %vix = load <8 x i32>, ptr %vix.ptr, align 4
+ %t1.ptr = getelementptr i8, ptr %arr.ptr, i8 4
- %v1 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, i8* %arr.ptr, <8 x i32> %vix, <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, i8 1) #2
- store i8 1, i8* %t1.ptr, align 4
+ %v1 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, ptr %arr.ptr, <8 x i32> %vix, <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, i8 1) #2
+ store i8 1, ptr %t1.ptr, align 4
- %v2 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, i8* %arr.ptr, <8 x i32> %vix, <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, i8 1) #2
+ %v2 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, ptr %arr.ptr, <8 x i32> %vix, <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, i8 1) #2
%res = fadd <8 x float> %v1, %v2
ret <8 x float> %res
diff --git a/llvm/test/Transforms/GVN/noalias.ll b/llvm/test/Transforms/GVN/noalias.ll
index 86d68d7888e25..931564db47b39 100644
--- a/llvm/test/Transforms/GVN/noalias.ll
+++ b/llvm/test/Transforms/GVN/noalias.ll
@@ -1,39 +1,39 @@
; RUN: opt -passes=gvn -S < %s | FileCheck %s
-define i32 @test1(i32* %p, i32* %q) {
-; CHECK-LABEL: @test1(i32* %p, i32* %q)
-; CHECK: load i32, i32* %p
+define i32 @test1(ptr %p, ptr %q) {
+; CHECK-LABEL: @test1(ptr %p, ptr %q)
+; CHECK: load i32, ptr %p
; CHECK-NOT: noalias
; CHECK: %c = add i32 %a, %a
- %a = load i32, i32* %p, !noalias !3
- %b = load i32, i32* %p
+ %a = load i32, ptr %p, !noalias !3
+ %b = load i32, ptr %p
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test2(i32* %p, i32* %q) {
-; CHECK-LABEL: @test2(i32* %p, i32* %q)
-; CHECK: load i32, i32* %p, align 4, !alias.scope ![[SCOPE1:[0-9]+]]
+define i32 @test2(ptr %p, ptr %q) {
+; CHECK-LABEL: @test2(ptr %p, ptr %q)
+; CHECK: load i32, ptr %p, align 4, !alias.scope ![[SCOPE1:[0-9]+]]
; CHECK: %c = add i32 %a, %a
- %a = load i32, i32* %p, !alias.scope !3
- %b = load i32, i32* %p, !alias.scope !3
+ %a = load i32, ptr %p, !alias.scope !3
+ %b = load i32, ptr %p, !alias.scope !3
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test3(i32* %p, i32* %q) {
-; CHECK-LABEL: @test3(i32* %p, i32* %q)
-; CHECK: load i32, i32* %p, align 4, !alias.scope ![[SCOPE2:[0-9]+]]
+define i32 @test3(ptr %p, ptr %q) {
+; CHECK-LABEL: @test3(ptr %p, ptr %q)
+; CHECK: load i32, ptr %p, align 4, !alias.scope ![[SCOPE2:[0-9]+]]
; CHECK: %c = add i32 %a, %a
- %a = load i32, i32* %p, !alias.scope !4
- %b = load i32, i32* %p, !alias.scope !5
+ %a = load i32, ptr %p, !alias.scope !4
+ %b = load i32, ptr %p, !alias.scope !5
%c = add i32 %a, %b
ret i32 %c
}
; CHECK: ![[SCOPE1]] = !{!{{[0-9]+}}}
; CHECK: ![[SCOPE2]] = !{!{{[0-9]+}}, !{{[0-9]+}}}
-declare i32 @foo(i32*) readonly
+declare i32 @foo(ptr) readonly
!0 = distinct !{!0, !2, !"callee0: %a"}
!1 = distinct !{!1, !2, !"callee0: %b"}
diff --git a/llvm/test/Transforms/GVN/non-integral-pointers-inseltpoison.ll b/llvm/test/Transforms/GVN/non-integral-pointers-inseltpoison.ll
index f0be08e97ac96..c0afce55cb3e8 100644
--- a/llvm/test/Transforms/GVN/non-integral-pointers-inseltpoison.ll
+++ b/llvm/test/Transforms/GVN/non-integral-pointers-inseltpoison.ll
@@ -4,52 +4,48 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:4:5"
target triple = "x86_64-unknown-linux-gnu"
-define void @f0(i1 %alwaysFalse, i64 %val, i64* %loc) {
+define void @f0(i1 %alwaysFalse, i64 %val, ptr %loc) {
; CHECK-LABEL: @f0(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i64 [[VAL:%.*]], i64* [[LOC:%.*]], align 8
+; CHECK-NEXT: store i64 [[VAL:%.*]], ptr [[LOC:%.*]], align 8
; CHECK-NEXT: br i1 [[ALWAYSFALSE:%.*]], label [[NEVERTAKEN:%.*]], label [[ALWAYSTAKEN:%.*]]
; CHECK: neverTaken:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i64* [[LOC]] to i8 addrspace(4)**
-; CHECK-NEXT: [[PTR:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)** [[LOC_BC]], align 8
-; CHECK-NEXT: store i8 5, i8 addrspace(4)* [[PTR]], align 1
+; CHECK-NEXT: [[PTR:%.*]] = load ptr addrspace(4), ptr [[LOC]], align 8
+; CHECK-NEXT: store i8 5, ptr addrspace(4) [[PTR]], align 1
; CHECK-NEXT: ret void
; CHECK: alwaysTaken:
; CHECK-NEXT: ret void
;
entry:
- store i64 %val, i64* %loc
+ store i64 %val, ptr %loc
br i1 %alwaysFalse, label %neverTaken, label %alwaysTaken
neverTaken:
- %loc.bc = bitcast i64* %loc to i8 addrspace(4)**
- %ptr = load i8 addrspace(4)*, i8 addrspace(4)** %loc.bc
- store i8 5, i8 addrspace(4)* %ptr
+ %ptr = load ptr addrspace(4), ptr %loc
+ store i8 5, ptr addrspace(4) %ptr
ret void
alwaysTaken:
ret void
}
-define i64 @f1(i1 %alwaysFalse, i8 addrspace(4)* %val, i8 addrspace(4)** %loc) {
+define i64 @f1(i1 %alwaysFalse, ptr addrspace(4) %val, ptr %loc) {
; CHECK-LABEL: @f1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i8 addrspace(4)* [[VAL:%.*]], i8 addrspace(4)** [[LOC:%.*]], align 8
+; CHECK-NEXT: store ptr addrspace(4) [[VAL:%.*]], ptr [[LOC:%.*]], align 8
; CHECK-NEXT: br i1 [[ALWAYSFALSE:%.*]], label [[NEVERTAKEN:%.*]], label [[ALWAYSTAKEN:%.*]]
; CHECK: neverTaken:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)** [[LOC]] to i64*
-; CHECK-NEXT: [[INT:%.*]] = load i64, i64* [[LOC_BC]], align 8
+; CHECK-NEXT: [[INT:%.*]] = load i64, ptr [[LOC]], align 8
; CHECK-NEXT: ret i64 [[INT]]
; CHECK: alwaysTaken:
; CHECK-NEXT: ret i64 42
;
entry:
- store i8 addrspace(4)* %val, i8 addrspace(4)** %loc
+ store ptr addrspace(4) %val, ptr %loc
br i1 %alwaysFalse, label %neverTaken, label %alwaysTaken
neverTaken:
- %loc.bc = bitcast i8 addrspace(4)** %loc to i64*
- %int = load i64, i64* %loc.bc
+ %int = load i64, ptr %loc
ret i64 %int
alwaysTaken:
@@ -59,396 +55,339 @@ define i64 @f1(i1 %alwaysFalse, i8 addrspace(4)* %val, i8 addrspace(4)** %loc) {
;; Note: For terseness, we stop using the %alwaysfalse trick for the
;; tests below and just exercise the bits of forwarding logic directly.
-declare void @llvm.memset.p4i8.i64(i8 addrspace(4)* nocapture, i8, i64, i1) nounwind
+declare void @llvm.memset.p4.i64(ptr addrspace(4) nocapture, i8, i64, i1) nounwind
; Can't forward as the load might be dead. (Pretend we wrote out the alwaysfalse idiom above.)
-define i8 addrspace(4)* @neg_forward_memset(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @neg_forward_memset(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_memset(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8 7, i64 8, i1 false)
-; CHECK-NEXT: [[REF:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC]], align 8
-; CHECK-NEXT: ret i8 addrspace(4)* [[REF]]
+; CHECK-NEXT: call void @llvm.memset.p4.i64(ptr addrspace(4) align 4 [[LOC:%.*]], i8 7, i64 8, i1 false)
+; CHECK-NEXT: [[REF:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[LOC]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) [[REF]]
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to i8 addrspace(4)*
- call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8 7, i64 8, i1 false)
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ call void @llvm.memset.p4.i64(ptr addrspace(4) align 4 %loc, i8 7, i64 8, i1 false)
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
-define <1 x i8 addrspace(4)*> @neg_forward_memset_vload(<1 x i8 addrspace(4)*> addrspace(4)* %loc) {
+define <1 x ptr addrspace(4)> @neg_forward_memset_vload(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_memset_vload(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast <1 x i8 addrspace(4)*> addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8 7, i64 8, i1 false)
-; CHECK-NEXT: [[REF:%.*]] = load <1 x i8 addrspace(4)*>, <1 x i8 addrspace(4)*> addrspace(4)* [[LOC]], align 8
-; CHECK-NEXT: ret <1 x i8 addrspace(4)*> [[REF]]
+; CHECK-NEXT: call void @llvm.memset.p4.i64(ptr addrspace(4) align 4 [[LOC:%.*]], i8 7, i64 8, i1 false)
+; CHECK-NEXT: [[REF:%.*]] = load <1 x ptr addrspace(4)>, ptr addrspace(4) [[LOC]], align 8
+; CHECK-NEXT: ret <1 x ptr addrspace(4)> [[REF]]
;
entry:
- %loc.bc = bitcast <1 x i8 addrspace(4)*> addrspace(4)* %loc to i8 addrspace(4)*
- call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8 7, i64 8, i1 false)
- %ref = load <1 x i8 addrspace(4)*>, <1 x i8 addrspace(4)*> addrspace(4)* %loc
- ret <1 x i8 addrspace(4)*> %ref
+ call void @llvm.memset.p4.i64(ptr addrspace(4) align 4 %loc, i8 7, i64 8, i1 false)
+ %ref = load <1 x ptr addrspace(4)>, ptr addrspace(4) %loc
+ ret <1 x ptr addrspace(4)> %ref
}
; Can forward since we can do so w/o breaking types
-define i8 addrspace(4)* @forward_memset_zero(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @forward_memset_zero(ptr addrspace(4) %loc) {
; CHECK-LABEL: @forward_memset_zero(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8 0, i64 8, i1 false)
-; CHECK-NEXT: ret i8 addrspace(4)* null
+; CHECK-NEXT: call void @llvm.memset.p4.i64(ptr addrspace(4) align 4 [[LOC:%.*]], i8 0, i64 8, i1 false)
+; CHECK-NEXT: ret ptr addrspace(4) null
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to i8 addrspace(4)*
- call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8 0, i64 8, i1 false)
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ call void @llvm.memset.p4.i64(ptr addrspace(4) align 4 %loc, i8 0, i64 8, i1 false)
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
; Can't forward as the load might be dead. (Pretend we wrote out the alwaysfalse idiom above.)
-define i8 addrspace(4)* @neg_forward_store(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @neg_forward_store(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_store(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i64 addrspace(4)*
-; CHECK-NEXT: store i64 5, i64 addrspace(4)* [[LOC_BC]], align 8
-; CHECK-NEXT: [[REF:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC]], align 8
-; CHECK-NEXT: ret i8 addrspace(4)* [[REF]]
+; CHECK-NEXT: store i64 5, ptr addrspace(4) [[LOC:%.*]], align 8
+; CHECK-NEXT: [[REF:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[LOC]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) [[REF]]
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to i64 addrspace(4)*
- store i64 5, i64 addrspace(4)* %loc.bc
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ store i64 5, ptr addrspace(4) %loc
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
-define <1 x i8 addrspace(4)*> @neg_forward_store_vload(<1 x i8 addrspace(4)*> addrspace(4)* %loc) {
+define <1 x ptr addrspace(4)> @neg_forward_store_vload(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_store_vload(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast <1 x i8 addrspace(4)*> addrspace(4)* [[LOC:%.*]] to i64 addrspace(4)*
-; CHECK-NEXT: store i64 5, i64 addrspace(4)* [[LOC_BC]], align 8
-; CHECK-NEXT: [[REF:%.*]] = load <1 x i8 addrspace(4)*>, <1 x i8 addrspace(4)*> addrspace(4)* [[LOC]], align 8
-; CHECK-NEXT: ret <1 x i8 addrspace(4)*> [[REF]]
+; CHECK-NEXT: store i64 5, ptr addrspace(4) [[LOC:%.*]], align 8
+; CHECK-NEXT: [[REF:%.*]] = load <1 x ptr addrspace(4)>, ptr addrspace(4) [[LOC]], align 8
+; CHECK-NEXT: ret <1 x ptr addrspace(4)> [[REF]]
;
entry:
- %loc.bc = bitcast <1 x i8 addrspace(4)*> addrspace(4)* %loc to i64 addrspace(4)*
- store i64 5, i64 addrspace(4)* %loc.bc
- %ref = load <1 x i8 addrspace(4)*>, <1 x i8 addrspace(4)*> addrspace(4)* %loc
- ret <1 x i8 addrspace(4)*> %ref
+ store i64 5, ptr addrspace(4) %loc
+ %ref = load <1 x ptr addrspace(4)>, ptr addrspace(4) %loc
+ ret <1 x ptr addrspace(4)> %ref
}
; Nulls have known bit patterns, so we can forward
-define i8 addrspace(4)* @forward_store_zero(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @forward_store_zero(ptr addrspace(4) %loc) {
; CHECK-LABEL: @forward_store_zero(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i64 addrspace(4)*
-; CHECK-NEXT: store i64 0, i64 addrspace(4)* [[LOC_BC]], align 8
-; CHECK-NEXT: ret i8 addrspace(4)* null
+; CHECK-NEXT: store i64 0, ptr addrspace(4) [[LOC:%.*]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) null
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to i64 addrspace(4)*
- store i64 0, i64 addrspace(4)* %loc.bc
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ store i64 0, ptr addrspace(4) %loc
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
; Nulls have known bit patterns, so we can forward
-define i8 addrspace(4)* @forward_store_zero2(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @forward_store_zero2(ptr addrspace(4) %loc) {
; CHECK-LABEL: @forward_store_zero2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to <2 x i32> addrspace(4)*
-; CHECK-NEXT: store <2 x i32> zeroinitializer, <2 x i32> addrspace(4)* [[LOC_BC]], align 8
-; CHECK-NEXT: ret i8 addrspace(4)* null
+; CHECK-NEXT: store <2 x i32> zeroinitializer, ptr addrspace(4) [[LOC:%.*]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) null
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to <2 x i32> addrspace(4)*
- store <2 x i32> zeroinitializer, <2 x i32> addrspace(4)* %loc.bc
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ store <2 x i32> zeroinitializer, ptr addrspace(4) %loc
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
@NonZeroConstant = constant <4 x i64> <i64 3, i64 3, i64 3, i64 3>
- at NonZeroConstant2 = constant <4 x i64 addrspace(4)*> <
- i64 addrspace(4)* getelementptr (i64, i64 addrspace(4)* null, i32 3),
- i64 addrspace(4)* getelementptr (i64, i64 addrspace(4)* null, i32 3),
- i64 addrspace(4)* getelementptr (i64, i64 addrspace(4)* null, i32 3),
- i64 addrspace(4)* getelementptr (i64, i64 addrspace(4)* null, i32 3)>
+ at NonZeroConstant2 = constant <4 x ptr addrspace(4)> <
+ ptr addrspace(4) getelementptr (i64, ptr addrspace(4) null, i32 3),
+ ptr addrspace(4) getelementptr (i64, ptr addrspace(4) null, i32 3),
+ ptr addrspace(4) getelementptr (i64, ptr addrspace(4) null, i32 3),
+ ptr addrspace(4) getelementptr (i64, ptr addrspace(4) null, i32 3)>
@ZeroConstant = constant <4 x i64> zeroinitializer
; Can't forward as the load might be dead. (Pretend we wrote out the alwaysfalse idiom above.)
-define i8 addrspace(4)* @neg_forward_memcopy(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @neg_forward_memcopy(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_memcopy(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64>* @NonZeroConstant to i8*), i64 8, i1 false)
-; CHECK-NEXT: [[REF:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC]], align 8
-; CHECK-NEXT: ret i8 addrspace(4)* [[REF]]
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant, i64 8, i1 false)
+; CHECK-NEXT: [[REF:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[LOC]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) [[REF]]
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64>* @NonZeroConstant to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 8, i1 false)
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant, i64 8, i1 false)
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
-define i64 addrspace(4)* @neg_forward_memcopy2(i64 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @neg_forward_memcopy2(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_memcopy2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i64 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64>* @NonZeroConstant to i8*), i64 8, i1 false)
-; CHECK-NEXT: [[REF:%.*]] = load i64 addrspace(4)*, i64 addrspace(4)* addrspace(4)* [[LOC]], align 8
-; CHECK-NEXT: ret i64 addrspace(4)* [[REF]]
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant, i64 8, i1 false)
+; CHECK-NEXT: [[REF:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[LOC]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) [[REF]]
;
entry:
- %loc.bc = bitcast i64 addrspace(4)* addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64>* @NonZeroConstant to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 8, i1 false)
- %ref = load i64 addrspace(4)*, i64 addrspace(4)* addrspace(4)* %loc
- ret i64 addrspace(4)* %ref
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant, i64 8, i1 false)
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
-define i8 addrspace(4)* @forward_memcopy(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @forward_memcopy(ptr addrspace(4) %loc) {
; CHECK-LABEL: @forward_memcopy(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*), i64 8, i1 false)
-; CHECK-NEXT: ret i8 addrspace(4)* bitcast (i64 addrspace(4)* getelementptr (i64, i64 addrspace(4)* null, i32 3) to i8 addrspace(4)*)
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant2, i64 8, i1 false)
+; CHECK-NEXT: ret ptr addrspace(4) getelementptr (i64, ptr addrspace(4) null, i32 3)
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 8, i1 false)
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant2, i64 8, i1 false)
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
-define i64 addrspace(4)* @forward_memcopy2(i64 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @forward_memcopy2(ptr addrspace(4) %loc) {
; CHECK-LABEL: @forward_memcopy2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i64 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*), i64 8, i1 false)
-; CHECK-NEXT: ret i64 addrspace(4)* getelementptr (i64, i64 addrspace(4)* null, i32 3)
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant2, i64 8, i1 false)
+; CHECK-NEXT: ret ptr addrspace(4) getelementptr (i64, ptr addrspace(4) null, i32 3)
;
entry:
- %loc.bc = bitcast i64 addrspace(4)* addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 8, i1 false)
- %ref = load i64 addrspace(4)*, i64 addrspace(4)* addrspace(4)* %loc
- ret i64 addrspace(4)* %ref
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant2, i64 8, i1 false)
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
-define <1 x i8 addrspace(4)*> @neg_forward_memcpy_vload(<1 x i8 addrspace(4)*> addrspace(4)* %loc) {
+define <1 x ptr addrspace(4)> @neg_forward_memcpy_vload(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_memcpy_vload(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast <1 x i8 addrspace(4)*> addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64>* @NonZeroConstant to i8*), i64 8, i1 false)
-; CHECK-NEXT: [[REF:%.*]] = load <1 x i8 addrspace(4)*>, <1 x i8 addrspace(4)*> addrspace(4)* [[LOC]], align 8
-; CHECK-NEXT: ret <1 x i8 addrspace(4)*> [[REF]]
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant, i64 8, i1 false)
+; CHECK-NEXT: [[REF:%.*]] = load <1 x ptr addrspace(4)>, ptr addrspace(4) [[LOC]], align 8
+; CHECK-NEXT: ret <1 x ptr addrspace(4)> [[REF]]
;
entry:
- %loc.bc = bitcast <1 x i8 addrspace(4)*> addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64>* @NonZeroConstant to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 8, i1 false)
- %ref = load <1 x i8 addrspace(4)*>, <1 x i8 addrspace(4)*> addrspace(4)* %loc
- ret <1 x i8 addrspace(4)*> %ref
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant, i64 8, i1 false)
+ %ref = load <1 x ptr addrspace(4)>, ptr addrspace(4) %loc
+ ret <1 x ptr addrspace(4)> %ref
}
-define <4 x i64 addrspace(4)*> @neg_forward_memcpy_vload2(<4 x i64 addrspace(4)*> addrspace(4)* %loc) {
+define <4 x ptr addrspace(4)> @neg_forward_memcpy_vload2(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_memcpy_vload2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast <4 x i64 addrspace(4)*> addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64>* @NonZeroConstant to i8*), i64 32, i1 false)
-; CHECK-NEXT: [[REF:%.*]] = load <4 x i64 addrspace(4)*>, <4 x i64 addrspace(4)*> addrspace(4)* [[LOC]], align 32
-; CHECK-NEXT: ret <4 x i64 addrspace(4)*> [[REF]]
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant, i64 32, i1 false)
+; CHECK-NEXT: [[REF:%.*]] = load <4 x ptr addrspace(4)>, ptr addrspace(4) [[LOC]], align 32
+; CHECK-NEXT: ret <4 x ptr addrspace(4)> [[REF]]
;
entry:
- %loc.bc = bitcast <4 x i64 addrspace(4)*> addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64>* @NonZeroConstant to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 32, i1 false)
- %ref = load <4 x i64 addrspace(4)*>, <4 x i64 addrspace(4)*> addrspace(4)* %loc
- ret <4 x i64 addrspace(4)*> %ref
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant, i64 32, i1 false)
+ %ref = load <4 x ptr addrspace(4)>, ptr addrspace(4) %loc
+ ret <4 x ptr addrspace(4)> %ref
}
-define <4 x i64> @neg_forward_memcpy_vload3(<4 x i64> addrspace(4)* %loc) {
+define <4 x i64> @neg_forward_memcpy_vload3(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_memcpy_vload3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast <4 x i64> addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*), i64 32, i1 false)
-; CHECK-NEXT: [[REF:%.*]] = load <4 x i64>, <4 x i64> addrspace(4)* [[LOC]], align 32
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant2, i64 32, i1 false)
+; CHECK-NEXT: [[REF:%.*]] = load <4 x i64>, ptr addrspace(4) [[LOC]], align 32
; CHECK-NEXT: ret <4 x i64> [[REF]]
;
entry:
- %loc.bc = bitcast <4 x i64> addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 32, i1 false)
- %ref = load <4 x i64>, <4 x i64> addrspace(4)* %loc
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant2, i64 32, i1 false)
+ %ref = load <4 x i64>, ptr addrspace(4) %loc
ret <4 x i64> %ref
}
-define <1 x i64 addrspace(4)*> @forward_memcpy_vload3(<4 x i64 addrspace(4)*> addrspace(4)* %loc) {
+define <1 x ptr addrspace(4)> @forward_memcpy_vload3(ptr addrspace(4) %loc) {
; CHECK-LABEL: @forward_memcpy_vload3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast <4 x i64 addrspace(4)*> addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*), i64 32, i1 false)
-; CHECK-NEXT: ret <1 x i64 addrspace(4)*> <i64 addrspace(4)* getelementptr (i64, i64 addrspace(4)* null, i32 3)>
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant2, i64 32, i1 false)
+; CHECK-NEXT: ret <1 x ptr addrspace(4)> <ptr addrspace(4) getelementptr (i64, ptr addrspace(4) null, i32 3)>
;
entry:
- %loc.bc = bitcast <4 x i64 addrspace(4)*> addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 32, i1 false)
- %ref = load <4 x i64 addrspace(4)*>, <4 x i64 addrspace(4)*> addrspace(4)* %loc
- %val = extractelement <4 x i64 addrspace(4)*> %ref, i32 0
- %ret = insertelement <1 x i64 addrspace(4)*> poison, i64 addrspace(4)* %val, i32 0
- ret <1 x i64 addrspace(4)*> %ret
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant2, i64 32, i1 false)
+ %ref = load <4 x ptr addrspace(4)>, ptr addrspace(4) %loc
+ %val = extractelement <4 x ptr addrspace(4)> %ref, i32 0
+ %ret = insertelement <1 x ptr addrspace(4)> poison, ptr addrspace(4) %val, i32 0
+ ret <1 x ptr addrspace(4)> %ret
}
; Can forward since we can do so w/o breaking types
-define i8 addrspace(4)* @forward_memcpy_zero(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @forward_memcpy_zero(ptr addrspace(4) %loc) {
; CHECK-LABEL: @forward_memcpy_zero(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64>* @ZeroConstant to i8*), i64 8, i1 false)
-; CHECK-NEXT: ret i8 addrspace(4)* null
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @ZeroConstant, i64 8, i1 false)
+; CHECK-NEXT: ret ptr addrspace(4) null
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64>* @ZeroConstant to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 8, i1 false)
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @ZeroConstant, i64 8, i1 false)
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
-declare void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* nocapture, i8* nocapture, i64, i1) nounwind
+declare void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) nocapture, ptr nocapture, i64, i1) nounwind
; Same as the neg_forward_store cases, but for non defs.
; (Pretend we wrote out the alwaysfalse idiom above.)
-define i8 addrspace(4)* @neg_store_clobber(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @neg_store_clobber(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_store_clobber(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to <2 x i64> addrspace(4)*
-; CHECK-NEXT: store <2 x i64> <i64 4, i64 4>, <2 x i64> addrspace(4)* [[LOC_BC]], align 16
-; CHECK-NEXT: [[LOC_OFF:%.*]] = getelementptr i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC]], i64 1
-; CHECK-NEXT: [[REF:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC_OFF]], align 8
-; CHECK-NEXT: ret i8 addrspace(4)* [[REF]]
+; CHECK-NEXT: store <2 x i64> <i64 4, i64 4>, ptr addrspace(4) [[LOC:%.*]], align 16
+; CHECK-NEXT: [[LOC_OFF:%.*]] = getelementptr ptr addrspace(4), ptr addrspace(4) [[LOC]], i64 1
+; CHECK-NEXT: [[REF:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[LOC_OFF]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) [[REF]]
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to <2 x i64> addrspace(4)*
- store <2 x i64> <i64 4, i64 4>, <2 x i64> addrspace(4)* %loc.bc
- %loc.off = getelementptr i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc, i64 1
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc.off
- ret i8 addrspace(4)* %ref
+ store <2 x i64> <i64 4, i64 4>, ptr addrspace(4) %loc
+ %loc.off = getelementptr ptr addrspace(4), ptr addrspace(4) %loc, i64 1
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc.off
+ ret ptr addrspace(4) %ref
}
declare void @use(<2 x i64>) inaccessiblememonly
; Same as the neg_forward_store cases, but for non defs.
; (Pretend we wrote out the alwaysfalse idiom above.)
-define i8 addrspace(4)* @neg_load_clobber(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @neg_load_clobber(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_load_clobber(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to <2 x i64> addrspace(4)*
-; CHECK-NEXT: [[V:%.*]] = load <2 x i64>, <2 x i64> addrspace(4)* [[LOC_BC]], align 16
+; CHECK-NEXT: [[V:%.*]] = load <2 x i64>, ptr addrspace(4) [[LOC:%.*]], align 16
; CHECK-NEXT: call void @use(<2 x i64> [[V]])
-; CHECK-NEXT: [[LOC_OFF:%.*]] = getelementptr i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC]], i64 1
-; CHECK-NEXT: [[REF:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC_OFF]], align 8
-; CHECK-NEXT: ret i8 addrspace(4)* [[REF]]
+; CHECK-NEXT: [[LOC_OFF:%.*]] = getelementptr ptr addrspace(4), ptr addrspace(4) [[LOC]], i64 1
+; CHECK-NEXT: [[REF:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[LOC_OFF]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) [[REF]]
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to <2 x i64> addrspace(4)*
- %v = load <2 x i64>, <2 x i64> addrspace(4)* %loc.bc
+ %v = load <2 x i64>, ptr addrspace(4) %loc
call void @use(<2 x i64> %v)
- %loc.off = getelementptr i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc, i64 1
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc.off
- ret i8 addrspace(4)* %ref
+ %loc.off = getelementptr ptr addrspace(4), ptr addrspace(4) %loc, i64 1
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc.off
+ ret ptr addrspace(4) %ref
}
-define i8 addrspace(4)* @store_clobber_zero(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @store_clobber_zero(ptr addrspace(4) %loc) {
; CHECK-LABEL: @store_clobber_zero(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to <2 x i64> addrspace(4)*
-; CHECK-NEXT: store <2 x i64> zeroinitializer, <2 x i64> addrspace(4)* [[LOC_BC]], align 16
-; CHECK-NEXT: [[LOC_OFF:%.*]] = getelementptr i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC]], i64 1
-; CHECK-NEXT: ret i8 addrspace(4)* null
+; CHECK-NEXT: store <2 x i64> zeroinitializer, ptr addrspace(4) [[LOC:%.*]], align 16
+; CHECK-NEXT: [[LOC_OFF:%.*]] = getelementptr ptr addrspace(4), ptr addrspace(4) [[LOC]], i64 1
+; CHECK-NEXT: ret ptr addrspace(4) null
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to <2 x i64> addrspace(4)*
- store <2 x i64> zeroinitializer, <2 x i64> addrspace(4)* %loc.bc
- %loc.off = getelementptr i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc, i64 1
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc.off
- ret i8 addrspace(4)* %ref
+ store <2 x i64> zeroinitializer, ptr addrspace(4) %loc
+ %loc.off = getelementptr ptr addrspace(4), ptr addrspace(4) %loc, i64 1
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc.off
+ ret ptr addrspace(4) %ref
}
-define void @smaller_vector(i8* %p) {
+define void @smaller_vector(ptr %p) {
; CHECK-LABEL: @smaller_vector(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[P:%.*]] to <4 x i64 addrspace(4)*>*
-; CHECK-NEXT: [[B:%.*]] = bitcast i8* [[P]] to <2 x i64 addrspace(4)*>*
-; CHECK-NEXT: [[V4:%.*]] = load <4 x i64 addrspace(4)*>, <4 x i64 addrspace(4)*>* [[A]], align 32
-; CHECK-NEXT: [[V2:%.*]] = load <2 x i64 addrspace(4)*>, <2 x i64 addrspace(4)*>* [[B]], align 32
-; CHECK-NEXT: call void @use.v2(<2 x i64 addrspace(4)*> [[V2]])
-; CHECK-NEXT: call void @use.v4(<4 x i64 addrspace(4)*> [[V4]])
+; CHECK-NEXT: [[V4:%.*]] = load <4 x ptr addrspace(4)>, ptr [[P:%.*]], align 32
+; CHECK-NEXT: [[V2:%.*]] = load <2 x ptr addrspace(4)>, ptr [[P]], align 32
+; CHECK-NEXT: call void @use.v2(<2 x ptr addrspace(4)> [[V2]])
+; CHECK-NEXT: call void @use.v4(<4 x ptr addrspace(4)> [[V4]])
; CHECK-NEXT: ret void
;
entry:
- %a = bitcast i8* %p to <4 x i64 addrspace(4)*>*
- %b = bitcast i8* %p to <2 x i64 addrspace(4)*>*
- %v4 = load <4 x i64 addrspace(4)*>, <4 x i64 addrspace(4)*>* %a, align 32
- %v2 = load <2 x i64 addrspace(4)*>, <2 x i64 addrspace(4)*>* %b, align 32
- call void @use.v2(<2 x i64 addrspace(4)*> %v2)
- call void @use.v4(<4 x i64 addrspace(4)*> %v4)
+ %v4 = load <4 x ptr addrspace(4)>, ptr %p, align 32
+ %v2 = load <2 x ptr addrspace(4)>, ptr %p, align 32
+ call void @use.v2(<2 x ptr addrspace(4)> %v2)
+ call void @use.v4(<4 x ptr addrspace(4)> %v4)
ret void
}
-define i64 addrspace(4)* @vector_extract(i8* %p) {
+define ptr addrspace(4) @vector_extract(ptr %p) {
; CHECK-LABEL: @vector_extract(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[P:%.*]] to <4 x i64 addrspace(4)*>*
-; CHECK-NEXT: [[B:%.*]] = bitcast i8* [[P]] to i64 addrspace(4)**
-; CHECK-NEXT: [[V4:%.*]] = load <4 x i64 addrspace(4)*>, <4 x i64 addrspace(4)*>* [[A]], align 32
-; CHECK-NEXT: [[RES:%.*]] = load i64 addrspace(4)*, i64 addrspace(4)** [[B]], align 32
-; CHECK-NEXT: call void @use.v4(<4 x i64 addrspace(4)*> [[V4]])
-; CHECK-NEXT: ret i64 addrspace(4)* [[RES]]
+; CHECK-NEXT: [[V4:%.*]] = load <4 x ptr addrspace(4)>, ptr [[P:%.*]], align 32
+; CHECK-NEXT: [[RES:%.*]] = load ptr addrspace(4), ptr [[P]], align 32
+; CHECK-NEXT: call void @use.v4(<4 x ptr addrspace(4)> [[V4]])
+; CHECK-NEXT: ret ptr addrspace(4) [[RES]]
;
entry:
- %a = bitcast i8* %p to <4 x i64 addrspace(4)*>*
- %b = bitcast i8* %p to i64 addrspace(4)**
- %v4 = load <4 x i64 addrspace(4)*>, <4 x i64 addrspace(4)*>* %a, align 32
- %res = load i64 addrspace(4)*, i64 addrspace(4)** %b, align 32
- call void @use.v4(<4 x i64 addrspace(4)*> %v4)
- ret i64 addrspace(4)* %res
+ %v4 = load <4 x ptr addrspace(4)>, ptr %p, align 32
+ %res = load ptr addrspace(4), ptr %p, align 32
+ call void @use.v4(<4 x ptr addrspace(4)> %v4)
+ ret ptr addrspace(4) %res
}
-declare void @use.v2(<2 x i64 addrspace(4)*>)
-declare void @use.v4(<4 x i64 addrspace(4)*>)
- define i8 addrspace(5)* @multini(i1 %alwaysFalse, i8 addrspace(4)* %val, i8 addrspace(4)** %loc) {
+declare void @use.v2(<2 x ptr addrspace(4)>)
+declare void @use.v4(<4 x ptr addrspace(4)>)
+ define ptr addrspace(5) @multini(i1 %alwaysFalse, ptr addrspace(4) %val, ptr %loc) {
; CHECK-LABEL: @multini(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i8 addrspace(4)* [[VAL:%.*]], i8 addrspace(4)** [[LOC:%.*]], align 8
+; CHECK-NEXT: store ptr addrspace(4) [[VAL:%.*]], ptr [[LOC:%.*]], align 8
; CHECK-NEXT: br i1 [[ALWAYSFALSE:%.*]], label [[NEVERTAKEN:%.*]], label [[ALWAYSTAKEN:%.*]]
; CHECK: neverTaken:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)** [[LOC]] to i8 addrspace(5)**
-; CHECK-NEXT: [[DIFFERENTAS:%.*]] = load i8 addrspace(5)*, i8 addrspace(5)** [[LOC_BC]], align 8
-; CHECK-NEXT: ret i8 addrspace(5)* [[DIFFERENTAS]]
+; CHECK-NEXT: [[DIFFERENTAS:%.*]] = load ptr addrspace(5), ptr [[LOC]], align 8
+; CHECK-NEXT: ret ptr addrspace(5) [[DIFFERENTAS]]
; CHECK: alwaysTaken:
-; CHECK-NEXT: ret i8 addrspace(5)* null
+; CHECK-NEXT: ret ptr addrspace(5) null
;
entry:
- store i8 addrspace(4)* %val, i8 addrspace(4)** %loc
+ store ptr addrspace(4) %val, ptr %loc
br i1 %alwaysFalse, label %neverTaken, label %alwaysTaken
neverTaken:
- %loc.bc = bitcast i8 addrspace(4)** %loc to i8 addrspace(5)**
- %
diff erentas = load i8 addrspace(5)*, i8 addrspace(5)** %loc.bc
- ret i8 addrspace(5)* %
diff erentas
+ %
diff erentas = load ptr addrspace(5), ptr %loc
+ ret ptr addrspace(5) %
diff erentas
alwaysTaken:
- ret i8 addrspace(5)* null
+ ret ptr addrspace(5) null
}
diff --git a/llvm/test/Transforms/GVN/non-integral-pointers.ll b/llvm/test/Transforms/GVN/non-integral-pointers.ll
index 822769789cce1..5f2aef4f44350 100644
--- a/llvm/test/Transforms/GVN/non-integral-pointers.ll
+++ b/llvm/test/Transforms/GVN/non-integral-pointers.ll
@@ -4,52 +4,48 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:4:5"
target triple = "x86_64-unknown-linux-gnu"
-define void @f0(i1 %alwaysFalse, i64 %val, i64* %loc) {
+define void @f0(i1 %alwaysFalse, i64 %val, ptr %loc) {
; CHECK-LABEL: @f0(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i64 [[VAL:%.*]], i64* [[LOC:%.*]], align 8
+; CHECK-NEXT: store i64 [[VAL:%.*]], ptr [[LOC:%.*]], align 8
; CHECK-NEXT: br i1 [[ALWAYSFALSE:%.*]], label [[NEVERTAKEN:%.*]], label [[ALWAYSTAKEN:%.*]]
; CHECK: neverTaken:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i64* [[LOC]] to i8 addrspace(4)**
-; CHECK-NEXT: [[PTR:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)** [[LOC_BC]], align 8
-; CHECK-NEXT: store i8 5, i8 addrspace(4)* [[PTR]], align 1
+; CHECK-NEXT: [[PTR:%.*]] = load ptr addrspace(4), ptr [[LOC]], align 8
+; CHECK-NEXT: store i8 5, ptr addrspace(4) [[PTR]], align 1
; CHECK-NEXT: ret void
; CHECK: alwaysTaken:
; CHECK-NEXT: ret void
;
entry:
- store i64 %val, i64* %loc
+ store i64 %val, ptr %loc
br i1 %alwaysFalse, label %neverTaken, label %alwaysTaken
neverTaken:
- %loc.bc = bitcast i64* %loc to i8 addrspace(4)**
- %ptr = load i8 addrspace(4)*, i8 addrspace(4)** %loc.bc
- store i8 5, i8 addrspace(4)* %ptr
+ %ptr = load ptr addrspace(4), ptr %loc
+ store i8 5, ptr addrspace(4) %ptr
ret void
alwaysTaken:
ret void
}
-define i64 @f1(i1 %alwaysFalse, i8 addrspace(4)* %val, i8 addrspace(4)** %loc) {
+define i64 @f1(i1 %alwaysFalse, ptr addrspace(4) %val, ptr %loc) {
; CHECK-LABEL: @f1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i8 addrspace(4)* [[VAL:%.*]], i8 addrspace(4)** [[LOC:%.*]], align 8
+; CHECK-NEXT: store ptr addrspace(4) [[VAL:%.*]], ptr [[LOC:%.*]], align 8
; CHECK-NEXT: br i1 [[ALWAYSFALSE:%.*]], label [[NEVERTAKEN:%.*]], label [[ALWAYSTAKEN:%.*]]
; CHECK: neverTaken:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)** [[LOC]] to i64*
-; CHECK-NEXT: [[INT:%.*]] = load i64, i64* [[LOC_BC]], align 8
+; CHECK-NEXT: [[INT:%.*]] = load i64, ptr [[LOC]], align 8
; CHECK-NEXT: ret i64 [[INT]]
; CHECK: alwaysTaken:
; CHECK-NEXT: ret i64 42
;
entry:
- store i8 addrspace(4)* %val, i8 addrspace(4)** %loc
+ store ptr addrspace(4) %val, ptr %loc
br i1 %alwaysFalse, label %neverTaken, label %alwaysTaken
neverTaken:
- %loc.bc = bitcast i8 addrspace(4)** %loc to i64*
- %int = load i64, i64* %loc.bc
+ %int = load i64, ptr %loc
ret i64 %int
alwaysTaken:
@@ -59,396 +55,339 @@ define i64 @f1(i1 %alwaysFalse, i8 addrspace(4)* %val, i8 addrspace(4)** %loc) {
;; Note: For terseness, we stop using the %alwaysfalse trick for the
;; tests below and just exercise the bits of forwarding logic directly.
-declare void @llvm.memset.p4i8.i64(i8 addrspace(4)* nocapture, i8, i64, i1) nounwind
+declare void @llvm.memset.p4.i64(ptr addrspace(4) nocapture, i8, i64, i1) nounwind
; Can't forward as the load might be dead. (Pretend we wrote out the alwaysfalse idiom above.)
-define i8 addrspace(4)* @neg_forward_memset(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @neg_forward_memset(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_memset(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8 7, i64 8, i1 false)
-; CHECK-NEXT: [[REF:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC]], align 8
-; CHECK-NEXT: ret i8 addrspace(4)* [[REF]]
+; CHECK-NEXT: call void @llvm.memset.p4.i64(ptr addrspace(4) align 4 [[LOC:%.*]], i8 7, i64 8, i1 false)
+; CHECK-NEXT: [[REF:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[LOC]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) [[REF]]
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to i8 addrspace(4)*
- call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8 7, i64 8, i1 false)
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ call void @llvm.memset.p4.i64(ptr addrspace(4) align 4 %loc, i8 7, i64 8, i1 false)
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
-define <1 x i8 addrspace(4)*> @neg_forward_memset_vload(<1 x i8 addrspace(4)*> addrspace(4)* %loc) {
+define <1 x ptr addrspace(4)> @neg_forward_memset_vload(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_memset_vload(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast <1 x i8 addrspace(4)*> addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8 7, i64 8, i1 false)
-; CHECK-NEXT: [[REF:%.*]] = load <1 x i8 addrspace(4)*>, <1 x i8 addrspace(4)*> addrspace(4)* [[LOC]], align 8
-; CHECK-NEXT: ret <1 x i8 addrspace(4)*> [[REF]]
+; CHECK-NEXT: call void @llvm.memset.p4.i64(ptr addrspace(4) align 4 [[LOC:%.*]], i8 7, i64 8, i1 false)
+; CHECK-NEXT: [[REF:%.*]] = load <1 x ptr addrspace(4)>, ptr addrspace(4) [[LOC]], align 8
+; CHECK-NEXT: ret <1 x ptr addrspace(4)> [[REF]]
;
entry:
- %loc.bc = bitcast <1 x i8 addrspace(4)*> addrspace(4)* %loc to i8 addrspace(4)*
- call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8 7, i64 8, i1 false)
- %ref = load <1 x i8 addrspace(4)*>, <1 x i8 addrspace(4)*> addrspace(4)* %loc
- ret <1 x i8 addrspace(4)*> %ref
+ call void @llvm.memset.p4.i64(ptr addrspace(4) align 4 %loc, i8 7, i64 8, i1 false)
+ %ref = load <1 x ptr addrspace(4)>, ptr addrspace(4) %loc
+ ret <1 x ptr addrspace(4)> %ref
}
; Can forward since we can do so w/o breaking types
-define i8 addrspace(4)* @forward_memset_zero(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @forward_memset_zero(ptr addrspace(4) %loc) {
; CHECK-LABEL: @forward_memset_zero(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8 0, i64 8, i1 false)
-; CHECK-NEXT: ret i8 addrspace(4)* null
+; CHECK-NEXT: call void @llvm.memset.p4.i64(ptr addrspace(4) align 4 [[LOC:%.*]], i8 0, i64 8, i1 false)
+; CHECK-NEXT: ret ptr addrspace(4) null
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to i8 addrspace(4)*
- call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8 0, i64 8, i1 false)
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ call void @llvm.memset.p4.i64(ptr addrspace(4) align 4 %loc, i8 0, i64 8, i1 false)
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
; Can't forward as the load might be dead. (Pretend we wrote out the alwaysfalse idiom above.)
-define i8 addrspace(4)* @neg_forward_store(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @neg_forward_store(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_store(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i64 addrspace(4)*
-; CHECK-NEXT: store i64 5, i64 addrspace(4)* [[LOC_BC]], align 8
-; CHECK-NEXT: [[REF:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC]], align 8
-; CHECK-NEXT: ret i8 addrspace(4)* [[REF]]
+; CHECK-NEXT: store i64 5, ptr addrspace(4) [[LOC:%.*]], align 8
+; CHECK-NEXT: [[REF:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[LOC]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) [[REF]]
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to i64 addrspace(4)*
- store i64 5, i64 addrspace(4)* %loc.bc
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ store i64 5, ptr addrspace(4) %loc
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
-define <1 x i8 addrspace(4)*> @neg_forward_store_vload(<1 x i8 addrspace(4)*> addrspace(4)* %loc) {
+define <1 x ptr addrspace(4)> @neg_forward_store_vload(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_store_vload(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast <1 x i8 addrspace(4)*> addrspace(4)* [[LOC:%.*]] to i64 addrspace(4)*
-; CHECK-NEXT: store i64 5, i64 addrspace(4)* [[LOC_BC]], align 8
-; CHECK-NEXT: [[REF:%.*]] = load <1 x i8 addrspace(4)*>, <1 x i8 addrspace(4)*> addrspace(4)* [[LOC]], align 8
-; CHECK-NEXT: ret <1 x i8 addrspace(4)*> [[REF]]
+; CHECK-NEXT: store i64 5, ptr addrspace(4) [[LOC:%.*]], align 8
+; CHECK-NEXT: [[REF:%.*]] = load <1 x ptr addrspace(4)>, ptr addrspace(4) [[LOC]], align 8
+; CHECK-NEXT: ret <1 x ptr addrspace(4)> [[REF]]
;
entry:
- %loc.bc = bitcast <1 x i8 addrspace(4)*> addrspace(4)* %loc to i64 addrspace(4)*
- store i64 5, i64 addrspace(4)* %loc.bc
- %ref = load <1 x i8 addrspace(4)*>, <1 x i8 addrspace(4)*> addrspace(4)* %loc
- ret <1 x i8 addrspace(4)*> %ref
+ store i64 5, ptr addrspace(4) %loc
+ %ref = load <1 x ptr addrspace(4)>, ptr addrspace(4) %loc
+ ret <1 x ptr addrspace(4)> %ref
}
; Nulls have known bit patterns, so we can forward
-define i8 addrspace(4)* @forward_store_zero(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @forward_store_zero(ptr addrspace(4) %loc) {
; CHECK-LABEL: @forward_store_zero(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i64 addrspace(4)*
-; CHECK-NEXT: store i64 0, i64 addrspace(4)* [[LOC_BC]], align 8
-; CHECK-NEXT: ret i8 addrspace(4)* null
+; CHECK-NEXT: store i64 0, ptr addrspace(4) [[LOC:%.*]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) null
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to i64 addrspace(4)*
- store i64 0, i64 addrspace(4)* %loc.bc
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ store i64 0, ptr addrspace(4) %loc
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
; Nulls have known bit patterns, so we can forward
-define i8 addrspace(4)* @forward_store_zero2(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @forward_store_zero2(ptr addrspace(4) %loc) {
; CHECK-LABEL: @forward_store_zero2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to <2 x i32> addrspace(4)*
-; CHECK-NEXT: store <2 x i32> zeroinitializer, <2 x i32> addrspace(4)* [[LOC_BC]], align 8
-; CHECK-NEXT: ret i8 addrspace(4)* null
+; CHECK-NEXT: store <2 x i32> zeroinitializer, ptr addrspace(4) [[LOC:%.*]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) null
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to <2 x i32> addrspace(4)*
- store <2 x i32> zeroinitializer, <2 x i32> addrspace(4)* %loc.bc
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ store <2 x i32> zeroinitializer, ptr addrspace(4) %loc
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
@NonZeroConstant = constant <4 x i64> <i64 3, i64 3, i64 3, i64 3>
- at NonZeroConstant2 = constant <4 x i64 addrspace(4)*> <
- i64 addrspace(4)* getelementptr (i64, i64 addrspace(4)* null, i32 3),
- i64 addrspace(4)* getelementptr (i64, i64 addrspace(4)* null, i32 3),
- i64 addrspace(4)* getelementptr (i64, i64 addrspace(4)* null, i32 3),
- i64 addrspace(4)* getelementptr (i64, i64 addrspace(4)* null, i32 3)>
+ at NonZeroConstant2 = constant <4 x ptr addrspace(4)> <
+ ptr addrspace(4) getelementptr (i64, ptr addrspace(4) null, i32 3),
+ ptr addrspace(4) getelementptr (i64, ptr addrspace(4) null, i32 3),
+ ptr addrspace(4) getelementptr (i64, ptr addrspace(4) null, i32 3),
+ ptr addrspace(4) getelementptr (i64, ptr addrspace(4) null, i32 3)>
@ZeroConstant = constant <4 x i64> zeroinitializer
; Can't forward as the load might be dead. (Pretend we wrote out the alwaysfalse idiom above.)
-define i8 addrspace(4)* @neg_forward_memcopy(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @neg_forward_memcopy(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_memcopy(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64>* @NonZeroConstant to i8*), i64 8, i1 false)
-; CHECK-NEXT: [[REF:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC]], align 8
-; CHECK-NEXT: ret i8 addrspace(4)* [[REF]]
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant, i64 8, i1 false)
+; CHECK-NEXT: [[REF:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[LOC]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) [[REF]]
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64>* @NonZeroConstant to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 8, i1 false)
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant, i64 8, i1 false)
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
-define i64 addrspace(4)* @neg_forward_memcopy2(i64 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @neg_forward_memcopy2(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_memcopy2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i64 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64>* @NonZeroConstant to i8*), i64 8, i1 false)
-; CHECK-NEXT: [[REF:%.*]] = load i64 addrspace(4)*, i64 addrspace(4)* addrspace(4)* [[LOC]], align 8
-; CHECK-NEXT: ret i64 addrspace(4)* [[REF]]
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant, i64 8, i1 false)
+; CHECK-NEXT: [[REF:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[LOC]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) [[REF]]
;
entry:
- %loc.bc = bitcast i64 addrspace(4)* addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64>* @NonZeroConstant to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 8, i1 false)
- %ref = load i64 addrspace(4)*, i64 addrspace(4)* addrspace(4)* %loc
- ret i64 addrspace(4)* %ref
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant, i64 8, i1 false)
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
-define i8 addrspace(4)* @forward_memcopy(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @forward_memcopy(ptr addrspace(4) %loc) {
; CHECK-LABEL: @forward_memcopy(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*), i64 8, i1 false)
-; CHECK-NEXT: ret i8 addrspace(4)* bitcast (i64 addrspace(4)* getelementptr (i64, i64 addrspace(4)* null, i32 3) to i8 addrspace(4)*)
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant2, i64 8, i1 false)
+; CHECK-NEXT: ret ptr addrspace(4) getelementptr (i64, ptr addrspace(4) null, i32 3)
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 8, i1 false)
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant2, i64 8, i1 false)
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
-define i64 addrspace(4)* @forward_memcopy2(i64 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @forward_memcopy2(ptr addrspace(4) %loc) {
; CHECK-LABEL: @forward_memcopy2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i64 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*), i64 8, i1 false)
-; CHECK-NEXT: ret i64 addrspace(4)* getelementptr (i64, i64 addrspace(4)* null, i32 3)
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant2, i64 8, i1 false)
+; CHECK-NEXT: ret ptr addrspace(4) getelementptr (i64, ptr addrspace(4) null, i32 3)
;
entry:
- %loc.bc = bitcast i64 addrspace(4)* addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 8, i1 false)
- %ref = load i64 addrspace(4)*, i64 addrspace(4)* addrspace(4)* %loc
- ret i64 addrspace(4)* %ref
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant2, i64 8, i1 false)
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
-define <1 x i8 addrspace(4)*> @neg_forward_memcpy_vload(<1 x i8 addrspace(4)*> addrspace(4)* %loc) {
+define <1 x ptr addrspace(4)> @neg_forward_memcpy_vload(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_memcpy_vload(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast <1 x i8 addrspace(4)*> addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64>* @NonZeroConstant to i8*), i64 8, i1 false)
-; CHECK-NEXT: [[REF:%.*]] = load <1 x i8 addrspace(4)*>, <1 x i8 addrspace(4)*> addrspace(4)* [[LOC]], align 8
-; CHECK-NEXT: ret <1 x i8 addrspace(4)*> [[REF]]
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant, i64 8, i1 false)
+; CHECK-NEXT: [[REF:%.*]] = load <1 x ptr addrspace(4)>, ptr addrspace(4) [[LOC]], align 8
+; CHECK-NEXT: ret <1 x ptr addrspace(4)> [[REF]]
;
entry:
- %loc.bc = bitcast <1 x i8 addrspace(4)*> addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64>* @NonZeroConstant to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 8, i1 false)
- %ref = load <1 x i8 addrspace(4)*>, <1 x i8 addrspace(4)*> addrspace(4)* %loc
- ret <1 x i8 addrspace(4)*> %ref
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant, i64 8, i1 false)
+ %ref = load <1 x ptr addrspace(4)>, ptr addrspace(4) %loc
+ ret <1 x ptr addrspace(4)> %ref
}
-define <4 x i64 addrspace(4)*> @neg_forward_memcpy_vload2(<4 x i64 addrspace(4)*> addrspace(4)* %loc) {
+define <4 x ptr addrspace(4)> @neg_forward_memcpy_vload2(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_memcpy_vload2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast <4 x i64 addrspace(4)*> addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64>* @NonZeroConstant to i8*), i64 32, i1 false)
-; CHECK-NEXT: [[REF:%.*]] = load <4 x i64 addrspace(4)*>, <4 x i64 addrspace(4)*> addrspace(4)* [[LOC]], align 32
-; CHECK-NEXT: ret <4 x i64 addrspace(4)*> [[REF]]
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant, i64 32, i1 false)
+; CHECK-NEXT: [[REF:%.*]] = load <4 x ptr addrspace(4)>, ptr addrspace(4) [[LOC]], align 32
+; CHECK-NEXT: ret <4 x ptr addrspace(4)> [[REF]]
;
entry:
- %loc.bc = bitcast <4 x i64 addrspace(4)*> addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64>* @NonZeroConstant to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 32, i1 false)
- %ref = load <4 x i64 addrspace(4)*>, <4 x i64 addrspace(4)*> addrspace(4)* %loc
- ret <4 x i64 addrspace(4)*> %ref
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant, i64 32, i1 false)
+ %ref = load <4 x ptr addrspace(4)>, ptr addrspace(4) %loc
+ ret <4 x ptr addrspace(4)> %ref
}
-define <4 x i64> @neg_forward_memcpy_vload3(<4 x i64> addrspace(4)* %loc) {
+define <4 x i64> @neg_forward_memcpy_vload3(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_forward_memcpy_vload3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast <4 x i64> addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*), i64 32, i1 false)
-; CHECK-NEXT: [[REF:%.*]] = load <4 x i64>, <4 x i64> addrspace(4)* [[LOC]], align 32
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant2, i64 32, i1 false)
+; CHECK-NEXT: [[REF:%.*]] = load <4 x i64>, ptr addrspace(4) [[LOC]], align 32
; CHECK-NEXT: ret <4 x i64> [[REF]]
;
entry:
- %loc.bc = bitcast <4 x i64> addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 32, i1 false)
- %ref = load <4 x i64>, <4 x i64> addrspace(4)* %loc
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant2, i64 32, i1 false)
+ %ref = load <4 x i64>, ptr addrspace(4) %loc
ret <4 x i64> %ref
}
-define <1 x i64 addrspace(4)*> @forward_memcpy_vload3(<4 x i64 addrspace(4)*> addrspace(4)* %loc) {
+define <1 x ptr addrspace(4)> @forward_memcpy_vload3(ptr addrspace(4) %loc) {
; CHECK-LABEL: @forward_memcpy_vload3(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast <4 x i64 addrspace(4)*> addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*), i64 32, i1 false)
-; CHECK-NEXT: ret <1 x i64 addrspace(4)*> <i64 addrspace(4)* getelementptr (i64, i64 addrspace(4)* null, i32 3)>
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @NonZeroConstant2, i64 32, i1 false)
+; CHECK-NEXT: ret <1 x ptr addrspace(4)> <ptr addrspace(4) getelementptr (i64, ptr addrspace(4) null, i32 3)>
;
entry:
- %loc.bc = bitcast <4 x i64 addrspace(4)*> addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64 addrspace(4)*>* @NonZeroConstant2 to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 32, i1 false)
- %ref = load <4 x i64 addrspace(4)*>, <4 x i64 addrspace(4)*> addrspace(4)* %loc
- %val = extractelement <4 x i64 addrspace(4)*> %ref, i32 0
- %ret = insertelement <1 x i64 addrspace(4)*> undef, i64 addrspace(4)* %val, i32 0
- ret <1 x i64 addrspace(4)*> %ret
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @NonZeroConstant2, i64 32, i1 false)
+ %ref = load <4 x ptr addrspace(4)>, ptr addrspace(4) %loc
+ %val = extractelement <4 x ptr addrspace(4)> %ref, i32 0
+ %ret = insertelement <1 x ptr addrspace(4)> undef, ptr addrspace(4) %val, i32 0
+ ret <1 x ptr addrspace(4)> %ret
}
; Can forward since we can do so w/o breaking types
-define i8 addrspace(4)* @forward_memcpy_zero(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @forward_memcpy_zero(ptr addrspace(4) %loc) {
; CHECK-LABEL: @forward_memcpy_zero(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 [[LOC_BC]], i8* bitcast (<4 x i64>* @ZeroConstant to i8*), i64 8, i1 false)
-; CHECK-NEXT: ret i8 addrspace(4)* null
+; CHECK-NEXT: call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 [[LOC:%.*]], ptr @ZeroConstant, i64 8, i1 false)
+; CHECK-NEXT: ret ptr addrspace(4) null
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to i8 addrspace(4)*
- %src.bc = bitcast <4 x i64>* @ZeroConstant to i8*
- call void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* align 4 %loc.bc, i8* %src.bc, i64 8, i1 false)
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc
- ret i8 addrspace(4)* %ref
+ call void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) align 4 %loc, ptr @ZeroConstant, i64 8, i1 false)
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc
+ ret ptr addrspace(4) %ref
}
-declare void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* nocapture, i8* nocapture, i64, i1) nounwind
+declare void @llvm.memcpy.p4.p0.i64(ptr addrspace(4) nocapture, ptr nocapture, i64, i1) nounwind
; Same as the neg_forward_store cases, but for non defs.
; (Pretend we wrote out the alwaysfalse idiom above.)
-define i8 addrspace(4)* @neg_store_clobber(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @neg_store_clobber(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_store_clobber(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to <2 x i64> addrspace(4)*
-; CHECK-NEXT: store <2 x i64> <i64 4, i64 4>, <2 x i64> addrspace(4)* [[LOC_BC]], align 16
-; CHECK-NEXT: [[LOC_OFF:%.*]] = getelementptr i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC]], i64 1
-; CHECK-NEXT: [[REF:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC_OFF]], align 8
-; CHECK-NEXT: ret i8 addrspace(4)* [[REF]]
+; CHECK-NEXT: store <2 x i64> <i64 4, i64 4>, ptr addrspace(4) [[LOC:%.*]], align 16
+; CHECK-NEXT: [[LOC_OFF:%.*]] = getelementptr ptr addrspace(4), ptr addrspace(4) [[LOC]], i64 1
+; CHECK-NEXT: [[REF:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[LOC_OFF]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) [[REF]]
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to <2 x i64> addrspace(4)*
- store <2 x i64> <i64 4, i64 4>, <2 x i64> addrspace(4)* %loc.bc
- %loc.off = getelementptr i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc, i64 1
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc.off
- ret i8 addrspace(4)* %ref
+ store <2 x i64> <i64 4, i64 4>, ptr addrspace(4) %loc
+ %loc.off = getelementptr ptr addrspace(4), ptr addrspace(4) %loc, i64 1
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc.off
+ ret ptr addrspace(4) %ref
}
declare void @use(<2 x i64>) inaccessiblememonly
; Same as the neg_forward_store cases, but for non defs.
; (Pretend we wrote out the alwaysfalse idiom above.)
-define i8 addrspace(4)* @neg_load_clobber(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @neg_load_clobber(ptr addrspace(4) %loc) {
; CHECK-LABEL: @neg_load_clobber(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to <2 x i64> addrspace(4)*
-; CHECK-NEXT: [[V:%.*]] = load <2 x i64>, <2 x i64> addrspace(4)* [[LOC_BC]], align 16
+; CHECK-NEXT: [[V:%.*]] = load <2 x i64>, ptr addrspace(4) [[LOC:%.*]], align 16
; CHECK-NEXT: call void @use(<2 x i64> [[V]])
-; CHECK-NEXT: [[LOC_OFF:%.*]] = getelementptr i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC]], i64 1
-; CHECK-NEXT: [[REF:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC_OFF]], align 8
-; CHECK-NEXT: ret i8 addrspace(4)* [[REF]]
+; CHECK-NEXT: [[LOC_OFF:%.*]] = getelementptr ptr addrspace(4), ptr addrspace(4) [[LOC]], i64 1
+; CHECK-NEXT: [[REF:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[LOC_OFF]], align 8
+; CHECK-NEXT: ret ptr addrspace(4) [[REF]]
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to <2 x i64> addrspace(4)*
- %v = load <2 x i64>, <2 x i64> addrspace(4)* %loc.bc
+ %v = load <2 x i64>, ptr addrspace(4) %loc
call void @use(<2 x i64> %v)
- %loc.off = getelementptr i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc, i64 1
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc.off
- ret i8 addrspace(4)* %ref
+ %loc.off = getelementptr ptr addrspace(4), ptr addrspace(4) %loc, i64 1
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc.off
+ ret ptr addrspace(4) %ref
}
-define i8 addrspace(4)* @store_clobber_zero(i8 addrspace(4)* addrspace(4)* %loc) {
+define ptr addrspace(4) @store_clobber_zero(ptr addrspace(4) %loc) {
; CHECK-LABEL: @store_clobber_zero(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)* addrspace(4)* [[LOC:%.*]] to <2 x i64> addrspace(4)*
-; CHECK-NEXT: store <2 x i64> zeroinitializer, <2 x i64> addrspace(4)* [[LOC_BC]], align 16
-; CHECK-NEXT: [[LOC_OFF:%.*]] = getelementptr i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[LOC]], i64 1
-; CHECK-NEXT: ret i8 addrspace(4)* null
+; CHECK-NEXT: store <2 x i64> zeroinitializer, ptr addrspace(4) [[LOC:%.*]], align 16
+; CHECK-NEXT: [[LOC_OFF:%.*]] = getelementptr ptr addrspace(4), ptr addrspace(4) [[LOC]], i64 1
+; CHECK-NEXT: ret ptr addrspace(4) null
;
entry:
- %loc.bc = bitcast i8 addrspace(4)* addrspace(4)* %loc to <2 x i64> addrspace(4)*
- store <2 x i64> zeroinitializer, <2 x i64> addrspace(4)* %loc.bc
- %loc.off = getelementptr i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc, i64 1
- %ref = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %loc.off
- ret i8 addrspace(4)* %ref
+ store <2 x i64> zeroinitializer, ptr addrspace(4) %loc
+ %loc.off = getelementptr ptr addrspace(4), ptr addrspace(4) %loc, i64 1
+ %ref = load ptr addrspace(4), ptr addrspace(4) %loc.off
+ ret ptr addrspace(4) %ref
}
-define void @smaller_vector(i8* %p) {
+define void @smaller_vector(ptr %p) {
; CHECK-LABEL: @smaller_vector(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[P:%.*]] to <4 x i64 addrspace(4)*>*
-; CHECK-NEXT: [[B:%.*]] = bitcast i8* [[P]] to <2 x i64 addrspace(4)*>*
-; CHECK-NEXT: [[V4:%.*]] = load <4 x i64 addrspace(4)*>, <4 x i64 addrspace(4)*>* [[A]], align 32
-; CHECK-NEXT: [[V2:%.*]] = load <2 x i64 addrspace(4)*>, <2 x i64 addrspace(4)*>* [[B]], align 32
-; CHECK-NEXT: call void @use.v2(<2 x i64 addrspace(4)*> [[V2]])
-; CHECK-NEXT: call void @use.v4(<4 x i64 addrspace(4)*> [[V4]])
+; CHECK-NEXT: [[V4:%.*]] = load <4 x ptr addrspace(4)>, ptr [[P:%.*]], align 32
+; CHECK-NEXT: [[V2:%.*]] = load <2 x ptr addrspace(4)>, ptr [[P]], align 32
+; CHECK-NEXT: call void @use.v2(<2 x ptr addrspace(4)> [[V2]])
+; CHECK-NEXT: call void @use.v4(<4 x ptr addrspace(4)> [[V4]])
; CHECK-NEXT: ret void
;
entry:
- %a = bitcast i8* %p to <4 x i64 addrspace(4)*>*
- %b = bitcast i8* %p to <2 x i64 addrspace(4)*>*
- %v4 = load <4 x i64 addrspace(4)*>, <4 x i64 addrspace(4)*>* %a, align 32
- %v2 = load <2 x i64 addrspace(4)*>, <2 x i64 addrspace(4)*>* %b, align 32
- call void @use.v2(<2 x i64 addrspace(4)*> %v2)
- call void @use.v4(<4 x i64 addrspace(4)*> %v4)
+ %v4 = load <4 x ptr addrspace(4)>, ptr %p, align 32
+ %v2 = load <2 x ptr addrspace(4)>, ptr %p, align 32
+ call void @use.v2(<2 x ptr addrspace(4)> %v2)
+ call void @use.v4(<4 x ptr addrspace(4)> %v4)
ret void
}
-define i64 addrspace(4)* @vector_extract(i8* %p) {
+define ptr addrspace(4) @vector_extract(ptr %p) {
; CHECK-LABEL: @vector_extract(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[P:%.*]] to <4 x i64 addrspace(4)*>*
-; CHECK-NEXT: [[B:%.*]] = bitcast i8* [[P]] to i64 addrspace(4)**
-; CHECK-NEXT: [[V4:%.*]] = load <4 x i64 addrspace(4)*>, <4 x i64 addrspace(4)*>* [[A]], align 32
-; CHECK-NEXT: [[RES:%.*]] = load i64 addrspace(4)*, i64 addrspace(4)** [[B]], align 32
-; CHECK-NEXT: call void @use.v4(<4 x i64 addrspace(4)*> [[V4]])
-; CHECK-NEXT: ret i64 addrspace(4)* [[RES]]
+; CHECK-NEXT: [[V4:%.*]] = load <4 x ptr addrspace(4)>, ptr [[P:%.*]], align 32
+; CHECK-NEXT: [[RES:%.*]] = load ptr addrspace(4), ptr [[P]], align 32
+; CHECK-NEXT: call void @use.v4(<4 x ptr addrspace(4)> [[V4]])
+; CHECK-NEXT: ret ptr addrspace(4) [[RES]]
;
entry:
- %a = bitcast i8* %p to <4 x i64 addrspace(4)*>*
- %b = bitcast i8* %p to i64 addrspace(4)**
- %v4 = load <4 x i64 addrspace(4)*>, <4 x i64 addrspace(4)*>* %a, align 32
- %res = load i64 addrspace(4)*, i64 addrspace(4)** %b, align 32
- call void @use.v4(<4 x i64 addrspace(4)*> %v4)
- ret i64 addrspace(4)* %res
+ %v4 = load <4 x ptr addrspace(4)>, ptr %p, align 32
+ %res = load ptr addrspace(4), ptr %p, align 32
+ call void @use.v4(<4 x ptr addrspace(4)> %v4)
+ ret ptr addrspace(4) %res
}
-declare void @use.v2(<2 x i64 addrspace(4)*>)
-declare void @use.v4(<4 x i64 addrspace(4)*>)
-define i8 addrspace(5)* @multini(i1 %alwaysFalse, i8 addrspace(4)* %val, i8 addrspace(4)** %loc) {
+declare void @use.v2(<2 x ptr addrspace(4)>)
+declare void @use.v4(<4 x ptr addrspace(4)>)
+define ptr addrspace(5) @multini(i1 %alwaysFalse, ptr addrspace(4) %val, ptr %loc) {
; CHECK-LABEL: @multini(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i8 addrspace(4)* [[VAL:%.*]], i8 addrspace(4)** [[LOC:%.*]], align 8
+; CHECK-NEXT: store ptr addrspace(4) [[VAL:%.*]], ptr [[LOC:%.*]], align 8
; CHECK-NEXT: br i1 [[ALWAYSFALSE:%.*]], label [[NEVERTAKEN:%.*]], label [[ALWAYSTAKEN:%.*]]
; CHECK: neverTaken:
-; CHECK-NEXT: [[LOC_BC:%.*]] = bitcast i8 addrspace(4)** [[LOC]] to i8 addrspace(5)**
-; CHECK-NEXT: [[DIFFERENTAS:%.*]] = load i8 addrspace(5)*, i8 addrspace(5)** [[LOC_BC]], align 8
-; CHECK-NEXT: ret i8 addrspace(5)* [[DIFFERENTAS]]
+; CHECK-NEXT: [[DIFFERENTAS:%.*]] = load ptr addrspace(5), ptr [[LOC]], align 8
+; CHECK-NEXT: ret ptr addrspace(5) [[DIFFERENTAS]]
; CHECK: alwaysTaken:
-; CHECK-NEXT: ret i8 addrspace(5)* null
+; CHECK-NEXT: ret ptr addrspace(5) null
;
entry:
- store i8 addrspace(4)* %val, i8 addrspace(4)** %loc
+ store ptr addrspace(4) %val, ptr %loc
br i1 %alwaysFalse, label %neverTaken, label %alwaysTaken
neverTaken:
- %loc.bc = bitcast i8 addrspace(4)** %loc to i8 addrspace(5)**
- %
diff erentas = load i8 addrspace(5)*, i8 addrspace(5)** %loc.bc
- ret i8 addrspace(5)* %
diff erentas
+ %
diff erentas = load ptr addrspace(5), ptr %loc
+ ret ptr addrspace(5) %
diff erentas
alwaysTaken:
- ret i8 addrspace(5)* null
+ ret ptr addrspace(5) null
}
diff --git a/llvm/test/Transforms/GVN/nonescaping-malloc.ll b/llvm/test/Transforms/GVN/nonescaping-malloc.ll
index 43a7c23f7e403..76d8cda34e6db 100644
--- a/llvm/test/Transforms/GVN/nonescaping-malloc.ll
+++ b/llvm/test/Transforms/GVN/nonescaping-malloc.ll
@@ -14,98 +14,91 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
target triple = "x86_64-apple-darwin10.0"
%"struct.llvm::MallocAllocator" = type <{ i8 }>
-%"struct.llvm::StringMap<void*,llvm::MallocAllocator>" = type { %"struct.llvm::StringMapImpl", %"struct.llvm::MallocAllocator" }
-%"struct.llvm::StringMapEntry<void*>" = type { %"struct.llvm::StringMapEntryBase", i8* }
+%"struct.llvm::StringMap<ptr,llvm::MallocAllocator>" = type { %"struct.llvm::StringMapImpl", %"struct.llvm::MallocAllocator" }
+%"struct.llvm::StringMapEntry<ptr>" = type { %"struct.llvm::StringMapEntryBase", ptr }
%"struct.llvm::StringMapEntryBase" = type { i32 }
-%"struct.llvm::StringMapImpl" = type { %"struct.llvm::StringMapImpl::ItemBucket"*, i32, i32, i32, i32 }
-%"struct.llvm::StringMapImpl::ItemBucket" = type { i32, %"struct.llvm::StringMapEntryBase"* }
-%"struct.llvm::StringRef" = type { i8*, i64 }
+%"struct.llvm::StringMapImpl" = type { ptr, i32, i32, i32, i32 }
+%"struct.llvm::StringMapImpl::ItemBucket" = type { i32, ptr }
+%"struct.llvm::StringRef" = type { ptr, i64 }
-define %"struct.llvm::StringMapEntry<void*>"* @_Z3fooRN4llvm9StringMapIPvNS_15MallocAllocatorEEEPKc(%"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %X, i8* %P) ssp {
+define ptr @_Z3fooRN4llvm9StringMapIPvNS_15MallocAllocatorEEEPKc(ptr %X, ptr %P) ssp {
entry:
%tmp = alloca %"struct.llvm::StringRef", align 8
- %tmp.i = getelementptr inbounds %"struct.llvm::StringRef", %"struct.llvm::StringRef"* %tmp, i64 0, i32 0
- store i8* %P, i8** %tmp.i, align 8
- %tmp1.i = call i64 @strlen(i8* %P) nounwind readonly
- %tmp2.i = getelementptr inbounds %"struct.llvm::StringRef", %"struct.llvm::StringRef"* %tmp, i64 0, i32 1
- store i64 %tmp1.i, i64* %tmp2.i, align 8
- %tmp1 = call %"struct.llvm::StringMapEntry<void*>"* @_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueERKNS_9StringRefE(%"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %X, %"struct.llvm::StringRef"* %tmp) ssp
- ret %"struct.llvm::StringMapEntry<void*>"* %tmp1
+ store ptr %P, ptr %tmp, align 8
+ %tmp1.i = call i64 @strlen(ptr %P) nounwind readonly
+ %tmp2.i = getelementptr inbounds %"struct.llvm::StringRef", ptr %tmp, i64 0, i32 1
+ store i64 %tmp1.i, ptr %tmp2.i, align 8
+ %tmp1 = call ptr @_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueERKNS_9StringRefE(ptr %X, ptr %tmp) ssp
+ ret ptr %tmp1
}
-declare i64 @strlen(i8* nocapture) nounwind readonly
+declare i64 @strlen(ptr nocapture) nounwind readonly
-declare noalias i8* @malloc(i64) nounwind allockind("alloc,uninitialized") allocsize(0) inaccessiblememonly
+declare noalias ptr @malloc(i64) nounwind allockind("alloc,uninitialized") allocsize(0) inaccessiblememonly
-declare i32 @_ZN4llvm13StringMapImpl15LookupBucketForENS_9StringRefE(%"struct.llvm::StringMapImpl"*, i64, i64)
+declare i32 @_ZN4llvm13StringMapImpl15LookupBucketForENS_9StringRefE(ptr, i64, i64)
-define linkonce_odr %"struct.llvm::StringMapEntry<void*>"* @_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueERKNS_9StringRefE(%"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, %"struct.llvm::StringRef"* nocapture %Key) ssp align 2 {
+define linkonce_odr ptr @_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueERKNS_9StringRefE(ptr %this, ptr nocapture %Key) ssp align 2 {
entry:
- %elt = bitcast %"struct.llvm::StringRef"* %Key to i64*
- %val = load i64, i64* %elt
- %tmp = getelementptr inbounds %"struct.llvm::StringRef", %"struct.llvm::StringRef"* %Key, i64 0, i32 1
- %val2 = load i64, i64* %tmp
- %tmp2.i = getelementptr inbounds %"struct.llvm::StringMap<void*,llvm::MallocAllocator>", %"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, i64 0, i32 0
- %tmp3.i = tail call i32 @_ZN4llvm13StringMapImpl15LookupBucketForENS_9StringRefE(%"struct.llvm::StringMapImpl"* %tmp2.i, i64 %val, i64 %val2)
- %tmp4.i = getelementptr inbounds %"struct.llvm::StringMap<void*,llvm::MallocAllocator>", %"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, i64 0, i32 0, i32 0
- %tmp5.i = load %"struct.llvm::StringMapImpl::ItemBucket"*, %"struct.llvm::StringMapImpl::ItemBucket"** %tmp4.i, align 8
+ %val = load i64, ptr %Key
+ %tmp = getelementptr inbounds %"struct.llvm::StringRef", ptr %Key, i64 0, i32 1
+ %val2 = load i64, ptr %tmp
+ %tmp2.i = getelementptr inbounds %"struct.llvm::StringMap<ptr,llvm::MallocAllocator>", ptr %this, i64 0, i32 0
+ %tmp3.i = tail call i32 @_ZN4llvm13StringMapImpl15LookupBucketForENS_9StringRefE(ptr %tmp2.i, i64 %val, i64 %val2)
+ %tmp4.i = getelementptr inbounds %"struct.llvm::StringMap<ptr,llvm::MallocAllocator>", ptr %this, i64 0, i32 0, i32 0
+ %tmp5.i = load ptr, ptr %tmp4.i, align 8
%tmp6.i = zext i32 %tmp3.i to i64
- %tmp7.i = getelementptr inbounds %"struct.llvm::StringMapImpl::ItemBucket", %"struct.llvm::StringMapImpl::ItemBucket"* %tmp5.i, i64 %tmp6.i, i32 1
- %tmp8.i = load %"struct.llvm::StringMapEntryBase"*, %"struct.llvm::StringMapEntryBase"** %tmp7.i, align 8
- %tmp9.i = icmp eq %"struct.llvm::StringMapEntryBase"* %tmp8.i, null
- %tmp13.i = icmp eq %"struct.llvm::StringMapEntryBase"* %tmp8.i, inttoptr (i64 -1 to %"struct.llvm::StringMapEntryBase"*)
+ %tmp7.i = getelementptr inbounds %"struct.llvm::StringMapImpl::ItemBucket", ptr %tmp5.i, i64 %tmp6.i, i32 1
+ %tmp8.i = load ptr, ptr %tmp7.i, align 8
+ %tmp9.i = icmp eq ptr %tmp8.i, null
+ %tmp13.i = icmp eq ptr %tmp8.i, inttoptr (i64 -1 to ptr)
%or.cond.i = or i1 %tmp9.i, %tmp13.i
br i1 %or.cond.i, label %bb4.i, label %bb6.i
bb4.i: ; preds = %entry
- %tmp41.i = inttoptr i64 %val to i8*
- %tmp4.i35.i = getelementptr inbounds i8, i8* %tmp41.i, i64 %val2
- %tmp.i.i = ptrtoint i8* %tmp4.i35.i to i64
+ %tmp41.i = inttoptr i64 %val to ptr
+ %tmp4.i35.i = getelementptr inbounds i8, ptr %tmp41.i, i64 %val2
+ %tmp.i.i = ptrtoint ptr %tmp4.i35.i to i64
%tmp1.i.i = trunc i64 %tmp.i.i to i32
%tmp3.i.i = trunc i64 %val to i32
%tmp4.i.i = sub i32 %tmp1.i.i, %tmp3.i.i
%tmp5.i.i = add i32 %tmp4.i.i, 17
%tmp8.i.i = zext i32 %tmp5.i.i to i64
- %tmp.i20.i.i = tail call noalias i8* @malloc(i64 %tmp8.i.i) nounwind
- %tmp10.i.i = bitcast i8* %tmp.i20.i.i to %"struct.llvm::StringMapEntry<void*>"*
- %tmp12.i.i = icmp eq i8* %tmp.i20.i.i, null
+ %tmp.i20.i.i = tail call noalias ptr @malloc(i64 %tmp8.i.i) nounwind
+ %tmp12.i.i = icmp eq ptr %tmp.i20.i.i, null
br i1 %tmp12.i.i, label %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i, label %bb.i.i
bb.i.i: ; preds = %bb4.i
- %tmp.i.i.i.i = bitcast i8* %tmp.i20.i.i to i32*
- store i32 %tmp4.i.i, i32* %tmp.i.i.i.i, align 4
- %tmp1.i19.i.i = getelementptr inbounds i8, i8* %tmp.i20.i.i, i64 8
- %0 = bitcast i8* %tmp1.i19.i.i to i8**
- store i8* null, i8** %0, align 8
+ store i32 %tmp4.i.i, ptr %tmp.i20.i.i, align 4
+ %tmp1.i19.i.i = getelementptr inbounds i8, ptr %tmp.i20.i.i, i64 8
+ store ptr null, ptr %tmp1.i19.i.i, align 8
br label %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i
_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i: ; preds = %bb.i.i, %bb4.i
- %tmp.i18.i.i = getelementptr inbounds i8, i8* %tmp.i20.i.i, i64 16
+ %tmp.i18.i.i = getelementptr inbounds i8, ptr %tmp.i20.i.i, i64 16
%tmp15.i.i = zext i32 %tmp4.i.i to i64
- tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp.i18.i.i, i8* %tmp41.i, i64 %tmp15.i.i, i1 false)
+ tail call void @llvm.memcpy.p0.p0.i64(ptr %tmp.i18.i.i, ptr %tmp41.i, i64 %tmp15.i.i, i1 false)
%tmp.i18.sum.i.i = add i64 %tmp15.i.i, 16
- %tmp17.i.i = getelementptr inbounds i8, i8* %tmp.i20.i.i, i64 %tmp.i18.sum.i.i
- store i8 0, i8* %tmp17.i.i, align 1
- %tmp.i.i.i = getelementptr inbounds i8, i8* %tmp.i20.i.i, i64 8
- %1 = bitcast i8* %tmp.i.i.i to i8**
- store i8* null, i8** %1, align 8
- %tmp22.i = load %"struct.llvm::StringMapEntryBase"*, %"struct.llvm::StringMapEntryBase"** %tmp7.i, align 8
- %tmp24.i = icmp eq %"struct.llvm::StringMapEntryBase"* %tmp22.i, inttoptr (i64 -1 to %"struct.llvm::StringMapEntryBase"*)
+ %tmp17.i.i = getelementptr inbounds i8, ptr %tmp.i20.i.i, i64 %tmp.i18.sum.i.i
+ store i8 0, ptr %tmp17.i.i, align 1
+ %tmp.i.i.i = getelementptr inbounds i8, ptr %tmp.i20.i.i, i64 8
+ store ptr null, ptr %tmp.i.i.i, align 8
+ %tmp22.i = load ptr, ptr %tmp7.i, align 8
+ %tmp24.i = icmp eq ptr %tmp22.i, inttoptr (i64 -1 to ptr)
br i1 %tmp24.i, label %bb9.i, label %_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueIS1_EERNS_14StringMapEntryIS1_EENS_9StringRefET_.exit
bb6.i: ; preds = %entry
- %tmp16.i = bitcast %"struct.llvm::StringMapEntryBase"* %tmp8.i to %"struct.llvm::StringMapEntry<void*>"*
- ret %"struct.llvm::StringMapEntry<void*>"* %tmp16.i
+ ret ptr %tmp8.i
bb9.i: ; preds = %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i
- %tmp25.i = getelementptr inbounds %"struct.llvm::StringMap<void*,llvm::MallocAllocator>", %"struct.llvm::StringMap<void*,llvm::MallocAllocator>"* %this, i64 0, i32 0, i32 3
- %tmp26.i = load i32, i32* %tmp25.i, align 8
+ %tmp25.i = getelementptr inbounds %"struct.llvm::StringMap<ptr,llvm::MallocAllocator>", ptr %this, i64 0, i32 0, i32 3
+ %tmp26.i = load i32, ptr %tmp25.i, align 8
%tmp27.i = add i32 %tmp26.i, -1
- store i32 %tmp27.i, i32* %tmp25.i, align 8
- ret %"struct.llvm::StringMapEntry<void*>"* %tmp10.i.i
+ store i32 %tmp27.i, ptr %tmp25.i, align 8
+ ret ptr %tmp.i20.i.i
_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueIS1_EERNS_14StringMapEntryIS1_EENS_9StringRefET_.exit: ; preds = %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i
- ret %"struct.llvm::StringMapEntry<void*>"* %tmp10.i.i
+ ret ptr %tmp.i20.i.i
}
-declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
+declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
diff --git a/llvm/test/Transforms/GVN/nonescaping.ll b/llvm/test/Transforms/GVN/nonescaping.ll
index a39e2b8acb983..0edcb663224b7 100644
--- a/llvm/test/Transforms/GVN/nonescaping.ll
+++ b/llvm/test/Transforms/GVN/nonescaping.ll
@@ -4,50 +4,50 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin10.0"
-declare noalias i8* @malloc(i64) nounwind allockind("alloc,uninitialized") allocsize(0) inaccessiblememonly
-declare noalias i8* @calloc(i64, i64) allockind("alloc,zeroed") allocsize(0,1) inaccessiblememonly
-declare noalias i8* @_Znwm(i64)
-declare void @escape(i8*)
+declare noalias ptr @malloc(i64) nounwind allockind("alloc,uninitialized") allocsize(0) inaccessiblememonly
+declare noalias ptr @calloc(i64, i64) allockind("alloc,zeroed") allocsize(0,1) inaccessiblememonly
+declare noalias ptr @_Znwm(i64)
+declare void @escape(ptr)
-define i8 @test_malloc(i8* %p) {
+define i8 @test_malloc(ptr %p) {
; CHECK-LABEL: @test_malloc(
-; CHECK-NEXT: [[OBJ:%.*]] = call i8* @malloc(i64 16)
-; CHECK-NEXT: call void @escape(i8* [[OBJ]])
+; CHECK-NEXT: [[OBJ:%.*]] = call ptr @malloc(i64 16)
+; CHECK-NEXT: call void @escape(ptr [[OBJ]])
; CHECK-NEXT: ret i8 0
;
- %v1 = load i8, i8* %p
- %obj = call i8* @malloc(i64 16)
- %v2 = load i8, i8* %p
+ %v1 = load i8, ptr %p
+ %obj = call ptr @malloc(i64 16)
+ %v2 = load i8, ptr %p
%sub = sub i8 %v1, %v2
- call void @escape(i8* %obj)
+ call void @escape(ptr %obj)
ret i8 %sub
}
-define i8 @test_calloc(i8* %p) {
+define i8 @test_calloc(ptr %p) {
; CHECK-LABEL: @test_calloc(
-; CHECK-NEXT: [[OBJ:%.*]] = call i8* @calloc(i64 1, i64 16)
-; CHECK-NEXT: call void @escape(i8* [[OBJ]])
+; CHECK-NEXT: [[OBJ:%.*]] = call ptr @calloc(i64 1, i64 16)
+; CHECK-NEXT: call void @escape(ptr [[OBJ]])
; CHECK-NEXT: ret i8 0
;
- %v1 = load i8, i8* %p
- %obj = call i8* @calloc(i64 1, i64 16)
- %v2 = load i8, i8* %p
+ %v1 = load i8, ptr %p
+ %obj = call ptr @calloc(i64 1, i64 16)
+ %v2 = load i8, ptr %p
%sub = sub i8 %v1, %v2
- call void @escape(i8* %obj)
+ call void @escape(ptr %obj)
ret i8 %sub
}
-define i8 @test_opnew(i8* %p) {
+define i8 @test_opnew(ptr %p) {
; CHECK-LABEL: @test_opnew(
-; CHECK-NEXT: [[OBJ:%.*]] = call i8* @_Znwm(i64 16)
-; CHECK-NEXT: call void @escape(i8* [[OBJ]])
+; CHECK-NEXT: [[OBJ:%.*]] = call ptr @_Znwm(i64 16)
+; CHECK-NEXT: call void @escape(ptr [[OBJ]])
; CHECK-NEXT: ret i8 0
;
- %v1 = load i8, i8* %p
- %obj = call i8* @_Znwm(i64 16)
- %v2 = load i8, i8* %p
+ %v1 = load i8, ptr %p
+ %obj = call ptr @_Znwm(i64 16)
+ %v2 = load i8, ptr %p
%sub = sub i8 %v1, %v2
- call void @escape(i8* %obj)
+ call void @escape(ptr %obj)
ret i8 %sub
}
diff --git a/llvm/test/Transforms/GVN/null-aliases-nothing.ll b/llvm/test/Transforms/GVN/null-aliases-nothing.ll
index 1fb4e53e12851..dc4ff40627947 100644
--- a/llvm/test/Transforms/GVN/null-aliases-nothing.ll
+++ b/llvm/test/Transforms/GVN/null-aliases-nothing.ll
@@ -1,18 +1,17 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
%t = type { i32 }
-declare void @test1f(i8*)
+declare void @test1f(ptr)
-define void @test1(%t* noalias %stuff ) {
- %p = getelementptr inbounds %t, %t* %stuff, i32 0, i32 0
- %before = load i32, i32* %p
+define void @test1(ptr noalias %stuff ) {
+ %before = load i32, ptr %stuff
- call void @test1f(i8* null)
+ call void @test1f(ptr null)
- %after = load i32, i32* %p ; <--- This should be a dead load
+ %after = load i32, ptr %stuff ; <--- This should be a dead load
%sum = add i32 %before, %after
- store i32 %sum, i32* %p
+ store i32 %sum, ptr %stuff
ret void
; CHECK: load
; CHECK-NOT: load
diff --git a/llvm/test/Transforms/GVN/opt-remarks-multiple-users.ll b/llvm/test/Transforms/GVN/opt-remarks-multiple-users.ll
index f4a08aad8f1e5..b7df74e08865e 100644
--- a/llvm/test/Transforms/GVN/opt-remarks-multiple-users.ll
+++ b/llvm/test/Transforms/GVN/opt-remarks-multiple-users.ll
@@ -42,13 +42,13 @@ target triple = "x86_64-unknown-linux-gnu"
; multiple users, given that one of them lies on a path between every other
; potentially clobbering use and the load.
-define dso_local void @multipleUsers(i32* %a, i32 %b) local_unnamed_addr #0 {
+define dso_local void @multipleUsers(ptr %a, i32 %b) local_unnamed_addr #0 {
entry:
- store i32 %b, i32* %a, align 4
+ store i32 %b, ptr %a, align 4
tail call void @clobberingFunc() #1, !dbg !10
- %0 = load i32, i32* %a, align 4, !dbg !11
+ %0 = load i32, ptr %a, align 4, !dbg !11
tail call void @clobberingFunc() #1, !dbg !12
- %1 = load i32, i32* %a, align 4, !dbg !13
+ %1 = load i32, ptr %a, align 4, !dbg !13
%add2 = add nsw i32 %1, %0
ret void
}
@@ -89,11 +89,11 @@ entry:
define dso_local void @multipleUsers2(i32 %b) local_unnamed_addr #0 {
entry:
- store i32 %b, i32* @g, align 4
+ store i32 %b, ptr @g, align 4
tail call void @clobberingFunc() #1, !dbg !15
- %0 = load i32, i32* @g, align 4, !dbg !16
+ %0 = load i32, ptr @g, align 4, !dbg !16
tail call void @clobberingFunc() #1, !dbg !17
- %1 = load i32, i32* @g, align 4, !dbg !18
+ %1 = load i32, ptr @g, align 4, !dbg !18
%add3 = add nsw i32 %1, %0
ret void
}
@@ -104,7 +104,7 @@ declare dso_local void @clobberingFunc() local_unnamed_addr #0
define dso_local void @globalUser(i32 %b) local_unnamed_addr #0 {
entry:
- store i32 %b, i32* @g, align 4
+ store i32 %b, ptr @g, align 4
ret void
}
diff --git a/llvm/test/Transforms/GVN/opt-remarks-non-dominating.ll b/llvm/test/Transforms/GVN/opt-remarks-non-dominating.ll
index 39c4600d4f60b..a5f3d7ecce2b8 100644
--- a/llvm/test/Transforms/GVN/opt-remarks-non-dominating.ll
+++ b/llvm/test/Transforms/GVN/opt-remarks-non-dominating.ll
@@ -24,19 +24,19 @@ target triple = "x86_64-unknown-linux-gnu"
; Confirm that the partial redundancy being clobbered by the call to
; clobberingFunc() between store and load is identified.
-define dso_local void @nonDominating1(i32* %a, i1 %cond, i32 %b) local_unnamed_addr #0 {
+define dso_local void @nonDominating1(ptr %a, i1 %cond, i32 %b) local_unnamed_addr #0 {
entry:
br i1 %cond, label %if.then, label %if.end
if.then: ; preds = %entry
- store i32 %b, i32* %a, align 4
+ store i32 %b, ptr %a, align 4
br label %if.end
if.end: ; preds = %if.then, %entry
tail call void @clobberingFunc() #1
- %0 = load i32, i32* %a, align 4
+ %0 = load i32, ptr %a, align 4
%mul2 = shl nsw i32 %0, 1
- store i32 %mul2, i32* %a, align 4
+ store i32 %mul2, ptr %a, align 4
ret void
}
@@ -80,23 +80,23 @@ declare dso_local void @clobberingFunc() local_unnamed_addr #0
; %1 is not clobbered by the first call however, and %0 is irrelevant for the
; second one since %1 is more recently available.
-define dso_local void @nonDominating2(i32* %a, i1 %cond) local_unnamed_addr #0 {
+define dso_local void @nonDominating2(ptr %a, i1 %cond) local_unnamed_addr #0 {
entry:
br i1 %cond, label %if.then, label %if.end5
if.then: ; preds = %entry
- %0 = load i32, i32* %a, align 4, !dbg !14
+ %0 = load i32, ptr %a, align 4, !dbg !14
%mul = mul nsw i32 %0, 10
tail call void @clobberingFunc() #1, !dbg !15
- %1 = load i32, i32* %a, align 4, !dbg !16
+ %1 = load i32, ptr %a, align 4, !dbg !16
%mul3 = mul nsw i32 %1, 5
tail call void @clobberingFunc() #1, !dbg !17
br label %if.end5
if.end5: ; preds = %if.then, %entry
- %2 = load i32, i32* %a, align 4, !dbg !18
+ %2 = load i32, ptr %a, align 4, !dbg !18
%mul9 = shl nsw i32 %2, 1
- store i32 %mul9, i32* %a, align 4
+ store i32 %mul9, ptr %a, align 4
ret void
}
@@ -117,21 +117,21 @@ if.end5: ; preds = %if.then, %entry
; no attempt is made to identify what value could have potentially been reused
; otherwise. Just report that the load cannot be eliminated.
-define dso_local void @nonDominating3(i32* %a, i32 %b, i32 %c, i1 %cond) local_unnamed_addr #0 {
+define dso_local void @nonDominating3(ptr %a, i32 %b, i32 %c, i1 %cond) local_unnamed_addr #0 {
entry:
br i1 %cond, label %if.end5.sink.split, label %if.else
if.else: ; preds = %entry
- store i32 %b, i32* %a, align 4
+ store i32 %b, ptr %a, align 4
br label %if.end5
if.end5.sink.split: ; preds = %entry
- store i32 %c, i32* %a, align 4
+ store i32 %c, ptr %a, align 4
br label %if.end5
if.end5: ; preds = %if.end5.sink.split, %if.else
tail call void @clobberingFunc() #1
- %0 = load i32, i32* %a, align 4
+ %0 = load i32, ptr %a, align 4
%mul7 = shl nsw i32 %0, 1
ret void
}
@@ -158,14 +158,14 @@ entry:
br i1 %cond, label %if.then, label %if.end
if.then: ; preds = %entry
- store i32 %b, i32* @g, align 4
+ store i32 %b, ptr @g, align 4
br label %if.end
if.end: ; preds = %if.then, %entry
tail call void @clobberingFunc() #1
- %0 = load i32, i32* @g, align 4
+ %0 = load i32, ptr @g, align 4
%mul2 = shl nsw i32 %0, 1
- store i32 %mul2, i32* @g, align 4
+ store i32 %mul2, ptr @g, align 4
ret void
}
@@ -173,7 +173,7 @@ if.end: ; preds = %if.then, %entry
define dso_local void @globalUser(i32 %b) local_unnamed_addr #0 {
entry:
- store i32 %b, i32* @g, align 4
+ store i32 %b, ptr @g, align 4
ret void
}
diff --git a/llvm/test/Transforms/GVN/opt-remarks.ll b/llvm/test/Transforms/GVN/opt-remarks.ll
index 0fcf72ad07cb2..9ff0a5cf8cb76 100644
--- a/llvm/test/Transforms/GVN/opt-remarks.ll
+++ b/llvm/test/Transforms/GVN/opt-remarks.ll
@@ -63,33 +63,33 @@
; YAML-NEXT: DebugLoc: { File: '/tmp/s.c', Line: 2, Column: 10 }
; YAML-NEXT: ...
-define i32 @arg(i32* %p, i32 %i) {
+define i32 @arg(ptr %p, i32 %i) {
entry:
- store i32 %i, i32* %p
- %load = load i32, i32* %p
+ store i32 %i, ptr %p
+ %load = load i32, ptr %p
ret i32 %load
}
-define i32 @const(i32* %p) {
+define i32 @const(ptr %p) {
entry:
- store i32 4, i32* %p
- %load = load i32, i32* %p
+ store i32 4, ptr %p
+ %load = load i32, ptr %p
ret i32 %load
}
-define i32 @inst(i32* %p) {
+define i32 @inst(ptr %p) {
entry:
- %load1 = load i32, i32* %p
- %load = load i32, i32* %p
+ %load1 = load i32, ptr %p
+ %load = load i32, ptr %p
%add = add i32 %load1, %load
ret i32 %add
}
-define i32 @may_alias(i32* %p, i32* %r) !dbg !7 {
+define i32 @may_alias(ptr %p, ptr %r) !dbg !7 {
entry:
- %load1 = load i32, i32* %p, !tbaa !13, !dbg !9
- store i32 4, i32* %r, !tbaa !13, !dbg !10
- %load = load i32, i32* %p, !tbaa !13, !dbg !11
+ %load1 = load i32, ptr %p, !tbaa !13, !dbg !9
+ store i32 4, ptr %r, !tbaa !13, !dbg !10
+ %load = load i32, ptr %p, !tbaa !13, !dbg !11
%add = add i32 %load1, %load
ret i32 %add
}
diff --git a/llvm/test/Transforms/GVN/phi-translate-partial-alias.ll b/llvm/test/Transforms/GVN/phi-translate-partial-alias.ll
index 290fac8bef386..a1029762ad4a4 100644
--- a/llvm/test/Transforms/GVN/phi-translate-partial-alias.ll
+++ b/llvm/test/Transforms/GVN/phi-translate-partial-alias.ll
@@ -6,21 +6,21 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; not actually redundant around the loop backedge, despite appearances
; if phi-translation is ignored.
-; CHECK: define void @test0(i8* %begin)
+; CHECK: define void @test0(ptr %begin)
; CHECK: loop:
-; CHECK: %l0 = load i8, i8* %phi
+; CHECK: %l0 = load i8, ptr %phi
; CHECK: call void @bar(i8 %l0)
-; CHECK: %l1 = load i8, i8* %phi
-define void @test0(i8* %begin) {
+; CHECK: %l1 = load i8, ptr %phi
+define void @test0(ptr %begin) {
entry:
br label %loop
loop:
- %phi = phi i8* [ %begin, %entry ], [ %next, %loop ]
- %l0 = load i8, i8* %phi
+ %phi = phi ptr [ %begin, %entry ], [ %next, %loop ]
+ %l0 = load i8, ptr %phi
call void @bar(i8 %l0)
- %l1 = load i8, i8* %phi
- %next = getelementptr inbounds i8, i8* %phi, i8 %l1
+ %l1 = load i8, ptr %phi
+ %next = getelementptr inbounds i8, ptr %phi, i8 %l1
br label %loop
}
diff --git a/llvm/test/Transforms/GVN/pr10820.ll b/llvm/test/Transforms/GVN/pr10820.ll
index 930dadc1b4482..48b13a405f0e3 100644
--- a/llvm/test/Transforms/GVN/pr10820.ll
+++ b/llvm/test/Transforms/GVN/pr10820.ll
@@ -9,10 +9,10 @@ target triple = "x86_64-unknown-linux-gnu"
define void @main() nounwind uwtable {
entry:
; CHECK: store i32
- store i32 402662078, i32* bitcast (i31* @g to i32*), align 8
+ store i32 402662078, ptr @g, align 8
; CHECK-NOT: load i31
- %0 = load i31, i31* @g, align 8
+ %0 = load i31, ptr @g, align 8
; CHECK: store i31
- store i31 %0, i31* undef, align 1
+ store i31 %0, ptr undef, align 1
unreachable
}
diff --git a/llvm/test/Transforms/GVN/pr14166.ll b/llvm/test/Transforms/GVN/pr14166.ll
index 652cae3e5f1bf..6dc831a6e8c35 100644
--- a/llvm/test/Transforms/GVN/pr14166.ll
+++ b/llvm/test/Transforms/GVN/pr14166.ll
@@ -3,22 +3,20 @@ target datalayout = "e-p:32:32:32"
target triple = "i386-pc-linux-gnu"
define <2 x i32> @test1() {
%v1 = alloca <2 x i32>
- call void @anything(<2 x i32>* %v1)
- %v2 = load <2 x i32>, <2 x i32>* %v1
- %v3 = inttoptr <2 x i32> %v2 to <2 x i8*>
- %v4 = bitcast <2 x i32>* %v1 to <2 x i8*>*
- store <2 x i8*> %v3, <2 x i8*>* %v4
- %v5 = load <2 x i32>, <2 x i32>* %v1
+ call void @anything(ptr %v1)
+ %v2 = load <2 x i32>, ptr %v1
+ %v3 = inttoptr <2 x i32> %v2 to <2 x ptr>
+ store <2 x ptr> %v3, ptr %v1
+ %v5 = load <2 x i32>, ptr %v1
ret <2 x i32> %v5
; CHECK-LABEL: @test1(
; CHECK: %v1 = alloca <2 x i32>
-; CHECK: call void @anything(<2 x i32>* %v1)
-; CHECK: %v2 = load <2 x i32>, <2 x i32>* %v1
-; CHECK: %v3 = inttoptr <2 x i32> %v2 to <2 x i8*>
-; CHECK: %v4 = bitcast <2 x i32>* %v1 to <2 x i8*>*
-; CHECK: store <2 x i8*> %v3, <2 x i8*>* %v4
+; CHECK: call void @anything(ptr %v1)
+; CHECK: %v2 = load <2 x i32>, ptr %v1
+; CHECK: %v3 = inttoptr <2 x i32> %v2 to <2 x ptr>
+; CHECK: store <2 x ptr> %v3, ptr %v1
; CHECK: ret <2 x i32> %v2
}
-declare void @anything(<2 x i32>*)
+declare void @anything(ptr)
diff --git a/llvm/test/Transforms/GVN/pr17732.ll b/llvm/test/Transforms/GVN/pr17732.ll
index 6f6e7c61313af..2aa8f6753bee6 100644
--- a/llvm/test/Transforms/GVN/pr17732.ll
+++ b/llvm/test/Transforms/GVN/pr17732.ll
@@ -14,11 +14,11 @@ target triple = "x86_64-unknown-linux-gnu"
define i32 @main() {
entry:
- tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 getelementptr inbounds (%struct.with_array, %struct.with_array* @array_with_zeroinit, i64 0, i32 0, i64 0), i8* align 4 getelementptr inbounds ({ [2 x i8], i32, i8, [3 x i8] }, { [2 x i8], i32, i8, [3 x i8] }* @main.obj_with_array, i64 0, i32 0, i64 0), i64 12, i1 false)
- %0 = load i8, i8* getelementptr inbounds (%struct.with_array, %struct.with_array* @array_with_zeroinit, i64 0, i32 2), align 4
+ tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 @array_with_zeroinit, ptr align 4 getelementptr inbounds ({ [2 x i8], i32, i8, [3 x i8] }, ptr @main.obj_with_array, i64 0, i32 0, i64 0), i64 12, i1 false)
+ %0 = load i8, ptr getelementptr inbounds (%struct.with_array, ptr @array_with_zeroinit, i64 0, i32 2), align 4
- tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 getelementptr inbounds (%struct.with_vector, %struct.with_vector* @vector_with_zeroinit, i64 0, i32 0, i64 0), i8* align 4 getelementptr inbounds ({ <2 x i8>, i32, i8, [3 x i8] }, { <2 x i8>, i32, i8, [3 x i8] }* @main.obj_with_vector, i64 0, i32 0, i64 0), i64 12, i1 false)
- %1 = load i8, i8* getelementptr inbounds (%struct.with_vector, %struct.with_vector* @vector_with_zeroinit, i64 0, i32 2), align 4
+ tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 @vector_with_zeroinit, ptr align 4 getelementptr inbounds ({ <2 x i8>, i32, i8, [3 x i8] }, ptr @main.obj_with_vector, i64 0, i32 0, i64 0), i64 12, i1 false)
+ %1 = load i8, ptr getelementptr inbounds (%struct.with_vector, ptr @vector_with_zeroinit, i64 0, i32 2), align 4
%conv0 = sext i8 %0 to i32
%conv1 = sext i8 %1 to i32
%and = and i32 %conv0, %conv1
@@ -27,4 +27,4 @@ entry:
; CHECK: ret i32 1
}
-declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1)
+declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture readonly, i64, i1)
diff --git a/llvm/test/Transforms/GVN/pr17852.ll b/llvm/test/Transforms/GVN/pr17852.ll
index c286d0654de5a..731cbc61fdc89 100644
--- a/llvm/test/Transforms/GVN/pr17852.ll
+++ b/llvm/test/Transforms/GVN/pr17852.ll
@@ -1,64 +1,56 @@
; RUN: opt < %s -passes=gvn
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
%struct.S0 = type { [2 x i8], [2 x i8], [4 x i8], [2 x i8], i32, i32, i32, i32 }
-define void @fn1(%struct.S0* byval(%struct.S0) align 8 %p1) {
+define void @fn1(ptr byval(%struct.S0) align 8 %p1) {
br label %for.cond
for.cond: ; preds = %1, %0
br label %for.end
- %f2 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 2
- %f9 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 7
+ %f2 = getelementptr inbounds %struct.S0, ptr %p1, i64 0, i32 2
+ %f9 = getelementptr inbounds %struct.S0, ptr %p1, i64 0, i32 7
br label %for.cond
for.end: ; preds = %for.cond
br i1 true, label %if.else, label %if.then
if.then: ; preds = %for.end
- %f22 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 2
- %f7 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 5
- %tmp7 = load i32, i32* %f7, align 8
+ %f22 = getelementptr inbounds %struct.S0, ptr %p1, i64 0, i32 2
+ %f7 = getelementptr inbounds %struct.S0, ptr %p1, i64 0, i32 5
+ %tmp7 = load i32, ptr %f7, align 8
br label %if.end40
if.else: ; preds = %for.end
br i1 false, label %for.cond18, label %if.then6
if.then6: ; preds = %if.else
- %f3 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 2
- %tmp10 = bitcast %struct.S0* %p1 to i16*
- %f5 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 3
- %tmp11 = bitcast [2 x i8]* %f5 to i16*
- %bf.load13 = load i16, i16* %tmp11, align 8
+ %f3 = getelementptr inbounds %struct.S0, ptr %p1, i64 0, i32 2
+ %f5 = getelementptr inbounds %struct.S0, ptr %p1, i64 0, i32 3
+ %bf.load13 = load i16, ptr %f5, align 8
br label %if.end36
for.cond18: ; preds = %if.else
call void @fn4()
br i1 true, label %if.end, label %if.end36
if.end: ; preds = %for.cond18
- %f321 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 2
- %f925 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 7
- %f526 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 3
- %tmp15 = bitcast [2 x i8]* %f526 to i16*
- %bf.load27 = load i16, i16* %tmp15, align 8
- %tmp16 = bitcast %struct.S0* %p1 to i16*
+ %f321 = getelementptr inbounds %struct.S0, ptr %p1, i64 0, i32 2
+ %f925 = getelementptr inbounds %struct.S0, ptr %p1, i64 0, i32 7
+ %f526 = getelementptr inbounds %struct.S0, ptr %p1, i64 0, i32 3
+ %bf.load27 = load i16, ptr %f526, align 8
br label %if.end36
if.end36: ; preds = %if.end, %for.cond18, %if.then6
- %f537 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 3
- %tmp17 = bitcast [2 x i8]* %f537 to i16*
- %bf.load38 = load i16, i16* %tmp17, align 8
+ %f537 = getelementptr inbounds %struct.S0, ptr %p1, i64 0, i32 3
+ %bf.load38 = load i16, ptr %f537, align 8
%bf.clear39 = and i16 %bf.load38, -16384
br label %if.end40
if.end40: ; preds = %if.end36, %if.then
- %f6 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 4
- %tmp18 = load i32, i32* %f6, align 4
+ %f6 = getelementptr inbounds %struct.S0, ptr %p1, i64 0, i32 4
+ %tmp18 = load i32, ptr %f6, align 4
call void @fn2(i32 %tmp18)
- %f8 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 6
- %tmp19 = load i32, i32* %f8, align 4
+ %f8 = getelementptr inbounds %struct.S0, ptr %p1, i64 0, i32 6
+ %tmp19 = load i32, ptr %f8, align 4
%tobool41 = icmp eq i32 %tmp19, 0
br i1 true, label %if.end50, label %if.then42
if.then42: ; preds = %if.end40
- %tmp20 = bitcast %struct.S0* %p1 to i16*
- %f547 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 3
- %tmp21 = bitcast [2 x i8]* %f547 to i16*
- %bf.load48 = load i16, i16* %tmp21, align 8
+ %f547 = getelementptr inbounds %struct.S0, ptr %p1, i64 0, i32 3
+ %bf.load48 = load i16, ptr %f547, align 8
br label %if.end50
if.end50: ; preds = %if.then42, %if.end40
- %f551 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 3
- %tmp22 = bitcast [2 x i8]* %f551 to i16*
- %bf.load52 = load i16, i16* %tmp22, align 8
+ %f551 = getelementptr inbounds %struct.S0, ptr %p1, i64 0, i32 3
+ %bf.load52 = load i16, ptr %f551, align 8
%bf.clear53 = and i16 %bf.load52, -16384
ret void
}
diff --git a/llvm/test/Transforms/GVN/pr24397.ll b/llvm/test/Transforms/GVN/pr24397.ll
index ff52efdd5d147..8ef9360b8e385 100644
--- a/llvm/test/Transforms/GVN/pr24397.ll
+++ b/llvm/test/Transforms/GVN/pr24397.ll
@@ -2,17 +2,16 @@
target triple = "x86_64-unknown-linux-gnu"
-define i64 @foo(i64** %arrayidx) {
+define i64 @foo(ptr %arrayidx) {
entry:
- %p = load i64*, i64** %arrayidx, align 8
- %cmpnull = icmp eq i64* %p, null
+ %p = load ptr, ptr %arrayidx, align 8
+ %cmpnull = icmp eq ptr %p, null
br label %BB2
entry2: ; No predecessors!
br label %BB2
BB2: ; preds = %entry2, %entry
- %bc = bitcast i64** %arrayidx to i64*
- %load = load i64, i64* %bc, align 8
+ %load = load i64, ptr %arrayidx, align 8
ret i64 %load
}
diff --git a/llvm/test/Transforms/GVN/pr24426.ll b/llvm/test/Transforms/GVN/pr24426.ll
index 1ce99480fa0ad..2a0885750108f 100644
--- a/llvm/test/Transforms/GVN/pr24426.ll
+++ b/llvm/test/Transforms/GVN/pr24426.ll
@@ -2,16 +2,15 @@
declare void @check(i8)
-declare void @write(i8* %res)
+declare void @write(ptr %res)
define void @test1() {
%1 = alloca [10 x i8]
- %2 = bitcast [10 x i8]* %1 to i8*
- call void @write(i8* %2)
- %3 = load i8, i8* %2
+ call void @write(ptr %1)
+ %2 = load i8, ptr %1
; CHECK-NOT: undef
- call void @check(i8 %3)
+ call void @check(i8 %2)
ret void
}
diff --git a/llvm/test/Transforms/GVN/pr25440.ll b/llvm/test/Transforms/GVN/pr25440.ll
index 7cd9680686824..507111ef1b8ca 100644
--- a/llvm/test/Transforms/GVN/pr25440.ll
+++ b/llvm/test/Transforms/GVN/pr25440.ll
@@ -9,17 +9,16 @@ target triple = "thumbv7--linux-gnueabi"
@length = external global [0 x i32], align 4
; Function Attrs: nounwind
-define fastcc void @foo(%struct.a* nocapture readonly %x) {
+define fastcc void @foo(ptr nocapture readonly %x) {
;CHECK-LABEL: foo
entry:
br label %bb0
bb0: ; preds = %land.lhs.true, %entry
;CHECK: bb0:
- %x.tr = phi %struct.a* [ %x, %entry ], [ null, %land.lhs.true ]
- %code1 = getelementptr inbounds %struct.a, %struct.a* %x.tr, i32 0, i32 0
- %0 = load i16, i16* %code1, align 4
-; CHECK: load i16, i16*
+ %x.tr = phi ptr [ %x, %entry ], [ null, %land.lhs.true ]
+ %0 = load i16, ptr %x.tr, align 4
+; CHECK: load i16, ptr
%conv = zext i16 %0 to i32
switch i32 %conv, label %if.end.50 [
i32 43, label %cleanup
@@ -33,14 +32,14 @@ land.lhs.true: ; preds = %if.then.5
br i1 undef, label %cleanup, label %bb0
if.then.26: ; preds = %if.then.5
- %x.tr.lcssa163 = phi %struct.a* [ %x.tr, %if.then.5 ]
+ %x.tr.lcssa163 = phi ptr [ %x.tr, %if.then.5 ]
br i1 undef, label %cond.end, label %cond.false
cond.false: ; preds = %if.then.26
; CHECK: cond.false:
; CHECK: load i16
- %mode = getelementptr inbounds %struct.a, %struct.a* %x.tr.lcssa163, i32 0, i32 1
- %bf.load = load i16, i16* %mode, align 2
+ %mode = getelementptr inbounds %struct.a, ptr %x.tr.lcssa163, i32 0, i32 1
+ %bf.load = load i16, ptr %mode, align 2
%bf.shl = shl i16 %bf.load, 8
br label %cond.end
@@ -53,8 +52,8 @@ if.then.44: ; preds = %cond.end
if.end.50: ; preds = %bb0
;%CHECK: if.end.50:
%conv.lcssa = phi i32 [ %conv, %bb0 ]
- %arrayidx52 = getelementptr inbounds [0 x i32], [0 x i32]* @length, i32 0, i32 %conv.lcssa
- %1 = load i32, i32* %arrayidx52, align 4
+ %arrayidx52 = getelementptr inbounds [0 x i32], ptr @length, i32 0, i32 %conv.lcssa
+ %1 = load i32, ptr %arrayidx52, align 4
br i1 undef, label %for.body.57, label %cleanup
for.body.57: ; preds = %if.end.50
@@ -65,8 +64,8 @@ cleanup: ; preds = %if.end.50, %cond.en
ret void
}
- at yy_c_buf_p = external unnamed_addr global i8*, align 4
- at dfg_text = external global i8*, align 4
+ at yy_c_buf_p = external unnamed_addr global ptr, align 4
+ at dfg_text = external global ptr, align 4
define void @dfg_lex() {
;CHECK-LABEL: dfg_lex
@@ -77,21 +76,21 @@ while.bodythread-pre-split: ; preds = %while.end, %while.e
br i1 undef, label %if.then.14, label %if.end.15
if.then.14: ; preds = %while.end, %while.bodythread-pre-split
- %v1 = load i32, i32* bitcast (i8** @dfg_text to i32*), align 4
+ %v1 = load i32, ptr @dfg_text, align 4
%sub.ptr.sub = sub i32 undef, %v1
br label %if.end.15
if.end.15: ; preds = %if.then.14, %while.bodythread-pre-split
- %v2 = load i8*, i8** @yy_c_buf_p, align 4
+ %v2 = load ptr, ptr @yy_c_buf_p, align 4
br label %while.cond.16
while.cond.16: ; preds = %while.cond.16, %if.end.15
br i1 undef, label %while.cond.16, label %while.end
while.end: ; preds = %while.cond.16
- %add.ptr = getelementptr inbounds i8, i8* %v2, i32 undef
- store i8* %add.ptr, i8** @dfg_text, align 4
- %sub.ptr.rhs.cast25 = ptrtoint i8* %add.ptr to i32
+ %add.ptr = getelementptr inbounds i8, ptr %v2, i32 undef
+ store ptr %add.ptr, ptr @dfg_text, align 4
+ %sub.ptr.rhs.cast25 = ptrtoint ptr %add.ptr to i32
%sub.ptr.sub26 = sub i32 0, %sub.ptr.rhs.cast25
switch i32 undef, label %sw.default [
i32 65, label %while.bodythread-pre-split
diff --git a/llvm/test/Transforms/GVN/pr28562.ll b/llvm/test/Transforms/GVN/pr28562.ll
index ac1ec4ea189f3..338200af621fa 100644
--- a/llvm/test/Transforms/GVN/pr28562.ll
+++ b/llvm/test/Transforms/GVN/pr28562.ll
@@ -1,9 +1,9 @@
; RUN: opt -S -passes=gvn < %s | FileCheck %s
-define i32* @test1(i32* %a) {
- %x1 = getelementptr inbounds i32, i32* %a, i32 10
- %x2 = getelementptr i32, i32* %a, i32 10
- ret i32* %x2
+define ptr @test1(ptr %a) {
+ %x1 = getelementptr inbounds i32, ptr %a, i32 10
+ %x2 = getelementptr i32, ptr %a, i32 10
+ ret ptr %x2
; CHECK-LABEL: @test1(
-; CHECK: %[[x:.*]] = getelementptr i32, i32* %a, i32 10
-; CHECK: ret i32* %[[x]]
+; CHECK: %[[x:.*]] = getelementptr i32, ptr %a, i32 10
+; CHECK: ret ptr %[[x]]
}
diff --git a/llvm/test/Transforms/GVN/pr28879.ll b/llvm/test/Transforms/GVN/pr28879.ll
index 79a3a241df50a..0c9231d39769c 100644
--- a/llvm/test/Transforms/GVN/pr28879.ll
+++ b/llvm/test/Transforms/GVN/pr28879.ll
@@ -3,11 +3,10 @@
define void @f() {
entry:
%a = alloca <7 x i1>, align 2
- store <7 x i1> undef, <7 x i1>* %a, align 2
-; CHECK: store <7 x i1> undef, <7 x i1>*
- %0 = getelementptr inbounds <7 x i1>, <7 x i1>* %a, i64 0, i64 0
- %val = load i1, i1* %0, align 2
-; CHECK: load i1, i1*
+ store <7 x i1> undef, ptr %a, align 2
+; CHECK: store <7 x i1> undef, ptr
+ %val = load i1, ptr %a, align 2
+; CHECK: load i1, ptr
br i1 %val, label %cond.true, label %cond.false
cond.true:
@@ -17,13 +16,12 @@ cond.false:
ret void
}
-define <7 x i1> @g(<7 x i1>* %a) {
+define <7 x i1> @g(ptr %a) {
entry:
- %vec = load <7 x i1>, <7 x i1>* %a
-; CHECK: load <7 x i1>, <7 x i1>*
- %0 = getelementptr inbounds <7 x i1>, <7 x i1>* %a, i64 0, i64 0
- %val = load i1, i1* %0, align 2
-; CHECK: load i1, i1*
+ %vec = load <7 x i1>, ptr %a
+; CHECK: load <7 x i1>, ptr
+ %val = load i1, ptr %a, align 2
+; CHECK: load i1, ptr
br i1 %val, label %cond.true, label %cond.false
cond.true:
diff --git a/llvm/test/Transforms/GVN/pr32314.ll b/llvm/test/Transforms/GVN/pr32314.ll
index 72e60ac5c0625..1191a90daa90a 100644
--- a/llvm/test/Transforms/GVN/pr32314.ll
+++ b/llvm/test/Transforms/GVN/pr32314.ll
@@ -14,16 +14,16 @@ define void @foo() {
; CHECK-NEXT: ret void
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 1, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
-; CHECK-NEXT: [[P_017:%.*]] = phi i32* [ undef, [[ENTRY]] ], [ [[ARRAYIDX3:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[P_017:%.*]] = phi ptr [ undef, [[ENTRY]] ], [ [[ARRAYIDX3:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[INDVARS_IV]], -1
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x i32], [3 x i32]* [[A]], i64 0, i64 [[TMP0]]
-; CHECK-NEXT: store i32 50, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x i32], ptr [[A]], i64 0, i64 [[TMP0]]
+; CHECK-NEXT: store i32 50, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[P_017]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[P_017]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP1]] to i32
; CHECK-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP2]], [[TMP3]]
-; CHECK-NEXT: [[ARRAYIDX3]] = getelementptr inbounds [3 x i32], [3 x i32]* [[A]], i64 0, i64 [[INDVARS_IV]]
-; CHECK-NEXT: store i32 60, i32* [[ARRAYIDX3]], align 4
+; CHECK-NEXT: [[ARRAYIDX3]] = getelementptr inbounds [3 x i32], ptr [[A]], i64 0, i64 [[INDVARS_IV]]
+; CHECK-NEXT: store i32 60, ptr [[ARRAYIDX3]], align 4
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 3
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
@@ -37,16 +37,16 @@ for.cond.cleanup: ; preds = %for.body
for.body: ; preds = %for.body, %entry
%indvars.iv = phi i64 [ 1, %entry ], [ %indvars.iv.next, %for.body ]
- %p.017 = phi i32* [ undef, %entry ], [ %arrayidx3, %for.body ]
+ %p.017 = phi ptr [ undef, %entry ], [ %arrayidx3, %for.body ]
%0 = add nsw i64 %indvars.iv, -1
- %arrayidx = getelementptr inbounds [3 x i32], [3 x i32]* %a, i64 0, i64 %0
- store i32 50, i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds [3 x i32], ptr %a, i64 0, i64 %0
+ store i32 50, ptr %arrayidx, align 4
%1 = shl i64 %indvars.iv, 1
- %2 = load i32, i32* %p.017, align 4
+ %2 = load i32, ptr %p.017, align 4
%3 = trunc i64 %1 to i32
%add1 = add nsw i32 %2, %3
- %arrayidx3 = getelementptr inbounds [3 x i32], [3 x i32]* %a, i64 0, i64 %indvars.iv
- store i32 60, i32* %arrayidx3, align 4
+ %arrayidx3 = getelementptr inbounds [3 x i32], ptr %a, i64 0, i64 %indvars.iv
+ store i32 60, ptr %arrayidx3, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp ne i64 %indvars.iv.next, 3
br i1 %exitcond, label %for.body, label %for.cond.cleanup
diff --git a/llvm/test/Transforms/GVN/pr33549.ll b/llvm/test/Transforms/GVN/pr33549.ll
index 4b398e53d55c2..e0d7712c6f5cc 100644
--- a/llvm/test/Transforms/GVN/pr33549.ll
+++ b/llvm/test/Transforms/GVN/pr33549.ll
@@ -20,14 +20,14 @@ define void @testshl() local_unnamed_addr #0 {
; CHECK: for.body3:
; CHECK-NEXT: [[I_030:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY3]] ], [ [[DIV]], [[FOR_BODY3_PREHEADER]] ]
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[I_030]], [[SHR]]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [32 x i32], [32 x i32]* @Data, i32 0, i32 [[ADD]]
-; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [32 x i32], [32 x i32]* @Data, i32 0, i32 [[I_030]]
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, [[TBAA3:!tbaa !.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4, [[TBAA3]]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [32 x i32], ptr @Data, i32 0, i32 [[ADD]]
+; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [32 x i32], ptr @Data, i32 0, i32 [[I_030]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, [[TBAA3:!tbaa !.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4, [[TBAA3]]
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP1]], [[TMP0]]
-; CHECK-NEXT: store i32 [[SUB]], i32* [[ARRAYIDX]], align 4, [[TBAA3]]
+; CHECK-NEXT: store i32 [[SUB]], ptr [[ARRAYIDX]], align 4, [[TBAA3]]
; CHECK-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP1]], [[TMP0]]
-; CHECK-NEXT: store i32 [[ADD7]], i32* [[ARRAYIDX4]], align 4, [[TBAA3]]
+; CHECK-NEXT: store i32 [[ADD7]], ptr [[ARRAYIDX4]], align 4, [[TBAA3]]
; CHECK-NEXT: [[INC]] = add nsw i32 [[I_030]], 1
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[I_030]], 15
; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_BODY3]], label [[FOR_INC8]]
@@ -55,15 +55,15 @@ for.body3.preheader: ; preds = %for.body
for.body3: ; preds = %for.body3.preheader, %for.body3
%i.030 = phi i32 [ %inc, %for.body3 ], [ %div, %for.body3.preheader ]
%add = add nsw i32 %i.030, %shr
- %arrayidx = getelementptr inbounds [32 x i32], [32 x i32]* @Data, i32 0, i32 %add
- %arrayidx4 = getelementptr inbounds [32 x i32], [32 x i32]* @Data, i32 0, i32 %i.030
- %0 = load i32, i32* %arrayidx, align 4, !tbaa !3
- %1 = load i32, i32* %arrayidx4, align 4, !tbaa !3
+ %arrayidx = getelementptr inbounds [32 x i32], ptr @Data, i32 0, i32 %add
+ %arrayidx4 = getelementptr inbounds [32 x i32], ptr @Data, i32 0, i32 %i.030
+ %0 = load i32, ptr %arrayidx, align 4, !tbaa !3
+ %1 = load i32, ptr %arrayidx4, align 4, !tbaa !3
%sub = sub nsw i32 %1, %0
- store i32 %sub, i32* %arrayidx, align 4, !tbaa !3
- %2 = load i32, i32* %arrayidx4, align 4, !tbaa !3
+ store i32 %sub, ptr %arrayidx, align 4, !tbaa !3
+ %2 = load i32, ptr %arrayidx4, align 4, !tbaa !3
%add7 = add nsw i32 %2, %0
- store i32 %add7, i32* %arrayidx4, align 4, !tbaa !3
+ store i32 %add7, ptr %arrayidx4, align 4, !tbaa !3
%inc = add nsw i32 %i.030, 1
%cmp2 = icmp slt i32 %i.030, 15
br i1 %cmp2, label %for.body3, label %for.inc8
diff --git a/llvm/test/Transforms/GVN/pr36063.ll b/llvm/test/Transforms/GVN/pr36063.ll
index 720dd76f17802..5ac4c3df4c69f 100644
--- a/llvm/test/Transforms/GVN/pr36063.ll
+++ b/llvm/test/Transforms/GVN/pr36063.ll
@@ -1,22 +1,20 @@
; RUN: opt < %s -passes=memcpyopt,mldst-motion,gvn -S | FileCheck %s
-define void @foo(i8* %ret, i1 %x) {
+define void @foo(ptr %ret, i1 %x) {
%a = alloca i8
br i1 %x, label %yes, label %no
yes: ; preds = %0
- %gepa = getelementptr i8, i8* %a, i64 0
- store i8 5, i8* %gepa
+ store i8 5, ptr %a
br label %out
no: ; preds = %0
- %gepb = getelementptr i8, i8* %a, i64 0
- store i8 5, i8* %gepb
+ store i8 5, ptr %a
br label %out
out: ; preds = %no, %yes
- %tmp = load i8, i8* %a
+ %tmp = load i8, ptr %a
; CHECK-NOT: undef
- store i8 %tmp, i8* %ret
+ store i8 %tmp, ptr %ret
ret void
}
diff --git a/llvm/test/Transforms/GVN/pr46054-md-nonlocaldefcache-cleanup.ll b/llvm/test/Transforms/GVN/pr46054-md-nonlocaldefcache-cleanup.ll
index 90b7b9a8d8dcb..6ed447a5f2f7b 100644
--- a/llvm/test/Transforms/GVN/pr46054-md-nonlocaldefcache-cleanup.ll
+++ b/llvm/test/Transforms/GVN/pr46054-md-nonlocaldefcache-cleanup.ll
@@ -6,11 +6,11 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-define void @test_double(double* %data) {
+define void @test_double(ptr %data) {
; CHECK-LABEL: @test_double(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LUC:%.*]] = tail call noalias nonnull i64* @data()
-; CHECK-NEXT: store i64 1, i64* [[LUC]], align 8, !invariant.group !0
+; CHECK-NEXT: [[LUC:%.*]] = tail call noalias nonnull ptr @data()
+; CHECK-NEXT: store i64 1, ptr [[LUC]], align 8, !invariant.group !0
; CHECK-NEXT: call void @fn(i64 1)
; CHECK-NEXT: br i1 true, label [[A:%.*]], label [[ENTRY_B_CRIT_EDGE:%.*]]
; CHECK: entry.B_crit_edge:
@@ -22,9 +22,9 @@ define void @test_double(double* %data) {
; CHECK-NEXT: ret void
;
entry:
- %luc = tail call noalias nonnull i64* @data()
- store i64 1, i64* %luc, !invariant.group !0
- %QQ = load i64, i64* %luc, !invariant.group !0
+ %luc = tail call noalias nonnull ptr @data()
+ store i64 1, ptr %luc, !invariant.group !0
+ %QQ = load i64, ptr %luc, !invariant.group !0
call void @fn(i64 %QQ)
br i1 true, label %A, label %B
@@ -32,50 +32,50 @@ A: ; preds = %loop
br label %B
B: ; preds = %A, %loop
- %QQ.1 = load i64, i64* %luc, !invariant.group !0
+ %QQ.1 = load i64, ptr %luc, !invariant.group !0
call void @fn(i64 %QQ.1)
ret void
}
declare void @fn(i64)
-declare noalias i64* @data()
+declare noalias ptr @data()
-define void @test_double_ptr(double** %data) {
+define void @test_double_ptr(ptr %data) {
; CHECK-LABEL: @test_double_ptr(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LUC:%.*]] = tail call noalias nonnull i64** @data.ptr()
-; CHECK-NEXT: store i64* null, i64** [[LUC]], align 8, !invariant.group !0
-; CHECK-NEXT: call void @fn.ptr(i64* null)
+; CHECK-NEXT: [[LUC:%.*]] = tail call noalias nonnull ptr @data.ptr()
+; CHECK-NEXT: store ptr null, ptr [[LUC]], align 8, !invariant.group !0
+; CHECK-NEXT: call void @fn.ptr(ptr null)
; CHECK-NEXT: br i1 true, label [[A:%.*]], label [[ENTRY_B_CRIT_EDGE:%.*]]
; CHECK: entry.B_crit_edge:
; CHECK-NEXT: br label [[B:%.*]]
; CHECK: A:
; CHECK-NEXT: br label [[B]]
; CHECK: B:
-; CHECK-NEXT: call void @fn.ptr(i64* null)
+; CHECK-NEXT: call void @fn.ptr(ptr null)
; CHECK-NEXT: ret void
;
entry:
- %luc = tail call noalias nonnull i64** @data.ptr()
- store i64* null, i64** %luc, !invariant.group !0
- %QQ = load i64*, i64** %luc, !invariant.group !0
- call void @fn.ptr(i64* %QQ)
+ %luc = tail call noalias nonnull ptr @data.ptr()
+ store ptr null, ptr %luc, !invariant.group !0
+ %QQ = load ptr, ptr %luc, !invariant.group !0
+ call void @fn.ptr(ptr %QQ)
br i1 true, label %A, label %B
A: ; preds = %loop
br label %B
B: ; preds = %A, %loop
- %QQ.1 = load i64*, i64** %luc, !invariant.group !0
- call void @fn.ptr(i64* %QQ.1)
+ %QQ.1 = load ptr, ptr %luc, !invariant.group !0
+ call void @fn.ptr(ptr %QQ.1)
ret void
}
-declare void @fn.ptr(i64 *)
+declare void @fn.ptr(ptr)
-declare noalias i64** @data.ptr()
+declare noalias ptr @data.ptr()
!0 = distinct !{}
diff --git a/llvm/test/Transforms/GVN/pr49193.ll b/llvm/test/Transforms/GVN/pr49193.ll
index 3e37dbd01e1fa..9ee9f26984690 100644
--- a/llvm/test/Transforms/GVN/pr49193.ll
+++ b/llvm/test/Transforms/GVN/pr49193.ll
@@ -4,7 +4,7 @@
@b = external local_unnamed_addr global i32, align 4
; Function Attrs: nounwind readnone
-declare i32* @j() local_unnamed_addr #0
+declare ptr @j() local_unnamed_addr #0
; CHECK: define {{.*}}@k()
@@ -16,19 +16,19 @@ bb10.preheader: ; preds = %bb
br label %bb13
bb3: ; preds = %bb
- %i4 = load i32, i32* @a, align 4
+ %i4 = load i32, ptr @a, align 4
%i5.not = icmp eq i32 %i4, 0
br label %bb7
bb7: ; preds = %bb3
- %i8 = tail call i32* @j()
+ %i8 = tail call ptr @j()
br label %bb37
bb13: ; preds = %bb34, %bb10.preheader
br i1 undef, label %bb30thread-pre-split, label %bb16
bb16: ; preds = %bb13
- %i17 = tail call i32* @j()
+ %i17 = tail call ptr @j()
br i1 undef, label %bb22thread-pre-split, label %bb37.loopexit
bb22thread-pre-split: ; preds = %bb16
@@ -38,7 +38,7 @@ bb27: ; preds = %bb22thread-pre-spli
br i1 undef, label %bb30thread-pre-split, label %bb37.loopexit
bb30thread-pre-split: ; preds = %bb27, %bb13
- %i31.pr = load i32, i32* @a, align 4
+ %i31.pr = load i32, ptr @a, align 4
%i32.not2 = icmp eq i32 %i31.pr, 0
br label %bb34
@@ -49,9 +49,9 @@ bb37.loopexit: ; preds = %bb34, %bb27, %bb16
br label %bb37
bb37: ; preds = %bb37.loopexit, %bb7
- %i38 = load i32, i32* @a, align 4
- store i32 %i38, i32* @b, align 4
- %i39 = tail call i32* @j()
+ %i38 = load i32, ptr @a, align 4
+ store i32 %i38, ptr @b, align 4
+ %i39 = tail call ptr @j()
unreachable
}
diff --git a/llvm/test/Transforms/GVN/pre-compare.ll b/llvm/test/Transforms/GVN/pre-compare.ll
index b8d7abf4da4e0..ea8fbce01bd6c 100644
--- a/llvm/test/Transforms/GVN/pre-compare.ll
+++ b/llvm/test/Transforms/GVN/pre-compare.ll
@@ -43,8 +43,8 @@ entry:
if.then: ; preds = %entry
%cmp1 = icmp eq i32 %x, 2
- %cond = select i1 %cmp1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str1, i64 0, i64 0)
- %call = tail call i32 @puts(i8* %cond) nounwind
+ %cond = select i1 %cmp1, ptr @.str, ptr @.str1
+ %call = tail call i32 @puts(ptr %cond) nounwind
br label %for.cond.preheader
for.cond.preheader: ; preds = %entry, %if.then
@@ -52,17 +52,17 @@ for.cond.preheader: ; preds = %entry, %if.then
br label %for.cond
for.cond: ; preds = %for.cond.backedge, %for.cond.preheader
- %call2 = tail call i32 @puts(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str2, i64 0, i64 0)) nounwind
+ %call2 = tail call i32 @puts(ptr @.str2) nounwind
br i1 %cmp3, label %for.cond.backedge, label %if.end5
if.end5: ; preds = %for.cond
- %call6 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str3, i64 0, i64 0), i32 %x) nounwind
+ %call6 = tail call i32 (ptr, ...) @printf(ptr @.str3, i32 %x) nounwind
br label %for.cond.backedge
for.cond.backedge: ; preds = %if.end5, %for.cond
br label %for.cond
}
-declare i32 @puts(i8* nocapture) nounwind
+declare i32 @puts(ptr nocapture) nounwind
-declare i32 @printf(i8* nocapture, ...) nounwind
+declare i32 @printf(ptr nocapture, ...) nounwind
diff --git a/llvm/test/Transforms/GVN/pre-new-inst.ll b/llvm/test/Transforms/GVN/pre-new-inst.ll
index 8c911aa9a1275..209a4f47cac4c 100644
--- a/llvm/test/Transforms/GVN/pre-new-inst.ll
+++ b/llvm/test/Transforms/GVN/pre-new-inst.ll
@@ -1,7 +1,7 @@
; RUN: opt -passes=gvn -S %s | FileCheck %s
%MyStruct = type { i32, i32 }
-define i8 @foo(i64 %in, i8* %arr) {
+define i8 @foo(i64 %in, ptr %arr) {
%addr = alloca %MyStruct
%dead = trunc i64 %in to i32
br i1 undef, label %next, label %tmp
@@ -11,17 +11,15 @@ tmp:
br label %next
next:
- %addr64 = bitcast %MyStruct* %addr to i64*
- store i64 %in, i64* %addr64
+ store i64 %in, ptr %addr
br label %final
final:
- %addr32 = getelementptr %MyStruct, %MyStruct* %addr, i32 0, i32 0
- %idx32 = load i32, i32* %addr32
+ %idx32 = load i32, ptr %addr
-; CHECK: %resptr = getelementptr i8, i8* %arr, i32 %dead
- %resptr = getelementptr i8, i8* %arr, i32 %idx32
- %res = load i8, i8* %resptr
+; CHECK: %resptr = getelementptr i8, ptr %arr, i32 %dead
+ %resptr = getelementptr i8, ptr %arr, i32 %idx32
+ %res = load i8, ptr %resptr
ret i8 %res
}
diff --git a/llvm/test/Transforms/GVN/pre-skip-convergent.ll b/llvm/test/Transforms/GVN/pre-skip-convergent.ll
index 8da3d073d12cb..6ccc818746048 100644
--- a/llvm/test/Transforms/GVN/pre-skip-convergent.ll
+++ b/llvm/test/Transforms/GVN/pre-skip-convergent.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -passes=gvn -o - %s | FileCheck %s
-define i32 @foo(i1 %cond, i32* %q, i32* %p) {
+define i32 @foo(i1 %cond, ptr %q, ptr %p) {
; CHECK-LABEL: @foo(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[V0:%.*]] = call i32 @llvm.convergent(i32 0)
-; CHECK-NEXT: store i32 [[V0]], i32* [[Q:%.*]], align 4
+; CHECK-NEXT: store i32 [[V0]], ptr [[Q:%.*]], align 4
; CHECK-NEXT: br i1 [[COND:%.*]], label [[PRE:%.*]], label [[MERGE:%.*]]
; CHECK: pre:
-; CHECK-NEXT: [[T0:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[T0:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[MERGE]]
; CHECK: merge:
; CHECK-NEXT: [[M0:%.*]] = phi i32 [ [[T0]], [[PRE]] ], [ 0, [[ENTRY:%.*]] ]
@@ -17,11 +17,11 @@ define i32 @foo(i1 %cond, i32* %q, i32* %p) {
;
entry:
%v0 = call i32 @llvm.convergent(i32 0)
- store i32 %v0, i32* %q
+ store i32 %v0, ptr %q
br i1 %cond, label %pre, label %merge
pre:
- %t0 = load i32, i32* %p
+ %t0 = load i32, ptr %p
br label %merge
merge:
diff --git a/llvm/test/Transforms/GVN/preserve-memoryssa.ll b/llvm/test/Transforms/GVN/preserve-memoryssa.ll
index 282dbc0a8b28a..57152964e7aad 100644
--- a/llvm/test/Transforms/GVN/preserve-memoryssa.ll
+++ b/llvm/test/Transforms/GVN/preserve-memoryssa.ll
@@ -5,16 +5,16 @@
declare void @use(i32) readnone
-define i32 @test(i32* %ptr.0, i32** %ptr.1, i1 %c) {
+define i32 @test(ptr %ptr.0, ptr %ptr.1, i1 %c) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LV_0:%.*]] = load i32, i32* [[PTR_0:%.*]], align 8
+; CHECK-NEXT: [[LV_0:%.*]] = load i32, ptr [[PTR_0:%.*]], align 8
; CHECK-NEXT: call void @use(i32 [[LV_0]])
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN749:%.*]], label [[FOR_INC774:%.*]]
; CHECK: if.then749:
-; CHECK-NEXT: [[LV_1:%.*]] = load i32*, i32** [[PTR_1:%.*]], align 8
-; CHECK-NEXT: store i32 10, i32* [[LV_1]], align 4
-; CHECK-NEXT: [[LV_2_PRE:%.*]] = load i32, i32* [[PTR_0]], align 8
+; CHECK-NEXT: [[LV_1:%.*]] = load ptr, ptr [[PTR_1:%.*]], align 8
+; CHECK-NEXT: store i32 10, ptr [[LV_1]], align 4
+; CHECK-NEXT: [[LV_2_PRE:%.*]] = load i32, ptr [[PTR_0]], align 8
; CHECK-NEXT: br label [[FOR_INC774]]
; CHECK: for.inc774:
; CHECK-NEXT: [[LV_2:%.*]] = phi i32 [ [[LV_2_PRE]], [[IF_THEN749]] ], [ [[LV_0]], [[ENTRY:%.*]] ]
@@ -25,7 +25,7 @@ entry:
br label %for.end435
for.end435:
- %lv.0 = load i32, i32* %ptr.0, align 8
+ %lv.0 = load i32, ptr %ptr.0, align 8
call void @use(i32 %lv.0)
br label %if.end724
@@ -33,16 +33,15 @@ if.end724:
br i1 %c, label %if.then749, label %for.inc774
if.then749:
- %lv.1 = load i32*, i32** %ptr.1, align 8
- %arrayidx772 = getelementptr inbounds i32, i32* %lv.1, i64 0
- store i32 10, i32* %arrayidx772, align 4
+ %lv.1 = load ptr, ptr %ptr.1, align 8
+ store i32 10, ptr %lv.1, align 4
br label %for.inc774
for.inc774:
br label %for.body830
for.body830:
- %lv.2 = load i32, i32* %ptr.0, align 8
+ %lv.2 = load i32, ptr %ptr.0, align 8
call void @use(i32 %lv.2)
br label %for.body.i22
@@ -50,18 +49,18 @@ for.body.i22:
ret i32 1
}
-define i32 @test_volatile(i32* %ptr.0, i32** %ptr.1, i1 %c) {
+define i32 @test_volatile(ptr %ptr.0, ptr %ptr.1, i1 %c) {
; CHECK-LABEL: @test_volatile(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LV_0:%.*]] = load volatile i32, i32* [[PTR_0:%.*]], align 8
+; CHECK-NEXT: [[LV_0:%.*]] = load volatile i32, ptr [[PTR_0:%.*]], align 8
; CHECK-NEXT: call void @use(i32 [[LV_0]])
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN749:%.*]], label [[FOR_INC774:%.*]]
; CHECK: if.then749:
-; CHECK-NEXT: [[LV_1:%.*]] = load volatile i32*, i32** [[PTR_1:%.*]], align 8
-; CHECK-NEXT: store i32 10, i32* [[LV_1]], align 4
+; CHECK-NEXT: [[LV_1:%.*]] = load volatile ptr, ptr [[PTR_1:%.*]], align 8
+; CHECK-NEXT: store i32 10, ptr [[LV_1]], align 4
; CHECK-NEXT: br label [[FOR_INC774]]
; CHECK: for.inc774:
-; CHECK-NEXT: [[LV_2:%.*]] = load volatile i32, i32* [[PTR_0]], align 8
+; CHECK-NEXT: [[LV_2:%.*]] = load volatile i32, ptr [[PTR_0]], align 8
; CHECK-NEXT: call void @use(i32 [[LV_2]])
; CHECK-NEXT: ret i32 1
;
@@ -69,7 +68,7 @@ entry:
br label %for.end435
for.end435:
- %lv.0 = load volatile i32, i32* %ptr.0, align 8
+ %lv.0 = load volatile i32, ptr %ptr.0, align 8
call void @use(i32 %lv.0)
br label %if.end724
@@ -77,16 +76,15 @@ if.end724:
br i1 %c, label %if.then749, label %for.inc774
if.then749:
- %lv.1 = load volatile i32*, i32** %ptr.1, align 8
- %arrayidx772 = getelementptr inbounds i32, i32* %lv.1, i64 0
- store i32 10, i32* %arrayidx772, align 4
+ %lv.1 = load volatile ptr, ptr %ptr.1, align 8
+ store i32 10, ptr %lv.1, align 4
br label %for.inc774
for.inc774:
br label %for.body830
for.body830:
- %lv.2 = load volatile i32, i32* %ptr.0, align 8
+ %lv.2 = load volatile i32, ptr %ptr.0, align 8
call void @use(i32 %lv.2)
br label %for.body.i22
@@ -94,14 +92,14 @@ for.body.i22:
ret i32 1
}
-define void @test_assume_false_to_store_undef_1(i32* %ptr) {
+define void @test_assume_false_to_store_undef_1(ptr %ptr) {
; CHECK-LABEL: @test_assume_false_to_store_undef_1(
-; CHECK-NEXT: store i32 10, i32* [[PTR:%.*]], align 4
-; CHECK-NEXT: store i8 poison, i8* null, align 1
+; CHECK-NEXT: store i32 10, ptr [[PTR:%.*]], align 4
+; CHECK-NEXT: store i8 poison, ptr null, align 1
; CHECK-NEXT: call void @f()
; CHECK-NEXT: ret void
;
- store i32 10, i32* %ptr
+ store i32 10, ptr %ptr
%tobool = icmp ne i16 1, 0
%xor = xor i1 %tobool, true
call void @llvm.assume(i1 %xor)
@@ -109,16 +107,16 @@ define void @test_assume_false_to_store_undef_1(i32* %ptr) {
ret void
}
-define i32 @test_assume_false_to_store_undef_2(i32* %ptr, i32* %ptr.2) {
+define i32 @test_assume_false_to_store_undef_2(ptr %ptr, ptr %ptr.2) {
; CHECK-LABEL: @test_assume_false_to_store_undef_2(
-; CHECK-NEXT: store i32 10, i32* [[PTR:%.*]], align 4
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR_2:%.*]], align 4
-; CHECK-NEXT: store i8 poison, i8* null, align 1
+; CHECK-NEXT: store i32 10, ptr [[PTR:%.*]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR_2:%.*]], align 4
+; CHECK-NEXT: store i8 poison, ptr null, align 1
; CHECK-NEXT: call void @f()
; CHECK-NEXT: ret i32 [[LV]]
;
- store i32 10, i32* %ptr
- %lv = load i32, i32* %ptr.2
+ store i32 10, ptr %ptr
+ %lv = load i32, ptr %ptr.2
%tobool = icmp ne i16 1, 0
%xor = xor i1 %tobool, true
call void @llvm.assume(i1 %xor)
@@ -126,15 +124,15 @@ define i32 @test_assume_false_to_store_undef_2(i32* %ptr, i32* %ptr.2) {
ret i32 %lv
}
-define i32 @test_assume_false_to_store_undef_3(i32* %ptr, i32* %ptr.2) {
+define i32 @test_assume_false_to_store_undef_3(ptr %ptr, ptr %ptr.2) {
; CHECK-LABEL: @test_assume_false_to_store_undef_3(
-; CHECK-NEXT: store i32 10, i32* [[PTR:%.*]], align 4
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR_2:%.*]], align 4
-; CHECK-NEXT: store i8 poison, i8* null, align 1
+; CHECK-NEXT: store i32 10, ptr [[PTR:%.*]], align 4
+; CHECK-NEXT: [[LV:%.*]] = load i32, ptr [[PTR_2:%.*]], align 4
+; CHECK-NEXT: store i8 poison, ptr null, align 1
; CHECK-NEXT: ret i32 [[LV]]
;
- store i32 10, i32* %ptr
- %lv = load i32, i32* %ptr.2
+ store i32 10, ptr %ptr
+ %lv = load i32, ptr %ptr.2
%tobool = icmp ne i16 1, 0
%xor = xor i1 %tobool, true
call void @llvm.assume(i1 %xor)
@@ -142,11 +140,11 @@ define i32 @test_assume_false_to_store_undef_3(i32* %ptr, i32* %ptr.2) {
}
; Test case for PR48616.
-define void @rename_unreachable_block(i1 %c) personality i32 (...)* undef {
+define void @rename_unreachable_block(i1 %c) personality ptr undef {
; CHECK-LABEL: @rename_unreachable_block(
; CHECK-NEXT: ret void
; CHECK: bb1:
-; CHECK-NEXT: [[LP:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT: [[LP:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: ret void
; CHECK: bb2:
@@ -158,7 +156,7 @@ define void @rename_unreachable_block(i1 %c) personality i32 (...)* undef {
ret void
bb1:
- %lp = landingpad { i8*, i32 }
+ %lp = landingpad { ptr, i32 }
cleanup
ret void
diff --git a/llvm/test/Transforms/GVN/propagate-ir-flags.ll b/llvm/test/Transforms/GVN/propagate-ir-flags.ll
index 865f2ebb174cf..6f4e662233df3 100644
--- a/llvm/test/Transforms/GVN/propagate-ir-flags.ll
+++ b/llvm/test/Transforms/GVN/propagate-ir-flags.ll
@@ -9,8 +9,8 @@ define double @func_fast(double %a, double %b) {
entry:
%a.addr = alloca double, align 8
%add = fadd fast double %b, 3.000000e+00
- store double %add, double* %a.addr, align 8
- %load_add = load double, double* %a.addr, align 8
+ store double %add, ptr %a.addr, align 8
+ %load_add = load double, ptr %a.addr, align 8
ret double %load_add
}
@@ -22,7 +22,7 @@ define double @func_no_fast(double %a, double %b) {
entry:
%a.addr = alloca double, align 8
%add = fadd fast double %b, 3.000000e+00
- store double %add, double* %a.addr, align 8
+ store double %add, ptr %a.addr, align 8
%duplicated_add = fadd double %b, 3.000000e+00
ret double %duplicated_add
}
diff --git a/llvm/test/Transforms/GVN/range.ll b/llvm/test/Transforms/GVN/range.ll
index a6ec9b3fc739f..8705d521ae05c 100644
--- a/llvm/test/Transforms/GVN/range.ll
+++ b/llvm/test/Transforms/GVN/range.ll
@@ -1,82 +1,82 @@
; RUN: opt -passes=gvn -S < %s | FileCheck %s
-define i32 @test1(i32* %p) {
-; CHECK-LABEL: @test1(i32* %p)
-; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE0:[0-9]+]]
+define i32 @test1(ptr %p) {
+; CHECK-LABEL: @test1(ptr %p)
+; CHECK: %a = load i32, ptr %p, align 4, !range ![[RANGE0:[0-9]+]]
; CHECK: %c = add i32 %a, %a
- %a = load i32, i32* %p, !range !0
- %b = load i32, i32* %p, !range !0
+ %a = load i32, ptr %p, !range !0
+ %b = load i32, ptr %p, !range !0
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test2(i32* %p) {
-; CHECK-LABEL: @test2(i32* %p)
-; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE0]]
+define i32 @test2(ptr %p) {
+; CHECK-LABEL: @test2(ptr %p)
+; CHECK: %a = load i32, ptr %p, align 4, !range ![[RANGE0]]
; CHECK: %c = add i32 %a, %a
- %a = load i32, i32* %p, !range !0
- %b = load i32, i32* %p
+ %a = load i32, ptr %p, !range !0
+ %b = load i32, ptr %p
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test3(i32* %p) {
-; CHECK-LABEL: @test3(i32* %p)
-; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE0]]
+define i32 @test3(ptr %p) {
+; CHECK-LABEL: @test3(ptr %p)
+; CHECK: %a = load i32, ptr %p, align 4, !range ![[RANGE0]]
; CHECK: %c = add i32 %a, %a
- %a = load i32, i32* %p, !range !0
- %b = load i32, i32* %p, !range !1
+ %a = load i32, ptr %p, !range !0
+ %b = load i32, ptr %p, !range !1
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test4(i32* %p) {
-; CHECK-LABEL: @test4(i32* %p)
-; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE0]]
+define i32 @test4(ptr %p) {
+; CHECK-LABEL: @test4(ptr %p)
+; CHECK: %a = load i32, ptr %p, align 4, !range ![[RANGE0]]
; CHECK: %c = add i32 %a, %a
- %a = load i32, i32* %p, !range !0
- %b = load i32, i32* %p, !range !2
+ %a = load i32, ptr %p, !range !0
+ %b = load i32, ptr %p, !range !2
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test5(i32* %p) {
-; CHECK-LABEL: @test5(i32* %p)
-; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE3:[0-9]+]]
+define i32 @test5(ptr %p) {
+; CHECK-LABEL: @test5(ptr %p)
+; CHECK: %a = load i32, ptr %p, align 4, !range ![[RANGE3:[0-9]+]]
; CHECK: %c = add i32 %a, %a
- %a = load i32, i32* %p, !range !3
- %b = load i32, i32* %p, !range !4
+ %a = load i32, ptr %p, !range !3
+ %b = load i32, ptr %p, !range !4
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test6(i32* %p) {
-; CHECK-LABEL: @test6(i32* %p)
-; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE5:[0-9]+]]
+define i32 @test6(ptr %p) {
+; CHECK-LABEL: @test6(ptr %p)
+; CHECK: %a = load i32, ptr %p, align 4, !range ![[RANGE5:[0-9]+]]
; CHECK: %c = add i32 %a, %a
- %a = load i32, i32* %p, !range !5
- %b = load i32, i32* %p, !range !6
+ %a = load i32, ptr %p, !range !5
+ %b = load i32, ptr %p, !range !6
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test7(i32* %p) {
-; CHECK-LABEL: @test7(i32* %p)
-; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE7:[0-9]+]]
+define i32 @test7(ptr %p) {
+; CHECK-LABEL: @test7(ptr %p)
+; CHECK: %a = load i32, ptr %p, align 4, !range ![[RANGE7:[0-9]+]]
; CHECK: %c = add i32 %a, %a
- %a = load i32, i32* %p, !range !7
- %b = load i32, i32* %p, !range !8
+ %a = load i32, ptr %p, !range !7
+ %b = load i32, ptr %p, !range !8
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test8(i32* %p) {
-; CHECK-LABEL: @test8(i32* %p)
-; CHECK: %a = load i32, i32* %p, align 4, !range ![[RANGE9:[0-9]+]]
+define i32 @test8(ptr %p) {
+; CHECK-LABEL: @test8(ptr %p)
+; CHECK: %a = load i32, ptr %p, align 4, !range ![[RANGE9:[0-9]+]]
; CHECK-NOT: range
; CHECK: %c = add i32 %a, %a
- %a = load i32, i32* %p, !range !9
- %b = load i32, i32* %p, !range !10
+ %a = load i32, ptr %p, !range !9
+ %b = load i32, ptr %p, !range !10
%c = add i32 %a, %b
ret i32 %c
}
diff --git a/llvm/test/Transforms/GVN/readattrs.ll b/llvm/test/Transforms/GVN/readattrs.ll
index 6a3f61e6f8824..b16c53adc0d4d 100644
--- a/llvm/test/Transforms/GVN/readattrs.ll
+++ b/llvm/test/Transforms/GVN/readattrs.ll
@@ -3,15 +3,15 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
-declare void @use(i8* readonly nocapture)
+declare void @use(ptr readonly nocapture)
define i8 @test() {
%a = alloca i8
- store i8 1, i8* %a
- call void @use(i8* %a)
- %b = load i8, i8* %a
+ store i8 1, ptr %a
+ call void @use(ptr %a)
+ %b = load i8, ptr %a
ret i8 %b
; CHECK-LABEL: define i8 @test(
-; CHECK: call void @use(i8* %a)
+; CHECK: call void @use(ptr %a)
; CHECK-NEXT: ret i8 1
}
diff --git a/llvm/test/Transforms/GVN/rle-must-alias.ll b/llvm/test/Transforms/GVN/rle-must-alias.ll
index b472df55aaa7e..7b99a45eeb831 100644
--- a/llvm/test/Transforms/GVN/rle-must-alias.ll
+++ b/llvm/test/Transforms/GVN/rle-must-alias.ll
@@ -7,8 +7,8 @@
; The %7 and %4 loads combine to make %DEAD unneeded.
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin7"
- at H = common global [100 x i32] zeroinitializer, align 32 ; <[100 x i32]*> [#uses=3]
- at G = common global i32 0 ; <i32*> [#uses=2]
+ at H = common global [100 x i32] zeroinitializer, align 32 ; <ptr> [#uses=3]
+ at G = common global i32 0 ; <ptr> [#uses=2]
define i32 @test(i32 %i) nounwind {
; CHECK-LABEL: @test(
@@ -18,20 +18,20 @@ define i32 @test(i32 %i) nounwind {
; CHECK-NEXT: br i1 [[TMP1]], label [[BB1:%.*]], label [[BB:%.*]]
; CHECK: bb:
; CHECK-NEXT: [[TMP2:%.*]] = tail call i32 (...) @bar() #[[ATTR0]]
-; CHECK-NEXT: [[TMP3:%.*]] = getelementptr [100 x i32], [100 x i32]* @H, i32 0, i32 [[I:%.*]]
-; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
-; CHECK-NEXT: store i32 [[TMP4]], i32* @G, align 4
+; CHECK-NEXT: [[TMP3:%.*]] = getelementptr [100 x i32], ptr @H, i32 0, i32 [[I:%.*]]
+; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
+; CHECK-NEXT: store i32 [[TMP4]], ptr @G, align 4
; CHECK-NEXT: br label [[BB3:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[TMP5:%.*]] = tail call i32 (...) @baz() #[[ATTR0]]
-; CHECK-NEXT: [[TMP6:%.*]] = getelementptr [100 x i32], [100 x i32]* @H, i32 0, i32 [[I]]
-; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
-; CHECK-NEXT: store i32 [[TMP7]], i32* @G, align 4
+; CHECK-NEXT: [[TMP6:%.*]] = getelementptr [100 x i32], ptr @H, i32 0, i32 [[I]]
+; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
+; CHECK-NEXT: store i32 [[TMP7]], ptr @G, align 4
; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
; CHECK-NEXT: br i1 [[TMP8]], label [[BB3]], label [[BB4:%.*]]
; CHECK: bb3:
; CHECK-NEXT: [[DEAD:%.*]] = phi i32 [ 0, [[BB1]] ], [ [[TMP4]], [[BB]] ]
-; CHECK-NEXT: [[TMP9:%.*]] = getelementptr [100 x i32], [100 x i32]* @H, i32 0, i32 [[I]]
+; CHECK-NEXT: [[TMP9:%.*]] = getelementptr [100 x i32], ptr @H, i32 0, i32 [[I]]
; CHECK-NEXT: ret i32 [[DEAD]]
; CHECK: bb4:
; CHECK-NEXT: ret i32 0
@@ -43,22 +43,22 @@ entry:
bb: ; preds = %entry
%2 = tail call i32 (...) @bar() nounwind ; <i32> [#uses=0]
- %3 = getelementptr [100 x i32], [100 x i32]* @H, i32 0, i32 %i ; <i32*> [#uses=1]
- %4 = load i32, i32* %3, align 4 ; <i32> [#uses=1]
- store i32 %4, i32* @G, align 4
+ %3 = getelementptr [100 x i32], ptr @H, i32 0, i32 %i ; <ptr> [#uses=1]
+ %4 = load i32, ptr %3, align 4 ; <i32> [#uses=1]
+ store i32 %4, ptr @G, align 4
br label %bb3
bb1: ; preds = %entry
%5 = tail call i32 (...) @baz() nounwind ; <i32> [#uses=0]
- %6 = getelementptr [100 x i32], [100 x i32]* @H, i32 0, i32 %i ; <i32*> [#uses=1]
- %7 = load i32, i32* %6, align 4 ; <i32> [#uses=2]
- store i32 %7, i32* @G, align 4
+ %6 = getelementptr [100 x i32], ptr @H, i32 0, i32 %i ; <ptr> [#uses=1]
+ %7 = load i32, ptr %6, align 4 ; <i32> [#uses=2]
+ store i32 %7, ptr @G, align 4
%8 = icmp eq i32 %7, 0 ; <i1> [#uses=1]
br i1 %8, label %bb3, label %bb4
bb3: ; preds = %bb1, %bb
- %9 = getelementptr [100 x i32], [100 x i32]* @H, i32 0, i32 %i ; <i32*> [#uses=1]
- %DEAD = load i32, i32* %9, align 4 ; <i32> [#uses=1]
+ %9 = getelementptr [100 x i32], ptr @H, i32 0, i32 %i ; <ptr> [#uses=1]
+ %DEAD = load i32, ptr %9, align 4 ; <i32> [#uses=1]
ret i32 %DEAD
bb4: ; preds = %bb1
diff --git a/llvm/test/Transforms/GVN/rle-no-phi-translate.ll b/llvm/test/Transforms/GVN/rle-no-phi-translate.ll
index 1766b51bc3bb1..88766650ef3dd 100644
--- a/llvm/test/Transforms/GVN/rle-no-phi-translate.ll
+++ b/llvm/test/Transforms/GVN/rle-no-phi-translate.ll
@@ -6,20 +6,20 @@
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin7"
-define i32 @g(i32* %b, i32* %c) nounwind {
+define i32 @g(ptr %b, ptr %c) nounwind {
entry:
- store i32 1, i32* %b
- store i32 2, i32* %c
+ store i32 1, ptr %b
+ store i32 2, ptr %c
- %t1 = icmp eq i32* %b, null ; <i1> [#uses=1]
+ %t1 = icmp eq ptr %b, null ; <i1> [#uses=1]
br i1 %t1, label %bb, label %bb2
bb: ; preds = %entry
br label %bb2
bb2: ; preds = %bb1, %bb
- %c_addr.0 = phi i32* [ %b, %entry ], [ %c, %bb ] ; <i32*> [#uses=1]
- %cv = load i32, i32* %c_addr.0, align 4 ; <i32> [#uses=1]
+ %c_addr.0 = phi ptr [ %b, %entry ], [ %c, %bb ] ; <ptr> [#uses=1]
+ %cv = load i32, ptr %c_addr.0, align 4 ; <i32> [#uses=1]
ret i32 %cv
; CHECK: bb2:
; CHECK-NOT: load i32
diff --git a/llvm/test/Transforms/GVN/rle-nonlocal.ll b/llvm/test/Transforms/GVN/rle-nonlocal.ll
index 7d8d0cceaff0e..06aa188171051 100644
--- a/llvm/test/Transforms/GVN/rle-nonlocal.ll
+++ b/llvm/test/Transforms/GVN/rle-nonlocal.ll
@@ -1,25 +1,25 @@
; RUN: opt < %s -passes=gvn -S | FileCheck %s
-define i32 @main(i32** %p, i32 %x, i32 %y) {
+define i32 @main(ptr %p, i32 %x, i32 %y) {
block1:
%cmp = icmp eq i32 %x, %y
br i1 %cmp , label %block2, label %block3
block2:
- %a = load i32*, i32** %p
+ %a = load ptr, ptr %p
br label %block4
block3:
- %b = load i32*, i32** %p
+ %b = load ptr, ptr %p
br label %block4
block4:
; CHECK-NOT: %existingPHI = phi
; CHECK: %DEAD = phi
- %existingPHI = phi i32* [ %a, %block2 ], [ %b, %block3 ]
- %DEAD = load i32*, i32** %p
- %c = load i32, i32* %DEAD
- %d = load i32, i32* %existingPHI
+ %existingPHI = phi ptr [ %a, %block2 ], [ %b, %block3 ]
+ %DEAD = load ptr, ptr %p
+ %c = load i32, ptr %DEAD
+ %d = load i32, ptr %existingPHI
%e = add i32 %c, %d
ret i32 %e
}
diff --git a/llvm/test/Transforms/GVN/simplify-icf-cache-invalidation.ll b/llvm/test/Transforms/GVN/simplify-icf-cache-invalidation.ll
index ebd9132258824..8332a987ab9e3 100644
--- a/llvm/test/Transforms/GVN/simplify-icf-cache-invalidation.ll
+++ b/llvm/test/Transforms/GVN/simplify-icf-cache-invalidation.ll
@@ -2,50 +2,45 @@
; CHECK: define {{.*}}@eggs
-%struct.zot = type { i32 (...)** }
-%struct.wombat = type { i8* }
-%struct.baz = type { i8, i8* }
+%struct.zot = type { ptr }
+%struct.wombat = type { ptr }
+%struct.baz = type { i8, ptr }
- at global = hidden unnamed_addr constant i8* bitcast (void (%struct.zot*, i1)* @quux to i8*)
+ at global = hidden unnamed_addr constant ptr @quux
-declare i8* @f()
+declare ptr @f()
-define hidden void @eggs(%struct.zot* %arg, i1 %arg2, i32* %arg3, i32 %arg4, %struct.baz** %arg5) unnamed_addr align 2 {
+define hidden void @eggs(ptr %arg, i1 %arg2, ptr %arg3, i32 %arg4, ptr %arg5) unnamed_addr align 2 {
bb:
%tmp = alloca %struct.wombat, align 8
- %tmp1 = getelementptr %struct.zot, %struct.zot* %arg, i64 0, i32 0
- store i32 (...)** bitcast (i8** @global to i32 (...)**), i32 (...)*** %tmp1, align 8, !invariant.group !0
+ store ptr @global, ptr %arg, align 8, !invariant.group !0
br i1 %arg2, label %bb4, label %bb2
bb2: ; preds = %bb
- %tmp3 = atomicrmw sub i32* %arg3, i32 %arg4 acq_rel, align 4
+ %tmp3 = atomicrmw sub ptr %arg3, i32 %arg4 acq_rel, align 4
br label %bb4
bb4: ; preds = %bb2, %bb
- %tmp5 = load %struct.baz*, %struct.baz** %arg5, align 8
- %tmp6 = getelementptr inbounds %struct.baz, %struct.baz* %tmp5, i64 0, i32 1
+ %tmp5 = load ptr, ptr %arg5, align 8
+ %tmp6 = getelementptr inbounds %struct.baz, ptr %tmp5, i64 0, i32 1
br i1 %arg2, label %bb9, label %bb7
bb7: ; preds = %bb4
- %tmp8 = tail call i8* @f()
+ %tmp8 = tail call ptr @f()
br label %bb9
bb9: ; preds = %bb7, %bb4
- %tmp10 = load %struct.baz*, %struct.baz** %arg5, align 8
- %tmp11 = getelementptr inbounds %struct.baz, %struct.baz* %tmp10, i64 0, i32 0
- %tmp12 = bitcast %struct.zot* %arg to void (%struct.zot*, i1)***
- %tmp13 = load void (%struct.zot*, i1)**, void (%struct.zot*, i1)*** %tmp12, align 8, !invariant.group !0
- %tmp14 = getelementptr inbounds void (%struct.zot*, i1)*, void (%struct.zot*, i1)** %tmp13, i64 0
- %tmp15 = load void (%struct.zot*, i1)*, void (%struct.zot*, i1)** %tmp14, align 8
- tail call void %tmp15(%struct.zot* %arg, i1 %arg2)
- %tmp16 = getelementptr inbounds %struct.wombat, %struct.wombat* %tmp, i64 0, i32 0
- %tmp17 = load i8*, i8** %tmp16, align 8
- %tmp18 = icmp eq i8* %tmp17, null
+ %tmp10 = load ptr, ptr %arg5, align 8
+ %tmp13 = load ptr, ptr %arg, align 8, !invariant.group !0
+ %tmp15 = load ptr, ptr %tmp13, align 8
+ tail call void %tmp15(ptr %arg, i1 %arg2)
+ %tmp17 = load ptr, ptr %tmp, align 8
+ %tmp18 = icmp eq ptr %tmp17, null
ret void
}
; Function Attrs: nounwind willreturn
-declare hidden void @quux(%struct.zot*, i1) unnamed_addr #0 align 2
+declare hidden void @quux(ptr, i1) unnamed_addr #0 align 2
attributes #0 = { nounwind willreturn }
diff --git a/llvm/test/Transforms/GVN/stale-loop-info.ll b/llvm/test/Transforms/GVN/stale-loop-info.ll
index 02c7039e39f24..1d858c306673f 100644
--- a/llvm/test/Transforms/GVN/stale-loop-info.ll
+++ b/llvm/test/Transforms/GVN/stale-loop-info.ll
@@ -11,15 +11,14 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
%struct.zot.882 = type { [64 x i8] }
; Function Attrs: argmemonly
-declare void @snork.1(i8*) local_unnamed_addr #0
+declare void @snork.1(ptr) local_unnamed_addr #0
-define hidden zeroext i1 @eggs(%struct.wibble.1028* %arg, i1 %arg2) unnamed_addr align 2 {
+define hidden zeroext i1 @eggs(ptr %arg, i1 %arg2) unnamed_addr align 2 {
bb:
br i1 %arg2, label %bb14, label %bb3
bb3: ; preds = %bb
- %tmp = getelementptr inbounds %struct.wibble.1028, %struct.wibble.1028* %arg, i64 0, i32 2, i32 0, i32 0, i64 0
- %tmp5 = bitcast i8* %tmp to %struct.wibble.1028**
+ %tmp = getelementptr inbounds %struct.wibble.1028, ptr %arg, i64 0, i32 2, i32 0, i32 0, i64 0
br label %bb6
bb6: ; preds = %bb12, %bb3
@@ -29,17 +28,16 @@ bb7: ; preds = %bb6
br i1 undef, label %bb11, label %bb8
bb8: ; preds = %bb7
- %tmp9 = load %struct.wibble.1028*, %struct.wibble.1028** %tmp5, align 8
-; CHECK: %tmp9 = load %struct.wibble.1028*, %struct.wibble.1028** %tmp5, align 8
- %tmp10 = bitcast %struct.wibble.1028* %tmp9 to i8*
+ %tmp9 = load ptr, ptr %tmp, align 8
+; CHECK: %tmp9 = load ptr, ptr %tmp, align 8
br label %bb12
bb11: ; preds = %bb7
br label %bb12
bb12: ; preds = %bb11, %bb8
- %tmp13 = phi i8* [ %tmp, %bb11 ], [ %tmp10, %bb8 ]
- call void @snork.1(i8* %tmp13) #1
+ %tmp13 = phi ptr [ %tmp, %bb11 ], [ %tmp9, %bb8 ]
+ call void @snork.1(ptr %tmp13) #1
br label %bb6
bb14: ; preds = %bb
diff --git a/llvm/test/Transforms/GVN/storeinvgroup.ll b/llvm/test/Transforms/GVN/storeinvgroup.ll
index 16ae47c8f4062..8ac0da391b7e3 100644
--- a/llvm/test/Transforms/GVN/storeinvgroup.ll
+++ b/llvm/test/Transforms/GVN/storeinvgroup.ll
@@ -1,19 +1,19 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=gvn -S -o - < %s | FileCheck %s
-define double @code(double* %a1) {
+define double @code(ptr %a1) {
; CHECK-LABEL: @code(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[META:%.*]] = alloca double*, align 8
-; CHECK-NEXT: store double 1.234500e+00, double* [[A1:%.*]], align 8
-; CHECK-NEXT: store double* [[A1]], double** [[META]], align 8, !invariant.group !0
+; CHECK-NEXT: [[META:%.*]] = alloca ptr, align 8
+; CHECK-NEXT: store double 1.234500e+00, ptr [[A1:%.*]], align 8
+; CHECK-NEXT: store ptr [[A1]], ptr [[META]], align 8, !invariant.group !0
; CHECK-NEXT: ret double 1.234500e+00
;
entry:
- %meta = alloca double*
- store double 1.23450000e+00, double* %a1, align 8
- store double* %a1, double** %meta, align 8, !invariant.group !0
- %iload = load double, double* %a1, align 8, !invariant.group !1
+ %meta = alloca ptr
+ store double 1.23450000e+00, ptr %a1, align 8
+ store ptr %a1, ptr %meta, align 8, !invariant.group !0
+ %iload = load double, ptr %a1, align 8, !invariant.group !1
ret double %iload
}
diff --git a/llvm/test/Transforms/GVN/tbaa.ll b/llvm/test/Transforms/GVN/tbaa.ll
index 8bb9c9646c63d..46d1bb737a693 100644
--- a/llvm/test/Transforms/GVN/tbaa.ll
+++ b/llvm/test/Transforms/GVN/tbaa.ll
@@ -1,119 +1,119 @@
; RUN: opt -passes=gvn -S < %s | FileCheck %s
-define i32 @test1(i8* %p, i8* %q) {
-; CHECK-LABEL: @test1(i8* %p, i8* %q)
-; CHECK: call i32 @foo(i8* %p)
+define i32 @test1(ptr %p, ptr %q) {
+; CHECK-LABEL: @test1(ptr %p, ptr %q)
+; CHECK: call i32 @foo(ptr %p)
; CHECK-NOT: tbaa
; CHECK: %c = add i32 %a, %a
- %a = call i32 @foo(i8* %p), !tbaa !0
- %b = call i32 @foo(i8* %p)
+ %a = call i32 @foo(ptr %p), !tbaa !0
+ %b = call i32 @foo(ptr %p)
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test2(i8* %p, i8* %q) {
-; CHECK-LABEL: @test2(i8* %p, i8* %q)
-; CHECK: call i32 @foo(i8* %p), !tbaa [[TAGC:!.*]]
+define i32 @test2(ptr %p, ptr %q) {
+; CHECK-LABEL: @test2(ptr %p, ptr %q)
+; CHECK: call i32 @foo(ptr %p), !tbaa [[TAGC:!.*]]
; CHECK: %c = add i32 %a, %a
- %a = call i32 @foo(i8* %p), !tbaa !0
- %b = call i32 @foo(i8* %p), !tbaa !0
+ %a = call i32 @foo(ptr %p), !tbaa !0
+ %b = call i32 @foo(ptr %p), !tbaa !0
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test3(i8* %p, i8* %q) {
-; CHECK-LABEL: @test3(i8* %p, i8* %q)
-; CHECK: call i32 @foo(i8* %p), !tbaa [[TAGB:!.*]]
+define i32 @test3(ptr %p, ptr %q) {
+; CHECK-LABEL: @test3(ptr %p, ptr %q)
+; CHECK: call i32 @foo(ptr %p), !tbaa [[TAGB:!.*]]
; CHECK: %c = add i32 %a, %a
- %a = call i32 @foo(i8* %p), !tbaa !3
- %b = call i32 @foo(i8* %p), !tbaa !3
+ %a = call i32 @foo(ptr %p), !tbaa !3
+ %b = call i32 @foo(ptr %p), !tbaa !3
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test4(i8* %p, i8* %q) {
-; CHECK-LABEL: @test4(i8* %p, i8* %q)
-; CHECK: call i32 @foo(i8* %p), !tbaa [[TAGA:!.*]]
+define i32 @test4(ptr %p, ptr %q) {
+; CHECK-LABEL: @test4(ptr %p, ptr %q)
+; CHECK: call i32 @foo(ptr %p), !tbaa [[TAGA:!.*]]
; CHECK: %c = add i32 %a, %a
- %a = call i32 @foo(i8* %p), !tbaa !1
- %b = call i32 @foo(i8* %p), !tbaa !0
+ %a = call i32 @foo(ptr %p), !tbaa !1
+ %b = call i32 @foo(ptr %p), !tbaa !0
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test5(i8* %p, i8* %q) {
-; CHECK-LABEL: @test5(i8* %p, i8* %q)
-; CHECK: call i32 @foo(i8* %p), !tbaa [[TAGA]]
+define i32 @test5(ptr %p, ptr %q) {
+; CHECK-LABEL: @test5(ptr %p, ptr %q)
+; CHECK: call i32 @foo(ptr %p), !tbaa [[TAGA]]
; CHECK: %c = add i32 %a, %a
- %a = call i32 @foo(i8* %p), !tbaa !0
- %b = call i32 @foo(i8* %p), !tbaa !1
+ %a = call i32 @foo(ptr %p), !tbaa !0
+ %b = call i32 @foo(ptr %p), !tbaa !1
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test6(i8* %p, i8* %q) {
-; CHECK-LABEL: @test6(i8* %p, i8* %q)
-; CHECK: call i32 @foo(i8* %p), !tbaa [[TAGA]]
+define i32 @test6(ptr %p, ptr %q) {
+; CHECK-LABEL: @test6(ptr %p, ptr %q)
+; CHECK: call i32 @foo(ptr %p), !tbaa [[TAGA]]
; CHECK: %c = add i32 %a, %a
- %a = call i32 @foo(i8* %p), !tbaa !0
- %b = call i32 @foo(i8* %p), !tbaa !3
+ %a = call i32 @foo(ptr %p), !tbaa !0
+ %b = call i32 @foo(ptr %p), !tbaa !3
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test7(i8* %p, i8* %q) {
-; CHECK-LABEL: @test7(i8* %p, i8* %q)
-; CHECK: call i32 @foo(i8* %p)
+define i32 @test7(ptr %p, ptr %q) {
+; CHECK-LABEL: @test7(ptr %p, ptr %q)
+; CHECK: call i32 @foo(ptr %p)
; CHECK-NOT: tbaa
; CHECK: %c = add i32 %a, %a
- %a = call i32 @foo(i8* %p), !tbaa !4
- %b = call i32 @foo(i8* %p), !tbaa !3
+ %a = call i32 @foo(ptr %p), !tbaa !4
+ %b = call i32 @foo(ptr %p), !tbaa !3
%c = add i32 %a, %b
ret i32 %c
}
-define i32 @test8(i32* %p, i32* %q) {
+define i32 @test8(ptr %p, ptr %q) {
; CHECK-LABEL: @test8
-; CHECK-NEXT: store i32 15, i32* %p
+; CHECK-NEXT: store i32 15, ptr %p
; CHECK-NEXT: ret i32 0
; Since we know the location is invariant, we can forward the
; load across the potentially aliasing store.
- %a = load i32, i32* %q, !tbaa !10
- store i32 15, i32* %p
- %b = load i32, i32* %q, !tbaa !10
+ %a = load i32, ptr %q, !tbaa !10
+ store i32 15, ptr %p
+ %b = load i32, ptr %q, !tbaa !10
%c = sub i32 %a, %b
ret i32 %c
}
-define i32 @test9(i32* %p, i32* %q) {
+define i32 @test9(ptr %p, ptr %q) {
; CHECK-LABEL: @test9
; CHECK-NEXT: call void @clobber()
; CHECK-NEXT: ret i32 0
; Since we know the location is invariant, we can forward the
; load across the potentially aliasing store (within the call).
- %a = load i32, i32* %q, !tbaa !10
+ %a = load i32, ptr %q, !tbaa !10
call void @clobber()
- %b = load i32, i32* %q, !tbaa !10
+ %b = load i32, ptr %q, !tbaa !10
%c = sub i32 %a, %b
ret i32 %c
}
-define i32 @test10(i8* %p, i8* %q) {
+define i32 @test10(ptr %p, ptr %q) {
; If one access encloses the other, then the merged access is the enclosed one
; and not just the common final access type.
; CHECK-LABEL: @test10
-; CHECK: call i32 @foo(i8* %p), !tbaa [[TAG_X_i:!.*]]
+; CHECK: call i32 @foo(ptr %p), !tbaa [[TAG_X_i:!.*]]
; CHECK: %c = add i32 %a, %a
- %a = call i32 @foo(i8* %p), !tbaa !15 ; TAG_X_i
- %b = call i32 @foo(i8* %p), !tbaa !19 ; TAG_Y_x_i
+ %a = call i32 @foo(ptr %p), !tbaa !15 ; TAG_X_i
+ %b = call i32 @foo(ptr %p), !tbaa !19 ; TAG_Y_x_i
%c = add i32 %a, %b
ret i32 %c
}
declare void @clobber()
-declare i32 @foo(i8*) readonly
+declare i32 @foo(ptr) readonly
; CHECK-DAG: [[TAGC]] = !{[[TYPEC:!.*]], [[TYPEC]], i64 0}
; CHECK-DAG: [[TYPEC]] = !{!"C", [[TYPEA:!.*]]}
diff --git a/llvm/test/Transforms/GVN/unreachable-predecessor.ll b/llvm/test/Transforms/GVN/unreachable-predecessor.ll
index d084d42fdaff8..532d55458d5d5 100644
--- a/llvm/test/Transforms/GVN/unreachable-predecessor.ll
+++ b/llvm/test/Transforms/GVN/unreachable-predecessor.ll
@@ -4,35 +4,35 @@
; store through %phi2 cannot alias %ptr1.
; CHECK-LABEL: @test1
-define void @test1(i32* %ptr1, i32* %ptr2) {
+define void @test1(ptr %ptr1, ptr %ptr2) {
; CHECK-LABEL: entry:
-; CHECK: %[[GEP:.*]] = getelementptr inbounds i32, i32* %ptr1, i64 1
-; CHECK: %[[VAL1:.*]] = load i32, i32* %[[GEP]]
+; CHECK: %[[GEP:.*]] = getelementptr inbounds i32, ptr %ptr1, i64 1
+; CHECK: %[[VAL1:.*]] = load i32, ptr %[[GEP]]
entry:
br label %loop.preheader
loop.preheader:
- %gep1 = getelementptr inbounds i32, i32* %ptr1, i64 1
+ %gep1 = getelementptr inbounds i32, ptr %ptr1, i64 1
br label %loop
; CHECK-LABEL: loop:
; CHECK-NOT: load
loop:
- %phi1 = phi i32* [ %gep1, %loop.preheader ], [ %phi2, %loop.then ]
- %val1 = load i32, i32* %phi1
+ %phi1 = phi ptr [ %gep1, %loop.preheader ], [ %phi2, %loop.then ]
+ %val1 = load i32, ptr %phi1
br i1 false, label %loop.then, label %loop.if
loop.if:
- %gep2 = getelementptr inbounds i32, i32* %gep1, i64 1
- %val2 = load i32, i32* %gep2
+ %gep2 = getelementptr inbounds i32, ptr %gep1, i64 1
+ %val2 = load i32, ptr %gep2
%cmp = icmp slt i32 %val1, %val2
br label %loop.then
; CHECK-LABEL: loop.then
-; CHECK: store i32 %[[VAL1]], i32* %phi2
+; CHECK: store i32 %[[VAL1]], ptr %phi2
loop.then:
- %phi2 = phi i32* [ %ptr2, %loop ], [ %gep2, %loop.if ]
- store i32 %val1, i32* %phi2
- store i32 0, i32* %ptr1
+ %phi2 = phi ptr [ %ptr2, %loop ], [ %gep2, %loop.if ]
+ store i32 %val1, ptr %phi2
+ store i32 0, ptr %ptr1
br label %loop
}
diff --git a/llvm/test/Transforms/GVN/volatile-nonvolatile.ll b/llvm/test/Transforms/GVN/volatile-nonvolatile.ll
index 854d25342e961..72c6a3056cde9 100644
--- a/llvm/test/Transforms/GVN/volatile-nonvolatile.ll
+++ b/llvm/test/Transforms/GVN/volatile-nonvolatile.ll
@@ -1,19 +1,18 @@
; RUN: opt -passes=gvn -S < %s | FileCheck %s
-%struct.t = type { i32* }
+%struct.t = type { ptr }
; The loaded address and the location of the address itself are not aliased,
; so the second reload is not necessary. Check that it can be eliminated.
; CHECK-LABEL: test1
; CHECK: load
; CHECK-NOT: load
-define void @test1(%struct.t* nocapture readonly %p, i32 %v) #0 {
+define void @test1(ptr nocapture readonly %p, i32 %v) #0 {
entry:
- %m = getelementptr inbounds %struct.t, %struct.t* %p, i32 0, i32 0
- %0 = load i32*, i32** %m, align 4, !tbaa !1
- store volatile i32 %v, i32* %0, align 4, !tbaa !6
- %1 = load i32*, i32** %m, align 4, !tbaa !1
- store volatile i32 %v, i32* %1, align 4, !tbaa !6
+ %0 = load ptr, ptr %p, align 4, !tbaa !1
+ store volatile i32 %v, ptr %0, align 4, !tbaa !6
+ %1 = load ptr, ptr %p, align 4, !tbaa !1
+ store volatile i32 %v, ptr %1, align 4, !tbaa !6
ret void
}
@@ -23,13 +22,12 @@ entry:
; CHECK: load
; CHECK: store
; CHECK: load
-define void @test2(%struct.t* nocapture readonly %p, i32 %v) #0 {
+define void @test2(ptr nocapture readonly %p, i32 %v) #0 {
entry:
- %m = getelementptr inbounds %struct.t, %struct.t* %p, i32 0, i32 0
- %0 = load i32*, i32** %m, align 4, !tbaa !1
- store volatile i32 %v, i32* %0, align 4, !tbaa !1
- %1 = load i32*, i32** %m, align 4, !tbaa !1
- store volatile i32 %v, i32* %1, align 4, !tbaa !1
+ %0 = load ptr, ptr %p, align 4, !tbaa !1
+ store volatile i32 %v, ptr %0, align 4, !tbaa !1
+ %1 = load ptr, ptr %p, align 4, !tbaa !1
+ store volatile i32 %v, ptr %1, align 4, !tbaa !1
ret void
}
@@ -39,13 +37,12 @@ entry:
; CHECK: load
; CHECK: store
; CHECK: load
-define void @test3(%struct.t* nocapture readonly %p, i32 %v) #0 {
+define void @test3(ptr nocapture readonly %p, i32 %v) #0 {
entry:
- %m = getelementptr inbounds %struct.t, %struct.t* %p, i32 0, i32 0
- %0 = load atomic i32*, i32** %m acquire, align 4, !tbaa !1
- store volatile i32 %v, i32* %0, align 4, !tbaa !6
- %1 = load atomic i32*, i32** %m acquire, align 4, !tbaa !1
- store volatile i32 %v, i32* %1, align 4, !tbaa !6
+ %0 = load atomic ptr, ptr %p acquire, align 4, !tbaa !1
+ store volatile i32 %v, ptr %0, align 4, !tbaa !6
+ %1 = load atomic ptr, ptr %p acquire, align 4, !tbaa !1
+ store volatile i32 %v, ptr %1, align 4, !tbaa !6
ret void
}
diff --git a/llvm/test/Transforms/GVN/vscale.ll b/llvm/test/Transforms/GVN/vscale.ll
index 76b711a7ced4f..71adaed8e5722 100644
--- a/llvm/test/Transforms/GVN/vscale.ll
+++ b/llvm/test/Transforms/GVN/vscale.ll
@@ -3,258 +3,247 @@
; Analyze Load from clobbering Load.
-define <vscale x 4 x i32> @load_store_clobber_load(<vscale x 4 x i32> *%p) {
+define <vscale x 4 x i32> @load_store_clobber_load(ptr %p) {
; CHECK-LABEL: @load_store_clobber_load(
-; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], align 16
-; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* undef, align 16
+; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, ptr [[P:%.*]], align 16
+; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, ptr undef, align 16
; CHECK-NEXT: [[ADD:%.*]] = add <vscale x 4 x i32> [[LOAD1]], [[LOAD1]]
; CHECK-NEXT: ret <vscale x 4 x i32> [[ADD]]
;
- %load1 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
- store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* undef
- %load2 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p ; <- load to be eliminated
+ %load1 = load <vscale x 4 x i32>, ptr %p
+ store <vscale x 4 x i32> zeroinitializer, ptr undef
+ %load2 = load <vscale x 4 x i32>, ptr %p ; <- load to be eliminated
%add = add <vscale x 4 x i32> %load1, %load2
ret <vscale x 4 x i32> %add
}
-define <vscale x 4 x i32> @load_store_clobber_load_mayalias(<vscale x 4 x i32>* %p, <vscale x 4 x i32>* %p2) {
+define <vscale x 4 x i32> @load_store_clobber_load_mayalias(ptr %p, ptr %p2) {
; CHECK-LABEL: @load_store_clobber_load_mayalias(
-; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], align 16
-; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* [[P2:%.*]], align 16
-; CHECK-NEXT: [[LOAD2:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], align 16
+; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, ptr [[P:%.*]], align 16
+; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, ptr [[P2:%.*]], align 16
+; CHECK-NEXT: [[LOAD2:%.*]] = load <vscale x 4 x i32>, ptr [[P]], align 16
; CHECK-NEXT: [[SUB:%.*]] = sub <vscale x 4 x i32> [[LOAD1]], [[LOAD2]]
; CHECK-NEXT: ret <vscale x 4 x i32> [[SUB]]
;
- %load1 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
- store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* %p2
- %load2 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
+ %load1 = load <vscale x 4 x i32>, ptr %p
+ store <vscale x 4 x i32> zeroinitializer, ptr %p2
+ %load2 = load <vscale x 4 x i32>, ptr %p
%sub = sub <vscale x 4 x i32> %load1, %load2
ret <vscale x 4 x i32> %sub
}
-define <vscale x 4 x i32> @load_store_clobber_load_noalias(<vscale x 4 x i32>* noalias %p, <vscale x 4 x i32>* noalias %p2) {
+define <vscale x 4 x i32> @load_store_clobber_load_noalias(ptr noalias %p, ptr noalias %p2) {
; CHECK-LABEL: @load_store_clobber_load_noalias(
-; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], align 16
-; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* [[P2:%.*]], align 16
+; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, ptr [[P:%.*]], align 16
+; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, ptr [[P2:%.*]], align 16
; CHECK-NEXT: [[ADD:%.*]] = add <vscale x 4 x i32> [[LOAD1]], [[LOAD1]]
; CHECK-NEXT: ret <vscale x 4 x i32> [[ADD]]
;
- %load1 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
- store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* %p2
- %load2 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p ; <- load to be eliminated
+ %load1 = load <vscale x 4 x i32>, ptr %p
+ store <vscale x 4 x i32> zeroinitializer, ptr %p2
+ %load2 = load <vscale x 4 x i32>, ptr %p ; <- load to be eliminated
%add = add <vscale x 4 x i32> %load1, %load2
ret <vscale x 4 x i32> %add
}
; BasicAA return MayAlias for %gep1,%gep2, could improve as MustAlias.
-define i32 @load_clobber_load_gep1(<vscale x 4 x i32>* %p) {
+define i32 @load_clobber_load_gep1(ptr %p) {
; CHECK-LABEL: @load_clobber_load_gep1(
-; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], i64 0, i64 1
-; CHECK-NEXT: [[LOAD1:%.*]] = load i32, i32* [[GEP1]], align 4
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[P:%.*]], i64 0, i64 1
+; CHECK-NEXT: [[LOAD1:%.*]] = load i32, ptr [[GEP1]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LOAD1]], [[LOAD1]]
; CHECK-NEXT: ret i32 [[ADD]]
;
- %gep1 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 0, i64 1
- %load1 = load i32, i32* %gep1
- %p2 = bitcast <vscale x 4 x i32>* %p to i32*
- %gep2 = getelementptr i32, i32* %p2, i64 1
- %load2 = load i32, i32* %gep2 ; <- load could be eliminated
+ %gep1 = getelementptr <vscale x 4 x i32>, ptr %p, i64 0, i64 1
+ %load1 = load i32, ptr %gep1
+ %gep2 = getelementptr i32, ptr %p, i64 1
+ %load2 = load i32, ptr %gep2 ; <- load could be eliminated
%add = add i32 %load1, %load2
ret i32 %add
}
-define i32 @load_clobber_load_gep2(<vscale x 4 x i32>* %p) {
+define i32 @load_clobber_load_gep2(ptr %p) {
; CHECK-LABEL: @load_clobber_load_gep2(
-; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], i64 1, i64 0
-; CHECK-NEXT: [[LOAD1:%.*]] = load i32, i32* [[GEP1]], align 4
-; CHECK-NEXT: [[P2:%.*]] = bitcast <vscale x 4 x i32>* [[P]] to i32*
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i32, i32* [[P2]], i64 4
-; CHECK-NEXT: [[LOAD2:%.*]] = load i32, i32* [[GEP2]], align 4
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[P:%.*]], i64 1, i64 0
+; CHECK-NEXT: [[LOAD1:%.*]] = load i32, ptr [[GEP1]], align 4
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i32, ptr [[P]], i64 4
+; CHECK-NEXT: [[LOAD2:%.*]] = load i32, ptr [[GEP2]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LOAD1]], [[LOAD2]]
; CHECK-NEXT: ret i32 [[ADD]]
;
- %gep1 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 1, i64 0
- %load1 = load i32, i32* %gep1
- %p2 = bitcast <vscale x 4 x i32>* %p to i32*
- %gep2 = getelementptr i32, i32* %p2, i64 4
- %load2 = load i32, i32* %gep2 ; <- can not determine at compile-time if %load1 and %load2 are same addr
+ %gep1 = getelementptr <vscale x 4 x i32>, ptr %p, i64 1, i64 0
+ %load1 = load i32, ptr %gep1
+ %gep2 = getelementptr i32, ptr %p, i64 4
+ %load2 = load i32, ptr %gep2 ; <- can not determine at compile-time if %load1 and %load2 are same addr
%add = add i32 %load1, %load2
ret i32 %add
}
; TODO: BasicAA return MayAlias for %gep1,%gep2, could improve as MustAlias.
-define i32 @load_clobber_load_gep3(<vscale x 4 x i32>* %p) {
+define i32 @load_clobber_load_gep3(ptr %p) {
; CHECK-LABEL: @load_clobber_load_gep3(
-; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], i64 1, i64 0
-; CHECK-NEXT: [[LOAD1:%.*]] = load i32, i32* [[GEP1]], align 4
-; CHECK-NEXT: [[P2:%.*]] = bitcast <vscale x 4 x i32>* [[P]] to <vscale x 4 x float>*
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr <vscale x 4 x float>, <vscale x 4 x float>* [[P2]], i64 1, i64 0
-; CHECK-NEXT: [[LOAD2:%.*]] = load float, float* [[GEP2]], align 4
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[P:%.*]], i64 1, i64 0
+; CHECK-NEXT: [[LOAD1:%.*]] = load i32, ptr [[GEP1]], align 4
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr <vscale x 4 x float>, ptr [[P]], i64 1, i64 0
+; CHECK-NEXT: [[LOAD2:%.*]] = load float, ptr [[GEP2]], align 4
; CHECK-NEXT: [[CAST:%.*]] = bitcast float [[LOAD2]] to i32
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LOAD1]], [[CAST]]
; CHECK-NEXT: ret i32 [[ADD]]
;
- %gep1 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 1, i64 0
- %load1 = load i32, i32* %gep1
- %p2 = bitcast <vscale x 4 x i32>* %p to <vscale x 4 x float>*
- %gep2 = getelementptr <vscale x 4 x float>, <vscale x 4 x float>* %p2, i64 1, i64 0
- %load2 = load float, float* %gep2 ; <- load could be eliminated
+ %gep1 = getelementptr <vscale x 4 x i32>, ptr %p, i64 1, i64 0
+ %load1 = load i32, ptr %gep1
+ %gep2 = getelementptr <vscale x 4 x float>, ptr %p, i64 1, i64 0
+ %load2 = load float, ptr %gep2 ; <- load could be eliminated
%cast = bitcast float %load2 to i32
%add = add i32 %load1, %cast
ret i32 %add
}
-define <vscale x 4 x i32> @load_clobber_load_fence(<vscale x 4 x i32>* %p) {
+define <vscale x 4 x i32> @load_clobber_load_fence(ptr %p) {
; CHECK-LABEL: @load_clobber_load_fence(
-; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], align 16
+; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, ptr [[P:%.*]], align 16
; CHECK-NEXT: call void asm "", "~{memory}"()
-; CHECK-NEXT: [[LOAD2:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], align 16
+; CHECK-NEXT: [[LOAD2:%.*]] = load <vscale x 4 x i32>, ptr [[P]], align 16
; CHECK-NEXT: [[SUB:%.*]] = sub <vscale x 4 x i32> [[LOAD1]], [[LOAD2]]
; CHECK-NEXT: ret <vscale x 4 x i32> [[SUB]]
;
- %load1 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
+ %load1 = load <vscale x 4 x i32>, ptr %p
call void asm "", "~{memory}"()
- %load2 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
+ %load2 = load <vscale x 4 x i32>, ptr %p
%sub = sub <vscale x 4 x i32> %load1, %load2
ret <vscale x 4 x i32> %sub
}
-define <vscale x 4 x i32> @load_clobber_load_sideeffect(<vscale x 4 x i32>* %p) {
+define <vscale x 4 x i32> @load_clobber_load_sideeffect(ptr %p) {
; CHECK-LABEL: @load_clobber_load_sideeffect(
-; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], align 16
+; CHECK-NEXT: [[LOAD1:%.*]] = load <vscale x 4 x i32>, ptr [[P:%.*]], align 16
; CHECK-NEXT: call void asm sideeffect "", ""()
-; CHECK-NEXT: [[LOAD2:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], align 16
+; CHECK-NEXT: [[LOAD2:%.*]] = load <vscale x 4 x i32>, ptr [[P]], align 16
; CHECK-NEXT: [[ADD:%.*]] = add <vscale x 4 x i32> [[LOAD1]], [[LOAD2]]
; CHECK-NEXT: ret <vscale x 4 x i32> [[ADD]]
;
- %load1 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
+ %load1 = load <vscale x 4 x i32>, ptr %p
call void asm sideeffect "", ""()
- %load2 = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
+ %load2 = load <vscale x 4 x i32>, ptr %p
%add = add <vscale x 4 x i32> %load1, %load2
ret <vscale x 4 x i32> %add
}
; Analyze Load from clobbering Store.
-define <vscale x 4 x i32> @store_forward_to_load(<vscale x 4 x i32>* %p) {
+define <vscale x 4 x i32> @store_forward_to_load(ptr %p) {
; CHECK-LABEL: @store_forward_to_load(
-; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* [[P:%.*]], align 16
+; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, ptr [[P:%.*]], align 16
; CHECK-NEXT: ret <vscale x 4 x i32> zeroinitializer
;
- store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* %p
- %load = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
+ store <vscale x 4 x i32> zeroinitializer, ptr %p
+ %load = load <vscale x 4 x i32>, ptr %p
ret <vscale x 4 x i32> %load
}
-define <vscale x 4 x i32> @store_forward_to_load_sideeffect(<vscale x 4 x i32>* %p) {
+define <vscale x 4 x i32> @store_forward_to_load_sideeffect(ptr %p) {
; CHECK-LABEL: @store_forward_to_load_sideeffect(
-; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* [[P:%.*]], align 16
+; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, ptr [[P:%.*]], align 16
; CHECK-NEXT: call void asm sideeffect "", ""()
-; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], align 16
+; CHECK-NEXT: [[LOAD:%.*]] = load <vscale x 4 x i32>, ptr [[P]], align 16
; CHECK-NEXT: ret <vscale x 4 x i32> [[LOAD]]
;
- store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* %p
+ store <vscale x 4 x i32> zeroinitializer, ptr %p
call void asm sideeffect "", ""()
- %load = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p
+ %load = load <vscale x 4 x i32>, ptr %p
ret <vscale x 4 x i32> %load
}
define i32 @store_clobber_load() {
; CHECK-LABEL: @store_clobber_load(
; CHECK-NEXT: [[ALLOC:%.*]] = alloca <vscale x 4 x i32>, align 16
-; CHECK-NEXT: store <vscale x 4 x i32> undef, <vscale x 4 x i32>* [[ALLOC]], align 16
-; CHECK-NEXT: [[PTR:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[ALLOC]], i32 0, i32 1
-; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: store <vscale x 4 x i32> undef, ptr [[ALLOC]], align 16
+; CHECK-NEXT: [[PTR:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[ALLOC]], i32 0, i32 1
+; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[PTR]], align 4
; CHECK-NEXT: ret i32 [[LOAD]]
;
%alloc = alloca <vscale x 4 x i32>
- store <vscale x 4 x i32> undef, <vscale x 4 x i32>* %alloc
- %ptr = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %alloc, i32 0, i32 1
- %load = load i32, i32* %ptr
+ store <vscale x 4 x i32> undef, ptr %alloc
+ %ptr = getelementptr <vscale x 4 x i32>, ptr %alloc, i32 0, i32 1
+ %load = load i32, ptr %ptr
ret i32 %load
}
; Analyze Load from clobbering MemInst.
-declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1)
+declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1)
-define i32 @memset_clobber_load(<vscale x 4 x i32> *%p) {
+define i32 @memset_clobber_load(ptr %p) {
; CHECK-LABEL: @memset_clobber_load(
-; CHECK-NEXT: [[CONV:%.*]] = bitcast <vscale x 4 x i32>* [[P:%.*]] to i8*
-; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* [[CONV]], i8 1, i64 200, i1 false)
+; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr [[P:%.*]], i8 1, i64 200, i1 false)
; CHECK-NEXT: ret i32 16843009
;
- %conv = bitcast <vscale x 4 x i32>* %p to i8*
- tail call void @llvm.memset.p0i8.i64(i8* %conv, i8 1, i64 200, i1 false)
- %gep = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 0, i64 5
- %load = load i32, i32* %gep
+ tail call void @llvm.memset.p0.i64(ptr %p, i8 1, i64 200, i1 false)
+ %gep = getelementptr <vscale x 4 x i32>, ptr %p, i64 0, i64 5
+ %load = load i32, ptr %gep
ret i32 %load
}
-define i32 @memset_clobber_load_vscaled_base(<vscale x 4 x i32> *%p) {
+define i32 @memset_clobber_load_vscaled_base(ptr %p) {
; CHECK-LABEL: @memset_clobber_load_vscaled_base(
-; CHECK-NEXT: [[CONV:%.*]] = bitcast <vscale x 4 x i32>* [[P:%.*]] to i8*
-; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* [[CONV]], i8 1, i64 200, i1 false)
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], i64 1, i64 1
-; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[GEP]], align 4
+; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr [[P:%.*]], i8 1, i64 200, i1 false)
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[P]], i64 1, i64 1
+; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[GEP]], align 4
; CHECK-NEXT: ret i32 [[LOAD]]
;
- %conv = bitcast <vscale x 4 x i32>* %p to i8*
- tail call void @llvm.memset.p0i8.i64(i8* %conv, i8 1, i64 200, i1 false)
- %gep = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 1, i64 1
- %load = load i32, i32* %gep
+ tail call void @llvm.memset.p0.i64(ptr %p, i8 1, i64 200, i1 false)
+ %gep = getelementptr <vscale x 4 x i32>, ptr %p, i64 1, i64 1
+ %load = load i32, ptr %gep
ret i32 %load
}
-define i32 @memset_clobber_load_nonconst_index(<vscale x 4 x i32> *%p, i64 %idx1, i64 %idx2) {
+define i32 @memset_clobber_load_nonconst_index(ptr %p, i64 %idx1, i64 %idx2) {
; CHECK-LABEL: @memset_clobber_load_nonconst_index(
-; CHECK-NEXT: [[CONV:%.*]] = bitcast <vscale x 4 x i32>* [[P:%.*]] to i8*
-; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* [[CONV]], i8 1, i64 200, i1 false)
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], i64 [[IDX1:%.*]], i64 [[IDX2:%.*]]
-; CHECK-NEXT: [[LOAD:%.*]] = load i32, i32* [[GEP]], align 4
+; CHECK-NEXT: tail call void @llvm.memset.p0.i64(ptr [[P:%.*]], i8 1, i64 200, i1 false)
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[P]], i64 [[IDX1:%.*]], i64 [[IDX2:%.*]]
+; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[GEP]], align 4
; CHECK-NEXT: ret i32 [[LOAD]]
;
- %conv = bitcast <vscale x 4 x i32>* %p to i8*
- tail call void @llvm.memset.p0i8.i64(i8* %conv, i8 1, i64 200, i1 false)
- %gep = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 %idx1, i64 %idx2
- %load = load i32, i32* %gep
+ tail call void @llvm.memset.p0.i64(ptr %p, i8 1, i64 200, i1 false)
+ %gep = getelementptr <vscale x 4 x i32>, ptr %p, i64 %idx1, i64 %idx2
+ %load = load i32, ptr %gep
ret i32 %load
}
; Load elimination across BBs
-define <vscale x 4 x i32>* @load_from_alloc_replaced_with_undef() {
+define ptr @load_from_alloc_replaced_with_undef() {
; CHECK-LABEL: @load_from_alloc_replaced_with_undef(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A:%.*]] = alloca <vscale x 4 x i32>, align 16
; CHECK-NEXT: br i1 undef, label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* [[A]], align 16
+; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, ptr [[A]], align 16
; CHECK-NEXT: br label [[IF_END]]
; CHECK: if.end:
-; CHECK-NEXT: ret <vscale x 4 x i32>* [[A]]
+; CHECK-NEXT: ret ptr [[A]]
;
entry:
%a = alloca <vscale x 4 x i32>
- %gep = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %a, i64 0, i64 1
- %load = load i32, i32* %gep ; <- load to be eliminated
+ %gep = getelementptr <vscale x 4 x i32>, ptr %a, i64 0, i64 1
+ %load = load i32, ptr %gep ; <- load to be eliminated
%tobool = icmp eq i32 %load, 0 ; <- icmp to be eliminated
br i1 %tobool, label %if.end, label %if.then
if.then:
- store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* %a
+ store <vscale x 4 x i32> zeroinitializer, ptr %a
br label %if.end
if.end:
- ret <vscale x 4 x i32>* %a
+ ret ptr %a
}
-define i32 @redundant_load_elimination_1(<vscale x 4 x i32>* %p) {
+define i32 @redundant_load_elimination_1(ptr %p) {
; CHECK-LABEL: @redundant_load_elimination_1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], i64 1, i64 1
-; CHECK-NEXT: [[LOAD1:%.*]] = load i32, i32* [[GEP]], align 4
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[P:%.*]], i64 1, i64 1
+; CHECK-NEXT: [[LOAD1:%.*]] = load i32, ptr [[GEP]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[LOAD1]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then:
@@ -263,13 +252,13 @@ define i32 @redundant_load_elimination_1(<vscale x 4 x i32>* %p) {
; CHECK-NEXT: ret i32 [[LOAD1]]
;
entry:
- %gep = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 1, i64 1
- %load1 = load i32, i32* %gep
+ %gep = getelementptr <vscale x 4 x i32>, ptr %p, i64 1, i64 1
+ %load1 = load i32, ptr %gep
%cmp = icmp eq i32 %load1, 0
br i1 %cmp, label %if.then, label %if.end
if.then:
- %load2 = load i32, i32* %gep ; <- load to be eliminated
+ %load2 = load i32, ptr %gep ; <- load to be eliminated
%add = add i32 %load1, %load2
br label %if.end
@@ -279,122 +268,120 @@ if.end:
}
; TODO: BasicAA return MayAlias for %gep1,%gep2, could improve as NoAlias.
-define void @redundant_load_elimination_2(i1 %c, <vscale x 4 x i32>* %p, i32* %q) {
+define void @redundant_load_elimination_2(i1 %c, ptr %p, ptr %q) {
; CHECK-LABEL: @redundant_load_elimination_2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], i64 1, i64 1
-; CHECK-NEXT: store i32 0, i32* [[GEP1]], align 4
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], i64 1, i64 0
-; CHECK-NEXT: store i32 1, i32* [[GEP2]], align 4
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[P:%.*]], i64 1, i64 1
+; CHECK-NEXT: store i32 0, ptr [[GEP1]], align 4
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[P]], i64 1, i64 0
+; CHECK-NEXT: store i32 1, ptr [[GEP2]], align 4
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_ELSE:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[T:%.*]] = load i32, i32* [[GEP1]], align 4
-; CHECK-NEXT: store i32 [[T]], i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[T:%.*]] = load i32, ptr [[GEP1]], align 4
+; CHECK-NEXT: store i32 [[T]], ptr [[Q:%.*]], align 4
; CHECK-NEXT: ret void
; CHECK: if.else:
; CHECK-NEXT: ret void
;
entry:
- %gep1 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 1, i64 1
- store i32 0, i32* %gep1
- %gep2 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 1, i64 0
- store i32 1, i32* %gep2
+ %gep1 = getelementptr <vscale x 4 x i32>, ptr %p, i64 1, i64 1
+ store i32 0, ptr %gep1
+ %gep2 = getelementptr <vscale x 4 x i32>, ptr %p, i64 1, i64 0
+ store i32 1, ptr %gep2
br i1 %c, label %if.else, label %if.then
if.then:
- %t = load i32, i32* %gep1 ; <- load could be eliminated
- store i32 %t, i32* %q
+ %t = load i32, ptr %gep1 ; <- load could be eliminated
+ store i32 %t, ptr %q
ret void
if.else:
ret void
}
-define void @redundant_load_elimination_zero_index(i1 %c, <vscale x 4 x i32>* %p, i32* %q) {
+define void @redundant_load_elimination_zero_index(i1 %c, ptr %p, ptr %q) {
; CHECK-LABEL: @redundant_load_elimination_zero_index(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], i64 0, i64 1
-; CHECK-NEXT: store i32 0, i32* [[GEP1]], align 4
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], i64 0, i64 0
-; CHECK-NEXT: store i32 1, i32* [[GEP2]], align 4
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[P:%.*]], i64 0, i64 1
+; CHECK-NEXT: store i32 0, ptr [[GEP1]], align 4
+; CHECK-NEXT: store i32 1, ptr [[P]], align 4
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_ELSE:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: store i32 0, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: store i32 0, ptr [[Q:%.*]], align 4
; CHECK-NEXT: ret void
; CHECK: if.else:
; CHECK-NEXT: ret void
;
entry:
- %gep1 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 0, i64 1
- store i32 0, i32* %gep1
- %gep2 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 0, i64 0
- store i32 1, i32* %gep2
+ %gep1 = getelementptr <vscale x 4 x i32>, ptr %p, i64 0, i64 1
+ store i32 0, ptr %gep1
+ store i32 1, ptr %p
br i1 %c, label %if.else, label %if.then
if.then:
- %t = load i32, i32* %gep1 ; <- load could be eliminated
- store i32 %t, i32* %q
+ %t = load i32, ptr %gep1 ; <- load could be eliminated
+ store i32 %t, ptr %q
ret void
if.else:
ret void
}
-define void @redundant_load_elimination_zero_index_1(i1 %c, <vscale x 4 x i32>* %p, i32* %q, i64 %i) {
+define void @redundant_load_elimination_zero_index_1(i1 %c, ptr %p, ptr %q, i64 %i) {
; CHECK-LABEL: @redundant_load_elimination_zero_index_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[J:%.*]] = add i64 [[I:%.*]], 1
-; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P:%.*]], i64 0, i64 [[J]]
-; CHECK-NEXT: store i32 0, i32* [[GEP1]], align 4
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], i64 0, i64 [[I]]
-; CHECK-NEXT: store i32 1, i32* [[GEP2]], align 4
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[P:%.*]], i64 0, i64 [[J]]
+; CHECK-NEXT: store i32 0, ptr [[GEP1]], align 4
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[P]], i64 0, i64 [[I]]
+; CHECK-NEXT: store i32 1, ptr [[GEP2]], align 4
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_ELSE:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: store i32 0, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: store i32 0, ptr [[Q:%.*]], align 4
; CHECK-NEXT: ret void
; CHECK: if.else:
; CHECK-NEXT: ret void
;
entry:
%j = add i64 %i, 1
- %gep1 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 0, i64 %j
- store i32 0, i32* %gep1
- %gep2 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 0, i64 %i
- store i32 1, i32* %gep2
+ %gep1 = getelementptr <vscale x 4 x i32>, ptr %p, i64 0, i64 %j
+ store i32 0, ptr %gep1
+ %gep2 = getelementptr <vscale x 4 x i32>, ptr %p, i64 0, i64 %i
+ store i32 1, ptr %gep2
br i1 %c, label %if.else, label %if.then
if.then:
- %t = load i32, i32* %gep1 ; <- load could be eliminated
- store i32 %t, i32* %q
+ %t = load i32, ptr %gep1 ; <- load could be eliminated
+ store i32 %t, ptr %q
ret void
if.else:
ret void
}
; TODO: load in if.then could have been eliminated
-define void @missing_load_elimination(i1 %c, <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %q, <vscale x 4 x i32> %v) {
+define void @missing_load_elimination(i1 %c, ptr %p, ptr %q, <vscale x 4 x i32> %v) {
; CHECK-LABEL: @missing_load_elimination(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* [[P:%.*]], align 16
-; CHECK-NEXT: [[P1:%.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], i64 1
-; CHECK-NEXT: store <vscale x 4 x i32> [[V:%.*]], <vscale x 4 x i32>* [[P1]], align 16
+; CHECK-NEXT: store <vscale x 4 x i32> zeroinitializer, ptr [[P:%.*]], align 16
+; CHECK-NEXT: [[P1:%.*]] = getelementptr <vscale x 4 x i32>, ptr [[P]], i64 1
+; CHECK-NEXT: store <vscale x 4 x i32> [[V:%.*]], ptr [[P1]], align 16
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_ELSE:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
-; CHECK-NEXT: [[T:%.*]] = load <vscale x 4 x i32>, <vscale x 4 x i32>* [[P]], align 16
-; CHECK-NEXT: store <vscale x 4 x i32> [[T]], <vscale x 4 x i32>* [[Q:%.*]], align 16
+; CHECK-NEXT: [[T:%.*]] = load <vscale x 4 x i32>, ptr [[P]], align 16
+; CHECK-NEXT: store <vscale x 4 x i32> [[T]], ptr [[Q:%.*]], align 16
; CHECK-NEXT: ret void
; CHECK: if.else:
; CHECK-NEXT: ret void
;
entry:
- store <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32>* %p
- %p1 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %p, i64 1
- store <vscale x 4 x i32> %v, <vscale x 4 x i32>* %p1
+ store <vscale x 4 x i32> zeroinitializer, ptr %p
+ %p1 = getelementptr <vscale x 4 x i32>, ptr %p, i64 1
+ store <vscale x 4 x i32> %v, ptr %p1
br i1 %c, label %if.else, label %if.then
if.then:
- %t = load <vscale x 4 x i32>, <vscale x 4 x i32>* %p ; load could be eliminated
- store <vscale x 4 x i32> %t, <vscale x 4 x i32>* %q
+ %t = load <vscale x 4 x i32>, ptr %p ; load could be eliminated
+ store <vscale x 4 x i32> %t, ptr %q
ret void
if.else:
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