[PATCH] D140571: [AVR] Optimize 32-bit shifts: shift by 4 bits
Ayke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 22 11:18:41 PST 2022
aykevl created this revision.
aykevl added reviewers: benshi001, dylanmckay.
Herald added subscribers: Jim, hiraditya.
Herald added a project: All.
aykevl requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
This uses a complicated shift sequence that avr-gcc also uses, but
extended to work over any number of bytes and in both directions
(logical shift left and logical shift right). Unfortunately it can't be
used for an arithmetic shift right: I've tried to come up with a
sequence but couldn't.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D140571
Files:
llvm/lib/Target/AVR/AVRISelLowering.cpp
llvm/test/CodeGen/AVR/shift32.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D140571.484906.patch
Type: text/x-patch
Size: 6723 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20221222/20675d29/attachment.bin>
More information about the llvm-commits
mailing list