[PATCH] D140498: [SLP]Fix cost of the broadcast buildvector/gather.

[Alexey Bataev via Phabricator via llvm-commits]

ABataev updated this revision to Diff 484843.
ABataev added a comment.

Remove default values in target-specific implementations.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140498/new/

https://reviews.llvm.org/D140498

Files:
  llvm/include/llvm/Analysis/TargetTransformInfo.h
  llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
  llvm/include/llvm/CodeGen/BasicTTIImpl.h
  llvm/lib/Analysis/TargetTransformInfo.cpp
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
  llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
  llvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp
  llvm/lib/Target/AMDGPU/R600TargetTransformInfo.h
  llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
  llvm/lib/Target/ARM/ARMTargetTransformInfo.h
  llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
  llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
  llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
  llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
  llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
  llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
  llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
  llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/lib/Target/X86/X86TargetTransformInfo.h
  llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
  llvm/test/Analysis/CostModel/X86/loop_v2-inseltpoison.ll
  llvm/test/Analysis/CostModel/X86/loop_v2.ll
  llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll
  llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost.ll
  llvm/test/Analysis/CostModel/X86/vector-insert-inseltpoison.ll
  llvm/test/Analysis/CostModel/X86/vector-insert.ll
  llvm/test/Analysis/CostModel/X86/vshift-ashr-codesize.ll
  llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll
  llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll
  llvm/test/Analysis/CostModel/X86/vshift-ashr-latency.ll
  llvm/test/Analysis/CostModel/X86/vshift-ashr-sizelatency.ll
  llvm/test/Analysis/CostModel/X86/vshift-lshr-codesize.ll
  llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll
  llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll
  llvm/test/Analysis/CostModel/X86/vshift-lshr-latency.ll
  llvm/test/Analysis/CostModel/X86/vshift-lshr-sizelatency.ll
  llvm/test/Analysis/CostModel/X86/vshift-shl-codesize.ll
  llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
  llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll
  llvm/test/Analysis/CostModel/X86/vshift-shl-latency.ll
  llvm/test/Analysis/CostModel/X86/vshift-shl-sizelatency.ll
  llvm/test/Transforms/SLPVectorizer/X86/cse.ll
  llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll
  llvm/test/Transforms/SLPVectorizer/X86/used-reduced-op.ll