[PATCH] D140347: SelectionDAG: Teach ComputeKnownBits about VSCALE

[Saleem Abdulrasool via Phabricator via llvm-commits]

compnerd added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:3040-3051
+    unsigned Width = Multiplier.getActiveBits() + Log2_32(*MaxVScale) + 1;
+    APInt VScaleResultUpperbound =
+        APInt(Width, *MaxVScale) * Multiplier.sextOrTrunc(Width);
+
+    bool Negative = VScaleResultUpperbound.isNegative();
+    if (Negative)
+      VScaleResultUpperbound = ~VScaleResultUpperbound;
----------------
foad wrote:
> This seems pretty complex. Is the Multiplier operand guaranteed to have the same width as the result, i.e. BitWidth? If so you should be able to do all calculation in that width and the signedness of the multiplier should be irrelevant.
No AFAIK, the multiplier has no guarantees of the width.  It may be 32-bit, or 64-bit, though LLVM did truncate it further.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140347/new/

https://reviews.llvm.org/D140347