[PATCH] D140515: [SPARC] Fix SELECT_REG emission for f128s

[Koakuma via Phabricator via llvm-commits]

koakuma added inline comments.


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Comment at: llvm/lib/Target/Sparc/SparcISelLowering.cpp:2644
   assert(LHS.getValueType() == RHS.getValueType());
+  assert(TrueVal.getValueType() == FalseVal.getValueType());
 
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arsenm wrote:
> This is enforced during construction?
Yeah it should, lemme remove this assert.


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Comment at: llvm/lib/Target/Sparc/SparcISelLowering.cpp:2652
+        isNullConstant(RHS) && !ISD::isUnsignedIntSetCC(CC) &&
+        (hasHardQuad || TrueVal.getValueType() != MVT::f128))
       return DAG.getNode(
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arsenm wrote:
> Could you check isTypeLegal instead?
I don't think that I could use isTypeLegal here?
Disabling hardquad only turns off the instructions, but the registers are still there (this is because the ISA defines an f128 register to be simply a group of four f32 registers), so isTypeLegal(f128) will always return true regardless of whether we have hardquad instructions or not.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140515/new/

https://reviews.llvm.org/D140515