[llvm] 47df55f - [gn] Don't include RISCV in targets build for 'all'
Nico Weber via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 21 15:24:54 PST 2022
Author: Nico Weber
Date: 2022-12-21T18:24:44-05:00
New Revision: 47df55f3ef57179ebd845290a1bee18c445ff180
URL: https://github.com/llvm/llvm-project/commit/47df55f3ef57179ebd845290a1bee18c445ff180
DIFF: https://github.com/llvm/llvm-project/commit/47df55f3ef57179ebd845290a1bee18c445ff180.diff
LOG: [gn] Don't include RISCV in targets build for 'all'
RISCV build and tests are often broken.
You can use `llvm_targets_to_build = "experimental"` to enable
_all_ targets, including the experimental ones. If RISCV is listed
in llvm_targets_to_build, it's built as before.
Added:
Modified:
llvm/utils/gn/secondary/llvm/lib/Target/targets.gni
Removed:
################################################################################
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/targets.gni b/llvm/utils/gn/secondary/llvm/lib/Target/targets.gni
index 14c5fdc6dd4be..45dce88e17960 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/targets.gni
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/targets.gni
@@ -8,7 +8,7 @@ declare_args() {
}
# FIXME: Port the remaining targets.
-llvm_all_targets = [
+llvm_all_stable_targets = [
"AArch64",
"AMDGPU",
"ARM",
@@ -27,6 +27,10 @@ llvm_all_targets = [
"X86",
]
+llvm_all_experimental_targets = [ "RISCV" ]
+
+llvm_all_targets = llvm_all_stable_targets + llvm_all_experimental_targets
+
# FIXME: This should be based off target_cpu once cross compiles work.
if (host_cpu == "arm64") {
native_target = "AArch64"
@@ -43,6 +47,8 @@ if (host_cpu == "arm64") {
if (llvm_targets_to_build == "host") {
llvm_targets_to_build = [ native_target ]
} else if (llvm_targets_to_build == "all") {
+ llvm_targets_to_build = llvm_all_stable_targets
+} else if (llvm_targets_to_build == "experimental") {
llvm_targets_to_build = llvm_all_targets
}
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