[llvm] 51315d8 - [RISCV] Add more test cases to select.ll. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 21 10:39:07 PST 2022
Author: Craig Topper
Date: 2022-12-21T10:38:12-08:00
New Revision: 51315d8deebb0d32b9f556bedae5251a4643b85a
URL: https://github.com/llvm/llvm-project/commit/51315d8deebb0d32b9f556bedae5251a4643b85a
DIFF: https://github.com/llvm/llvm-project/commit/51315d8deebb0d32b9f556bedae5251a4643b85a.diff
LOG: [RISCV] Add more test cases to select.ll. NFC
These are test for select (and (x , 0x1) == 0), (z ^ y), y ) and select (and (x , 0x1) == 0), (z | y), y )
These can be made branchless by using ((x-1) & z ) ^ y.
Added:
Modified:
llvm/test/CodeGen/RISCV/select.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/select.ll b/llvm/test/CodeGen/RISCV/select.ll
index 003a66fbfbdc2..de54a4622cf90 100644
--- a/llvm/test/CodeGen/RISCV/select.ll
+++ b/llvm/test/CodeGen/RISCV/select.ll
@@ -135,6 +135,146 @@ entry:
ret i32 %1
}
+define i16 @select_xor_3(i16 %A, i8 %cond) {
+; RV32-LABEL: select_xor_3:
+; RV32: # %bb.0: # %entry
+; RV32-NEXT: andi a1, a1, 1
+; RV32-NEXT: bnez a1, .LBB4_2
+; RV32-NEXT: # %bb.1:
+; RV32-NEXT: xori a0, a0, 43
+; RV32-NEXT: .LBB4_2: # %entry
+; RV32-NEXT: ret
+;
+; NOCONDOPS-LABEL: select_xor_3:
+; NOCONDOPS: # %bb.0: # %entry
+; NOCONDOPS-NEXT: andi a1, a1, 1
+; NOCONDOPS-NEXT: bnez a1, .LBB4_2
+; NOCONDOPS-NEXT: # %bb.1:
+; NOCONDOPS-NEXT: xori a0, a0, 43
+; NOCONDOPS-NEXT: .LBB4_2: # %entry
+; NOCONDOPS-NEXT: ret
+;
+; CONDOPS-LABEL: select_xor_3:
+; CONDOPS: # %bb.0: # %entry
+; CONDOPS-NEXT: andi a1, a1, 1
+; CONDOPS-NEXT: seqz a1, a1
+; CONDOPS-NEXT: li a2, 43
+; CONDOPS-NEXT: vt.maskc a1, a2, a1
+; CONDOPS-NEXT: xor a0, a0, a1
+; CONDOPS-NEXT: ret
+entry:
+ %and = and i8 %cond, 1
+ %cmp10 = icmp eq i8 %and, 0
+ %0 = xor i16 %A, 43
+ %1 = select i1 %cmp10, i16 %0, i16 %A
+ ret i16 %1
+}
+
+; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
+; icmp eq (and %cond, 1), 0
+define i16 @select_xor_3b(i16 %A, i8 %cond) {
+; RV32-LABEL: select_xor_3b:
+; RV32: # %bb.0: # %entry
+; RV32-NEXT: andi a1, a1, 1
+; RV32-NEXT: bnez a1, .LBB5_2
+; RV32-NEXT: # %bb.1: # %entry
+; RV32-NEXT: xori a0, a0, 43
+; RV32-NEXT: .LBB5_2: # %entry
+; RV32-NEXT: ret
+;
+; NOCONDOPS-LABEL: select_xor_3b:
+; NOCONDOPS: # %bb.0: # %entry
+; NOCONDOPS-NEXT: andi a1, a1, 1
+; NOCONDOPS-NEXT: bnez a1, .LBB5_2
+; NOCONDOPS-NEXT: # %bb.1: # %entry
+; NOCONDOPS-NEXT: xori a0, a0, 43
+; NOCONDOPS-NEXT: .LBB5_2: # %entry
+; NOCONDOPS-NEXT: ret
+;
+; CONDOPS-LABEL: select_xor_3b:
+; CONDOPS: # %bb.0: # %entry
+; CONDOPS-NEXT: andi a1, a1, 1
+; CONDOPS-NEXT: li a2, 43
+; CONDOPS-NEXT: vt.maskcn a1, a2, a1
+; CONDOPS-NEXT: xor a0, a0, a1
+; CONDOPS-NEXT: ret
+entry:
+ %and = and i8 %cond, 1
+ %cmp10 = icmp ne i8 %and, 1
+ %0 = xor i16 %A, 43
+ %1 = select i1 %cmp10, i16 %0, i16 %A
+ ret i16 %1
+}
+
+define i32 @select_xor_4(i32 %A, i32 %B, i8 %cond) {
+; RV32-LABEL: select_xor_4:
+; RV32: # %bb.0: # %entry
+; RV32-NEXT: andi a2, a2, 1
+; RV32-NEXT: bnez a2, .LBB6_2
+; RV32-NEXT: # %bb.1:
+; RV32-NEXT: xor a0, a1, a0
+; RV32-NEXT: .LBB6_2: # %entry
+; RV32-NEXT: ret
+;
+; NOCONDOPS-LABEL: select_xor_4:
+; NOCONDOPS: # %bb.0: # %entry
+; NOCONDOPS-NEXT: andi a2, a2, 1
+; NOCONDOPS-NEXT: bnez a2, .LBB6_2
+; NOCONDOPS-NEXT: # %bb.1:
+; NOCONDOPS-NEXT: xor a0, a1, a0
+; NOCONDOPS-NEXT: .LBB6_2: # %entry
+; NOCONDOPS-NEXT: ret
+;
+; CONDOPS-LABEL: select_xor_4:
+; CONDOPS: # %bb.0: # %entry
+; CONDOPS-NEXT: andi a2, a2, 1
+; CONDOPS-NEXT: seqz a2, a2
+; CONDOPS-NEXT: vt.maskc a1, a1, a2
+; CONDOPS-NEXT: xor a0, a0, a1
+; CONDOPS-NEXT: ret
+entry:
+ %and = and i8 %cond, 1
+ %cmp10 = icmp eq i8 %and, 0
+ %0 = xor i32 %B, %A
+ %1 = select i1 %cmp10, i32 %0, i32 %A
+ ret i32 %1
+}
+
+; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
+; icmp eq (and %cond, 1), 0
+define i32 @select_xor_4b(i32 %A, i32 %B, i8 %cond) {
+; RV32-LABEL: select_xor_4b:
+; RV32: # %bb.0: # %entry
+; RV32-NEXT: andi a2, a2, 1
+; RV32-NEXT: bnez a2, .LBB7_2
+; RV32-NEXT: # %bb.1: # %entry
+; RV32-NEXT: xor a0, a1, a0
+; RV32-NEXT: .LBB7_2: # %entry
+; RV32-NEXT: ret
+;
+; NOCONDOPS-LABEL: select_xor_4b:
+; NOCONDOPS: # %bb.0: # %entry
+; NOCONDOPS-NEXT: andi a2, a2, 1
+; NOCONDOPS-NEXT: bnez a2, .LBB7_2
+; NOCONDOPS-NEXT: # %bb.1: # %entry
+; NOCONDOPS-NEXT: xor a0, a1, a0
+; NOCONDOPS-NEXT: .LBB7_2: # %entry
+; NOCONDOPS-NEXT: ret
+;
+; CONDOPS-LABEL: select_xor_4b:
+; CONDOPS: # %bb.0: # %entry
+; CONDOPS-NEXT: andi a2, a2, 1
+; CONDOPS-NEXT: vt.maskcn a1, a1, a2
+; CONDOPS-NEXT: xor a0, a0, a1
+; CONDOPS-NEXT: ret
+entry:
+ %and = and i8 %cond, 1
+ %cmp10 = icmp ne i8 %and, 1
+ %0 = xor i32 %B, %A
+ %1 = select i1 %cmp10, i32 %0, i32 %A
+ ret i32 %1
+}
+
define i32 @select_or(i32 %A, i32 %B, i8 %cond) {
; RV32-LABEL: select_or:
; RV32: # %bb.0: # %entry
@@ -265,22 +405,160 @@ entry:
ret i32 %1
}
+define i32 @select_or_2(i32 %A, i32 %B, i8 %cond) {
+; RV32-LABEL: select_or_2:
+; RV32: # %bb.0: # %entry
+; RV32-NEXT: andi a2, a2, 1
+; RV32-NEXT: bnez a2, .LBB12_2
+; RV32-NEXT: # %bb.1:
+; RV32-NEXT: or a0, a1, a0
+; RV32-NEXT: .LBB12_2: # %entry
+; RV32-NEXT: ret
+;
+; NOCONDOPS-LABEL: select_or_2:
+; NOCONDOPS: # %bb.0: # %entry
+; NOCONDOPS-NEXT: andi a2, a2, 1
+; NOCONDOPS-NEXT: bnez a2, .LBB12_2
+; NOCONDOPS-NEXT: # %bb.1:
+; NOCONDOPS-NEXT: or a0, a1, a0
+; NOCONDOPS-NEXT: .LBB12_2: # %entry
+; NOCONDOPS-NEXT: ret
+;
+; CONDOPS-LABEL: select_or_2:
+; CONDOPS: # %bb.0: # %entry
+; CONDOPS-NEXT: andi a2, a2, 1
+; CONDOPS-NEXT: seqz a2, a2
+; CONDOPS-NEXT: vt.maskc a1, a1, a2
+; CONDOPS-NEXT: or a0, a0, a1
+; CONDOPS-NEXT: ret
+entry:
+ %and = and i8 %cond, 1
+ %cmp10 = icmp eq i8 %and, 0
+ %0 = or i32 %B, %A
+ %1 = select i1 %cmp10, i32 %0, i32 %A
+ ret i32 %1
+}
+
+; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
+; icmp eq (and %cond, 1), 0
+define i32 @select_or_2b(i32 %A, i32 %B, i8 %cond) {
+; RV32-LABEL: select_or_2b:
+; RV32: # %bb.0: # %entry
+; RV32-NEXT: andi a2, a2, 1
+; RV32-NEXT: bnez a2, .LBB13_2
+; RV32-NEXT: # %bb.1: # %entry
+; RV32-NEXT: or a0, a1, a0
+; RV32-NEXT: .LBB13_2: # %entry
+; RV32-NEXT: ret
+;
+; NOCONDOPS-LABEL: select_or_2b:
+; NOCONDOPS: # %bb.0: # %entry
+; NOCONDOPS-NEXT: andi a2, a2, 1
+; NOCONDOPS-NEXT: bnez a2, .LBB13_2
+; NOCONDOPS-NEXT: # %bb.1: # %entry
+; NOCONDOPS-NEXT: or a0, a1, a0
+; NOCONDOPS-NEXT: .LBB13_2: # %entry
+; NOCONDOPS-NEXT: ret
+;
+; CONDOPS-LABEL: select_or_2b:
+; CONDOPS: # %bb.0: # %entry
+; CONDOPS-NEXT: andi a2, a2, 1
+; CONDOPS-NEXT: vt.maskcn a1, a1, a2
+; CONDOPS-NEXT: or a0, a0, a1
+; CONDOPS-NEXT: ret
+entry:
+ %and = and i8 %cond, 1
+ %cmp10 = icmp ne i8 %and, 1
+ %0 = or i32 %B, %A
+ %1 = select i1 %cmp10, i32 %0, i32 %A
+ ret i32 %1
+}
+
+define i32 @select_or_3(i32 %A, i32 %B, i32 %cond) {
+; RV32-LABEL: select_or_3:
+; RV32: # %bb.0: # %entry
+; RV32-NEXT: andi a2, a2, 1
+; RV32-NEXT: bnez a2, .LBB14_2
+; RV32-NEXT: # %bb.1:
+; RV32-NEXT: or a0, a1, a0
+; RV32-NEXT: .LBB14_2: # %entry
+; RV32-NEXT: ret
+;
+; NOCONDOPS-LABEL: select_or_3:
+; NOCONDOPS: # %bb.0: # %entry
+; NOCONDOPS-NEXT: andi a2, a2, 1
+; NOCONDOPS-NEXT: bnez a2, .LBB14_2
+; NOCONDOPS-NEXT: # %bb.1:
+; NOCONDOPS-NEXT: or a0, a1, a0
+; NOCONDOPS-NEXT: .LBB14_2: # %entry
+; NOCONDOPS-NEXT: ret
+;
+; CONDOPS-LABEL: select_or_3:
+; CONDOPS: # %bb.0: # %entry
+; CONDOPS-NEXT: andi a2, a2, 1
+; CONDOPS-NEXT: seqz a2, a2
+; CONDOPS-NEXT: vt.maskc a1, a1, a2
+; CONDOPS-NEXT: or a0, a0, a1
+; CONDOPS-NEXT: ret
+entry:
+ %and = and i32 %cond, 1
+ %cmp10 = icmp eq i32 %and, 0
+ %0 = or i32 %B, %A
+ %1 = select i1 %cmp10, i32 %0, i32 %A
+ ret i32 %1
+}
+
+; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
+; icmp eq (and %cond, 1), 0
+define i32 @select_or_3b(i32 %A, i32 %B, i32 %cond) {
+; RV32-LABEL: select_or_3b:
+; RV32: # %bb.0: # %entry
+; RV32-NEXT: andi a2, a2, 1
+; RV32-NEXT: bnez a2, .LBB15_2
+; RV32-NEXT: # %bb.1: # %entry
+; RV32-NEXT: or a0, a1, a0
+; RV32-NEXT: .LBB15_2: # %entry
+; RV32-NEXT: ret
+;
+; NOCONDOPS-LABEL: select_or_3b:
+; NOCONDOPS: # %bb.0: # %entry
+; NOCONDOPS-NEXT: andi a2, a2, 1
+; NOCONDOPS-NEXT: bnez a2, .LBB15_2
+; NOCONDOPS-NEXT: # %bb.1: # %entry
+; NOCONDOPS-NEXT: or a0, a1, a0
+; NOCONDOPS-NEXT: .LBB15_2: # %entry
+; NOCONDOPS-NEXT: ret
+;
+; CONDOPS-LABEL: select_or_3b:
+; CONDOPS: # %bb.0: # %entry
+; CONDOPS-NEXT: andi a2, a2, 1
+; CONDOPS-NEXT: vt.maskcn a1, a1, a2
+; CONDOPS-NEXT: or a0, a0, a1
+; CONDOPS-NEXT: ret
+entry:
+ %and = and i32 %cond, 1
+ %cmp10 = icmp ne i32 %and, 1
+ %0 = or i32 %B, %A
+ %1 = select i1 %cmp10, i32 %0, i32 %A
+ ret i32 %1
+}
+
define i32 @select_add_1(i1 zeroext %cond, i32 %a, i32 %b) {
; RV32-LABEL: select_add_1:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: beqz a0, .LBB8_2
+; RV32-NEXT: beqz a0, .LBB16_2
; RV32-NEXT: # %bb.1:
; RV32-NEXT: add a2, a1, a2
-; RV32-NEXT: .LBB8_2: # %entry
+; RV32-NEXT: .LBB16_2: # %entry
; RV32-NEXT: mv a0, a2
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_add_1:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: beqz a0, .LBB8_2
+; NOCONDOPS-NEXT: beqz a0, .LBB16_2
; NOCONDOPS-NEXT: # %bb.1:
; NOCONDOPS-NEXT: addw a2, a1, a2
-; NOCONDOPS-NEXT: .LBB8_2: # %entry
+; NOCONDOPS-NEXT: .LBB16_2: # %entry
; NOCONDOPS-NEXT: mv a0, a2
; NOCONDOPS-NEXT: ret
;
@@ -300,19 +578,19 @@ entry:
define i32 @select_add_2(i1 zeroext %cond, i32 %a, i32 %b) {
; RV32-LABEL: select_add_2:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: bnez a0, .LBB9_2
+; RV32-NEXT: bnez a0, .LBB17_2
; RV32-NEXT: # %bb.1: # %entry
; RV32-NEXT: add a1, a1, a2
-; RV32-NEXT: .LBB9_2: # %entry
+; RV32-NEXT: .LBB17_2: # %entry
; RV32-NEXT: mv a0, a1
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_add_2:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: bnez a0, .LBB9_2
+; NOCONDOPS-NEXT: bnez a0, .LBB17_2
; NOCONDOPS-NEXT: # %bb.1: # %entry
; NOCONDOPS-NEXT: addw a1, a1, a2
-; NOCONDOPS-NEXT: .LBB9_2: # %entry
+; NOCONDOPS-NEXT: .LBB17_2: # %entry
; NOCONDOPS-NEXT: mv a0, a1
; NOCONDOPS-NEXT: ret
;
@@ -332,19 +610,19 @@ entry:
define i32 @select_add_3(i1 zeroext %cond, i32 %a) {
; RV32-LABEL: select_add_3:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: bnez a0, .LBB10_2
+; RV32-NEXT: bnez a0, .LBB18_2
; RV32-NEXT: # %bb.1: # %entry
; RV32-NEXT: addi a1, a1, 42
-; RV32-NEXT: .LBB10_2: # %entry
+; RV32-NEXT: .LBB18_2: # %entry
; RV32-NEXT: mv a0, a1
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_add_3:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: bnez a0, .LBB10_2
+; NOCONDOPS-NEXT: bnez a0, .LBB18_2
; NOCONDOPS-NEXT: # %bb.1: # %entry
; NOCONDOPS-NEXT: addiw a1, a1, 42
-; NOCONDOPS-NEXT: .LBB10_2: # %entry
+; NOCONDOPS-NEXT: .LBB18_2: # %entry
; NOCONDOPS-NEXT: mv a0, a1
; NOCONDOPS-NEXT: ret
;
@@ -364,19 +642,19 @@ entry:
define i32 @select_sub_1(i1 zeroext %cond, i32 %a, i32 %b) {
; RV32-LABEL: select_sub_1:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: beqz a0, .LBB11_2
+; RV32-NEXT: beqz a0, .LBB19_2
; RV32-NEXT: # %bb.1:
; RV32-NEXT: sub a2, a1, a2
-; RV32-NEXT: .LBB11_2: # %entry
+; RV32-NEXT: .LBB19_2: # %entry
; RV32-NEXT: mv a0, a2
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_sub_1:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: beqz a0, .LBB11_2
+; NOCONDOPS-NEXT: beqz a0, .LBB19_2
; NOCONDOPS-NEXT: # %bb.1:
; NOCONDOPS-NEXT: subw a2, a1, a2
-; NOCONDOPS-NEXT: .LBB11_2: # %entry
+; NOCONDOPS-NEXT: .LBB19_2: # %entry
; NOCONDOPS-NEXT: mv a0, a2
; NOCONDOPS-NEXT: ret
;
@@ -396,19 +674,19 @@ entry:
define i32 @select_sub_2(i1 zeroext %cond, i32 %a, i32 %b) {
; RV32-LABEL: select_sub_2:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: bnez a0, .LBB12_2
+; RV32-NEXT: bnez a0, .LBB20_2
; RV32-NEXT: # %bb.1: # %entry
; RV32-NEXT: sub a1, a1, a2
-; RV32-NEXT: .LBB12_2: # %entry
+; RV32-NEXT: .LBB20_2: # %entry
; RV32-NEXT: mv a0, a1
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_sub_2:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: bnez a0, .LBB12_2
+; NOCONDOPS-NEXT: bnez a0, .LBB20_2
; NOCONDOPS-NEXT: # %bb.1: # %entry
; NOCONDOPS-NEXT: subw a1, a1, a2
-; NOCONDOPS-NEXT: .LBB12_2: # %entry
+; NOCONDOPS-NEXT: .LBB20_2: # %entry
; NOCONDOPS-NEXT: mv a0, a1
; NOCONDOPS-NEXT: ret
;
@@ -428,19 +706,19 @@ entry:
define i32 @select_sub_3(i1 zeroext %cond, i32 %a) {
; RV32-LABEL: select_sub_3:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: bnez a0, .LBB13_2
+; RV32-NEXT: bnez a0, .LBB21_2
; RV32-NEXT: # %bb.1: # %entry
; RV32-NEXT: addi a1, a1, -42
-; RV32-NEXT: .LBB13_2: # %entry
+; RV32-NEXT: .LBB21_2: # %entry
; RV32-NEXT: mv a0, a1
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_sub_3:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: bnez a0, .LBB13_2
+; NOCONDOPS-NEXT: bnez a0, .LBB21_2
; NOCONDOPS-NEXT: # %bb.1: # %entry
; NOCONDOPS-NEXT: addiw a1, a1, -42
-; NOCONDOPS-NEXT: .LBB13_2: # %entry
+; NOCONDOPS-NEXT: .LBB21_2: # %entry
; NOCONDOPS-NEXT: mv a0, a1
; NOCONDOPS-NEXT: ret
;
@@ -460,19 +738,19 @@ entry:
define i32 @select_and_1(i1 zeroext %cond, i32 %a, i32 %b) {
; RV32-LABEL: select_and_1:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: beqz a0, .LBB14_2
+; RV32-NEXT: beqz a0, .LBB22_2
; RV32-NEXT: # %bb.1:
; RV32-NEXT: and a2, a1, a2
-; RV32-NEXT: .LBB14_2: # %entry
+; RV32-NEXT: .LBB22_2: # %entry
; RV32-NEXT: mv a0, a2
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_and_1:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: beqz a0, .LBB14_2
+; NOCONDOPS-NEXT: beqz a0, .LBB22_2
; NOCONDOPS-NEXT: # %bb.1:
; NOCONDOPS-NEXT: and a2, a1, a2
-; NOCONDOPS-NEXT: .LBB14_2: # %entry
+; NOCONDOPS-NEXT: .LBB22_2: # %entry
; NOCONDOPS-NEXT: mv a0, a2
; NOCONDOPS-NEXT: ret
;
@@ -491,19 +769,19 @@ entry:
define i32 @select_and_2(i1 zeroext %cond, i32 %a, i32 %b) {
; RV32-LABEL: select_and_2:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: bnez a0, .LBB15_2
+; RV32-NEXT: bnez a0, .LBB23_2
; RV32-NEXT: # %bb.1: # %entry
; RV32-NEXT: and a1, a1, a2
-; RV32-NEXT: .LBB15_2: # %entry
+; RV32-NEXT: .LBB23_2: # %entry
; RV32-NEXT: mv a0, a1
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_and_2:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: bnez a0, .LBB15_2
+; NOCONDOPS-NEXT: bnez a0, .LBB23_2
; NOCONDOPS-NEXT: # %bb.1: # %entry
; NOCONDOPS-NEXT: and a1, a1, a2
-; NOCONDOPS-NEXT: .LBB15_2: # %entry
+; NOCONDOPS-NEXT: .LBB23_2: # %entry
; NOCONDOPS-NEXT: mv a0, a1
; NOCONDOPS-NEXT: ret
;
@@ -522,19 +800,19 @@ entry:
define i32 @select_and_3(i1 zeroext %cond, i32 %a) {
; RV32-LABEL: select_and_3:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: bnez a0, .LBB16_2
+; RV32-NEXT: bnez a0, .LBB24_2
; RV32-NEXT: # %bb.1: # %entry
; RV32-NEXT: andi a1, a1, 42
-; RV32-NEXT: .LBB16_2: # %entry
+; RV32-NEXT: .LBB24_2: # %entry
; RV32-NEXT: mv a0, a1
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_and_3:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: bnez a0, .LBB16_2
+; NOCONDOPS-NEXT: bnez a0, .LBB24_2
; NOCONDOPS-NEXT: # %bb.1: # %entry
; NOCONDOPS-NEXT: andi a1, a1, 42
-; NOCONDOPS-NEXT: .LBB16_2: # %entry
+; NOCONDOPS-NEXT: .LBB24_2: # %entry
; NOCONDOPS-NEXT: mv a0, a1
; NOCONDOPS-NEXT: ret
;
@@ -554,19 +832,19 @@ entry:
define i32 @select_udiv_1(i1 zeroext %cond, i32 %a, i32 %b) {
; RV32-LABEL: select_udiv_1:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: beqz a0, .LBB17_2
+; RV32-NEXT: beqz a0, .LBB25_2
; RV32-NEXT: # %bb.1:
; RV32-NEXT: divu a2, a1, a2
-; RV32-NEXT: .LBB17_2: # %entry
+; RV32-NEXT: .LBB25_2: # %entry
; RV32-NEXT: mv a0, a2
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_udiv_1:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: beqz a0, .LBB17_2
+; NOCONDOPS-NEXT: beqz a0, .LBB25_2
; NOCONDOPS-NEXT: # %bb.1:
; NOCONDOPS-NEXT: divuw a2, a1, a2
-; NOCONDOPS-NEXT: .LBB17_2: # %entry
+; NOCONDOPS-NEXT: .LBB25_2: # %entry
; NOCONDOPS-NEXT: mv a0, a2
; NOCONDOPS-NEXT: ret
;
@@ -586,19 +864,19 @@ entry:
define i32 @select_udiv_2(i1 zeroext %cond, i32 %a, i32 %b) {
; RV32-LABEL: select_udiv_2:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: bnez a0, .LBB18_2
+; RV32-NEXT: bnez a0, .LBB26_2
; RV32-NEXT: # %bb.1: # %entry
; RV32-NEXT: divu a1, a1, a2
-; RV32-NEXT: .LBB18_2: # %entry
+; RV32-NEXT: .LBB26_2: # %entry
; RV32-NEXT: mv a0, a1
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_udiv_2:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: bnez a0, .LBB18_2
+; NOCONDOPS-NEXT: bnez a0, .LBB26_2
; NOCONDOPS-NEXT: # %bb.1: # %entry
; NOCONDOPS-NEXT: divuw a1, a1, a2
-; NOCONDOPS-NEXT: .LBB18_2: # %entry
+; NOCONDOPS-NEXT: .LBB26_2: # %entry
; NOCONDOPS-NEXT: mv a0, a1
; NOCONDOPS-NEXT: ret
;
@@ -618,27 +896,27 @@ entry:
define i32 @select_udiv_3(i1 zeroext %cond, i32 %a) {
; RV32-LABEL: select_udiv_3:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: bnez a0, .LBB19_2
+; RV32-NEXT: bnez a0, .LBB27_2
; RV32-NEXT: # %bb.1: # %entry
; RV32-NEXT: srli a1, a1, 1
; RV32-NEXT: lui a0, 199729
; RV32-NEXT: addi a0, a0, -975
; RV32-NEXT: mulhu a1, a1, a0
; RV32-NEXT: srli a1, a1, 2
-; RV32-NEXT: .LBB19_2: # %entry
+; RV32-NEXT: .LBB27_2: # %entry
; RV32-NEXT: mv a0, a1
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_udiv_3:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: bnez a0, .LBB19_2
+; NOCONDOPS-NEXT: bnez a0, .LBB27_2
; NOCONDOPS-NEXT: # %bb.1: # %entry
; NOCONDOPS-NEXT: srliw a0, a1, 1
; NOCONDOPS-NEXT: lui a1, 199729
; NOCONDOPS-NEXT: addiw a1, a1, -975
; NOCONDOPS-NEXT: mul a1, a0, a1
; NOCONDOPS-NEXT: srli a1, a1, 34
-; NOCONDOPS-NEXT: .LBB19_2: # %entry
+; NOCONDOPS-NEXT: .LBB27_2: # %entry
; NOCONDOPS-NEXT: mv a0, a1
; NOCONDOPS-NEXT: ret
;
@@ -662,19 +940,19 @@ entry:
define i32 @select_shl_1(i1 zeroext %cond, i32 %a, i32 %b) {
; RV32-LABEL: select_shl_1:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: beqz a0, .LBB20_2
+; RV32-NEXT: beqz a0, .LBB28_2
; RV32-NEXT: # %bb.1:
; RV32-NEXT: sll a2, a1, a2
-; RV32-NEXT: .LBB20_2: # %entry
+; RV32-NEXT: .LBB28_2: # %entry
; RV32-NEXT: mv a0, a2
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_shl_1:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: beqz a0, .LBB20_2
+; NOCONDOPS-NEXT: beqz a0, .LBB28_2
; NOCONDOPS-NEXT: # %bb.1:
; NOCONDOPS-NEXT: sllw a2, a1, a2
-; NOCONDOPS-NEXT: .LBB20_2: # %entry
+; NOCONDOPS-NEXT: .LBB28_2: # %entry
; NOCONDOPS-NEXT: mv a0, a2
; NOCONDOPS-NEXT: ret
;
@@ -694,19 +972,19 @@ entry:
define i32 @select_shl_2(i1 zeroext %cond, i32 %a, i32 %b) {
; RV32-LABEL: select_shl_2:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: bnez a0, .LBB21_2
+; RV32-NEXT: bnez a0, .LBB29_2
; RV32-NEXT: # %bb.1: # %entry
; RV32-NEXT: sll a1, a1, a2
-; RV32-NEXT: .LBB21_2: # %entry
+; RV32-NEXT: .LBB29_2: # %entry
; RV32-NEXT: mv a0, a1
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_shl_2:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: bnez a0, .LBB21_2
+; NOCONDOPS-NEXT: bnez a0, .LBB29_2
; NOCONDOPS-NEXT: # %bb.1: # %entry
; NOCONDOPS-NEXT: sllw a1, a1, a2
-; NOCONDOPS-NEXT: .LBB21_2: # %entry
+; NOCONDOPS-NEXT: .LBB29_2: # %entry
; NOCONDOPS-NEXT: mv a0, a1
; NOCONDOPS-NEXT: ret
;
@@ -737,19 +1015,19 @@ entry:
define i32 @select_ashr_1(i1 zeroext %cond, i32 %a, i32 %b) {
; RV32-LABEL: select_ashr_1:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: beqz a0, .LBB23_2
+; RV32-NEXT: beqz a0, .LBB31_2
; RV32-NEXT: # %bb.1:
; RV32-NEXT: sra a2, a1, a2
-; RV32-NEXT: .LBB23_2: # %entry
+; RV32-NEXT: .LBB31_2: # %entry
; RV32-NEXT: mv a0, a2
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_ashr_1:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: beqz a0, .LBB23_2
+; NOCONDOPS-NEXT: beqz a0, .LBB31_2
; NOCONDOPS-NEXT: # %bb.1:
; NOCONDOPS-NEXT: sraw a2, a1, a2
-; NOCONDOPS-NEXT: .LBB23_2: # %entry
+; NOCONDOPS-NEXT: .LBB31_2: # %entry
; NOCONDOPS-NEXT: mv a0, a2
; NOCONDOPS-NEXT: ret
;
@@ -769,19 +1047,19 @@ entry:
define i32 @select_ashr_2(i1 zeroext %cond, i32 %a, i32 %b) {
; RV32-LABEL: select_ashr_2:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: bnez a0, .LBB24_2
+; RV32-NEXT: bnez a0, .LBB32_2
; RV32-NEXT: # %bb.1: # %entry
; RV32-NEXT: sra a1, a1, a2
-; RV32-NEXT: .LBB24_2: # %entry
+; RV32-NEXT: .LBB32_2: # %entry
; RV32-NEXT: mv a0, a1
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_ashr_2:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: bnez a0, .LBB24_2
+; NOCONDOPS-NEXT: bnez a0, .LBB32_2
; NOCONDOPS-NEXT: # %bb.1: # %entry
; NOCONDOPS-NEXT: sraw a1, a1, a2
-; NOCONDOPS-NEXT: .LBB24_2: # %entry
+; NOCONDOPS-NEXT: .LBB32_2: # %entry
; NOCONDOPS-NEXT: mv a0, a1
; NOCONDOPS-NEXT: ret
;
@@ -812,19 +1090,19 @@ entry:
define i32 @select_lshr_1(i1 zeroext %cond, i32 %a, i32 %b) {
; RV32-LABEL: select_lshr_1:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: beqz a0, .LBB26_2
+; RV32-NEXT: beqz a0, .LBB34_2
; RV32-NEXT: # %bb.1:
; RV32-NEXT: srl a2, a1, a2
-; RV32-NEXT: .LBB26_2: # %entry
+; RV32-NEXT: .LBB34_2: # %entry
; RV32-NEXT: mv a0, a2
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_lshr_1:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: beqz a0, .LBB26_2
+; NOCONDOPS-NEXT: beqz a0, .LBB34_2
; NOCONDOPS-NEXT: # %bb.1:
; NOCONDOPS-NEXT: srlw a2, a1, a2
-; NOCONDOPS-NEXT: .LBB26_2: # %entry
+; NOCONDOPS-NEXT: .LBB34_2: # %entry
; NOCONDOPS-NEXT: mv a0, a2
; NOCONDOPS-NEXT: ret
;
@@ -844,19 +1122,19 @@ entry:
define i32 @select_lshr_2(i1 zeroext %cond, i32 %a, i32 %b) {
; RV32-LABEL: select_lshr_2:
; RV32: # %bb.0: # %entry
-; RV32-NEXT: bnez a0, .LBB27_2
+; RV32-NEXT: bnez a0, .LBB35_2
; RV32-NEXT: # %bb.1: # %entry
; RV32-NEXT: srl a1, a1, a2
-; RV32-NEXT: .LBB27_2: # %entry
+; RV32-NEXT: .LBB35_2: # %entry
; RV32-NEXT: mv a0, a1
; RV32-NEXT: ret
;
; NOCONDOPS-LABEL: select_lshr_2:
; NOCONDOPS: # %bb.0: # %entry
-; NOCONDOPS-NEXT: bnez a0, .LBB27_2
+; NOCONDOPS-NEXT: bnez a0, .LBB35_2
; NOCONDOPS-NEXT: # %bb.1: # %entry
; NOCONDOPS-NEXT: srlw a1, a1, a2
-; NOCONDOPS-NEXT: .LBB27_2: # %entry
+; NOCONDOPS-NEXT: .LBB35_2: # %entry
; NOCONDOPS-NEXT: mv a0, a1
; NOCONDOPS-NEXT: ret
;
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