[PATCH] D138888: [AArch64][SVE] Replace destructive operand of vector zeros with a bundled MOVPRFX instruction

[Allen zhong via Phabricator via llvm-commits]

Allen added a comment.

In D138888#3964294 <https://reviews.llvm.org/D138888#3964294>, @paulwalker-arm wrote:

> In D138888#3959465 <https://reviews.llvm.org/D138888#3959465>, @Allen wrote:
>
>> hi @paulwalker-arm, would you please give me some suggestion, thanks
>
> I'll investigate further but this looks like an old implementation that existed before the requirement to fix D105889 <https://reviews.llvm.org/D105889>.  With D105889 <https://reviews.llvm.org/D105889> in place we should be able to handle zeroing unary operations much like the existing experimental-zeroing support (i.e. within isel by creating _ZERO pseudo instructions that get expanded later), albeit the unary variants likely don't need to be experimental because we can better control their register allocation requirements.

hi, @paulwalker-arm

  Thanks for your advice. As instriction flogb and fneg have some different form in DAG ISEL,  so I only try to enable flogb in this patch. （fneg will be transformed into FNEG_MERGE_PASSTHRU）


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