[llvm] 3f811b2 - [DAGCombine] Fix mistake in a comment. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-12-21T00:28:07-08:00
New Revision: 3f811b26efd017b43905005b3fedf0e2c9d83d6f

URL: https://github.com/llvm/llvm-project/commit/3f811b26efd017b43905005b3fedf0e2c9d83d6f
DIFF: https://github.com/llvm/llvm-project/commit/3f811b26efd017b43905005b3fedf0e2c9d83d6f.diff

LOG: [DAGCombine] Fix mistake in a comment. NFC

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 3b4cb13ff658f..390ee7eec9767 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -24705,7 +24705,7 @@ SDValue DAGCombiner::SimplifySelectCC(const SDLoc &DL, SDValue N0, SDValue N1,
   if (SDValue V = foldSelectCCToShiftAnd(DL, N0, N1, N2, N3, CC))
     return V;
 
-  // fold (select_cc seteq (and x, y), 0, 0, A) -> (and (shr (shl x)) A)
+  // fold (select_cc seteq (and x, y), 0, 0, A) -> (and (sra (shl x)) A)
   // where y is has a single bit set.
   // A plaintext description would be, we can turn the SELECT_CC into an AND
   // when the condition can be materialized as an all-ones register.  Any