[PATCH] D139706: [RISCV][VP] expand vp intrinsics if no +v feature
Yingchi Long via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 20 20:40:47 PST 2022
inclyc updated this revision to Diff 484457.
inclyc added a comment.
> Can you use vp.load and vp.store instead of using scalable vector arguments and returns?
The following code crashes after this patch applied. (Pick from our integration tests).
; ModuleID = 'LLVMDialectModule'
source_filename = "LLVMDialectModule"
@gv_i32 = private global [20 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19]
@gv_f32 = private global [20 x float] [float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00, float 9.000000e+00, float 1.000000e+01, float 1.100000e+01, float 1.200000e+01, float 1.300000e+01, float 1.400000e+01, float 1.500000e+01, float 1.600000e+01, float 1.700000e+01, float 1.800000e+01, float 1.900000e+01]
declare ptr @malloc(i64)
declare void @free(ptr)
declare void @printNewline()
declare void @printI64(i64)
define i32 @main() {
%1 = call i64 @llvm.riscv.vsetvli.i64(i64 6, i64 2, i64 1)
%2 = call i64 @llvm.riscv.vsetvli.i64(i64 8, i64 2, i64 1)
%3 = trunc i64 %2 to i32
%4 = call <vscale x 4 x i32> @llvm.riscv.vle.nxv4i32.i64(<vscale x 4 x i32> undef, ptr @gv_i32, i64 %2)
%5 = call <vscale x 4 x i32> @llvm.riscv.vle.nxv4i32.i64(<vscale x 4 x i32> undef, ptr getelementptr (i32, ptr @gv_i32, i64 10), i64 %2)
%6 = call <vscale x 4 x float> @llvm.riscv.vle.nxv4f32.i64(<vscale x 4 x float> undef, ptr @gv_f32, i64 %2)
%7 = call <vscale x 4 x float> @llvm.riscv.vle.nxv4f32.i64(<vscale x 4 x float> undef, ptr getelementptr (float, ptr @gv_f32, i64 10), i64 %2)
%8 = call <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32()
%9 = trunc i64 %1 to i32
%10 = insertelement <vscale x 4 x i32> undef, i32 %9, i32 0
%11 = shufflevector <vscale x 4 x i32> %10, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
%12 = icmp slt <vscale x 4 x i32> %8, %11
%13 = call i32 @llvm.vp.reduce.mul.nxv4i32(i32 1, <vscale x 4 x i32> %5, <vscale x 4 x i1> %12, i32 %3)
%14 = sext i32 %13 to i64
call void @printI64(i64 %14)
call void @printNewline()
ret i32 0
}
declare void @printMemrefF32(i64, ptr)
declare void @printMemrefI32(i64, ptr)
define { ptr, ptr, i64, [1 x i64], [1 x i64] } @alloc_mem_i32() {
%1 = call ptr @malloc(i64 ptrtoint (ptr getelementptr (i32, ptr null, i32 20) to i64))
%2 = insertvalue { ptr, ptr, i64, [1 x i64], [1 x i64] } undef, ptr %1, 0
%3 = insertvalue { ptr, ptr, i64, [1 x i64], [1 x i64] } %2, ptr %1, 1
%4 = insertvalue { ptr, ptr, i64, [1 x i64], [1 x i64] } %3, i64 0, 2
%5 = insertvalue { ptr, ptr, i64, [1 x i64], [1 x i64] } %4, i64 20, 3, 0
%6 = insertvalue { ptr, ptr, i64, [1 x i64], [1 x i64] } %5, i64 1, 4, 0
br label %7
7: ; preds = %10, %0
%8 = phi i64 [ %12, %10 ], [ 0, %0 ]
%9 = icmp slt i64 %8, 20
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = getelementptr i32, ptr %1, i64 %8
store i32 0, ptr %11, align 4
%12 = add i64 %8, 1
br label %7
13: ; preds = %7
ret { ptr, ptr, i64, [1 x i64], [1 x i64] } %6
}
define { ptr, ptr, i64, [1 x i64], [1 x i64] } @alloc_mem_f32() {
%1 = call ptr @malloc(i64 ptrtoint (ptr getelementptr (float, ptr null, i32 20) to i64))
%2 = insertvalue { ptr, ptr, i64, [1 x i64], [1 x i64] } undef, ptr %1, 0
%3 = insertvalue { ptr, ptr, i64, [1 x i64], [1 x i64] } %2, ptr %1, 1
%4 = insertvalue { ptr, ptr, i64, [1 x i64], [1 x i64] } %3, i64 0, 2
%5 = insertvalue { ptr, ptr, i64, [1 x i64], [1 x i64] } %4, i64 20, 3, 0
%6 = insertvalue { ptr, ptr, i64, [1 x i64], [1 x i64] } %5, i64 1, 4, 0
br label %7
7: ; preds = %10, %0
%8 = phi i64 [ %12, %10 ], [ 0, %0 ]
%9 = icmp slt i64 %8, 20
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = getelementptr float, ptr %1, i64 %8
store float 0.000000e+00, ptr %11, align 4
%12 = add i64 %8, 1
br label %7
13: ; preds = %7
ret { ptr, ptr, i64, [1 x i64], [1 x i64] } %6
}
define void @print_scalable_vector_f32(<vscale x 4 x float> %0) {
%2 = call { ptr, ptr, i64, [1 x i64], [1 x i64] } @alloc_mem_f32()
%3 = extractvalue { ptr, ptr, i64, [1 x i64], [1 x i64] } %2, 1
%4 = getelementptr float, ptr %3, i64 0
call void @llvm.riscv.vse.nxv4f32.i64(<vscale x 4 x float> %0, ptr %4, i64 8)
%5 = alloca { ptr, ptr, i64, [1 x i64], [1 x i64] }, i64 1, align 8
store { ptr, ptr, i64, [1 x i64], [1 x i64] } %2, ptr %5, align 8
%6 = insertvalue { i64, ptr } { i64 1, ptr undef }, ptr %5, 1
call void @printMemrefF32(i64 1, ptr %5)
ret void
}
define void @print_scalable_vector_i32(<vscale x 4 x i32> %0) {
%2 = call { ptr, ptr, i64, [1 x i64], [1 x i64] } @alloc_mem_i32()
%3 = extractvalue { ptr, ptr, i64, [1 x i64], [1 x i64] } %2, 1
%4 = getelementptr i32, ptr %3, i64 0
call void @llvm.riscv.vse.nxv4i32.i64(<vscale x 4 x i32> %0, ptr %4, i64 8)
%5 = alloca { ptr, ptr, i64, [1 x i64], [1 x i64] }, i64 1, align 8
store { ptr, ptr, i64, [1 x i64], [1 x i64] } %2, ptr %5, align 8
%6 = insertvalue { i64, ptr } { i64 1, ptr undef }, ptr %5, 1
call void @printMemrefI32(i64 1, ptr %5)
ret void
}
; Function Attrs: nounwind
declare i64 @llvm.riscv.vsetvli.i64(i64, i64 immarg, i64 immarg) #0
; Function Attrs: nounwind readonly
declare <vscale x 4 x i32> @llvm.riscv.vle.nxv4i32.i64(<vscale x 4 x i32>, ptr nocapture, i64) #1
; Function Attrs: nounwind readonly
declare <vscale x 4 x float> @llvm.riscv.vle.nxv4f32.i64(<vscale x 4 x float>, ptr nocapture, i64) #1
; Function Attrs: nocallback nofree nosync nounwind readnone willreturn
declare <vscale x 4 x i32> @llvm.experimental.stepvector.nxv4i32() #2
; Function Attrs: nocallback nofree nosync nounwind readnone willreturn
declare i32 @llvm.vp.reduce.mul.nxv4i32(i32, <vscale x 4 x i32>, <vscale x 4 x i1>, i32) #2
; Function Attrs: nounwind writeonly
declare void @llvm.riscv.vse.nxv4f32.i64(<vscale x 4 x float>, ptr nocapture, i64) #3
; Function Attrs: nounwind writeonly
declare void @llvm.riscv.vse.nxv4i32.i64(<vscale x 4 x i32>, ptr nocapture, i64) #3
attributes #0 = { nounwind }
attributes #1 = { nounwind readonly }
attributes #2 = { nocallback nofree nosync nounwind readnone willreturn }
attributes #3 = { nounwind writeonly }
!llvm.module.flags = !{!0}
!0 = !{i32 2, !"Debug Info Version", i32 3}
The asseertion is `isa<To>(Val) && "cast<Ty>() argument of incompatible type!"`
llc: <llvm-project>/llvm/include/llvm/Support/Casting.h:579: decltype(auto) llvm::cast(From *) [To = llvm::FixedVectorType, From = llvm::Type]: Assertion `isa<To>(Val) && "cast<Ty>() argument of incompatible type!"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0. Program arguments: build/bin/llc -mtriple=riscv32 local/buddy/reduce/mul/buddy-scalable.ll
1. Running pass 'Function Pass Manager' on module 'local/buddy/reduce/mul/buddy-scalable.ll'.
2. Running pass 'Expand reduction intrinsics' on function '@main'
#0 0x00007f699d708c7a llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) <llvm-project>/llvm/lib/Support/Unix/Signals.inc:567:11
#1 0x00007f699d708e2b PrintStackTraceSignalHandler(void*) <llvm-project>/llvm/lib/Support/Unix/Signals.inc:641:1
#2 0x00007f699d7074b6 llvm::sys::RunSignalHandlers() <llvm-project>/llvm/lib/Support/Signals.cpp:104:5
#3 0x00007f699d709515 SignalHandler(int) <llvm-project>/llvm/lib/Support/Unix/Signals.inc:412:1
#4 0x00007f699ce5f950 (/usr/lib64/libc.so.6+0x37950)
#5 0x00007f699ceab42c (/usr/lib64/libc.so.6+0x8342c)
#6 0x00007f699ce5f8b2 raise (/usr/lib64/libc.so.6+0x378b2)
#7 0x00007f699ce4a471 abort (/usr/lib64/libc.so.6+0x22471)
#8 0x00007f699ce4a395 (/usr/lib64/libc.so.6+0x22395)
#9 0x00007f699ce58b92 (/usr/lib64/libc.so.6+0x30b92)
#10 0x00007f69a0eb3bd8 decltype(auto) llvm::cast<llvm::FixedVectorType, llvm::Type>(llvm::Type*) <llvm-project>/llvm/include/llvm/Support/Casting.h:580:10
#11 0x00007f69a0ef7786 (anonymous namespace)::expandReductions(llvm::Function&, llvm::TargetTransformInfo const*) <llvm-project>/llvm/lib/CodeGen/ExpandReductions.cpp:147:15
#12 0x00007f69a0ef7a26 (anonymous namespace)::ExpandReductions::runOnFunction(llvm::Function&) <llvm-project>/llvm/lib/CodeGen/ExpandReductions.cpp:183:5
#13 0x00007f699e3795d3 llvm::FPPassManager::runOnFunction(llvm::Function&) <llvm-project>/llvm/lib/IR/LegacyPassManager.cpp:1430:23
#14 0x00007f699e37e3f2 llvm::FPPassManager::runOnModule(llvm::Module&) <llvm-project>/llvm/lib/IR/LegacyPassManager.cpp:1476:16
#15 0x00007f699e379ea9 (anonymous namespace)::MPPassManager::runOnModule(llvm::Module&) <llvm-project>/llvm/lib/IR/LegacyPassManager.cpp:1545:23
#16 0x00007f699e379a1a llvm::legacy::PassManagerImpl::run(llvm::Module&) <llvm-project>/llvm/lib/IR/LegacyPassManager.cpp:535:16
#17 0x00007f699e37e6d1 llvm::legacy::PassManager::run(llvm::Module&) <llvm-project>/llvm/lib/IR/LegacyPassManager.cpp:1672:3
#18 0x000055be7108591a compileModule(char**, llvm::LLVMContext&) <llvm-project>/llvm/tools/llc/llc.cpp:739:41
#19 0x000055be71083d1d main <llvm-project>/llvm/tools/llc/llc.cpp:420:13
#20 0x00007f699ce4b34a (/usr/lib64/libc.so.6+0x2334a)
#21 0x00007f699ce4b3fc __libc_start_main (/usr/lib64/libc.so.6+0x233fc)
#22 0x000055be71083501 _start (build/bin/llc+0x28501)
zsh: IOT instruction (core dumped) build/bin/llc -mtriple=riscv32 local/buddy/reduce/mul/buddy-scalable.ll
> This line exceeds 80 characters
added \n
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139706/new/
https://reviews.llvm.org/D139706
Files:
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
llvm/test/CodeGen/RISCV/rvv/expand-no-stdv.ll
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