[PATCH] D140370: [VP][RISCV] Add vp.ctlz/cttz and RISC-V support.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/docs/LangRef.rst:22326
+
+      %t = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %a)
+      %also.r = select <4 x i1> %mask, <4 x i32> %t, <4 x i32> poison
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llvm.cttz has 2 arguments. The second is an i1 the indicates the behavior for 0. Do we need that for vectors?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140370/new/

https://reviews.llvm.org/D140370