[PATCH] D137517: [TargetParser] Generate the defs for RISCV CPUs using llvm-tblgen.

[Francesco Petrogalli via Phabricator via llvm-commits]

fpetrogalli updated this revision to Diff 484391.
fpetrogalli added a comment.

@pcwang-thead, I addressed some of your comments.

The value of `EnumFeatures` is now computed dynamicaly from the
`Features` field of the `Processor` class.

As for generating `MArch` out of the `Features` field, @craig.topper
pointed me at
https://github.com/riscv-non-isa/riscv-toolchain-conventions/issues/11. From
the reading of it, it seems that the alphabetical order is enough to
build the string that carries `MArch`. Am I missing something?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137517/new/

https://reviews.llvm.org/D137517

Files:
  clang/lib/Basic/CMakeLists.txt
  clang/lib/Basic/Targets/RISCV.cpp
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/Arch/RISCV.cpp
  llvm/include/llvm/TargetParser/RISCVTargetParser.def
  llvm/include/llvm/TargetParser/RISCVTargetParser.h
  llvm/include/llvm/TargetParser/TargetParser.h
  llvm/include/llvm/module.modulemap
  llvm/lib/Target/AArch64/AsmParser/CMakeLists.txt
  llvm/lib/Target/RISCV/CMakeLists.txt
  llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/TargetParser/CMakeLists.txt
  llvm/lib/TargetParser/RISCVTargetParser.cpp
  llvm/lib/TargetParser/TargetParser.cpp
  llvm/unittests/Target/AMDGPU/CMakeLists.txt
  llvm/utils/TableGen/CMakeLists.txt
  llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
  llvm/utils/TableGen/TableGen.cpp
  llvm/utils/TableGen/TableGenBackends.h

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