[PATCH] D140408: [RISCV] Implement isMultiStoresCheaperThanBitsMerge hook

[Alex Bradbury via Phabricator via llvm-commits]

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Grabs the same logic and reasoning from the X86 implementation of the hook. The benefit is slightly less clear for when the soft float ABI is used (i.e. there's no transfer from an FPR to a GPR), but I've opted not to gate it based on ABI - feedback welcome.

I've got no reason to believe this is a particularly meaningful optimisation (i.e. I spotted the hook and figured the X86 logic applied to RISC-V rather than seeing this issue in real code), but it still seems marginally better for these test cases.


https://reviews.llvm.org/D140408

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/test/CodeGen/RISCV/split-store.ll

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