[llvm] 306adcc - [RISCV] Reduce duplicated code in RISCVMergeBaseOffsetOpt::detectFoldable. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 20 07:17:09 PST 2022
Author: Craig Topper
Date: 2022-12-20T07:16:43-08:00
New Revision: 306adcc852c343fb01ab4189330f597ce90a1912
URL: https://github.com/llvm/llvm-project/commit/306adcc852c343fb01ab4189330f597ce90a1912
DIFF: https://github.com/llvm/llvm-project/commit/306adcc852c343fb01ab4189330f597ce90a1912.diff
LOG: [RISCV] Reduce duplicated code in RISCVMergeBaseOffsetOpt::detectFoldable. NFC
The LUI and AUIPC share quite a few similarities. This refactors the code
to share what we can.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D140345
Added:
Modified:
llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp b/llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
index 1436d3c681e1..bd1074da70b5 100644
--- a/llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
+++ b/llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
@@ -88,41 +88,48 @@ INITIALIZE_PASS(RISCVMergeBaseOffsetOpt, DEBUG_TYPE,
// 3) The offset value in the Global Address or Constant Pool is 0.
bool RISCVMergeBaseOffsetOpt::detectFoldable(MachineInstr &Hi,
MachineInstr *&Lo) {
+ if (Hi.getOpcode() != RISCV::LUI && Hi.getOpcode() != RISCV::AUIPC)
+ return false;
+
+ const MachineOperand &HiOp1 = Hi.getOperand(1);
+ unsigned ExpectedFlags =
+ Hi.getOpcode() == RISCV::AUIPC ? RISCVII::MO_PCREL_HI : RISCVII::MO_HI;
+ if (HiOp1.getTargetFlags() != ExpectedFlags)
+ return false;
+
+ if (!(HiOp1.isGlobal() || HiOp1.isCPI()) || HiOp1.getOffset() != 0)
+ return false;
+
+ Register HiDestReg = Hi.getOperand(0).getReg();
+ if (!MRI->hasOneUse(HiDestReg))
+ return false;
+
+ Lo = &*MRI->use_instr_begin(HiDestReg);
+ if (Lo->getOpcode() != RISCV::ADDI)
+ return false;
+
+ const MachineOperand &LoOp2 = Lo->getOperand(2);
if (Hi.getOpcode() == RISCV::LUI) {
- Register HiDestReg = Hi.getOperand(0).getReg();
- const MachineOperand &HiOp1 = Hi.getOperand(1);
- if (HiOp1.getTargetFlags() != RISCVII::MO_HI ||
- !(HiOp1.isGlobal() || HiOp1.isCPI()) || HiOp1.getOffset() != 0 ||
- !MRI->hasOneUse(HiDestReg))
- return false;
- Lo = &*MRI->use_instr_begin(HiDestReg);
- if (Lo->getOpcode() != RISCV::ADDI)
- return false;
- const MachineOperand &LoOp2 = Lo->getOperand(2);
if (LoOp2.getTargetFlags() != RISCVII::MO_LO ||
!(LoOp2.isGlobal() || LoOp2.isCPI()) || LoOp2.getOffset() != 0)
return false;
- return true;
- }
-
- if (Hi.getOpcode() == RISCV::AUIPC) {
- Register HiDestReg = Hi.getOperand(0).getReg();
- const MachineOperand &HiOp1 = Hi.getOperand(1);
- if (HiOp1.getTargetFlags() != RISCVII::MO_PCREL_HI ||
- !(HiOp1.isGlobal() || HiOp1.isCPI()) || HiOp1.getOffset() != 0 ||
- !MRI->hasOneUse(HiDestReg))
- return false;
- Lo = &*MRI->use_instr_begin(HiDestReg);
- if (Lo->getOpcode() != RISCV::ADDI)
- return false;
- const MachineOperand &LoOp2 = Lo->getOperand(2);
+ } else {
+ assert(Hi.getOpcode() == RISCV::AUIPC);
if (LoOp2.getTargetFlags() != RISCVII::MO_PCREL_LO ||
LoOp2.getType() != MachineOperand::MO_MCSymbol)
return false;
- return true;
}
- return false;
+ if (HiOp1.isGlobal()) {
+ LLVM_DEBUG(dbgs() << " Found lowered global address: "
+ << *HiOp1.getGlobal() << "\n");
+ } else {
+ assert(HiOp1.isCPI());
+ LLVM_DEBUG(dbgs() << " Found lowered constant pool: " << HiOp1.getIndex()
+ << "\n");
+ }
+
+ return true;
}
// Update the offset in Hi and Lo instructions.
@@ -434,14 +441,6 @@ bool RISCVMergeBaseOffsetOpt::runOnMachineFunction(MachineFunction &Fn) {
MachineInstr *Lo = nullptr;
if (!detectFoldable(Hi, Lo))
continue;
- if (Hi.getOperand(1).isGlobal()) {
- LLVM_DEBUG(dbgs() << " Found lowered global address: "
- << *Hi.getOperand(1).getGlobal() << "\n");
- } else {
- assert(Hi.getOperand(1).isCPI());
- LLVM_DEBUG(dbgs() << " Found lowered constant pool: "
- << Hi.getOperand(1).getIndex() << "\n");
- }
MadeChange |= detectAndFoldOffset(Hi, *Lo);
MadeChange |= foldIntoMemoryOps(Hi, *Lo);
}
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