[PATCH] D137954: Enable roundeven.

[Leon Clark via Phabricator via llvm-commits]

Leonc added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2262-2268
+    return AMDGPUSubtarget::Generation(0u);
+  }();
+
+  if (VT == MVT::f64 && Gen < AMDGPUSubtarget::SEA_ISLANDS)
+    return LowerFRINT(Op, DAG);
+
+  return DAG.getNode(ISD::FRINT, SL, VT, Arg);
----------------
arsenm wrote:
> Leonc wrote:
> > arsenm wrote:
> > > Leonc wrote:
> > > > arsenm wrote:
> > > > > You don't need a generation check here, you can just lower to whatever opcode you choose to consolidate on and let the handling of that one take care of the subtarget specific legality considerations which should already work
> > > > `LowerFRINT` handles lowering when `f64` isn't supported. Based on GlobalISel's implementation that's any generation before gfx7.
> > > You do not need to directly call LowerFRINT. You can just unconditionally produce the frint, and let that be legalized. What you have here is repeating the legality condition in a second place
> > I tried that and it crashed.
> Define "crashed". Something else is wrong, you can rely on re-legalization of new nodes
I didn't save the log unfortunately. I'll see if I can reproduce it.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137954/new/

https://reviews.llvm.org/D137954