[PATCH] D140364: [llvm][SelectionDAGISel] support -{start|stop}-{before|after}= for remaining targets
Alex Bradbury via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 20 01:44:08 PST 2022
asb accepted this revision.
asb added a comment.
This revision is now accepted and ready to land.
LGTM - thanks for tackling this one!
The reordering of `class Foo` lines could have perhaps been done in a separate NFC commit, but it's not worth the hassle of splitting out at this point.
I note that `git clang-format` has a couple of suggestions (at least the NVTPX one matches the style of the surrounding lines, things are more inconsistent in HexagonTargetMachine.cpp):
$ git clang-format --diff
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 637d13221cca..b3865e861f2a 100644
--- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -42,7 +42,6 @@ using namespace llvm;
#define DEBUG_TYPE "arm-isel"
#define PASS_NAME "ARM Instruction Selection"
-
static cl::opt<bool>
DisableShifterOp("disable-shifter-op", cl::Hidden,
cl::desc("Disable isel of shifter-op"),
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
index e5e0d517e69f..e275110bd7e6 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -155,7 +155,7 @@ namespace llvm {
void initializeHexagonPacketizerPass(PassRegistry&);
void initializeHexagonRDFOptPass(PassRegistry&);
void initializeHexagonSplitDoubleRegsPass(PassRegistry&);
- void initializeHexagonVExtractPass(PassRegistry&);
+ void initializeHexagonVExtractPass(PassRegistry &);
void initializeHexagonVectorCombineLegacyPass(PassRegistry&);
void initializeHexagonVectorLoopCarriedReuseLegacyPassPass(PassRegistry &);
Pass *createHexagonLoopIdiomPass();
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
index e51432b3f325..8cc0bccda8d9 100644
--- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
@@ -71,8 +71,8 @@ void initializeNVPTXLowerAggrCopiesPass(PassRegistry &);
void initializeNVPTXLowerAllocaPass(PassRegistry &);
void initializeNVPTXLowerArgsPass(PassRegistry &);
void initializeNVPTXProxyRegErasurePass(PassRegistry &);
-void initializeNVVMIntrRangePass(PassRegistry&);
-void initializeNVVMReflectPass(PassRegistry&);
+void initializeNVVMIntrRangePass(PassRegistry &);
+void initializeNVVMReflectPass(PassRegistry &);
} // end namespace llvm
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https://reviews.llvm.org/D140364/new/
https://reviews.llvm.org/D140364
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