[PATCH] D139616: [TableGen] Emit table mapping physical registers to base classes

Carl Ritson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 19 22:46:39 PST 2022


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGd393d0d24239: [TableGen] Emit table mapping physical registers to base classes (authored by critson).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139616/new/

https://reviews.llvm.org/D139616

Files:
  llvm/include/llvm/CodeGen/TargetRegisterInfo.h
  llvm/include/llvm/Target/Target.td
  llvm/test/TableGen/RegisterInfoEmitter-BaseClassOrder.td
  llvm/utils/TableGen/CodeGenRegisters.h
  llvm/utils/TableGen/RegisterInfoEmitter.cpp

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