[PATCH] D140347: TargetLowering: Teach DemandedBits about VSCALE

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/vscale-demanded-bits.ll:1
+; RUN: llc -mtriple riscv64 -mattr +v -filetype asm -o - %s | FileCheck %s
+
----------------



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Comment at: llvm/test/CodeGen/RISCV/vscale-demanded-bits.ll:3
+
+; CHECK: vse8.v v8, (a5), v0.t
+; CHECK: vadd.vx v8, v8, a3
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Use UTC, really


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Comment at: llvm/test/CodeGen/RISCV/vscale-demanded-bits.ll:5-7
+
+target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
+
----------------



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Comment at: llvm/test/CodeGen/RISCV/vscale-demanded-bits.ll:8
+
+define dso_local void @_Z4FillPhi(ptr nocapture noundef writeonly %buffer, i32 noundef signext %n) local_unnamed_addr {
+entry:
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I tend to prefer tests that don't have mangled C++ names in them


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140347/new/

https://reviews.llvm.org/D140347