[PATCH] D140319: [RISCV] Match neg (and x, 1) to two shifts to improve codesize

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

No RV32 test coverage?



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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:1246
+def : Pat<(XLenVT (sub 0, (and_oneuse GPR:$rs, 1))),
+          (SRAI (SLLI $rs, (ImmSubFromXLen (XLenVT 1))), (ImmSubFromXLen (XLenVT 1)))>;
+}
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Wrap this for 80 columns


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140319/new/

https://reviews.llvm.org/D140319