[PATCH] D140323: [llvm][X86ISelDAGToDAG] support -{start|stop}-{before|after}=x86-isel
Nick Desaulniers via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 19 10:50:57 PST 2022
nickdesaulniers created this revision.
nickdesaulniers added reviewers: pengfei, craig.topper, arsenm, aeubanks.
Herald added subscribers: kosarev, StephenFan, hiraditya, tpr.
Herald added a project: All.
nickdesaulniers requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.
Follow a similar pattern as AMDGPUDAGToDAGISel's constructor so that we
can use INITIALIZE_PASS to register a pass. This allows for more fine
grain testability of SelectionDAGISel.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D140323
Files:
llvm/include/llvm/InitializePasses.h
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/lib/Target/X86/X86TargetMachine.cpp
Index: llvm/lib/Target/X86/X86TargetMachine.cpp
===================================================================
--- llvm/lib/Target/X86/X86TargetMachine.cpp
+++ llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -102,6 +102,7 @@
initializeX86PartialReductionPass(PR);
initializePseudoProbeInserterPass(PR);
initializeX86ReturnThunksPass(PR);
+ initializeX86DAGToDAGISelPass(PR);
}
static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -26,6 +26,7 @@
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsX86.h"
#include "llvm/IR/Type.h"
+#include "llvm/InitializePasses.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/KnownBits.h"
@@ -35,6 +36,7 @@
using namespace llvm;
#define DEBUG_TYPE "x86-isel"
+#define PASS_NAME "X86 DAG->DAG Instruction Selection"
STATISTIC(NumLoadMoved, "Number of loads moved below TokenFactor");
@@ -170,13 +172,12 @@
public:
static char ID;
- explicit X86DAGToDAGISel(X86TargetMachine &tm, CodeGenOpt::Level OptLevel)
- : SelectionDAGISel(ID, tm, OptLevel), Subtarget(nullptr),
+ explicit X86DAGToDAGISel(X86TargetMachine *tm = nullptr,
+ CodeGenOpt::Level OptLevel = CodeGenOpt::Default)
+ : SelectionDAGISel(ID, *tm, OptLevel), Subtarget(nullptr),
OptForMinSize(false), IndirectTlsSegRefs(false) {}
- StringRef getPassName() const override {
- return "X86 DAG->DAG Instruction Selection";
- }
+ StringRef getPassName() const override { return PASS_NAME; }
bool runOnMachineFunction(MachineFunction &MF) override {
// Reset the subtarget each time through.
@@ -578,6 +579,8 @@
char X86DAGToDAGISel::ID = 0;
+INITIALIZE_PASS(X86DAGToDAGISel, DEBUG_TYPE, PASS_NAME, false, false)
+
// Returns true if this masked compare can be implemented legally with this
// type.
static bool isLegalMaskCompare(SDNode *N, const X86Subtarget *Subtarget) {
@@ -6199,5 +6202,5 @@
/// ready for instruction scheduling.
FunctionPass *llvm::createX86ISelDag(X86TargetMachine &TM,
CodeGenOpt::Level OptLevel) {
- return new X86DAGToDAGISel(TM, OptLevel);
+ return new X86DAGToDAGISel(&TM, OptLevel);
}
Index: llvm/include/llvm/InitializePasses.h
===================================================================
--- llvm/include/llvm/InitializePasses.h
+++ llvm/include/llvm/InitializePasses.h
@@ -418,6 +418,7 @@
void initializeWasmEHPreparePass(PassRegistry&);
void initializeWinEHPreparePass(PassRegistry&);
void initializeWriteBitcodePassPass(PassRegistry&);
+void initializeX86DAGToDAGISelPass(PassRegistry &);
void initializeXRayInstrumentationPass(PassRegistry&);
} // end namespace llvm
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