[llvm] e5abaf8 - [X86] Fix SLM uops counts for WriteBitTestSetRegRMW instructions
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 19 10:21:43 PST 2022
Author: Simon Pilgrim
Date: 2022-12-19T18:21:31Z
New Revision: e5abaf8decf26c0b07340e819b75070d24986fd1
URL: https://github.com/llvm/llvm-project/commit/e5abaf8decf26c0b07340e819b75070d24986fd1
DIFF: https://github.com/llvm/llvm-project/commit/e5abaf8decf26c0b07340e819b75070d24986fd1.diff
LOG: [X86] Fix SLM uops counts for WriteBitTestSetRegRMW instructions
The set/reset/complement RMW variants use +1uop compared to the BT read-only instructions
Based off llvm-exegesis captures, confirmed with Agner + uops.info
Added:
Modified:
llvm/lib/Target/X86/X86ScheduleSLM.td
llvm/test/tools/llvm-mca/X86/SLM/resources-x86_64.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ScheduleSLM.td b/llvm/lib/Target/X86/X86ScheduleSLM.td
index c0b0cc8e64d1a..ea6f74e304ccb 100644
--- a/llvm/lib/Target/X86/X86ScheduleSLM.td
+++ b/llvm/lib/Target/X86/X86ScheduleSLM.td
@@ -147,7 +147,7 @@ defm : X86WriteRes<WriteBitTestImmLd, [SLM_IEC_RSV0, SLM_IEC_RSV1, SLM_MEC_RS
defm : X86WriteRes<WriteBitTestRegLd, [SLM_IEC_RSV0, SLM_IEC_RSV1, SLM_MEC_RSV], 4, [1,1,1], 7>;
defm : X86WriteRes<WriteBitTestSet, [SLM_IEC_RSV0, SLM_IEC_RSV1], 1, [1,1], 1>;
defm : X86WriteRes<WriteBitTestSetImmLd, [SLM_IEC_RSV0, SLM_IEC_RSV1, SLM_MEC_RSV], 3, [1,1,1], 1>;
-defm : X86WriteRes<WriteBitTestSetRegLd, [SLM_IEC_RSV0, SLM_IEC_RSV1, SLM_MEC_RSV], 3, [1,1,1], 7>;
+defm : X86WriteRes<WriteBitTestSetRegLd, [SLM_IEC_RSV0, SLM_IEC_RSV1, SLM_MEC_RSV], 3, [1,1,1], 8>;
// This is for simple LEAs with one or two input operands.
// The complex ones can only execute on port 1, and they require two cycles on
diff --git a/llvm/test/tools/llvm-mca/X86/SLM/resources-x86_64.s b/llvm/test/tools/llvm-mca/X86/SLM/resources-x86_64.s
index e1cc5bb3b169e..7b27f1b1da2bb 100644
--- a/llvm/test/tools/llvm-mca/X86/SLM/resources-x86_64.s
+++ b/llvm/test/tools/llvm-mca/X86/SLM/resources-x86_64.s
@@ -1192,12 +1192,12 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 1 1.00 btrw %si, %di
# CHECK-NEXT: 1 1 1.00 btsw %si, %di
# CHECK-NEXT: 7 4 1.00 * btw %si, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * btcw %si, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * btrw %si, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * btsw %si, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * lock btcw %si, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * lock btrw %si, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * lock btsw %si, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * btcw %si, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * btrw %si, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * btsw %si, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * lock btcw %si, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * lock btrw %si, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * lock btsw %si, (%rax)
# CHECK-NEXT: 1 1 1.00 btw $7, %di
# CHECK-NEXT: 1 1 1.00 btcw $7, %di
# CHECK-NEXT: 1 1 1.00 btrw $7, %di
@@ -1214,12 +1214,12 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 1 1.00 btrl %esi, %edi
# CHECK-NEXT: 1 1 1.00 btsl %esi, %edi
# CHECK-NEXT: 7 4 1.00 * btl %esi, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * btcl %esi, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * btrl %esi, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * btsl %esi, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * lock btcl %esi, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * lock btrl %esi, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * lock btsl %esi, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * btcl %esi, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * btrl %esi, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * btsl %esi, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * lock btcl %esi, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * lock btrl %esi, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * lock btsl %esi, (%rax)
# CHECK-NEXT: 1 1 1.00 btl $7, %edi
# CHECK-NEXT: 1 1 1.00 btcl $7, %edi
# CHECK-NEXT: 1 1 1.00 btrl $7, %edi
@@ -1236,12 +1236,12 @@ xorq (%rax), %rdi
# CHECK-NEXT: 1 1 1.00 btrq %rsi, %rdi
# CHECK-NEXT: 1 1 1.00 btsq %rsi, %rdi
# CHECK-NEXT: 7 4 1.00 * btq %rsi, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * btcq %rsi, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * btrq %rsi, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * btsq %rsi, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * lock btcq %rsi, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * lock btrq %rsi, (%rax)
-# CHECK-NEXT: 7 4 2.00 * * lock btsq %rsi, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * btcq %rsi, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * btrq %rsi, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * btsq %rsi, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * lock btcq %rsi, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * lock btrq %rsi, (%rax)
+# CHECK-NEXT: 8 4 2.00 * * lock btsq %rsi, (%rax)
# CHECK-NEXT: 1 1 1.00 btq $7, %rdi
# CHECK-NEXT: 1 1 1.00 btcq $7, %rdi
# CHECK-NEXT: 1 1 1.00 btrq $7, %rdi
More information about the llvm-commits
mailing list