[llvm] e544f8b - [XCore] Convert some tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 19 04:12:56 PST 2022
Author: Nikita Popov
Date: 2022-12-19T13:12:27+01:00
New Revision: e544f8b3f69eec8ec42cdb6fc5a8a191d1b4be9a
URL: https://github.com/llvm/llvm-project/commit/e544f8b3f69eec8ec42cdb6fc5a8a191d1b4be9a
DIFF: https://github.com/llvm/llvm-project/commit/e544f8b3f69eec8ec42cdb6fc5a8a191d1b4be9a.diff
LOG: [XCore] Convert some tests to opaque pointers (NFC)
Added:
Modified:
llvm/test/CodeGen/XCore/2009-01-08-Crash.ll
llvm/test/CodeGen/XCore/2009-07-15-store192.ll
llvm/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll
llvm/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll
llvm/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll
llvm/test/CodeGen/XCore/aliases.ll
llvm/test/CodeGen/XCore/atomic.ll
llvm/test/CodeGen/XCore/byVal.ll
llvm/test/CodeGen/XCore/call.ll
llvm/test/CodeGen/XCore/codemodel.ll
llvm/test/CodeGen/XCore/dwarf_debug.ll
llvm/test/CodeGen/XCore/epilogue_prologue.ll
llvm/test/CodeGen/XCore/events.ll
llvm/test/CodeGen/XCore/exception.ll
llvm/test/CodeGen/XCore/globals.ll
llvm/test/CodeGen/XCore/indirectbr.ll
llvm/test/CodeGen/XCore/inline-asm.ll
llvm/test/CodeGen/XCore/inlineasm-output-template.ll
llvm/test/CodeGen/XCore/licm-ldwcp.ll
llvm/test/CodeGen/XCore/linkage.ll
llvm/test/CodeGen/XCore/llvm-intrinsics.ll
llvm/test/CodeGen/XCore/load.ll
llvm/test/CodeGen/XCore/memcpy.ll
llvm/test/CodeGen/XCore/offset_folding.ll
llvm/test/CodeGen/XCore/private.ll
llvm/test/CodeGen/XCore/resources.ll
llvm/test/CodeGen/XCore/resources_combine.ll
llvm/test/CodeGen/XCore/scavenging.ll
llvm/test/CodeGen/XCore/store.ll
llvm/test/CodeGen/XCore/tls.ll
llvm/test/CodeGen/XCore/trampoline.ll
llvm/test/CodeGen/XCore/unaligned_load.ll
llvm/test/CodeGen/XCore/unaligned_store.ll
llvm/test/CodeGen/XCore/unaligned_store_combine.ll
llvm/test/CodeGen/XCore/varargs.ll
llvm/test/CodeGen/XCore/zextfree.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/XCore/2009-01-08-Crash.ll b/llvm/test/CodeGen/XCore/2009-01-08-Crash.ll
index 5eddbc33761ca..e81dbd8d373c7 100644
--- a/llvm/test/CodeGen/XCore/2009-01-08-Crash.ll
+++ b/llvm/test/CodeGen/XCore/2009-01-08-Crash.ll
@@ -6,7 +6,7 @@
define i32 @test(i32 %bar) nounwind readnone {
entry:
%bar_addr = alloca i32
- %0 = getelementptr i32, i32* %bar_addr, i32 -1
- %1 = load i32, i32* %0, align 4
+ %0 = getelementptr i32, ptr %bar_addr, i32 -1
+ %1 = load i32, ptr %0, align 4
ret i32 %1
}
diff --git a/llvm/test/CodeGen/XCore/2009-07-15-store192.ll b/llvm/test/CodeGen/XCore/2009-07-15-store192.ll
index 5278af8ac229c..d3a346e8ef6c4 100644
--- a/llvm/test/CodeGen/XCore/2009-07-15-store192.ll
+++ b/llvm/test/CodeGen/XCore/2009-07-15-store192.ll
@@ -1,7 +1,6 @@
; RUN: llc < %s -march=xcore > %t1.s
-define void @store32(i8* %p) nounwind {
+define void @store32(ptr %p) nounwind {
entry:
- %0 = bitcast i8* %p to i192*
- store i192 0, i192* %0, align 4
+ store i192 0, ptr %p, align 4
ret void
}
diff --git a/llvm/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll b/llvm/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll
index 693e6f0f136bd..ea67d2ea234e9 100644
--- a/llvm/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll
+++ b/llvm/test/CodeGen/XCore/2010-02-25-LSR-Crash.ll
@@ -4,23 +4,22 @@ target triple = "xcore-xmos-elf"
%0 = type { i32 }
%struct.dwarf_fde = type <{ i32, i32, [0 x i8] }>
-%struct.object = type { i8*, i8*, i8*, %union.anon, %0, %struct.object* }
-%union.anon = type { %struct.dwarf_fde* }
+%struct.object = type { ptr, ptr, ptr, %union.anon, %0, ptr }
+%union.anon = type { ptr }
-define %struct.dwarf_fde* @search_object(%struct.object* %ob, i8* %pc) {
+define ptr @search_object(ptr %ob, ptr %pc) {
entry:
br i1 undef, label %bb3.i15.i.i, label %bb2
bb3.i15.i.i: ; preds = %bb3.i15.i.i, %entry
%indvar.i.i.i = phi i32 [ %indvar.next.i.i.i, %bb3.i15.i.i ], [ 0, %entry ] ; <i32> [#uses=2]
%tmp137 = sub i32 0, %indvar.i.i.i ; <i32> [#uses=1]
- %scevgep13.i.i.i = getelementptr i32, i32* undef, i32 %tmp137 ; <i32*> [#uses=2]
- %scevgep1314.i.i.i = bitcast i32* %scevgep13.i.i.i to %struct.dwarf_fde** ; <%struct.dwarf_fde**> [#uses=1]
- %0 = load %struct.dwarf_fde*, %struct.dwarf_fde** %scevgep1314.i.i.i, align 4 ; <%struct.dwarf_fde*> [#uses=0]
- store i32 undef, i32* %scevgep13.i.i.i
+ %scevgep13.i.i.i = getelementptr i32, ptr undef, i32 %tmp137 ; <ptr> [#uses=2]
+ %0 = load ptr, ptr %scevgep13.i.i.i, align 4 ; <ptr> [#uses=0]
+ store i32 undef, ptr %scevgep13.i.i.i
%indvar.next.i.i.i = add i32 %indvar.i.i.i, 1 ; <i32> [#uses=1]
br label %bb3.i15.i.i
bb2: ; preds = %entry
- ret %struct.dwarf_fde* undef
+ ret ptr undef
}
diff --git a/llvm/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll b/llvm/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll
index 40c9654371fda..57a3ed7c7e3b5 100644
--- a/llvm/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll
+++ b/llvm/test/CodeGen/XCore/2011-01-31-DAGCombineBug.ll
@@ -5,6 +5,6 @@
define i32 @test_entry() nounwind {
entry:
- %0 = load i32, i32* getelementptr inbounds (%struct.st, %struct.st* @x, i32 0, i32 3), align 2
+ %0 = load i32, ptr getelementptr inbounds (%struct.st, ptr @x, i32 0, i32 3), align 2
ret i32 %0
}
diff --git a/llvm/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll b/llvm/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll
index 2a049639ce7e9..73ac3773eacfe 100644
--- a/llvm/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll
+++ b/llvm/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll
@@ -1,16 +1,16 @@
; RUN: llc < %s -march=xcore | FileCheck %s
declare void @g()
-declare i8* @llvm.stacksave() nounwind
-declare void @llvm.stackrestore(i8*) nounwind
+declare ptr @llvm.stacksave() nounwind
+declare void @llvm.stackrestore(ptr) nounwind
-define void @f(i32** %p, i32 %size) {
+define void @f(ptr %p, i32 %size) {
allocas:
- %0 = call i8* @llvm.stacksave()
+ %0 = call ptr @llvm.stacksave()
%a = alloca i32, i32 %size
- store i32* %a, i32** %p
+ store ptr %a, ptr %p
call void @g()
- call void @llvm.stackrestore(i8* %0)
+ call void @llvm.stackrestore(ptr %0)
ret void
}
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/XCore/aliases.ll b/llvm/test/CodeGen/XCore/aliases.ll
index 62427dad9b7ce..445fbdc0579c3 100644
--- a/llvm/test/CodeGen/XCore/aliases.ll
+++ b/llvm/test/CodeGen/XCore/aliases.ll
@@ -5,30 +5,30 @@ define void @a_val() nounwind {
@b_val = constant i32 42, section ".cp.rodata"
@c_val = global i32 42
- at a = alias void (), void ()* @a_val
- at b = alias i32, i32* @b_val
- at c = alias i32, i32* @c_val
+ at a = alias void (), ptr @a_val
+ at b = alias i32, ptr @b_val
+ at c = alias i32, ptr @c_val
; CHECK-LABEL: a_addr:
; CHECK: ldap r11, a
; CHECK: retsp
-define void ()* @a_addr() nounwind {
+define ptr @a_addr() nounwind {
entry:
- ret void ()* @a
+ ret ptr @a
}
; CHECK-LABEL: b_addr:
; CHECK: ldaw r11, cp[b]
; CHECK: retsp
-define i32 *@b_addr() nounwind {
+define ptr @b_addr() nounwind {
entry:
- ret i32* @b
+ ret ptr @b
}
; CHECK-LABEL: c_addr:
; CHECK: ldaw r0, dp[c]
; CHECK: retsp
-define i32 *@c_addr() nounwind {
+define ptr @c_addr() nounwind {
entry:
- ret i32* @c
+ ret ptr @c
}
diff --git a/llvm/test/CodeGen/XCore/atomic.ll b/llvm/test/CodeGen/XCore/atomic.ll
index 13579dbd8197d..02cef0722fc01 100644
--- a/llvm/test/CodeGen/XCore/atomic.ll
+++ b/llvm/test/CodeGen/XCore/atomic.ll
@@ -25,54 +25,54 @@ entry:
; CHECK-NEXT: ldaw r[[R1:[0-9]+]], dp[pool]
; CHECK-NEXT: #MEMBARRIER
; CHECK-NEXT: ldc r[[R2:[0-9]+]], 0
- %0 = load atomic i32, i32* bitcast (i64* @pool to i32*) acquire, align 4
+ %0 = load atomic i32, ptr @pool acquire, align 4
; CHECK-NEXT: ld16s r3, r[[R1]][r[[R2]]]
; CHECK-NEXT: #MEMBARRIER
- %1 = load atomic i16, i16* bitcast (i64* @pool to i16*) acquire, align 2
+ %1 = load atomic i16, ptr @pool acquire, align 2
; CHECK-NEXT: ld8u r11, r[[R1]][r[[R2]]]
; CHECK-NEXT: #MEMBARRIER
- %2 = load atomic i8, i8* bitcast (i64* @pool to i8*) acquire, align 1
+ %2 = load atomic i8, ptr @pool acquire, align 1
; CHECK-NEXT: ldw r4, dp[pool]
; CHECK-NEXT: #MEMBARRIER
- %3 = load atomic i32, i32* bitcast (i64* @pool to i32*) seq_cst, align 4
+ %3 = load atomic i32, ptr @pool seq_cst, align 4
; CHECK-NEXT: ld16s r5, r[[R1]][r[[R2]]]
; CHECK-NEXT: #MEMBARRIER
- %4 = load atomic i16, i16* bitcast (i64* @pool to i16*) seq_cst, align 2
+ %4 = load atomic i16, ptr @pool seq_cst, align 2
; CHECK-NEXT: ld8u r6, r[[R1]][r[[R2]]]
; CHECK-NEXT: #MEMBARRIER
- %5 = load atomic i8, i8* bitcast (i64* @pool to i8*) seq_cst, align 1
+ %5 = load atomic i8, ptr @pool seq_cst, align 1
; CHECK-NEXT: #MEMBARRIER
; CHECK-NEXT: stw r[[R0]], dp[pool]
- store atomic i32 %0, i32* bitcast (i64* @pool to i32*) release, align 4
+ store atomic i32 %0, ptr @pool release, align 4
; CHECK-NEXT: #MEMBARRIER
; CHECK-NEXT: st16 r3, r[[R1]][r[[R2]]]
- store atomic i16 %1, i16* bitcast (i64* @pool to i16*) release, align 2
+ store atomic i16 %1, ptr @pool release, align 2
; CHECK-NEXT: #MEMBARRIER
; CHECK-NEXT: st8 r11, r[[R1]][r[[R2]]]
- store atomic i8 %2, i8* bitcast (i64* @pool to i8*) release, align 1
+ store atomic i8 %2, ptr @pool release, align 1
; CHECK-NEXT: #MEMBARRIER
; CHECK-NEXT: stw r4, dp[pool]
; CHECK-NEXT: #MEMBARRIER
- store atomic i32 %3, i32* bitcast (i64* @pool to i32*) seq_cst, align 4
+ store atomic i32 %3, ptr @pool seq_cst, align 4
; CHECK-NEXT: #MEMBARRIER
; CHECK-NEXT: st16 r5, r[[R1]][r[[R2]]]
; CHECK-NEXT: #MEMBARRIER
- store atomic i16 %4, i16* bitcast (i64* @pool to i16*) seq_cst, align 2
+ store atomic i16 %4, ptr @pool seq_cst, align 2
; CHECK-NEXT: #MEMBARRIER
; CHECK-NEXT: st8 r6, r[[R1]][r[[R2]]]
; CHECK-NEXT: #MEMBARRIER
- store atomic i8 %5, i8* bitcast (i64* @pool to i8*) seq_cst, align 1
+ store atomic i8 %5, ptr @pool seq_cst, align 1
; CHECK-NEXT: ldw r[[R0]], dp[pool]
; CHECK-NEXT: stw r[[R0]], dp[pool]
@@ -80,12 +80,12 @@ entry:
; CHECK-NEXT: st16 r[[R0]], r[[R1]][r[[R2]]]
; CHECK-NEXT: ld8u r[[R0]], r[[R1]][r[[R2]]]
; CHECK-NEXT: st8 r[[R0]], r[[R1]][r[[R2]]]
- %6 = load atomic i32, i32* bitcast (i64* @pool to i32*) monotonic, align 4
- store atomic i32 %6, i32* bitcast (i64* @pool to i32*) monotonic, align 4
- %7 = load atomic i16, i16* bitcast (i64* @pool to i16*) monotonic, align 2
- store atomic i16 %7, i16* bitcast (i64* @pool to i16*) monotonic, align 2
- %8 = load atomic i8, i8* bitcast (i64* @pool to i8*) monotonic, align 1
- store atomic i8 %8, i8* bitcast (i64* @pool to i8*) monotonic, align 1
+ %6 = load atomic i32, ptr @pool monotonic, align 4
+ store atomic i32 %6, ptr @pool monotonic, align 4
+ %7 = load atomic i16, ptr @pool monotonic, align 2
+ store atomic i16 %7, ptr @pool monotonic, align 2
+ %8 = load atomic i8, ptr @pool monotonic, align 1
+ store atomic i8 %8, ptr @pool monotonic, align 1
ret void
}
diff --git a/llvm/test/CodeGen/XCore/byVal.ll b/llvm/test/CodeGen/XCore/byVal.ll
index 71182f359f881..f0bf78bd4027a 100644
--- a/llvm/test/CodeGen/XCore/byVal.ll
+++ b/llvm/test/CodeGen/XCore/byVal.ll
@@ -5,10 +5,10 @@
; CHECK: bl f0
; CHECK: retsp 1
%struct.st0 = type { [0 x i32] }
-declare void @f0(%struct.st0*) nounwind
-define void @f0Test(%struct.st0* byval(%struct.st0) %s0) nounwind {
+declare void @f0(ptr) nounwind
+define void @f0Test(ptr byval(%struct.st0) %s0) nounwind {
entry:
- call void @f0(%struct.st0* %s0) nounwind
+ call void @f0(ptr %s0) nounwind
ret void
}
@@ -28,10 +28,10 @@ entry:
; CHECK: ldw r4, sp[12]
; CHECK: retsp 13
%struct.st1 = type { [10 x i32] }
-declare void @f1(%struct.st1*) nounwind
-define i32 @f1Test(i32 %i, %struct.st1* byval(%struct.st1) %s1) nounwind {
+declare void @f1(ptr) nounwind
+define i32 @f1Test(i32 %i, ptr byval(%struct.st1) %s1) nounwind {
entry:
- call void @f1(%struct.st1* %s1) nounwind
+ call void @f1(ptr %s1) nounwind
ret i32 %i
}
@@ -50,10 +50,10 @@ entry:
; CHECK: ldaw sp, sp[4]
; CHECK: retsp 0
%struct.st2 = type { i32 }
-declare void @f2(i32, %struct.st2*) nounwind
-define void @f2Test(%struct.st2* byval(%struct.st2) %s2, i32 %i, ...) nounwind {
+declare void @f2(i32, ptr) nounwind
+define void @f2Test(ptr byval(%struct.st2) %s2, i32 %i, ...) nounwind {
entry:
- call void @f2(i32 %i, %struct.st2* %s2)
+ call void @f2(i32 %i, ptr %s2)
ret void
}
@@ -65,9 +65,9 @@ entry:
; CHECK: st8 r2, r0[r1]
; CHECK: bl f
; CHECK: retsp 2
-declare void @f3(i8*) nounwind
-define void @f3Test(i8* byval(i8) %v) nounwind {
+declare void @f3(ptr) nounwind
+define void @f3Test(ptr byval(i8) %v) nounwind {
entry:
- call void @f3(i8* %v) nounwind
+ call void @f3(ptr %v) nounwind
ret void
}
diff --git a/llvm/test/CodeGen/XCore/call.ll b/llvm/test/CodeGen/XCore/call.ll
index 06a12f1444054..6bf763b53ca1f 100644
--- a/llvm/test/CodeGen/XCore/call.ll
+++ b/llvm/test/CodeGen/XCore/call.ll
@@ -5,6 +5,6 @@
; CHECK: bla [[R0]]
define void @bl_imm() nounwind {
entry:
- tail call void inttoptr (i64 65536 to void ()*)() nounwind
+ tail call void inttoptr (i64 65536 to ptr)() nounwind
ret void
}
diff --git a/llvm/test/CodeGen/XCore/codemodel.ll b/llvm/test/CodeGen/XCore/codemodel.ll
index 7e9e1f4bf0228..ff58dca6c00a9 100644
--- a/llvm/test/CodeGen/XCore/codemodel.ll
+++ b/llvm/test/CodeGen/XCore/codemodel.ll
@@ -30,10 +30,10 @@
; LARGE: retsp 0
@A1 = external dso_local global [50000 x i32]
@A2 = external dso_local global [50000 x i32]
-define [50000 x i32]* @test(i1 %bool) nounwind {
+define ptr @test(i1 %bool) nounwind {
entry:
- %Addr = select i1 %bool, [50000 x i32]* @A1, [50000 x i32]* @A2
- ret [50000 x i32]* %Addr
+ %Addr = select i1 %bool, ptr @A1, ptr @A2
+ ret ptr %Addr
}
@@ -95,24 +95,24 @@ entry:
; LARGE: ldw r1, dp[s+36]
; LARGE: add r0, r0, r1
; LARGE: retsp 0
-define dso_local i32 @f(i32* %i) {
+define dso_local i32 @f(ptr %i) {
entry:
- %0 = getelementptr inbounds i32, i32* %i, i32 16383
- %1 = load i32, i32* %0
- %2 = getelementptr inbounds i32, i32* %i, i32 16384
- %3 = load i32, i32* %2
+ %0 = getelementptr inbounds i32, ptr %i, i32 16383
+ %1 = load i32, ptr %0
+ %2 = getelementptr inbounds i32, ptr %i, i32 16384
+ %3 = load i32, ptr %2
%4 = add nsw i32 %1, %3
- %5 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 0)
+ %5 = load i32, ptr @l
%6 = add nsw i32 %4, %5
- %7 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 1)
+ %7 = load i32, ptr getelementptr inbounds ([100 x i32], ptr @l, i32 0, i32 1)
%8 = add nsw i32 %6, %7
- %9 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 98)
+ %9 = load i32, ptr getelementptr inbounds ([100 x i32], ptr @l, i32 0, i32 98)
%10 = add nsw i32 %8, %9
- %11 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 99)
+ %11 = load i32, ptr getelementptr inbounds ([100 x i32], ptr @l, i32 0, i32 99)
%12 = add nsw i32 %10, %11
- %13 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @s, i32 0, i32 0)
+ %13 = load i32, ptr @s
%14 = add nsw i32 %12, %13
- %15 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @s, i32 0, i32 9)
+ %15 = load i32, ptr getelementptr inbounds ([10 x i32], ptr @s, i32 0, i32 9)
%16 = add nsw i32 %14, %15
ret i32 %16
}
@@ -133,7 +133,7 @@ entry:
@NoSize = external dso_local global [0 x i32]
define dso_local i32 @UnknownSize() nounwind {
entry:
- %0 = load i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @NoSize, i32 0, i32 10)
+ %0 = load i32, ptr getelementptr inbounds ([0 x i32], ptr @NoSize, i32 0, i32 10)
ret i32 %0
}
@@ -151,9 +151,9 @@ entry:
; LARGE-NEXT: retsp 0
%Struct = type opaque
@Unknown = external dso_local global %Struct
-define %Struct* @UnknownStruct() nounwind {
+define ptr @UnknownStruct() nounwind {
entry:
- ret %Struct* @Unknown
+ ret ptr @Unknown
}
diff --git a/llvm/test/CodeGen/XCore/dwarf_debug.ll b/llvm/test/CodeGen/XCore/dwarf_debug.ll
index e0a75d25373d5..43851130c08f4 100644
--- a/llvm/test/CodeGen/XCore/dwarf_debug.ll
+++ b/llvm/test/CodeGen/XCore/dwarf_debug.ll
@@ -12,9 +12,9 @@
define i32 @f(i32 %a) !dbg !4 {
entry:
%a.addr = alloca i32, align 4
- store i32 %a, i32* %a.addr, align 4
- call void @llvm.dbg.declare(metadata i32* %a.addr, metadata !11, metadata !DIExpression()), !dbg !12
- %0 = load i32, i32* %a.addr, align 4, !dbg !12
+ store i32 %a, ptr %a.addr, align 4
+ call void @llvm.dbg.declare(metadata ptr %a.addr, metadata !11, metadata !DIExpression()), !dbg !12
+ %0 = load i32, ptr %a.addr, align 4, !dbg !12
%add = add nsw i32 %0, 1, !dbg !12
ret i32 %add, !dbg !12
}
diff --git a/llvm/test/CodeGen/XCore/epilogue_prologue.ll b/llvm/test/CodeGen/XCore/epilogue_prologue.ll
index c4a9add9da0b6..7b38cb8d622e7 100644
--- a/llvm/test/CodeGen/XCore/epilogue_prologue.ll
+++ b/llvm/test/CodeGen/XCore/epilogue_prologue.ll
@@ -173,14 +173,13 @@ entry:
; CHECK-NEXT: ldaw sp, sp[65535]
; CHECK-NEXT: ldaw sp, sp[65535]
; CHECK-NEXT: retsp 3399
-declare void @f5(i32*)
+declare void @f5(ptr)
define i32 @f6(i32 %i) {
entry:
%0 = alloca [200000 x i32]
- %1 = getelementptr inbounds [200000 x i32], [200000 x i32]* %0, i32 0, i32 0
- call void @f5(i32* %1)
- %2 = getelementptr inbounds [200000 x i32], [200000 x i32]* %0, i32 0, i32 199999
- call void @f5(i32* %2)
+ call void @f5(ptr %0)
+ %1 = getelementptr inbounds [200000 x i32], ptr %0, i32 0, i32 199999
+ call void @f5(ptr %1)
ret i32 %i
}
@@ -207,8 +206,8 @@ entry:
define void @f8() nounwind {
entry:
%0 = alloca [256 x i32]
- %1 = getelementptr inbounds [256 x i32], [256 x i32]* %0, i32 0, i32 253
- call void @f5(i32* %1)
+ %1 = getelementptr inbounds [256 x i32], ptr %0, i32 0, i32 253
+ call void @f5(ptr %1)
ret void
}
@@ -235,7 +234,7 @@ entry:
define void @f9() nounwind {
entry:
%0 = alloca [32768 x i32]
- %1 = getelementptr inbounds [32768 x i32], [32768 x i32]* %0, i32 0, i32 32765
- call void @f5(i32* %1)
+ %1 = getelementptr inbounds [32768 x i32], ptr %0, i32 0, i32 32765
+ call void @f5(ptr %1)
ret void
}
diff --git a/llvm/test/CodeGen/XCore/events.ll b/llvm/test/CodeGen/XCore/events.ll
index 672669be5602a..97491b798e835 100644
--- a/llvm/test/CodeGen/XCore/events.ll
+++ b/llvm/test/CodeGen/XCore/events.ll
@@ -1,20 +1,20 @@
; RUN: llc < %s -march=xcore | FileCheck %s
-declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
-declare i8* @llvm.xcore.waitevent()
-declare i8* @llvm.xcore.checkevent(i8*)
+declare void @llvm.xcore.setv.p1(ptr addrspace(1) %r, ptr %p)
+declare ptr @llvm.xcore.waitevent()
+declare ptr @llvm.xcore.checkevent(ptr)
declare void @llvm.xcore.clre()
-define i32 @f(i8 addrspace(1)* %r) nounwind {
+define i32 @f(ptr addrspace(1) %r) nounwind {
; CHECK-LABEL: f:
entry:
; CHECK: clre
call void @llvm.xcore.clre()
- call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L1))
- call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L2))
- %goto_addr = call i8* @llvm.xcore.waitevent()
+ call void @llvm.xcore.setv.p1(ptr addrspace(1) %r, ptr blockaddress(@f, %L1))
+ call void @llvm.xcore.setv.p1(ptr addrspace(1) %r, ptr blockaddress(@f, %L2))
+ %goto_addr = call ptr @llvm.xcore.waitevent()
; CHECK: waiteu
- indirectbr i8* %goto_addr, [label %L1, label %L2]
+ indirectbr ptr %goto_addr, [label %L1, label %L2]
L1:
br label %ret
L2:
@@ -24,16 +24,16 @@ ret:
ret i32 %retval
}
-define i32 @g(i8 addrspace(1)* %r) nounwind {
+define i32 @g(ptr addrspace(1) %r) nounwind {
; CHECK-LABEL: g:
entry:
; CHECK: clre
call void @llvm.xcore.clre()
- call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L1))
- %goto_addr = call i8* @llvm.xcore.checkevent(i8 *blockaddress(@f, %L2))
+ call void @llvm.xcore.setv.p1(ptr addrspace(1) %r, ptr blockaddress(@f, %L1))
+ %goto_addr = call ptr @llvm.xcore.checkevent(ptr blockaddress(@f, %L2))
; CHECK: setsr 1
; CHECK: clrsr 1
- indirectbr i8* %goto_addr, [label %L1, label %L2]
+ indirectbr ptr %goto_addr, [label %L1, label %L2]
L1:
br label %ret
L2:
diff --git a/llvm/test/CodeGen/XCore/exception.ll b/llvm/test/CodeGen/XCore/exception.ll
index 48845a5471ecc..725c17eca6a9d 100644
--- a/llvm/test/CodeGen/XCore/exception.ll
+++ b/llvm/test/CodeGen/XCore/exception.ll
@@ -2,14 +2,14 @@
declare void @g()
declare i32 @__gxx_personality_v0(...)
-declare i32 @llvm.eh.typeid.for(i8*) nounwind readnone
-declare i8* @__cxa_begin_catch(i8*)
+declare i32 @llvm.eh.typeid.for(ptr) nounwind readnone
+declare ptr @__cxa_begin_catch(ptr)
declare void @__cxa_end_catch()
-declare i8* @__cxa_allocate_exception(i32)
-declare void @__cxa_throw(i8*, i8*, i8*)
+declare ptr @__cxa_allocate_exception(i32)
+declare void @__cxa_throw(ptr, ptr, ptr)
- at _ZTIi = external constant i8*
- at _ZTId = external constant i8*
+ at _ZTIi = external constant ptr
+ at _ZTId = external constant ptr
; CHECK-LABEL: fn_typeid:
; CHECK: .cfi_startproc
@@ -18,7 +18,7 @@ declare void @__cxa_throw(i8*, i8*, i8*)
; CHECK: .cfi_endproc
define i32 @fn_typeid() {
entry:
- %0 = call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*)) nounwind
+ %0 = call i32 @llvm.eh.typeid.for(ptr @_ZTIi) nounwind
ret i32 %0
}
@@ -34,8 +34,8 @@ entry:
; CHECK: bl __cxa_throw
define void @fn_throw() {
entry:
- %0 = call i8* @__cxa_allocate_exception(i32 4) nounwind
- call void @__cxa_throw(i8* %0, i8* bitcast (i8** @_ZTIi to i8*), i8* null) noreturn
+ %0 = call ptr @__cxa_allocate_exception(i32 4) nounwind
+ call void @__cxa_throw(ptr %0, ptr @_ZTIi, ptr null) noreturn
unreachable
}
@@ -47,7 +47,7 @@ entry:
; CHECK: entsp 4
; CHECK: .cfi_def_cfa_offset 16
; CHECK: .cfi_offset 15, 0
-define void @fn_catch() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
+define void @fn_catch() personality ptr @__gxx_personality_v0 {
entry:
; N.B. we alloc no variables, hence force compiler to spill
@@ -77,15 +77,14 @@ cont:
; CHECK: ldw r6, r0[0]
; CHECK: bl __cxa_end_catch
lpad:
- %0 = landingpad { i8*, i32 }
+ %0 = landingpad { ptr, i32 }
cleanup
- catch i8* bitcast (i8** @_ZTIi to i8*)
- catch i8* bitcast (i8** @_ZTId to i8*)
- %1 = extractvalue { i8*, i32 } %0, 0
- %2 = extractvalue { i8*, i32 } %0, 1
- %3 = call i8* @__cxa_begin_catch(i8* %1) nounwind
- %4 = bitcast i8* %3 to i32*
- %5 = load i32, i32* %4
+ catch ptr @_ZTIi
+ catch ptr @_ZTId
+ %1 = extractvalue { ptr, i32 } %0, 0
+ %2 = extractvalue { ptr, i32 } %0, 1
+ %3 = call ptr @__cxa_begin_catch(ptr %1) nounwind
+ %4 = load i32, ptr %3
call void @__cxa_end_catch() nounwind
; CHECK: eq r0, r6, r5
@@ -94,10 +93,10 @@ lpad:
; CHECK: bl _Unwind_Resume
; CHECK: [[END:.L[a-zA-Z0-9_]+]]
; CHECK: .cfi_endproc
- %6 = icmp eq i32 %5, %2
- br i1 %6, label %Resume, label %Exit
+ %5 = icmp eq i32 %4, %2
+ br i1 %5, label %Resume, label %Exit
Resume:
- resume { i8*, i32 } %0
+ resume { ptr, i32 } %0
Exit:
ret void
}
diff --git a/llvm/test/CodeGen/XCore/globals.ll b/llvm/test/CodeGen/XCore/globals.ll
index 5d626f9cbbdc5..d3b64d2640002 100644
--- a/llvm/test/CodeGen/XCore/globals.ll
+++ b/llvm/test/CodeGen/XCore/globals.ll
@@ -1,84 +1,84 @@
; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
; RUN: llc -march=xcore -mcpu=xs1b-generic -filetype=null %s
-define i32 *@addr_G1() {
+define ptr @addr_G1() {
entry:
; CHECK-LABEL: addr_G1:
; CHECK: ldaw r0, dp[G1]
- ret i32* @G1
+ ret ptr @G1
}
-define i32 *@addr_G2() {
+define ptr @addr_G2() {
entry:
; CHECK-LABEL: addr_G2:
; CHECK: ldaw r0, dp[G2]
- ret i32* @G2
+ ret ptr @G2
}
-define i32 *@addr_G3() {
+define ptr @addr_G3() {
entry:
; CHECK-LABEL: addr_G3:
; CHECK: ldaw r0, dp[G3]
- ret i32* @G3
+ ret ptr @G3
}
-define i32 *@addr_iG3() {
+define ptr @addr_iG3() {
entry:
; CHECK-LABEL: addr_iG3:
; CHECK: ldaw r11, cp[iG3]
; CHECK: mov r0, r11
- ret i32* @iG3
+ ret ptr @iG3
}
-define i32 **@addr_G4() {
+define ptr @addr_G4() {
entry:
; CHECK-LABEL: addr_G4:
; CHECK: ldaw r0, dp[G4]
- ret i32** @G4
+ ret ptr @G4
}
-define i32 **@addr_G5() {
+define ptr @addr_G5() {
entry:
; CHECK-LABEL: addr_G5:
; CHECK: ldaw r0, dp[G5]
- ret i32** @G5
+ ret ptr @G5
}
-define i32 **@addr_iG5() {
+define ptr @addr_iG5() {
entry:
; CHECK-LABEL: addr_iG5:
; CHECK: ldaw r11, cp[iG5]
; CHECK: mov r0, r11
- ret i32** @iG5
+ ret ptr @iG5
}
-define i32 **@addr_G6() {
+define ptr @addr_G6() {
entry:
; CHECK-LABEL: addr_G6:
; CHECK: ldaw r0, dp[G6]
- ret i32** @G6
+ ret ptr @G6
}
-define i32 **@addr_G7() {
+define ptr @addr_G7() {
entry:
; CHECK-LABEL: addr_G7:
; CHECK: ldaw r0, dp[G7]
- ret i32** @G7
+ ret ptr @G7
}
-define i32 **@addr_iG7() {
+define ptr @addr_iG7() {
entry:
; CHECK-LABEL: addr_iG7:
; CHECK: ldaw r11, cp[iG7]
; CHECK: mov r0, r11
- ret i32** @iG7
+ ret ptr @iG7
}
-define i32 *@addr_G8() {
+define ptr @addr_G8() {
entry:
; CHECK-LABEL: addr_G8:
; CHECK: ldaw r0, dp[G8]
- ret i32* @G8
+ ret ptr @G8
}
@G1 = global i32 4712
@@ -97,27 +97,27 @@ entry:
; CHECK: .section .cp.rodata,"ac", at progbits
; CHECK: iG3:
- at G4 = global i32* @G1
+ at G4 = global ptr @G1
; CHECK: .section .dp.data,"awd", at progbits
; CHECK: G4:
- at G5 = unnamed_addr constant i32* @G1
+ at G5 = unnamed_addr constant ptr @G1
; CHECK: .section .dp.rodata,"awd", at progbits
; CHECK: G5:
- at iG5 = internal unnamed_addr constant i32* @G1
+ at iG5 = internal unnamed_addr constant ptr @G1
; CHECK: .section .cp.rodata,"ac", at progbits
; CHECK: iG5:
- at G6 = global i32* @G8
+ at G6 = global ptr @G8
; CHECK: .section .dp.data,"awd", at progbits
; CHECK: G6:
- at G7 = unnamed_addr constant i32* @G8
+ at G7 = unnamed_addr constant ptr @G8
; CHECK: .section .dp.rodata,"awd", at progbits
; CHECK: G7:
- at iG7 = internal unnamed_addr constant i32* @G8
+ at iG7 = internal unnamed_addr constant ptr @G8
; CHECK: .section .cp.rodata,"ac", at progbits
; CHECK: iG7:
diff --git a/llvm/test/CodeGen/XCore/indirectbr.ll b/llvm/test/CodeGen/XCore/indirectbr.ll
index 9723cdcbdf14c..a5280cac3ca5d 100644
--- a/llvm/test/CodeGen/XCore/indirectbr.ll
+++ b/llvm/test/CodeGen/XCore/indirectbr.ll
@@ -1,23 +1,23 @@
; RUN: llc < %s -march=xcore | FileCheck %s
- at nextaddr = global i8* null ; <i8**> [#uses=2]
- at C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
+ at nextaddr = global ptr null ; <ptr> [#uses=2]
+ at C.0.2070 = private constant [5 x ptr] [ptr blockaddress(@foo, %L1), ptr blockaddress(@foo, %L2), ptr blockaddress(@foo, %L3), ptr blockaddress(@foo, %L4), ptr blockaddress(@foo, %L5)] ; <ptr> [#uses=1]
define internal i32 @foo(i32 %i) nounwind {
; CHECK-LABEL: foo:
entry:
- %0 = load i8*, i8** @nextaddr, align 4 ; <i8*> [#uses=2]
- %1 = icmp eq i8* %0, null ; <i1> [#uses=1]
+ %0 = load ptr, ptr @nextaddr, align 4 ; <ptr> [#uses=2]
+ %1 = icmp eq ptr %0, null ; <i1> [#uses=1]
br i1 %1, label %bb3, label %bb2
bb2: ; preds = %entry, %bb3
- %gotovar.4.0 = phi i8* [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <i8*> [#uses=1]
+ %gotovar.4.0 = phi ptr [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <ptr> [#uses=1]
; CHECK: bau
- indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
+ indirectbr ptr %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
bb3: ; preds = %entry
- %2 = getelementptr inbounds [5 x i8*], [5 x i8*]* @C.0.2070, i32 0, i32 %i ; <i8**> [#uses=1]
- %gotovar.4.0.pre = load i8*, i8** %2, align 4 ; <i8*> [#uses=1]
+ %2 = getelementptr inbounds [5 x ptr], ptr @C.0.2070, i32 0, i32 %i ; <ptr> [#uses=1]
+ %gotovar.4.0.pre = load ptr, ptr %2, align 4 ; <ptr> [#uses=1]
br label %bb2
L5: ; preds = %bb2
@@ -40,6 +40,6 @@ L1: ; preds = %L2, %bb2
%res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ] ; <i32> [#uses=1]
; CHECK: ldap r11, .Ltmp0
; CHECK: stw r11, dp[nextaddr]
- store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
+ store ptr blockaddress(@foo, %L5), ptr @nextaddr, align 4
ret i32 %res.3
}
diff --git a/llvm/test/CodeGen/XCore/inline-asm.ll b/llvm/test/CodeGen/XCore/inline-asm.ll
index fceb9aba9c372..76adcadf271d0 100644
--- a/llvm/test/CodeGen/XCore/inline-asm.ll
+++ b/llvm/test/CodeGen/XCore/inline-asm.ll
@@ -39,7 +39,7 @@ entry:
; CHECK: retsp 0
define i32 @f5() nounwind {
entry:
- %asmtmp = call i32 asm "ldw $0, $1", "=r,*m"(i32* elementtype(i32) @x) nounwind
+ %asmtmp = call i32 asm "ldw $0, $1", "=r,*m"(ptr elementtype(i32) @x) nounwind
ret i32 %asmtmp
}
@@ -48,6 +48,6 @@ entry:
; CHECK: retsp 0
define i32 @f6() nounwind {
entry:
- %asmtmp = call i32 asm "ldw $0, $1", "=r,*m"(i32* elementtype(i32) @y) nounwind
+ %asmtmp = call i32 asm "ldw $0, $1", "=r,*m"(ptr elementtype(i32) @y) nounwind
ret i32 %asmtmp
}
diff --git a/llvm/test/CodeGen/XCore/inlineasm-output-template.ll b/llvm/test/CodeGen/XCore/inlineasm-output-template.ll
index f7e73efae0906..12960c5b20df3 100644
--- a/llvm/test/CodeGen/XCore/inlineasm-output-template.ll
+++ b/llvm/test/CodeGen/XCore/inlineasm-output-template.ll
@@ -13,7 +13,7 @@ define dso_local i32 @test_inlineasm_c_output_template0() {
; CHECK: #TEST baz
@baz = internal global i32 0, align 4
define dso_local i32 @test_inlineasm_c_output_template2() {
- tail call void asm sideeffect "#TEST ${0:c}", "i"(i32* nonnull @baz)
+ tail call void asm sideeffect "#TEST ${0:c}", "i"(ptr nonnull @baz)
ret i32 42
}
diff --git a/llvm/test/CodeGen/XCore/licm-ldwcp.ll b/llvm/test/CodeGen/XCore/licm-ldwcp.ll
index f98c0eb56276b..9ba5c46d7c13f 100644
--- a/llvm/test/CodeGen/XCore/licm-ldwcp.ll
+++ b/llvm/test/CodeGen/XCore/licm-ldwcp.ll
@@ -8,11 +8,11 @@
; CHECK-NEXT: stw [[REG]], r0[0]
; CHECK-NEXT: bu .LBB0_1
-define void @f(i32* nocapture %p) noreturn nounwind {
+define void @f(ptr nocapture %p) noreturn nounwind {
entry:
br label %bb
bb: ; preds = %bb, %entry
- store volatile i32 525509670, i32* %p, align 4
+ store volatile i32 525509670, ptr %p, align 4
br label %bb
}
diff --git a/llvm/test/CodeGen/XCore/linkage.ll b/llvm/test/CodeGen/XCore/linkage.ll
index 863ffd3c50815..c2000229be295 100644
--- a/llvm/test/CodeGen/XCore/linkage.ll
+++ b/llvm/test/CodeGen/XCore/linkage.ll
@@ -2,7 +2,7 @@
; CHECK: .weak fd
define weak void @fd() {
- call void @fr(i32* @gd, i32* @gr)
+ call void @fr(ptr @gd, ptr @gr)
ret void
}
@@ -43,7 +43,7 @@ define protected void @test_protected() {
; CHECK-NOT: .hidden test_hidden_declaration
; CHECK: .weak fr
-declare extern_weak void @fr(i32*, i32*)
+declare extern_weak void @fr(ptr, ptr)
; CHECK: .weak gr
@gr = extern_weak global i32
diff --git a/llvm/test/CodeGen/XCore/llvm-intrinsics.ll b/llvm/test/CodeGen/XCore/llvm-intrinsics.ll
index cad565661141a..feb33988d49aa 100644
--- a/llvm/test/CodeGen/XCore/llvm-intrinsics.ll
+++ b/llvm/test/CodeGen/XCore/llvm-intrinsics.ll
@@ -1,67 +1,67 @@
; RUN: llc < %s -march=xcore | FileCheck %s
; RUN: llc < %s -march=xcore -frame-pointer=all | FileCheck %s -check-prefix=CHECKFP
-declare i8* @llvm.frameaddress(i32) nounwind readnone
-declare i8* @llvm.returnaddress(i32) nounwind
-declare i8* @llvm.eh.dwarf.cfa(i32) nounwind
-declare void @llvm.eh.return.i32(i32, i8*) nounwind
+declare ptr @llvm.frameaddress(i32) nounwind readnone
+declare ptr @llvm.returnaddress(i32) nounwind
+declare ptr @llvm.eh.dwarf.cfa(i32) nounwind
+declare void @llvm.eh.return.i32(i32, ptr) nounwind
declare void @llvm.eh.unwind.init() nounwind
-define i8* @FA0() nounwind {
+define ptr @FA0() nounwind {
entry:
; CHECK-LABEL: FA0
; CHECK: ldaw r0, sp[0]
; CHECK-NEXT: retsp 0
- %0 = call i8* @llvm.frameaddress(i32 0)
- ret i8* %0
+ %0 = call ptr @llvm.frameaddress(i32 0)
+ ret ptr %0
}
-define i8* @FA1() nounwind {
+define ptr @FA1() nounwind {
entry:
; CHECK-LABEL: FA1
; CHECK: entsp 100
; CHECK-NEXT: ldaw r0, sp[0]
; CHECK-NEXT: retsp 100
%0 = alloca [100 x i32]
- %1 = call i8* @llvm.frameaddress(i32 0)
- ret i8* %1
+ %1 = call ptr @llvm.frameaddress(i32 0)
+ ret ptr %1
}
-define i8* @RA0() nounwind {
+define ptr @RA0() nounwind {
entry:
; CHECK-LABEL: RA0
; CHECK: stw lr, sp[0]
; CHECK-NEXT: ldw r0, sp[0]
; CHECK-NEXT: ldw lr, sp[0]
; CHECK-NEXT: retsp 0
- %0 = call i8* @llvm.returnaddress(i32 0)
- ret i8* %0
+ %0 = call ptr @llvm.returnaddress(i32 0)
+ ret ptr %0
}
-define i8* @RA1() nounwind {
+define ptr @RA1() nounwind {
entry:
; CHECK-LABEL: RA1
; CHECK: entsp 100
; CHECK-NEXT: ldw r0, sp[100]
; CHECK-NEXT: retsp 100
%0 = alloca [100 x i32]
- %1 = call i8* @llvm.returnaddress(i32 0)
- ret i8* %1
+ %1 = call ptr @llvm.returnaddress(i32 0)
+ ret ptr %1
}
; test FRAME_TO_ARGS_OFFSET lowering
-define i8* @FTAO0() nounwind {
+define ptr @FTAO0() nounwind {
entry:
; CHECK-LABEL: FTAO0
; CHECK: ldc r0, 0
; CHECK-NEXT: ldaw r1, sp[0]
; CHECK-NEXT: add r0, r1, r0
; CHECK-NEXT: retsp 0
- %0 = call i8* @llvm.eh.dwarf.cfa(i32 0)
- ret i8* %0
+ %0 = call ptr @llvm.eh.dwarf.cfa(i32 0)
+ ret ptr %0
}
-define i8* @FTAO1() nounwind {
+define ptr @FTAO1() nounwind {
entry:
; CHECK-LABEL: FTAO1
; CHECK: entsp 100
@@ -70,11 +70,11 @@ entry:
; CHECK-NEXT: add r0, r1, r0
; CHECK-NEXT: retsp 100
%0 = alloca [100 x i32]
- %1 = call i8* @llvm.eh.dwarf.cfa(i32 0)
- ret i8* %1
+ %1 = call ptr @llvm.eh.dwarf.cfa(i32 0)
+ ret ptr %1
}
-define i8* @EH0(i32 %offset, i8* %handler) {
+define ptr @EH0(i32 %offset, ptr %handler) {
entry:
; CHECK-LABEL: EH0
; CHECK: entsp 2
@@ -91,12 +91,12 @@ entry:
; CHECK-NEXT: ldw r0, sp[1]
; CHECK-NEXT: set sp, r2
; CHECK-NEXT: bau r3
- call void @llvm.eh.return.i32(i32 %offset, i8* %handler)
+ call void @llvm.eh.return.i32(i32 %offset, ptr %handler)
unreachable
}
declare void @foo(...)
-define i8* @EH1(i32 %offset, i8* %handler) {
+define ptr @EH1(i32 %offset, ptr %handler) {
entry:
; CHECK-LABEL: EH1
; CHECK: entsp 5
@@ -123,13 +123,13 @@ entry:
; CHECK-NEXT: set sp, r2
; CHECK-NEXT: bau r3
call void (...) @foo()
- call void @llvm.eh.return.i32(i32 %offset, i8* %handler)
+ call void @llvm.eh.return.i32(i32 %offset, ptr %handler)
unreachable
}
@offset = external constant i32
@handler = external constant i8
-define i8* @EH2(i32 %r0, i32 %r1, i32 %r2, i32 %r3) {
+define ptr @EH2(i32 %r0, i32 %r1, i32 %r2, i32 %r3) {
entry:
; CHECK-LABEL: EH2
; CHECK: entsp 3
@@ -145,8 +145,8 @@ entry:
; CHECK-NEXT: set sp, r2
; CHECK-NEXT: bau r3
call void (...) @foo()
- %0 = load i32, i32* @offset
- call void @llvm.eh.return.i32(i32 %0, i8* @handler)
+ %0 = load i32, ptr @offset
+ call void @llvm.eh.return.i32(i32 %0, ptr @handler)
unreachable
}
@@ -349,12 +349,12 @@ define void @Unwind1() {
; CHECK-NEXT: ldw r0, sp[1]
; CHECK-NEXT: set sp, r2
; CHECK-NEXT: bau r3
-define void @UnwindEH(i32 %offset, i8* %handler) {
+define void @UnwindEH(i32 %offset, ptr %handler) {
call void @llvm.eh.unwind.init()
%cmp = icmp eq i32 %offset, 0
br i1 %cmp, label %normal, label %eh
eh:
- call void @llvm.eh.return.i32(i32 %offset, i8* %handler)
+ call void @llvm.eh.return.i32(i32 %offset, ptr %handler)
unreachable
normal:
ret void
diff --git a/llvm/test/CodeGen/XCore/load.ll b/llvm/test/CodeGen/XCore/load.ll
index bba7f72301f91..7b6993de82cd1 100644
--- a/llvm/test/CodeGen/XCore/load.ll
+++ b/llvm/test/CodeGen/XCore/load.ll
@@ -1,41 +1,41 @@
; RUN: llc < %s -march=xcore | FileCheck %s
-define i32 @load32(i32* %p, i32 %offset) nounwind {
+define i32 @load32(ptr %p, i32 %offset) nounwind {
entry:
; CHECK-LABEL: load32:
; CHECK: ldw r0, r0[r1]
- %0 = getelementptr i32, i32* %p, i32 %offset
- %1 = load i32, i32* %0, align 4
+ %0 = getelementptr i32, ptr %p, i32 %offset
+ %1 = load i32, ptr %0, align 4
ret i32 %1
}
-define i32 @load32_imm(i32* %p) nounwind {
+define i32 @load32_imm(ptr %p) nounwind {
entry:
; CHECK-LABEL: load32_imm:
; CHECK: ldw r0, r0[11]
- %0 = getelementptr i32, i32* %p, i32 11
- %1 = load i32, i32* %0, align 4
+ %0 = getelementptr i32, ptr %p, i32 11
+ %1 = load i32, ptr %0, align 4
ret i32 %1
}
-define i32 @load16(i16* %p, i32 %offset) nounwind {
+define i32 @load16(ptr %p, i32 %offset) nounwind {
entry:
; CHECK-LABEL: load16:
; CHECK: ld16s r0, r0[r1]
; CHECK-NOT: sext
- %0 = getelementptr i16, i16* %p, i32 %offset
- %1 = load i16, i16* %0, align 2
+ %0 = getelementptr i16, ptr %p, i32 %offset
+ %1 = load i16, ptr %0, align 2
%2 = sext i16 %1 to i32
ret i32 %2
}
-define i32 @load8(i8* %p, i32 %offset) nounwind {
+define i32 @load8(ptr %p, i32 %offset) nounwind {
entry:
; CHECK-LABEL: load8:
; CHECK: ld8u r0, r0[r1]
; CHECK-NOT: zext
- %0 = getelementptr i8, i8* %p, i32 %offset
- %1 = load i8, i8* %0, align 1
+ %0 = getelementptr i8, ptr %p, i32 %offset
+ %1 = load i8, ptr %0, align 1
%2 = zext i8 %1 to i32
ret i32 %2
}
@@ -45,6 +45,6 @@ define i32 @load_cp() nounwind {
entry:
; CHECK-LABEL: load_cp:
; CHECK: ldw r0, cp[GConst]
- %0 = load i32, i32* @GConst
+ %0 = load i32, ptr @GConst
ret i32 %0
}
diff --git a/llvm/test/CodeGen/XCore/memcpy.ll b/llvm/test/CodeGen/XCore/memcpy.ll
index c747374ed51a4..404c7c513015a 100644
--- a/llvm/test/CodeGen/XCore/memcpy.ll
+++ b/llvm/test/CodeGen/XCore/memcpy.ll
@@ -1,32 +1,32 @@
; RUN: llc < %s -march=xcore | FileCheck %s
; Optimize memcpy to __memcpy_4 if src, dst and size are all 4 byte aligned.
-define void @f1(i8* %dst, i8* %src, i32 %n) nounwind {
+define void @f1(ptr %dst, ptr %src, i32 %n) nounwind {
; CHECK-LABEL: f1:
; CHECK: bl __memcpy_4
entry:
%0 = shl i32 %n, 2
- call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dst, i8* align 4 %src, i32 %0, i1 false)
+ call void @llvm.memcpy.p0.p0.i32(ptr align 4 %dst, ptr align 4 %src, i32 %0, i1 false)
ret void
}
; Can't optimize - size is not a multiple of 4.
-define void @f2(i8* %dst, i8* %src, i32 %n) nounwind {
+define void @f2(ptr %dst, ptr %src, i32 %n) nounwind {
; CHECK-LABEL: f2:
; CHECK: bl memcpy
entry:
- call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dst, i8* align 4 %src, i32 %n, i1 false)
+ call void @llvm.memcpy.p0.p0.i32(ptr align 4 %dst, ptr align 4 %src, i32 %n, i1 false)
ret void
}
; Can't optimize - alignment is not a multiple of 4.
-define void @f3(i8* %dst, i8* %src, i32 %n) nounwind {
+define void @f3(ptr %dst, ptr %src, i32 %n) nounwind {
; CHECK-LABEL: f3:
; CHECK: bl memcpy
entry:
%0 = shl i32 %n, 2
- call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 2 %dst, i8* align 2 %src, i32 %0, i1 false)
+ call void @llvm.memcpy.p0.p0.i32(ptr align 2 %dst, ptr align 2 %src, i32 %0, i1 false)
ret void
}
-declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
+declare void @llvm.memcpy.p0.p0.i32(ptr nocapture, ptr nocapture, i32, i1) nounwind
diff --git a/llvm/test/CodeGen/XCore/offset_folding.ll b/llvm/test/CodeGen/XCore/offset_folding.ll
index 8a633eef79b8e..806772ded1aa1 100644
--- a/llvm/test/CodeGen/XCore/offset_folding.ll
+++ b/llvm/test/CodeGen/XCore/offset_folding.ll
@@ -3,40 +3,40 @@
@a = external dso_local constant [0 x i32], section ".cp.rodata"
@b = external dso_local global [0 x i32]
-define i32 *@f1() nounwind {
+define ptr @f1() nounwind {
entry:
; CHECK-LABEL: f1:
; CHECK: ldaw r11, cp[a+4]
; CHECK: mov r0, r11
- %0 = getelementptr [0 x i32], [0 x i32]* @a, i32 0, i32 1
- ret i32* %0
+ %0 = getelementptr [0 x i32], ptr @a, i32 0, i32 1
+ ret ptr %0
}
-define i32 *@f2() nounwind {
+define ptr @f2() nounwind {
entry:
; CHECK-LABEL: f2:
; CHECK: ldaw r0, dp[b+4]
- %0 = getelementptr [0 x i32], [0 x i32]* @b, i32 0, i32 1
- ret i32* %0
+ %0 = getelementptr [0 x i32], ptr @b, i32 0, i32 1
+ ret ptr %0
}
; Don't fold negative offsets into cp / dp accesses to avoid a relocation
; error if the address + addend is less than the start of the cp / dp.
-define i32 *@f3() nounwind {
+define ptr @f3() nounwind {
entry:
; CHECK-LABEL: f3:
; CHECK: ldaw r11, cp[a]
; CHECK: sub r0, r11, 4
- %0 = getelementptr [0 x i32], [0 x i32]* @a, i32 0, i32 -1
- ret i32* %0
+ %0 = getelementptr [0 x i32], ptr @a, i32 0, i32 -1
+ ret ptr %0
}
-define i32 *@f4() nounwind {
+define ptr @f4() nounwind {
entry:
; CHECK-LABEL: f4:
; CHECK: ldaw [[REG:r[0-9]+]], dp[b]
; CHECK: sub r0, [[REG]], 4
- %0 = getelementptr [0 x i32], [0 x i32]* @b, i32 0, i32 -1
- ret i32* %0
+ %0 = getelementptr [0 x i32], ptr @b, i32 0, i32 -1
+ ret ptr %0
}
diff --git a/llvm/test/CodeGen/XCore/private.ll b/llvm/test/CodeGen/XCore/private.ll
index a188864a866cb..2880c09cb9077 100644
--- a/llvm/test/CodeGen/XCore/private.ll
+++ b/llvm/test/CodeGen/XCore/private.ll
@@ -14,7 +14,7 @@ define i32 @bar() {
; CHECK: bl .Lfoo
; CHECK: ldw r0, dp[.Lbaz]
call void @foo()
- %1 = load i32, i32* @baz, align 4
+ %1 = load i32, ptr @baz, align 4
ret i32 %1
}
diff --git a/llvm/test/CodeGen/XCore/resources.ll b/llvm/test/CodeGen/XCore/resources.ll
index 87bf3c204dc2e..42129cdd27273 100644
--- a/llvm/test/CodeGen/XCore/resources.ll
+++ b/llvm/test/CodeGen/XCore/resources.ll
@@ -1,257 +1,257 @@
; RUN: llc -march=xcore < %s | FileCheck %s
-declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
-declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare i32 @llvm.xcore.inshr.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare i32 @llvm.xcore.outshr.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.clrpt.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.syncr.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.settw.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
-declare void @llvm.xcore.setev.p1i8(i8 addrspace(1)* %r, i8* %p)
-declare void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.setclk.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
-declare void @llvm.xcore.setrdy.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
-declare void @llvm.xcore.setpsc.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare i32 @llvm.xcore.peek.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.endin.p1i8(i8 addrspace(1)* %r)
-
-define i8 addrspace(1)* @getr() {
+declare ptr addrspace(1) @llvm.xcore.getr.p1(i32 %type)
+declare void @llvm.xcore.freer.p1(ptr addrspace(1) %r)
+declare i32 @llvm.xcore.in.p1(ptr addrspace(1) %r)
+declare i32 @llvm.xcore.int.p1(ptr addrspace(1) %r)
+declare i32 @llvm.xcore.inct.p1(ptr addrspace(1) %r)
+declare void @llvm.xcore.out.p1(ptr addrspace(1) %r, i32 %value)
+declare void @llvm.xcore.outt.p1(ptr addrspace(1) %r, i32 %value)
+declare void @llvm.xcore.outct.p1(ptr addrspace(1) %r, i32 %value)
+declare void @llvm.xcore.chkct.p1(ptr addrspace(1) %r, i32 %value)
+declare i32 @llvm.xcore.testct.p1(ptr addrspace(1) %r)
+declare i32 @llvm.xcore.testwct.p1(ptr addrspace(1) %r)
+declare void @llvm.xcore.setd.p1(ptr addrspace(1) %r, i32 %value)
+declare void @llvm.xcore.setc.p1(ptr addrspace(1) %r, i32 %value)
+declare i32 @llvm.xcore.inshr.p1(ptr addrspace(1) %r, i32 %value)
+declare i32 @llvm.xcore.outshr.p1(ptr addrspace(1) %r, i32 %value)
+declare void @llvm.xcore.clrpt.p1(ptr addrspace(1) %r)
+declare void @llvm.xcore.setpt.p1(ptr addrspace(1) %r, i32 %value)
+declare i32 @llvm.xcore.getts.p1(ptr addrspace(1) %r)
+declare void @llvm.xcore.syncr.p1(ptr addrspace(1) %r)
+declare void @llvm.xcore.settw.p1(ptr addrspace(1) %r, i32 %value)
+declare void @llvm.xcore.setv.p1(ptr addrspace(1) %r, ptr %p)
+declare void @llvm.xcore.setev.p1(ptr addrspace(1) %r, ptr %p)
+declare void @llvm.xcore.edu.p1(ptr addrspace(1) %r)
+declare void @llvm.xcore.eeu.p1(ptr addrspace(1) %r)
+declare void @llvm.xcore.setclk.p1.p1(ptr addrspace(1) %a, ptr addrspace(1) %b)
+declare void @llvm.xcore.setrdy.p1.p1(ptr addrspace(1) %a, ptr addrspace(1) %b)
+declare void @llvm.xcore.setpsc.p1(ptr addrspace(1) %r, i32 %value)
+declare i32 @llvm.xcore.peek.p1(ptr addrspace(1) %r)
+declare i32 @llvm.xcore.endin.p1(ptr addrspace(1) %r)
+
+define ptr addrspace(1) @getr() {
; CHECK-LABEL: getr:
; CHECK: getr r0, 5
- %result = call i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 5)
- ret i8 addrspace(1)* %result
+ %result = call ptr addrspace(1) @llvm.xcore.getr.p1(i32 5)
+ ret ptr addrspace(1) %result
}
-define void @freer(i8 addrspace(1)* %r) {
+define void @freer(ptr addrspace(1) %r) {
; CHECK-LABEL: freer:
; CHECK: freer res[r0]
- call void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
+ call void @llvm.xcore.freer.p1(ptr addrspace(1) %r)
ret void
}
-define i32 @in(i8 addrspace(1)* %r) {
+define i32 @in(ptr addrspace(1) %r) {
; CHECK-LABEL: in:
; CHECK: in r0, res[r0]
- %result = call i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
+ %result = call i32 @llvm.xcore.in.p1(ptr addrspace(1) %r)
ret i32 %result
}
-define i32 @int(i8 addrspace(1)* %r) {
+define i32 @int(ptr addrspace(1) %r) {
; CHECK-LABEL: int:
; CHECK: int r0, res[r0]
- %result = call i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
+ %result = call i32 @llvm.xcore.int.p1(ptr addrspace(1) %r)
ret i32 %result
}
-define i32 @inct(i8 addrspace(1)* %r) {
+define i32 @inct(ptr addrspace(1) %r) {
; CHECK-LABEL: inct:
; CHECK: inct r0, res[r0]
- %result = call i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
+ %result = call i32 @llvm.xcore.inct.p1(ptr addrspace(1) %r)
ret i32 %result
}
-define void @out(i8 addrspace(1)* %r, i32 %value) {
+define void @out(ptr addrspace(1) %r, i32 %value) {
; CHECK-LABEL: out:
; CHECK: out res[r0], r1
- call void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value)
+ call void @llvm.xcore.out.p1(ptr addrspace(1) %r, i32 %value)
ret void
}
-define void @outt(i8 addrspace(1)* %r, i32 %value) {
+define void @outt(ptr addrspace(1) %r, i32 %value) {
; CHECK-LABEL: outt:
; CHECK: outt res[r0], r1
- call void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value)
+ call void @llvm.xcore.outt.p1(ptr addrspace(1) %r, i32 %value)
ret void
}
-define void @outct(i8 addrspace(1)* %r, i32 %value) {
+define void @outct(ptr addrspace(1) %r, i32 %value) {
; CHECK-LABEL: outct:
; CHECK: outct res[r0], r1
- call void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value)
+ call void @llvm.xcore.outct.p1(ptr addrspace(1) %r, i32 %value)
ret void
}
-define void @outcti(i8 addrspace(1)* %r) {
+define void @outcti(ptr addrspace(1) %r) {
; CHECK-LABEL: outcti:
; CHECK: outct res[r0], 11
- call void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 11)
+ call void @llvm.xcore.outct.p1(ptr addrspace(1) %r, i32 11)
ret void
}
-define void @chkct(i8 addrspace(1)* %r, i32 %value) {
+define void @chkct(ptr addrspace(1) %r, i32 %value) {
; CHECK-LABEL: chkct:
; CHECK: chkct res[r0], r1
- call void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value)
+ call void @llvm.xcore.chkct.p1(ptr addrspace(1) %r, i32 %value)
ret void
}
-define void @chkcti(i8 addrspace(1)* %r) {
+define void @chkcti(ptr addrspace(1) %r) {
; CHECK-LABEL: chkcti:
; CHECK: chkct res[r0], 11
- call void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 11)
+ call void @llvm.xcore.chkct.p1(ptr addrspace(1) %r, i32 11)
ret void
}
-define void @setd(i8 addrspace(1)* %r, i32 %value) {
+define void @setd(ptr addrspace(1) %r, i32 %value) {
; CHECK-LABEL: setd:
; CHECK: setd res[r0], r1
- call void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value)
+ call void @llvm.xcore.setd.p1(ptr addrspace(1) %r, i32 %value)
ret void
}
-define void @setc(i8 addrspace(1)* %r, i32 %value) {
+define void @setc(ptr addrspace(1) %r, i32 %value) {
; CHECK-LABEL: setc:
; CHECK: setc res[r0], r1
- call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value)
+ call void @llvm.xcore.setc.p1(ptr addrspace(1) %r, i32 %value)
ret void
}
-define void @setci(i8 addrspace(1)* %r) {
+define void @setci(ptr addrspace(1) %r) {
; CHECK-LABEL: setci:
; CHECK: setc res[r0], 2
- call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 2)
+ call void @llvm.xcore.setc.p1(ptr addrspace(1) %r, i32 2)
ret void
}
-define i32 @inshr(i32 %value, i8 addrspace(1)* %r) {
+define i32 @inshr(i32 %value, ptr addrspace(1) %r) {
; CHECK-LABEL: inshr:
; CHECK: inshr r0, res[r1]
- %result = call i32 @llvm.xcore.inshr.p1i8(i8 addrspace(1)* %r, i32 %value)
+ %result = call i32 @llvm.xcore.inshr.p1(ptr addrspace(1) %r, i32 %value)
ret i32 %result
}
-define i32 @outshr(i32 %value, i8 addrspace(1)* %r) {
+define i32 @outshr(i32 %value, ptr addrspace(1) %r) {
; CHECK-LABEL: outshr:
; CHECK: outshr res[r1], r0
- %result = call i32 @llvm.xcore.outshr.p1i8(i8 addrspace(1)* %r, i32 %value)
+ %result = call i32 @llvm.xcore.outshr.p1(ptr addrspace(1) %r, i32 %value)
ret i32 %result
}
-define void @clrpt(i8 addrspace(1)* %r) {
+define void @clrpt(ptr addrspace(1) %r) {
; CHECK-LABEL: clrpt:
; CHECK: clrpt res[r0]
- call void @llvm.xcore.clrpt.p1i8(i8 addrspace(1)* %r)
+ call void @llvm.xcore.clrpt.p1(ptr addrspace(1) %r)
ret void
}
-define void @setpt(i8 addrspace(1)* %r, i32 %value) {
+define void @setpt(ptr addrspace(1) %r, i32 %value) {
; CHECK-LABEL: setpt:
; CHECK: setpt res[r0], r1
- call void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %value)
+ call void @llvm.xcore.setpt.p1(ptr addrspace(1) %r, i32 %value)
ret void
}
-define i32 @getts(i8 addrspace(1)* %r) {
+define i32 @getts(ptr addrspace(1) %r) {
; CHECK-LABEL: getts:
; CHECK: getts r0, res[r0]
- %result = call i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
+ %result = call i32 @llvm.xcore.getts.p1(ptr addrspace(1) %r)
ret i32 %result
}
-define void @syncr(i8 addrspace(1)* %r) {
+define void @syncr(ptr addrspace(1) %r) {
; CHECK-LABEL: syncr:
; CHECK: syncr res[r0]
- call void @llvm.xcore.syncr.p1i8(i8 addrspace(1)* %r)
+ call void @llvm.xcore.syncr.p1(ptr addrspace(1) %r)
ret void
}
-define void @settw(i8 addrspace(1)* %r, i32 %value) {
+define void @settw(ptr addrspace(1) %r, i32 %value) {
; CHECK-LABEL: settw:
; CHECK: settw res[r0], r1
- call void @llvm.xcore.settw.p1i8(i8 addrspace(1)* %r, i32 %value)
+ call void @llvm.xcore.settw.p1(ptr addrspace(1) %r, i32 %value)
ret void
}
-define void @setv(i8 addrspace(1)* %r, i8* %p) {
+define void @setv(ptr addrspace(1) %r, ptr %p) {
; CHECK-LABEL: setv:
; CHECK: mov r11, r1
; CHECK-NEXT: setv res[r0], r11
- call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
+ call void @llvm.xcore.setv.p1(ptr addrspace(1) %r, ptr %p)
ret void
}
-define void @setev(i8 addrspace(1)* %r, i8* %p) {
+define void @setev(ptr addrspace(1) %r, ptr %p) {
; CHECK-LABEL: setev:
; CHECK: mov r11, r1
; CHECK-NEXT: setev res[r0], r11
- call void @llvm.xcore.setev.p1i8(i8 addrspace(1)* %r, i8* %p)
+ call void @llvm.xcore.setev.p1(ptr addrspace(1) %r, ptr %p)
ret void
}
-define void @edu(i8 addrspace(1)* %r) {
+define void @edu(ptr addrspace(1) %r) {
; CHECK-LABEL: edu:
; CHECK: edu res[r0]
- call void @llvm.xcore.edu.p1i8(i8 addrspace(1)* %r)
+ call void @llvm.xcore.edu.p1(ptr addrspace(1) %r)
ret void
}
-define void @eeu(i8 addrspace(1)* %r) {
+define void @eeu(ptr addrspace(1) %r) {
; CHECK-LABEL: eeu:
; CHECK: eeu res[r0]
- call void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
+ call void @llvm.xcore.eeu.p1(ptr addrspace(1) %r)
ret void
}
-define void @setclk(i8 addrspace(1)* %a, i8 addrspace(1)* %b) {
+define void @setclk(ptr addrspace(1) %a, ptr addrspace(1) %b) {
; CHECK: setclk
; CHECK: setclk res[r0], r1
- call void @llvm.xcore.setclk.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
+ call void @llvm.xcore.setclk.p1.p1(ptr addrspace(1) %a, ptr addrspace(1) %b)
ret void
}
-define void @setrdy(i8 addrspace(1)* %a, i8 addrspace(1)* %b) {
+define void @setrdy(ptr addrspace(1) %a, ptr addrspace(1) %b) {
; CHECK: setrdy
; CHECK: setrdy res[r0], r1
- call void @llvm.xcore.setrdy.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
+ call void @llvm.xcore.setrdy.p1.p1(ptr addrspace(1) %a, ptr addrspace(1) %b)
ret void
}
-define void @setpsc(i8 addrspace(1)* %r, i32 %value) {
+define void @setpsc(ptr addrspace(1) %r, i32 %value) {
; CHECK: setpsc
; CHECK: setpsc res[r0], r1
- call void @llvm.xcore.setpsc.p1i8(i8 addrspace(1)* %r, i32 %value)
+ call void @llvm.xcore.setpsc.p1(ptr addrspace(1) %r, i32 %value)
ret void
}
-define i32 @peek(i8 addrspace(1)* %r) {
+define i32 @peek(ptr addrspace(1) %r) {
; CHECK-LABEL: peek:
; CHECK: peek r0, res[r0]
- %result = call i32 @llvm.xcore.peek.p1i8(i8 addrspace(1)* %r)
+ %result = call i32 @llvm.xcore.peek.p1(ptr addrspace(1) %r)
ret i32 %result
}
-define i32 @endin(i8 addrspace(1)* %r) {
+define i32 @endin(ptr addrspace(1) %r) {
; CHECK-LABEL: endin:
; CHECK: endin r0, res[r0]
- %result = call i32 @llvm.xcore.endin.p1i8(i8 addrspace(1)* %r)
+ %result = call i32 @llvm.xcore.endin.p1(ptr addrspace(1) %r)
ret i32 %result
}
-define i32 @testct(i8 addrspace(1)* %r) {
+define i32 @testct(ptr addrspace(1) %r) {
; CHECK-LABEL: testct:
; CHECK: testct r0, res[r0]
- %result = call i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
+ %result = call i32 @llvm.xcore.testct.p1(ptr addrspace(1) %r)
ret i32 %result
}
-define i32 @testwct(i8 addrspace(1)* %r) {
+define i32 @testwct(ptr addrspace(1) %r) {
; CHECK-LABEL: testwct:
; CHECK: testwct r0, res[r0]
- %result = call i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
+ %result = call i32 @llvm.xcore.testwct.p1(ptr addrspace(1) %r)
ret i32 %result
}
diff --git a/llvm/test/CodeGen/XCore/resources_combine.ll b/llvm/test/CodeGen/XCore/resources_combine.ll
index 20c184a53b99e..e130c8ce969fa 100644
--- a/llvm/test/CodeGen/XCore/resources_combine.ll
+++ b/llvm/test/CodeGen/XCore/resources_combine.ll
@@ -1,93 +1,93 @@
; RUN: llc -march=xcore < %s | FileCheck %s
-declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
-declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
-declare void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value)
-declare void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %value)
+declare i32 @llvm.xcore.int.p1(ptr addrspace(1) %r)
+declare i32 @llvm.xcore.inct.p1(ptr addrspace(1) %r)
+declare i32 @llvm.xcore.testct.p1(ptr addrspace(1) %r)
+declare i32 @llvm.xcore.testwct.p1(ptr addrspace(1) %r)
+declare i32 @llvm.xcore.getts.p1(ptr addrspace(1) %r)
+declare void @llvm.xcore.outt.p1(ptr addrspace(1) %r, i32 %value)
+declare void @llvm.xcore.outct.p1(ptr addrspace(1) %r, i32 %value)
+declare void @llvm.xcore.chkct.p1(ptr addrspace(1) %r, i32 %value)
+declare void @llvm.xcore.setpt.p1(ptr addrspace(1) %r, i32 %value)
-define i32 @int(i8 addrspace(1)* %r) nounwind {
+define i32 @int(ptr addrspace(1) %r) nounwind {
; CHECK-LABEL: int:
; CHECK: int r0, res[r0]
; CHECK-NEXT: retsp 0
- %result = call i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
+ %result = call i32 @llvm.xcore.int.p1(ptr addrspace(1) %r)
%trunc = and i32 %result, 255
ret i32 %trunc
}
-define i32 @inct(i8 addrspace(1)* %r) nounwind {
+define i32 @inct(ptr addrspace(1) %r) nounwind {
; CHECK-LABEL: inct:
; CHECK: inct r0, res[r0]
; CHECK-NEXT: retsp 0
- %result = call i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
+ %result = call i32 @llvm.xcore.inct.p1(ptr addrspace(1) %r)
%trunc = and i32 %result, 255
ret i32 %trunc
}
-define i32 @testct(i8 addrspace(1)* %r) nounwind {
+define i32 @testct(ptr addrspace(1) %r) nounwind {
; CHECK-LABEL: testct:
; CHECK: testct r0, res[r0]
; CHECK-NEXT: retsp 0
- %result = call i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r)
+ %result = call i32 @llvm.xcore.testct.p1(ptr addrspace(1) %r)
%trunc = and i32 %result, 1
ret i32 %trunc
}
-define i32 @testwct(i8 addrspace(1)* %r) nounwind {
+define i32 @testwct(ptr addrspace(1) %r) nounwind {
; CHECK-LABEL: testwct:
; CHECK: testwct r0, res[r0]
; CHECK-NEXT: retsp 0
- %result = call i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r)
+ %result = call i32 @llvm.xcore.testwct.p1(ptr addrspace(1) %r)
%trunc = and i32 %result, 7
ret i32 %trunc
}
-define i32 @getts(i8 addrspace(1)* %r) nounwind {
+define i32 @getts(ptr addrspace(1) %r) nounwind {
; CHECK-LABEL: getts:
; CHECK: getts r0, res[r0]
; CHECK-NEXT: retsp 0
- %result = call i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
+ %result = call i32 @llvm.xcore.getts.p1(ptr addrspace(1) %r)
%trunc = and i32 %result, 65535
ret i32 %result
}
-define void @outt(i8 addrspace(1)* %r, i32 %value) nounwind {
+define void @outt(ptr addrspace(1) %r, i32 %value) nounwind {
; CHECK-LABEL: outt:
; CHECK-NOT: zext
; CHECK: outt res[r0], r1
; CHECK-NEXT: retsp 0
%trunc = and i32 %value, 255
- call void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %trunc)
+ call void @llvm.xcore.outt.p1(ptr addrspace(1) %r, i32 %trunc)
ret void
}
-define void @outct(i8 addrspace(1)* %r, i32 %value) nounwind {
+define void @outct(ptr addrspace(1) %r, i32 %value) nounwind {
; CHECK-LABEL: outct:
; CHECK-NOT: zext
; CHECK: outct res[r0], r1
%trunc = and i32 %value, 255
- call void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %trunc)
+ call void @llvm.xcore.outct.p1(ptr addrspace(1) %r, i32 %trunc)
ret void
}
-define void @chkct(i8 addrspace(1)* %r, i32 %value) nounwind {
+define void @chkct(ptr addrspace(1) %r, i32 %value) nounwind {
; CHECK-LABEL: chkct:
; CHECK-NOT: zext
; CHECK: chkct res[r0], r1
%trunc = and i32 %value, 255
- call void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %trunc)
+ call void @llvm.xcore.chkct.p1(ptr addrspace(1) %r, i32 %trunc)
ret void
}
-define void @setpt(i8 addrspace(1)* %r, i32 %value) nounwind {
+define void @setpt(ptr addrspace(1) %r, i32 %value) nounwind {
; CHECK-LABEL: setpt:
; CHECK-NOT: zext
; CHECK: setpt res[r0], r1
%trunc = and i32 %value, 65535
- call void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %trunc)
+ call void @llvm.xcore.setpt.p1(ptr addrspace(1) %r, i32 %trunc)
ret void
}
diff --git a/llvm/test/CodeGen/XCore/scavenging.ll b/llvm/test/CodeGen/XCore/scavenging.ll
index dc126984def7c..1cd7a8aed4cac 100644
--- a/llvm/test/CodeGen/XCore/scavenging.ll
+++ b/llvm/test/CodeGen/XCore/scavenging.ll
@@ -1,55 +1,55 @@
; RUN: llc < %s -march=xcore | FileCheck %s
- at size = global i32 0 ; <i32*> [#uses=1]
- at g0 = external global i32 ; <i32*> [#uses=2]
- at g1 = external global i32 ; <i32*> [#uses=2]
- at g2 = external global i32 ; <i32*> [#uses=2]
- at g3 = external global i32 ; <i32*> [#uses=2]
- at g4 = external global i32 ; <i32*> [#uses=2]
- at g5 = external global i32 ; <i32*> [#uses=2]
- at g6 = external global i32 ; <i32*> [#uses=2]
- at g7 = external global i32 ; <i32*> [#uses=2]
- at g8 = external global i32 ; <i32*> [#uses=2]
- at g9 = external global i32 ; <i32*> [#uses=2]
- at g10 = external global i32 ; <i32*> [#uses=2]
- at g11 = external global i32 ; <i32*> [#uses=2]
+ at size = global i32 0 ; <ptr> [#uses=1]
+ at g0 = external global i32 ; <ptr> [#uses=2]
+ at g1 = external global i32 ; <ptr> [#uses=2]
+ at g2 = external global i32 ; <ptr> [#uses=2]
+ at g3 = external global i32 ; <ptr> [#uses=2]
+ at g4 = external global i32 ; <ptr> [#uses=2]
+ at g5 = external global i32 ; <ptr> [#uses=2]
+ at g6 = external global i32 ; <ptr> [#uses=2]
+ at g7 = external global i32 ; <ptr> [#uses=2]
+ at g8 = external global i32 ; <ptr> [#uses=2]
+ at g9 = external global i32 ; <ptr> [#uses=2]
+ at g10 = external global i32 ; <ptr> [#uses=2]
+ at g11 = external global i32 ; <ptr> [#uses=2]
define void @f() nounwind {
entry:
- %x = alloca [100 x i32], align 4 ; <[100 x i32]*> [#uses=2]
- %0 = load i32, i32* @size, align 4 ; <i32> [#uses=1]
- %1 = alloca i32, i32 %0, align 4 ; <i32*> [#uses=1]
- %2 = load volatile i32, i32* @g0, align 4 ; <i32> [#uses=1]
- %3 = load volatile i32, i32* @g1, align 4 ; <i32> [#uses=1]
- %4 = load volatile i32, i32* @g2, align 4 ; <i32> [#uses=1]
- %5 = load volatile i32, i32* @g3, align 4 ; <i32> [#uses=1]
- %6 = load volatile i32, i32* @g4, align 4 ; <i32> [#uses=1]
- %7 = load volatile i32, i32* @g5, align 4 ; <i32> [#uses=1]
- %8 = load volatile i32, i32* @g6, align 4 ; <i32> [#uses=1]
- %9 = load volatile i32, i32* @g7, align 4 ; <i32> [#uses=1]
- %10 = load volatile i32, i32* @g8, align 4 ; <i32> [#uses=1]
- %11 = load volatile i32, i32* @g9, align 4 ; <i32> [#uses=1]
- %12 = load volatile i32, i32* @g10, align 4 ; <i32> [#uses=1]
- %13 = load volatile i32, i32* @g11, align 4 ; <i32> [#uses=2]
- %14 = getelementptr [100 x i32], [100 x i32]* %x, i32 0, i32 50 ; <i32*> [#uses=1]
- store i32 %13, i32* %14, align 4
- store volatile i32 %13, i32* @g11, align 4
- store volatile i32 %12, i32* @g10, align 4
- store volatile i32 %11, i32* @g9, align 4
- store volatile i32 %10, i32* @g8, align 4
- store volatile i32 %9, i32* @g7, align 4
- store volatile i32 %8, i32* @g6, align 4
- store volatile i32 %7, i32* @g5, align 4
- store volatile i32 %6, i32* @g4, align 4
- store volatile i32 %5, i32* @g3, align 4
- store volatile i32 %4, i32* @g2, align 4
- store volatile i32 %3, i32* @g1, align 4
- store volatile i32 %2, i32* @g0, align 4
- %x1 = getelementptr [100 x i32], [100 x i32]* %x, i32 0, i32 0 ; <i32*> [#uses=1]
- call void @g(i32* %x1, i32* %1) nounwind
+ %x = alloca [100 x i32], align 4 ; <ptr> [#uses=2]
+ %0 = load i32, ptr @size, align 4 ; <i32> [#uses=1]
+ %1 = alloca i32, i32 %0, align 4 ; <ptr> [#uses=1]
+ %2 = load volatile i32, ptr @g0, align 4 ; <i32> [#uses=1]
+ %3 = load volatile i32, ptr @g1, align 4 ; <i32> [#uses=1]
+ %4 = load volatile i32, ptr @g2, align 4 ; <i32> [#uses=1]
+ %5 = load volatile i32, ptr @g3, align 4 ; <i32> [#uses=1]
+ %6 = load volatile i32, ptr @g4, align 4 ; <i32> [#uses=1]
+ %7 = load volatile i32, ptr @g5, align 4 ; <i32> [#uses=1]
+ %8 = load volatile i32, ptr @g6, align 4 ; <i32> [#uses=1]
+ %9 = load volatile i32, ptr @g7, align 4 ; <i32> [#uses=1]
+ %10 = load volatile i32, ptr @g8, align 4 ; <i32> [#uses=1]
+ %11 = load volatile i32, ptr @g9, align 4 ; <i32> [#uses=1]
+ %12 = load volatile i32, ptr @g10, align 4 ; <i32> [#uses=1]
+ %13 = load volatile i32, ptr @g11, align 4 ; <i32> [#uses=2]
+ %14 = getelementptr [100 x i32], ptr %x, i32 0, i32 50 ; <ptr> [#uses=1]
+ store i32 %13, ptr %14, align 4
+ store volatile i32 %13, ptr @g11, align 4
+ store volatile i32 %12, ptr @g10, align 4
+ store volatile i32 %11, ptr @g9, align 4
+ store volatile i32 %10, ptr @g8, align 4
+ store volatile i32 %9, ptr @g7, align 4
+ store volatile i32 %8, ptr @g6, align 4
+ store volatile i32 %7, ptr @g5, align 4
+ store volatile i32 %6, ptr @g4, align 4
+ store volatile i32 %5, ptr @g3, align 4
+ store volatile i32 %4, ptr @g2, align 4
+ store volatile i32 %3, ptr @g1, align 4
+ store volatile i32 %2, ptr @g0, align 4
+ %x1 = getelementptr [100 x i32], ptr %x, i32 0, i32 0 ; <ptr> [#uses=1]
+ call void @g(ptr %x1, ptr %1) nounwind
ret void
}
-declare void @g(i32*, i32*)
+declare void @g(ptr, ptr)
; CHECK: .section .cp.rodata.cst4,"aMc", at progbits,4
@@ -100,15 +100,15 @@ declare void @g(i32*, i32*)
define void @ScavengeSlots(i32 %r0, i32 %r1, i32 %r2, i32 %r3, i32 %r4) nounwind {
entry:
%Data = alloca [100000 x i32]
- %i0 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 80000
- store volatile i32 %r0, i32* %i0
- %i1 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 81000
- store volatile i32 %r1, i32* %i1
- %i2 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 82000
- store volatile i32 %r2, i32* %i2
- %i3 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 83000
- store volatile i32 %r3, i32* %i3
- %i4 = getelementptr inbounds [100000 x i32], [100000 x i32]* %Data, i32 0, i32 84000
- store volatile i32 %r4, i32* %i4
+ %i0 = getelementptr inbounds [100000 x i32], ptr %Data, i32 0, i32 80000
+ store volatile i32 %r0, ptr %i0
+ %i1 = getelementptr inbounds [100000 x i32], ptr %Data, i32 0, i32 81000
+ store volatile i32 %r1, ptr %i1
+ %i2 = getelementptr inbounds [100000 x i32], ptr %Data, i32 0, i32 82000
+ store volatile i32 %r2, ptr %i2
+ %i3 = getelementptr inbounds [100000 x i32], ptr %Data, i32 0, i32 83000
+ store volatile i32 %r3, ptr %i3
+ %i4 = getelementptr inbounds [100000 x i32], ptr %Data, i32 0, i32 84000
+ store volatile i32 %r4, ptr %i4
ret void
}
diff --git a/llvm/test/CodeGen/XCore/store.ll b/llvm/test/CodeGen/XCore/store.ll
index a42b444bdff46..c09edb96980ea 100644
--- a/llvm/test/CodeGen/XCore/store.ll
+++ b/llvm/test/CodeGen/XCore/store.ll
@@ -1,37 +1,37 @@
; RUN: llc < %s -march=xcore | FileCheck %s
-define void @store32(i32* %p, i32 %offset, i32 %val) nounwind {
+define void @store32(ptr %p, i32 %offset, i32 %val) nounwind {
entry:
; CHECK-LABEL: store32:
; CHECK: stw r2, r0[r1]
- %0 = getelementptr i32, i32* %p, i32 %offset
- store i32 %val, i32* %0, align 4
+ %0 = getelementptr i32, ptr %p, i32 %offset
+ store i32 %val, ptr %0, align 4
ret void
}
-define void @store32_imm(i32* %p, i32 %val) nounwind {
+define void @store32_imm(ptr %p, i32 %val) nounwind {
entry:
; CHECK-LABEL: store32_imm:
; CHECK: stw r1, r0[11]
- %0 = getelementptr i32, i32* %p, i32 11
- store i32 %val, i32* %0, align 4
+ %0 = getelementptr i32, ptr %p, i32 11
+ store i32 %val, ptr %0, align 4
ret void
}
-define void @store16(i16* %p, i32 %offset, i16 %val) nounwind {
+define void @store16(ptr %p, i32 %offset, i16 %val) nounwind {
entry:
; CHECK-LABEL: store16:
; CHECK: st16 r2, r0[r1]
- %0 = getelementptr i16, i16* %p, i32 %offset
- store i16 %val, i16* %0, align 2
+ %0 = getelementptr i16, ptr %p, i32 %offset
+ store i16 %val, ptr %0, align 2
ret void
}
-define void @store8(i8* %p, i32 %offset, i8 %val) nounwind {
+define void @store8(ptr %p, i32 %offset, i8 %val) nounwind {
entry:
; CHECK-LABEL: store8:
; CHECK: st8 r2, r0[r1]
- %0 = getelementptr i8, i8* %p, i32 %offset
- store i8 %val, i8* %0, align 1
+ %0 = getelementptr i8, ptr %p, i32 %offset
+ store i8 %val, ptr %0, align 1
ret void
}
diff --git a/llvm/test/CodeGen/XCore/tls.ll b/llvm/test/CodeGen/XCore/tls.ll
index 648d61199234f..f71f36565d2bc 100644
--- a/llvm/test/CodeGen/XCore/tls.ll
+++ b/llvm/test/CodeGen/XCore/tls.ll
@@ -1,10 +1,10 @@
; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
-define i32 *@addr_G() {
+define ptr @addr_G() {
entry:
; CHECK-LABEL: addr_G:
; CHECK: get r11, id
- ret i32* @G
+ ret ptr @G
}
@G = thread_local global i32 15
diff --git a/llvm/test/CodeGen/XCore/trampoline.ll b/llvm/test/CodeGen/XCore/trampoline.ll
index a7280000500fa..15234e5318664 100644
--- a/llvm/test/CodeGen/XCore/trampoline.ll
+++ b/llvm/test/CodeGen/XCore/trampoline.ll
@@ -1,6 +1,6 @@
; RUN: llc < %s -march=xcore | FileCheck %s
-%struct.FRAME.f = type { i32, i32 ()* }
+%struct.FRAME.f = type { i32, ptr }
define void @f() nounwind {
entry:
@@ -9,31 +9,26 @@ entry:
; CHECK: stw r11, sp[7]
%TRAMP.23 = alloca [20 x i8], align 2
%FRAME.0 = alloca %struct.FRAME.f, align 4
- %TRAMP.23.sub = getelementptr inbounds [20 x i8], [20 x i8]* %TRAMP.23, i32 0, i32 0
- %FRAME.02 = bitcast %struct.FRAME.f* %FRAME.0 to i8*
- call void @llvm.init.trampoline(i8* %TRAMP.23.sub, i8* bitcast (i32 (%struct.FRAME.f*)* @g.1101 to i8*), i8* %FRAME.02)
- %tramp = call i8* @llvm.adjust.trampoline(i8* %TRAMP.23.sub)
- %0 = getelementptr inbounds %struct.FRAME.f, %struct.FRAME.f* %FRAME.0, i32 0, i32 1
- %1 = bitcast i8* %tramp to i32 ()*
- store i32 ()* %1, i32 ()** %0, align 4
- %2 = getelementptr inbounds %struct.FRAME.f, %struct.FRAME.f* %FRAME.0, i32 0, i32 0
- store i32 1, i32* %2, align 4
- call void @h(i32 ()* %1) nounwind
+ call void @llvm.init.trampoline(ptr %TRAMP.23, ptr @g.1101, ptr %FRAME.0)
+ %tramp = call ptr @llvm.adjust.trampoline(ptr %TRAMP.23)
+ %0 = getelementptr inbounds %struct.FRAME.f, ptr %FRAME.0, i32 0, i32 1
+ store ptr %tramp, ptr %0, align 4
+ store i32 1, ptr %FRAME.0, align 4
+ call void @h(ptr %tramp) nounwind
ret void
}
-define internal i32 @g.1101(%struct.FRAME.f* nocapture nest %CHAIN.1) nounwind readonly {
+define internal i32 @g.1101(ptr nocapture nest %CHAIN.1) nounwind readonly {
entry:
; CHECK: g.1101:
; CHECK: ldw r11, sp[0]
; CHECK-NEXT: ldw r0, r11[0]
; CHECK-NEXT: retsp 0
- %0 = getelementptr inbounds %struct.FRAME.f, %struct.FRAME.f* %CHAIN.1, i32 0, i32 0
- %1 = load i32, i32* %0, align 4
- ret i32 %1
+ %0 = load i32, ptr %CHAIN.1, align 4
+ ret i32 %0
}
-declare void @llvm.init.trampoline(i8*, i8*, i8*) nounwind
-declare i8* @llvm.adjust.trampoline(i8*) nounwind
+declare void @llvm.init.trampoline(ptr, ptr, ptr) nounwind
+declare ptr @llvm.adjust.trampoline(ptr) nounwind
-declare void @h(i32 ()*)
+declare void @h(ptr)
diff --git a/llvm/test/CodeGen/XCore/unaligned_load.ll b/llvm/test/CodeGen/XCore/unaligned_load.ll
index 325da8f4432d4..2bf158aade316 100644
--- a/llvm/test/CodeGen/XCore/unaligned_load.ll
+++ b/llvm/test/CodeGen/XCore/unaligned_load.ll
@@ -3,9 +3,9 @@
; Byte aligned load.
; CHECK: align1
; CHECK: bl __misaligned_load
-define i32 @align1(i32* %p) nounwind {
+define i32 @align1(ptr %p) nounwind {
entry:
- %0 = load i32, i32* %p, align 1 ; <i32> [#uses=1]
+ %0 = load i32, ptr %p, align 1 ; <i32> [#uses=1]
ret i32 %0
}
@@ -14,9 +14,9 @@ entry:
; CHECK: ld16s
; CHECK: ld16s
; CHECK: or
-define i32 @align2(i32* %p) nounwind {
+define i32 @align2(ptr %p) nounwind {
entry:
- %0 = load i32, i32* %p, align 2 ; <i32> [#uses=1]
+ %0 = load i32, ptr %p, align 2 ; <i32> [#uses=1]
ret i32 %0
}
@@ -29,6 +29,6 @@ entry:
; CHECK: or
define i32 @align3() nounwind {
entry:
- %0 = load i32, i32* bitcast (i8* getelementptr ([5 x i8], [5 x i8]* @a, i32 0, i32 1) to i32*), align 1
+ %0 = load i32, ptr getelementptr ([5 x i8], ptr @a, i32 0, i32 1), align 1
ret i32 %0
}
diff --git a/llvm/test/CodeGen/XCore/unaligned_store.ll b/llvm/test/CodeGen/XCore/unaligned_store.ll
index 27b428086d5e0..731e4628d916b 100644
--- a/llvm/test/CodeGen/XCore/unaligned_store.ll
+++ b/llvm/test/CodeGen/XCore/unaligned_store.ll
@@ -3,9 +3,9 @@
; Byte aligned store.
; CHECK-LABEL: align1:
; CHECK: bl __misaligned_store
-define void @align1(i32* %p, i32 %val) nounwind {
+define void @align1(ptr %p, i32 %val) nounwind {
entry:
- store i32 %val, i32* %p, align 1
+ store i32 %val, ptr %p, align 1
ret void
}
@@ -13,8 +13,8 @@ entry:
; CHECK: align2
; CHECK: st16
; CHECK: st16
-define void @align2(i32* %p, i32 %val) nounwind {
+define void @align2(ptr %p, i32 %val) nounwind {
entry:
- store i32 %val, i32* %p, align 2
+ store i32 %val, ptr %p, align 2
ret void
}
diff --git a/llvm/test/CodeGen/XCore/unaligned_store_combine.ll b/llvm/test/CodeGen/XCore/unaligned_store_combine.ll
index 4b29a05984a1b..97b08d7cb69b1 100644
--- a/llvm/test/CodeGen/XCore/unaligned_store_combine.ll
+++ b/llvm/test/CodeGen/XCore/unaligned_store_combine.ll
@@ -2,12 +2,12 @@
; Unaligned load / store pair. Should be combined into a memmove
; of size 8
-define void @f(i64* %dst, i64* %src) nounwind {
+define void @f(ptr %dst, ptr %src) nounwind {
entry:
; CHECK-LABEL: f:
; CHECK: ldc r2, 8
; CHECK: bl memmove
- %0 = load i64, i64* %src, align 1
- store i64 %0, i64* %dst, align 1
+ %0 = load i64, ptr %src, align 1
+ store i64 %0, ptr %dst, align 1
ret void
}
diff --git a/llvm/test/CodeGen/XCore/varargs.ll b/llvm/test/CodeGen/XCore/varargs.ll
index f88395e5945c6..f24428a670a2f 100644
--- a/llvm/test/CodeGen/XCore/varargs.ll
+++ b/llvm/test/CodeGen/XCore/varargs.ll
@@ -18,8 +18,8 @@ entry:
}
-declare void @llvm.va_start(i8*) nounwind
-declare void @llvm.va_end(i8*) nounwind
+declare void @llvm.va_start(ptr) nounwind
+declare void @llvm.va_end(ptr) nounwind
declare void @f(i32) nounwind
define void @test_vararg(...) nounwind {
entry:
@@ -32,9 +32,8 @@ entry:
; CHECK-DAG: stw r2, sp[5]
; CHECK: ldaw r0, sp[3]
; CHECK: stw r0, sp[2]
- %list = alloca i8*, align 4
- %list1 = bitcast i8** %list to i8*
- call void @llvm.va_start(i8* %list1)
+ %list = alloca ptr, align 4
+ call void @llvm.va_start(ptr %list)
br label %for.cond
; CHECK-LABEL: .LBB1_1
@@ -45,11 +44,11 @@ entry:
; CHECK: bl f
; CHECK: bu .LBB1_1
for.cond:
- %0 = va_arg i8** %list, i32
+ %0 = va_arg ptr %list, i32
call void @f(i32 %0)
br label %for.cond
- call void @llvm.va_end(i8* %list1)
+ call void @llvm.va_end(ptr %list)
ret void
}
diff --git a/llvm/test/CodeGen/XCore/zextfree.ll b/llvm/test/CodeGen/XCore/zextfree.ll
index d1e2b7f857845..d0b07f20be9cf 100644
--- a/llvm/test/CodeGen/XCore/zextfree.ll
+++ b/llvm/test/CodeGen/XCore/zextfree.ll
@@ -2,9 +2,9 @@
; CHECK-LABEL: test:
; CHECK-NOT: zext
-define void @test(i8* %s1) {
+define void @test(ptr %s1) {
entry:
- %u8 = load i8, i8* %s1, align 1
+ %u8 = load i8, ptr %s1, align 1
%bool = icmp eq i8 %u8, 0
br label %BB1
BB1:
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