[PATCH] D139706: [RISCV][VP] expand vp intrinsics if no +v feature
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Dec 18 21:49:50 PST 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h:245
using VPLegalization = TargetTransformInfo::VPLegalization;
- if (PI.getIntrinsicID() == Intrinsic::vp_reduce_mul &&
+ if (!ST->hasVInstructions() || (PI.getIntrinsicID() == Intrinsic::vp_reduce_mul &&
cast<VectorType>(PI.getArgOperand(1)->getType())
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D139706/new/
https://reviews.llvm.org/D139706
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