[PATCH] D139701: [Clang] Don't emit "min-legal-vector-width"="0" for AMDGPU
Phoebe Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Dec 17 19:08:05 PST 2022
pengfei updated this revision to Diff 483797.
pengfei added a comment.
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In D139701#4003305 <https://reviews.llvm.org/D139701#4003305>, @craig.topper wrote:
> In D139701#4003209 <https://reviews.llvm.org/D139701#4003209>, @pengfei wrote:
>
>> In D139701#3993131 <https://reviews.llvm.org/D139701#3993131>, @craig.topper wrote:
>>
>>> I really think only X86 is using this.
>>
>> I'm still not sure of that. Please see the diff in AArch64/ARM tests.
>
> Most of them were done by me in this commit https://reviews.llvm.org/D52441. I either did it for extra coverage or because the tests already checked for `#0` and some test cases ended up with #1 due to the different vector lengths.
Thanks @craig.topper ! Then I think we can just remove them to recover back.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139701/new/
https://reviews.llvm.org/D139701
Files:
clang/lib/CodeGen/CodeGenFunction.cpp
clang/test/CodeGen/aarch64-neon-3v.c
clang/test/CodeGen/aarch64-neon-extract.c
clang/test/CodeGen/aarch64-neon-ldst-one.c
clang/test/CodeGen/aarch64-neon-scalar-copy.c
clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
clang/test/CodeGen/aarch64-neon-vget.c
clang/test/CodeGen/aarch64-poly64.c
clang/test/CodeGen/arm64_vdupq_n_f64.c
clang/test/CodeGenCXX/arm-generated-fn-attr.cpp
clang/test/OpenMP/amdgcn-attributes.cpp
llvm/docs/LangRef.rst
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