[llvm] 036e092 - [CodeGen] std::optional::value => operator*/operator->
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 16 15:41:42 PST 2022
Author: Fangrui Song
Date: 2022-12-16T23:41:36Z
New Revision: 036e092282f50d65d78a47d3a009e8baf2e74f46
URL: https://github.com/llvm/llvm-project/commit/036e092282f50d65d78a47d3a009e8baf2e74f46
DIFF: https://github.com/llvm/llvm-project/commit/036e092282f50d65d78a47d3a009e8baf2e74f46.diff
LOG: [CodeGen] std::optional::value => operator*/operator->
value() has undesired exception checking semantics and calls
__throw_bad_optional_access in libc++. Moreover, the API is unavailable without
_LIBCPP_NO_EXCEPTIONS on older Mach-O platforms (see
_LIBCPP_AVAILABILITY_BAD_OPTIONAL_ACCESS).
This fixes LLVMMIRParser, LLVMGlobalISel, LLVMAsmPrinter, LLVMSelectionDAG.
Added:
Modified:
llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
llvm/lib/CodeGen/MIRParser/MIParser.cpp
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/InterfaceStub/IFSHandler.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
index 49c2431e03fe1..baa996a5bcdb5 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
@@ -694,7 +694,7 @@ bool InstructionSelector::executeMatchTable(
(ISel.*ISelInfo.ComplexPredicates[ComplexPredicateID])(
State.MIs[InsnID]->getOperand(OpIdx));
if (Renderer)
- State.Renderers[RendererID] = Renderer.value();
+ State.Renderers[RendererID] = *Renderer;
else
if (handleReject() == RejectAndGiveUp)
return false;
diff --git a/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
index e31135e742ccd..c89c6341ba365 100644
--- a/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
@@ -2802,7 +2802,7 @@ void CodeViewDebug::emitLocalVariableList(const FunctionInfo &FI,
// If ConstantValue is set we will emit it as a S_CONSTANT instead of a
// S_LOCAL in order to be able to represent it at all.
const DIType *Ty = L.DIVar->getType();
- APSInt Val(L.ConstantValue.value());
+ APSInt Val(*L.ConstantValue);
emitConstantSymbolRecord(Ty, Val, std::string(L.DIVar->getName()));
} else {
emitLocalVariable(FI, L);
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index 65c77fa0b3a06..d63e48c73278d 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -752,7 +752,7 @@ bool MIParser::parseBasicBlockDefinition(
MBB->setIsInlineAsmBrIndirectTarget(IsInlineAsmBrIndirectTarget);
MBB->setIsEHFuncletEntry(IsEHFuncletEntry);
if (SectionID) {
- MBB->setSectionID(SectionID.value());
+ MBB->setSectionID(*SectionID);
MF.setBBSectionsType(BasicBlockSection::List);
}
return false;
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 42bf04ce97f0d..3b4cb13ff658f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -8029,9 +8029,9 @@ calculateByteProvider(SDValue Op, unsigned Index, unsigned Depth,
// the element will provide a range of bytes. For example, if we have a
// vector of i16s, each element provides two bytes (V[1] provides byte 2 and
// 3).
- if (VectorIndex.value() * NarrowByteWidth > StartingIndex)
+ if (*VectorIndex * NarrowByteWidth > StartingIndex)
return std::nullopt;
- if ((VectorIndex.value() + 1) * NarrowByteWidth <= StartingIndex)
+ if ((*VectorIndex + 1) * NarrowByteWidth <= StartingIndex)
return std::nullopt;
return calculateByteProvider(Op->getOperand(0), Index, Depth + 1,
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index a544879f86413..17be6c9b80307 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -720,8 +720,8 @@ static void getCopyToPartsVector(SelectionDAG &DAG, const SDLoc &DL,
unsigned NumRegs;
if (IsABIRegCopy) {
NumRegs = TLI.getVectorTypeBreakdownForCallingConv(
- *DAG.getContext(), CallConv.value(), ValueVT, IntermediateVT,
- NumIntermediates, RegisterVT);
+ *DAG.getContext(), *CallConv, ValueVT, IntermediateVT, NumIntermediates,
+ RegisterVT);
} else {
NumRegs =
TLI.getVectorTypeBreakdown(*DAG.getContext(), ValueVT, IntermediateVT,
@@ -817,11 +817,11 @@ RegsForValue::RegsForValue(LLVMContext &Context, const TargetLowering &TLI,
for (EVT ValueVT : ValueVTs) {
unsigned NumRegs =
isABIMangled()
- ? TLI.getNumRegistersForCallingConv(Context, CC.value(), ValueVT)
+ ? TLI.getNumRegistersForCallingConv(Context, *CC, ValueVT)
: TLI.getNumRegisters(Context, ValueVT);
MVT RegisterVT =
isABIMangled()
- ? TLI.getRegisterTypeForCallingConv(Context, CC.value(), ValueVT)
+ ? TLI.getRegisterTypeForCallingConv(Context, *CC, ValueVT)
: TLI.getRegisterType(Context, ValueVT);
for (unsigned i = 0; i != NumRegs; ++i)
Regs.push_back(Reg + i);
@@ -848,10 +848,10 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
// Copy the legal parts from the registers.
EVT ValueVT = ValueVTs[Value];
unsigned NumRegs = RegCount[Value];
- MVT RegisterVT =
- isABIMangled() ? TLI.getRegisterTypeForCallingConv(
- *DAG.getContext(), CallConv.value(), RegVTs[Value])
- : RegVTs[Value];
+ MVT RegisterVT = isABIMangled()
+ ? TLI.getRegisterTypeForCallingConv(
+ *DAG.getContext(), *CallConv, RegVTs[Value])
+ : RegVTs[Value];
Parts.resize(NumRegs);
for (unsigned i = 0; i != NumRegs; ++i) {
@@ -931,10 +931,10 @@ void RegsForValue::getCopyToRegs(SDValue Val, SelectionDAG &DAG,
for (unsigned Value = 0, Part = 0, e = ValueVTs.size(); Value != e; ++Value) {
unsigned NumParts = RegCount[Value];
- MVT RegisterVT =
- isABIMangled() ? TLI.getRegisterTypeForCallingConv(
- *DAG.getContext(), CallConv.value(), RegVTs[Value])
- : RegVTs[Value];
+ MVT RegisterVT = isABIMangled()
+ ? TLI.getRegisterTypeForCallingConv(
+ *DAG.getContext(), *CallConv, RegVTs[Value])
+ : RegVTs[Value];
if (ExtendKind == ISD::ANY_EXTEND && TLI.isZExtFree(Val, RegisterVT))
ExtendKind = ISD::ZERO_EXTEND;
@@ -8993,7 +8993,7 @@ void SelectionDAGBuilder::visitInlineAsm(const CallBase &Call,
if (RegError) {
const MachineFunction &MF = DAG.getMachineFunction();
const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
- const char *RegName = TRI.getName(RegError.value());
+ const char *RegName = TRI.getName(*RegError);
emitInlineAsmError(Call, "register '" + Twine(RegName) +
"' allocated for constraint '" +
Twine(OpInfo.ConstraintCode) +
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 7e1ca891cd512..4fc943dba8494 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -2339,7 +2339,7 @@ void SelectionDAGISel::Select_PATCHPOINT(SDNode *N) {
Ops.push_back(RegMask);
Ops.push_back(Chain);
if (Glue.has_value())
- Ops.push_back(Glue.value());
+ Ops.push_back(*Glue);
SDVTList NodeTys = N->getVTList();
CurDAG->SelectNodeTo(N, TargetOpcode::PATCHPOINT, NodeTys, Ops);
diff --git a/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
index 057113afa5ecc..5d3307257ba59 100644
--- a/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
@@ -535,15 +535,13 @@ lowerStatepointMetaArgs(SmallVectorImpl<SDValue> &Ops,
for (const Value *V : SI.Bases) {
auto Opt = S.isGCManagedPointer(V->getType()->getScalarType());
if (Opt) {
- assert(Opt.value() &&
- "non gc managed base pointer found in statepoint");
+ assert(*Opt && "non gc managed base pointer found in statepoint");
}
}
for (const Value *V : SI.Ptrs) {
auto Opt = S.isGCManagedPointer(V->getType()->getScalarType());
if (Opt) {
- assert(Opt.value() &&
- "non gc managed derived pointer found in statepoint");
+ assert(*Opt && "non gc managed derived pointer found in statepoint");
}
}
assert(SI.Bases.size() == SI.Ptrs.size() && "Pointer without base!");
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index a7716e893aa11..257fbda0122e5 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -2104,9 +2104,9 @@ bool TargetLowering::SimplifyDemandedBits(
KnownBits Known1 = TLO.DAG.computeKnownBits(Op1, DemandedElts, Depth + 1);
Known = KnownBits::umin(Known0, Known1);
if (std::optional<bool> IsULE = KnownBits::ule(Known0, Known1))
- return TLO.CombineTo(Op, IsULE.value() ? Op0 : Op1);
+ return TLO.CombineTo(Op, *IsULE ? Op0 : Op1);
if (std::optional<bool> IsULT = KnownBits::ult(Known0, Known1))
- return TLO.CombineTo(Op, IsULT.value() ? Op0 : Op1);
+ return TLO.CombineTo(Op, *IsULT ? Op0 : Op1);
break;
}
case ISD::UMAX: {
@@ -2117,9 +2117,9 @@ bool TargetLowering::SimplifyDemandedBits(
KnownBits Known1 = TLO.DAG.computeKnownBits(Op1, DemandedElts, Depth + 1);
Known = KnownBits::umax(Known0, Known1);
if (std::optional<bool> IsUGE = KnownBits::uge(Known0, Known1))
- return TLO.CombineTo(Op, IsUGE.value() ? Op0 : Op1);
+ return TLO.CombineTo(Op, *IsUGE ? Op0 : Op1);
if (std::optional<bool> IsUGT = KnownBits::ugt(Known0, Known1))
- return TLO.CombineTo(Op, IsUGT.value() ? Op0 : Op1);
+ return TLO.CombineTo(Op, *IsUGT ? Op0 : Op1);
break;
}
case ISD::BITREVERSE: {
diff --git a/llvm/lib/InterfaceStub/IFSHandler.cpp b/llvm/lib/InterfaceStub/IFSHandler.cpp
index 2204b49ae0ae7..8bb01836fccb8 100644
--- a/llvm/lib/InterfaceStub/IFSHandler.cpp
+++ b/llvm/lib/InterfaceStub/IFSHandler.cpp
@@ -224,7 +224,7 @@ Error ifs::overrideIFSTarget(
std::optional<std::string> OverrideTriple) {
std::error_code OverrideEC(1, std::generic_category());
if (OverrideArch) {
- if (Stub.Target.Arch && *Stub.Target.Arch != OverrideArch.value()) {
+ if (Stub.Target.Arch && *Stub.Target.Arch != *OverrideArch) {
return make_error<StringError>(
"Supplied Arch conflicts with the text stub", OverrideEC);
}
@@ -232,22 +232,21 @@ Error ifs::overrideIFSTarget(
}
if (OverrideEndianness) {
if (Stub.Target.Endianness &&
- *Stub.Target.Endianness != OverrideEndianness.value()) {
+ *Stub.Target.Endianness != *OverrideEndianness) {
return make_error<StringError>(
"Supplied Endianness conflicts with the text stub", OverrideEC);
}
Stub.Target.Endianness = *OverrideEndianness;
}
if (OverrideBitWidth) {
- if (Stub.Target.BitWidth &&
- *Stub.Target.BitWidth != OverrideBitWidth.value()) {
+ if (Stub.Target.BitWidth && *Stub.Target.BitWidth != *OverrideBitWidth) {
return make_error<StringError>(
"Supplied BitWidth conflicts with the text stub", OverrideEC);
}
Stub.Target.BitWidth = *OverrideBitWidth;
}
if (OverrideTriple) {
- if (Stub.Target.Triple && *Stub.Target.Triple != OverrideTriple.value()) {
+ if (Stub.Target.Triple && *Stub.Target.Triple != *OverrideTriple) {
return make_error<StringError>(
"Supplied Triple conflicts with the text stub", OverrideEC);
}
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