[PATCH] D140046: [PowerPC] Fix up memory ordering after combining BV to a load

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 16 11:56:27 PST 2022


lebedev.ri added a comment.

In D140046#4002241 <https://reviews.llvm.org/D140046#4002241>, @nemanjai wrote:

> In D140046#4002236 <https://reviews.llvm.org/D140046#4002236>, @lebedev.ri wrote:
>
>>> @lebedev.ri Did your original commit have this problem on the big endian bot?
>>
>> Yup: https://lab.llvm.org/buildbot/#/builders/93/builds/12251
>> To be honest, i didn't see that particular report :/
>
> OK, give me a couple of hours to see if I can track this down. At least I know what the likely culprit is so it's worth looking there. If I can't fix it right away, I'll revert your patch, get the PPC back end fixed and let you know.

Thank you for taking a look!
I'll revert the patch regardless for now, looks like i need to fix commit message there.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140046/new/

https://reviews.llvm.org/D140046



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