[llvm] 44fe4e2 - [PowerPC][NFC] Fix typos in PPCISelDAGToDAG
Kai Nacke via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 16 08:35:07 PST 2022
Author: Kai Nacke
Date: 2022-12-16T16:34:46Z
New Revision: 44fe4e25e45c1999f9d45e20724beb38ae505dfb
URL: https://github.com/llvm/llvm-project/commit/44fe4e25e45c1999f9d45e20724beb38ae505dfb
DIFF: https://github.com/llvm/llvm-project/commit/44fe4e25e45c1999f9d45e20724beb38ae505dfb.diff
LOG: [PowerPC][NFC] Fix typos in PPCISelDAGToDAG
Change:
negtive -> negative
is -> are
Thanks to tschuett for finding these.
Added:
Modified:
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 2d9b57bc00360..ed98922f860b2 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -1091,9 +1091,9 @@ static SDNode *selectI64ImmDirect(SelectionDAG *CurDAG, const SDLoc &dl,
getI32Imm(TZ), getI32Imm(LZ));
}
// 3-2) Pattern : {zeros}{31-bit value}{ones}
- // Shift right the Imm by (32 - LZ) bits to construct a negtive 32 bits value,
- // therefore we can take advantage of LIS's sign-extension semantics, add
- // the remaining bits with ORI, and then mask them off after rotation.
+ // Shift right the Imm by (32 - LZ) bits to construct a negative 32 bits
+ // value, therefore we can take advantage of LIS's sign-extension semantics,
+ // add the remaining bits with ORI, and then mask them off after rotation.
// This is similar to Pattern 2-3, please refer to the diagram there.
if ((LZ + TO) > 32) {
// Since the immediates with (LZ > 32) have been handled by previous
@@ -1285,7 +1285,7 @@ static SDNode *selectI64ImmDirectPrefix(SelectionDAG *CurDAG, const SDLoc &dl,
static SDNode *selectI64Imm(SelectionDAG *CurDAG, const SDLoc &dl, uint64_t Imm,
unsigned *InstCnt = nullptr) {
unsigned InstCntDirect = 0;
- // No more than 3 instructions is used if we can select the i64 immediate
+ // No more than 3 instructions are used if we can select the i64 immediate
// directly.
SDNode *Result = selectI64ImmDirect(CurDAG, dl, Imm, InstCntDirect);
More information about the llvm-commits
mailing list