[PATCH] D140201: [lld][ARM][1/3]Big Endian support - Removing assumptions

[Peter Smith via Phabricator via llvm-commits]

peter.smith added a comment.

I've noticed a couple of places where a .word is written in two 16-bit halves. This won't change the result for little-endian to little-endian writes, but could affect big-endian results later. It may also be worth adding [NFCI] to the title as this is a refactoring change (No Functional Changes Intended). Otherwise looks good to me.

I'll be on vacation for the next 3 weeks, happy for others to review in my absence. Otherwise will take another look in the new year.



================
Comment at: lld/ELF/Thunks.cpp:664
+  write16(buf + 6, 0xbd01);   // pop {r0, pc} ; restore r0 and branch to dest
+  write16(buf + 8, 0x0000);   // L1: .word S
+  write16(buf + 10, 0x0000);
----------------
The .word is 32-bit. This should be a `write32` rather than 2 `write16`s.


================
Comment at: lld/ELF/Thunks.cpp:687
+  write16(buf + 10, 0x46c0);  //     nop              ; pad to 4-byte boundary
+  write16(buf + 12, 0x0000);  // L2: .word S - (P + (L1 - P) + 4)
+  write16(buf + 14, 0x0000);
----------------
The .word is 32-bit. This should be a `write32` rather than 2 `write16`s


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140201/new/

https://reviews.llvm.org/D140201