[PATCH] D139417: [AArch64] add GlobalIsel support for scalar CNT instruction

[Ties Stuij via Phabricator via llvm-commits]

stuij added inline comments.


================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp:1259
                                          LegalizerHelper &Helper) const {
   // While there is no integer popcount instruction, it can
   // be more efficiently lowered to the following sequence that uses
----------------
paquette wrote:
> Does this comment need updating with this change?
yes, thanks!


================
Comment at: llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp:1297
+    auto PopRes = MRI.createGenericVirtualRegister(s64);
+    MIRBuilder.buildAdd(PopRes, Pop1Reg, Pop2Reg);
+
----------------
paquette wrote:
> `Pop1Reg` and `Pop2Reg` are only used here. Might as well fold them into the call.
> 
> Also you can just pass in the LLT and `buildAdd` will automagically create a 64-bit register for you. So you can just pass `s64` here.
> 
> Then, below, `buildZExt` can just use the 0th register of this add.
much cleaner :) thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139417/new/

https://reviews.llvm.org/D139417