[PATCH] D134982: [X86] Add support for "light" AVX

Phoebe Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 16 06:58:32 PST 2022


pengfei added a comment.

In D134982#4000705 <https://reviews.llvm.org/D134982#4000705>, @RKSimon wrote:

> In D134982#3999687 <https://reviews.llvm.org/D134982#3999687>, @TokarIP wrote:
>
>> In D134982#3999680 <https://reviews.llvm.org/D134982#3999680>, @lebedev.ri wrote:
>>
>>> I think `LightAVX` is a misnomer. If we want to
>>> always utilize full potential of vector load-store unit,
>>> then the Tuning should say as much.
>>
>> I'll probably expand this to other "light" AVX instructions (like vpcmpeq for memcmp intrinsic) in the future.
>> Also we don't want the full width, 512-bit load/stores still cause some frequency drop on skylake.
>
> Do we have a definitive list of what intel considers "light" 256-bit instructions?

I had read it from here https://lemire.me/blog/2018/09/07/avx-512-when-and-how-to-use-these-new-instructions/

  Light instructions include integer operations other than multiplication, logical operations, data shuffling (such as vpermw and vpermd) and so forth. Heavy instructions are common in deep learning, numerical analysis, high performance computing, and some cryptography (i.e., multiplication-based hashing). Light instructions tend to dominate in text processing, fast compression routines, vectorized implementations of library routines such as memcpy in C or System.arrayCopy in Java, and so forth.


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