[llvm] 0fe51a1 - [SelectionDAG] Port ARC/M68k/LoongArch after D140161

[Fangrui Song via llvm-commits]

Author: Fangrui Song
Date: 2022-12-16T07:34:42Z
New Revision: 0fe51a1a34bdb29bba489d49156b189b1daa9a51

URL: https://github.com/llvm/llvm-project/commit/0fe51a1a34bdb29bba489d49156b189b1daa9a51
DIFF: https://github.com/llvm/llvm-project/commit/0fe51a1a34bdb29bba489d49156b189b1daa9a51.diff

LOG: [SelectionDAG] Port ARC/M68k/LoongArch after D140161

Added: 
    

Modified: 
    llvm/lib/Target/ARC/ARCISelDAGToDAG.cpp
    llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
    llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
    llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARC/ARCISelDAGToDAG.cpp b/llvm/lib/Target/ARC/ARCISelDAGToDAG.cpp
index 40d9ae4603a97..a0bf17d25c3ab 100644
--- a/llvm/lib/Target/ARC/ARCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/ARC/ARCISelDAGToDAG.cpp
@@ -38,8 +38,10 @@ namespace {
 
 class ARCDAGToDAGISel : public SelectionDAGISel {
 public:
+  static char ID;
+
   ARCDAGToDAGISel(ARCTargetMachine &TM, CodeGenOpt::Level OptLevel)
-      : SelectionDAGISel(TM, OptLevel) {}
+      : SelectionDAGISel(ID, TM, OptLevel) {}
 
   void Select(SDNode *N) override;
 
@@ -57,6 +59,8 @@ class ARCDAGToDAGISel : public SelectionDAGISel {
 #include "ARCGenDAGISel.inc"
 };
 
+char ARCDAGToDAGISel::ID;
+
 } // end anonymous namespace
 
 /// This pass converts a legalized DAG into a ARC-specific DAG, ready for

diff  --git a/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp b/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
index 49684b911cc63..8dfaf6fba3d30 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
@@ -20,6 +20,8 @@ using namespace llvm;
 
 #define DEBUG_TYPE "loongarch-isel"
 
+char LoongArchDAGToDAGISel::ID;
+
 void LoongArchDAGToDAGISel::Select(SDNode *Node) {
   // If we have a custom node, we have already selected.
   if (Node->isMachineOpcode()) {

diff  --git a/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h b/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
index 49843ac610da2..3474813253aab 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
@@ -24,8 +24,10 @@ class LoongArchDAGToDAGISel : public SelectionDAGISel {
   const LoongArchSubtarget *Subtarget = nullptr;
 
 public:
+  static char ID;
+
   explicit LoongArchDAGToDAGISel(LoongArchTargetMachine &TM)
-      : SelectionDAGISel(TM) {}
+      : SelectionDAGISel(ID, TM) {}
 
   StringRef getPassName() const override {
     return "LoongArch DAG->DAG Pattern Instruction Selection";

diff  --git a/llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp b/llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp
index f9459e284aef5..dd3a1a0ced9a0 100644
--- a/llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp
+++ b/llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp
@@ -173,8 +173,10 @@ namespace {
 
 class M68kDAGToDAGISel : public SelectionDAGISel {
 public:
+  static char ID;
+
   explicit M68kDAGToDAGISel(M68kTargetMachine &TM)
-      : SelectionDAGISel(TM), Subtarget(nullptr) {}
+      : SelectionDAGISel(ID, TM), Subtarget(nullptr) {}
 
   StringRef getPassName() const override {
     return "M68k DAG->DAG Pattern Instruction Selection";
@@ -310,6 +312,8 @@ class M68kDAGToDAGISel : public SelectionDAGISel {
   /// if necessary.
   SDNode *getGlobalBaseReg();
 };
+
+char M68kDAGToDAGISel::ID;
 } // namespace
 
 bool M68kDAGToDAGISel::IsProfitableToFold(SDValue N, SDNode *U,