[PATCH] D139996: [RISCV] Disable callee-saved register when the register is written by llvm.write_register intrinsic

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 15 18:21:37 PST 2022

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jrtc27 added a comment.

AArch64 forbids it unless the register is marked reserved, which makes sense to me. I don't think this change is right.


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