[PATCH] D139422: [AMDGPU] Accelerate SIRegisterInfo::getPhysRegClass
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 15 18:01:26 PST 2022
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:1434
+ if (!Reg.isPhysical())
+ return false;
+ auto RC = TRI.getPhysRegBaseClass(Reg);
----------------
critson wrote:
> arsenm wrote:
> > It's even easier to do the class test on the virtual register
> I am sorry, I don't know what you mean by "easier".
> Easier as in less lines of code? Or, easier as in more computationally efficient?
>
> Perhaps you are suggesting we replace most of this code with a call to `TRI->isSGPRReg()`?
> However, this function should only be true for physical registers (not any SGPR reg).
I mean saying any virtual registers are not SGPRs is wrong; if this is actually reachable with virtual registers it should try to handle them. If not it should assert
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https://reviews.llvm.org/D139422/new/
https://reviews.llvm.org/D139422
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