[llvm] d459be4 - [LoopRotate] Clear block and loop dispo cache when merging blocks.

[Florian Hahn via llvm-commits]

Author: Florian Hahn
Date: 2022-12-15T22:22:22Z
New Revision: d459be4527ea4c6212382bd615f6a4ef05d9782e

URL: https://github.com/llvm/llvm-project/commit/d459be4527ea4c6212382bd615f6a4ef05d9782e
DIFF: https://github.com/llvm/llvm-project/commit/d459be4527ea4c6212382bd615f6a4ef05d9782e.diff

LOG: [LoopRotate] Clear block and loop dispo cache when merging blocks.

Merging blocks in LoopRotate may remove blocks reference in the block
disposition cache. Clear the cache.

Fixes #59534.

Added: 
    llvm/test/Transforms/LoopRotate/scev-block-and-loop-disposition-cache-invalidation.ll

Modified: 
    llvm/lib/Transforms/Utils/LoopRotationUtils.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/Utils/LoopRotationUtils.cpp b/llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
index ce1372366994b..1a9eaf2421906 100644
--- a/llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
+++ b/llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
@@ -795,6 +795,11 @@ bool LoopRotate::simplifyLoopLatch(Loop *L) {
   MergeBlockIntoPredecessor(Latch, &DTU, LI, MSSAU, nullptr,
                             /*PredecessorWithTwoSuccessors=*/true);
 
+    if (SE) {
+      // Merging blocks may remove blocks reference in the block disposition cache. Clear the cache.
+      SE->forgetBlockAndLoopDispositions();
+    }
+
   if (MSSAU && VerifyMemorySSA)
     MSSAU->getMemorySSA()->verifyMemorySSA();
 

diff  --git a/llvm/test/Transforms/LoopRotate/scev-block-and-loop-disposition-cache-invalidation.ll b/llvm/test/Transforms/LoopRotate/scev-block-and-loop-disposition-cache-invalidation.ll
new file mode 100644
index 0000000000000..499824898cd4c
--- /dev/null
+++ b/llvm/test/Transforms/LoopRotate/scev-block-and-loop-disposition-cache-invalidation.ll
@@ -0,0 +1,45 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -passes='loop-mssa(indvars,loop-rotate)' -verify-scev -S %s | FileCheck %s
+
+define void @pr59534(i16 %c.0, ptr %A) {
+; CHECK-LABEL: @pr59534(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP_HEADER:%.*]]
+; CHECK:       loop.header:
+; CHECK-NEXT:    [[C_1:%.*]] = icmp ne i16 [[C_0:%.*]], 0
+; CHECK-NEXT:    br i1 [[C_1]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
+; CHECK:       if.then:
+; CHECK-NEXT:    [[L:%.*]] = load i32, ptr [[A:%.*]], align 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[L]], 0
+; CHECK-NEXT:    [[CONV:%.*]] = zext i1 [[CMP]] to i16
+; CHECK-NEXT:    store i16 [[CONV]], ptr [[A]], align 2
+; CHECK-NEXT:    br label [[IF_END]]
+; CHECK:       if.end:
+; CHECK-NEXT:    br i1 false, label [[LOOP_HEADER]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    ret void
+;
+entry:
+  br label %loop.header
+
+loop.header:
+  %e.0 = phi i32 [ 0, %entry ], [ 1, %loop.latch ]
+  %c.1 = icmp ne i16 %c.0, 0
+  br i1 %c.1, label %if.then, label %if.end
+
+if.then:
+  %l = load i32, ptr %A, align 1
+  %cmp = icmp sgt i32 %l, %e.0
+  %conv = zext i1 %cmp to i16
+  store i16 %conv, ptr %A
+  br label %if.end
+
+if.end:
+  br i1 false, label %loop.latch, label %exit
+
+loop.latch:
+  br label %loop.header
+
+exit:
+  ret void
+}