[PATCH] D140157: [RISCV][InsertVSETVLI] Split out demanded property for zero/non-zero of VL

[Philip Reames via Phabricator via llvm-commits]

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The scalar move instructions (vmv.s.x, and fvmv.s.f) depend solely on whether the VL is 0 or non-zero.  By tracking the fact we only demand the zeroness and not the whole VL value, we can allow changing VL over a scalar move.  This helps to eliminate vsetvli toggles.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D140157

Files:
  llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
  llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
  llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vreductions-int.ll

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