[llvm] 96e4aaa - [NFC][UpdateTestChecks] Add coverage for missing !DIAssignID handling
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 15 10:21:19 PST 2022
Author: Roman Lebedev
Date: 2022-12-15T21:21:02+03:00
New Revision: 96e4aaa041bdbd247191005322582c7e86d7d06e
URL: https://github.com/llvm/llvm-project/commit/96e4aaa041bdbd247191005322582c7e86d7d06e
DIFF: https://github.com/llvm/llvm-project/commit/96e4aaa041bdbd247191005322582c7e86d7d06e.diff
LOG: [NFC][UpdateTestChecks] Add coverage for missing !DIAssignID handling
Added:
Modified:
llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll
llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected
llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected
llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected
Removed:
################################################################################
diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll
index 5456d2dbb4b7f..bc6988c4d7a31 100644
--- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll
+++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll
@@ -9,8 +9,9 @@ target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @foo(i32* %A) #0 !dbg !7 {
entry:
- %A.addr = alloca i32*, align 8
+ %A.addr = alloca i32*, align 8, !DIAssignID !62
%i = alloca i32, align 4
+ call void @llvm.dbg.assign(metadata i1 undef, metadata !13, metadata !DIExpression(), metadata !62, metadata i32** %A.addr, metadata !DIExpression()), !dbg !20
store i32* %A, i32** %A.addr, align 8, !tbaa !16
call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !13, metadata !DIExpression()), !dbg !20
%0 = bitcast i32* %i to i8*, !dbg !21
@@ -101,6 +102,8 @@ for.end: ; preds = %for.cond.cleanup
ret void, !dbg !60
}
+declare void @llvm.dbg.assign(metadata, metadata, metadata, metadata, metadata, metadata)
+
attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="ieee,ieee" "denormal-fp-math-f32"="ieee,ieee" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone speculatable willreturn }
attributes #2 = { argmemonly nounwind willreturn }
@@ -172,3 +175,4 @@ attributes #3 = { nounwind }
!59 = !DILocation(line: 10, column: 12, scope: !43)
!60 = !DILocation(line: 11, column: 1, scope: !39)
!61 = !{!"branch_weights", i32 1, i32 1048575}
+!62 = distinct !DIAssignID()
diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected
index 99f5d91159c25..cc98c0539fbd9 100644
--- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected
+++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected
@@ -11,43 +11,45 @@ target triple = "x86_64-unknown-linux-gnu"
define dso_local void @foo(i32* %A) #0 !dbg !7 {
; CHECK-LABEL: @foo(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
+; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8, !DIAssignID !16
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
-; CHECK-NEXT: store i32* [[A:%.*]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16:![0-9]+]]
-; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META13:![0-9]+]], metadata !DIExpression()), !dbg [[DBG20:![0-9]+]]
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG21:![0-9]+]]
-; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3:[0-9]+]], !dbg [[DBG21]]
-; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG22:![0-9]+]]
-; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG22]], !tbaa [[TBAA23:![0-9]+]]
-; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG21]]
+; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata [[META13:![0-9]+]], metadata !DIExpression(), metadata [[META16:![0-9]+]], metadata i32** [[A_ADDR]], metadata !DIExpression()), !dbg [[DBG17:![0-9]+]]
+; CHECK-NEXT: store i32* [[A:%.*]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA18:![0-9]+]]
+; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META13]], metadata !DIExpression()), !dbg [[DBG17]]
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG22:![0-9]+]]
+; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3:[0-9]+]], !dbg [[DBG22]]
+; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG23:![0-9]+]]
+; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG23]], !tbaa [[TBAA24:![0-9]+]]
+; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG22]]
; CHECK: for.cond:
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG25:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG27:![0-9]+]], !tbaa [[TBAA16]]
-; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG29:![0-9]+]]
-; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]], !prof [[PROF31:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG26:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA18]]
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG29:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG30:![0-9]+]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG31:![0-9]+]], !prof [[PROF32:![0-9]+]]
; CHECK: for.cond.cleanup:
-; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG32:![0-9]+]]
-; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG32]]
+; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG33:![0-9]+]]
+; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG33]]
; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA16]]
-; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG33]]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG33]]
-; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG33]]
+; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA18]]
+; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG34]]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG34]]
+; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG34]]
; CHECK: for.inc:
-; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG36]]
-; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG36]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG32]], !llvm.loop [[LOOP37:![0-9]+]]
+; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG37:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG37]]
+; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG37]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG33]], !llvm.loop [[LOOP38:![0-9]+]]
; CHECK: for.end:
-; CHECK-NEXT: ret void, !dbg [[DBG39:![0-9]+]]
+; CHECK-NEXT: ret void, !dbg [[DBG40:![0-9]+]]
;
entry:
- %A.addr = alloca i32*, align 8
+ %A.addr = alloca i32*, align 8, !DIAssignID !62
%i = alloca i32, align 4
+ call void @llvm.dbg.assign(metadata i1 undef, metadata !13, metadata !DIExpression(), metadata !62, metadata i32** %A.addr, metadata !DIExpression()), !dbg !20
store i32* %A, i32** %A.addr, align 8, !tbaa !16
call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !13, metadata !DIExpression()), !dbg !20
%0 = bitcast i32* %i to i8*, !dbg !21
@@ -101,37 +103,37 @@ define dso_local void @bar(i32* %A) #0 !dbg !39 {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
-; CHECK-NEXT: store i32* [[A:%.*]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16]]
-; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG45:![0-9]+]]
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG46:![0-9]+]]
-; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG46]]
-; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG47:![0-9]+]]
-; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG47]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG46]]
+; CHECK-NEXT: store i32* [[A:%.*]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA18]]
+; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]]
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG47:![0-9]+]]
+; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG47]]
+; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META44:![0-9]+]], metadata !DIExpression()), !dbg [[DBG48:![0-9]+]]
+; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG48]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG47]]
; CHECK: for.cond:
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG48:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA16]]
-; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG52:![0-9]+]]
-; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG53:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA18]]
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG52:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG53:![0-9]+]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG54:![0-9]+]]
; CHECK: for.cond.cleanup:
-; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG54:![0-9]+]]
-; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG54]]
+; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG55:![0-9]+]]
+; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG55]]
; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA16]]
-; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG55]]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG55]]
-; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG55]]
+; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA18]]
+; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG56]]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG56]]
+; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG56]]
; CHECK: for.inc:
-; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG58]]
-; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG58]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG54]], !llvm.loop [[LOOP59:![0-9]+]]
+; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG59:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG59]]
+; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG59]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG55]], !llvm.loop [[LOOP60:![0-9]+]]
; CHECK: for.end:
-; CHECK-NEXT: ret void, !dbg [[DBG61:![0-9]+]]
+; CHECK-NEXT: ret void, !dbg [[DBG62:![0-9]+]]
;
entry:
%A.addr = alloca i32*, align 8
@@ -174,6 +176,8 @@ for.end: ; preds = %for.cond.cleanup
ret void, !dbg !60
}
+declare void @llvm.dbg.assign(metadata, metadata, metadata, metadata, metadata, metadata)
+
attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="ieee,ieee" "denormal-fp-math-f32"="ieee,ieee" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone speculatable willreturn }
attributes #2 = { argmemonly nounwind willreturn }
@@ -245,3 +249,4 @@ attributes #3 = { nounwind }
!59 = !DILocation(line: 10, column: 12, scope: !43)
!60 = !DILocation(line: 11, column: 1, scope: !39)
!61 = !{!"branch_weights", i32 1, i32 1048575}
+!62 = distinct !DIAssignID()
diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected
index 5657c0830643e..1ee2dcfc5f264 100644
--- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected
+++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected
@@ -12,43 +12,45 @@ define dso_local void @foo(i32* %A) #0 !dbg !7 {
; CHECK-LABEL: define {{[^@]+}}@foo
; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG7:![0-9]+]] {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
+; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8, !DIAssignID !16
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
-; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16:![0-9]+]]
-; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META13:![0-9]+]], metadata !DIExpression()), !dbg [[DBG20:![0-9]+]]
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG21:![0-9]+]]
-; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3:[0-9]+]], !dbg [[DBG21]]
-; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG22:![0-9]+]]
-; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG22]], !tbaa [[TBAA23:![0-9]+]]
-; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG21]]
+; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata [[META13:![0-9]+]], metadata !DIExpression(), metadata [[META16:![0-9]+]], metadata i32** [[A_ADDR]], metadata !DIExpression()), !dbg [[DBG17:![0-9]+]]
+; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA18:![0-9]+]]
+; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META13]], metadata !DIExpression()), !dbg [[DBG17]]
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG22:![0-9]+]]
+; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3:[0-9]+]], !dbg [[DBG22]]
+; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG23:![0-9]+]]
+; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG23]], !tbaa [[TBAA24:![0-9]+]]
+; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG22]]
; CHECK: for.cond:
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG25:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG27:![0-9]+]], !tbaa [[TBAA16]]
-; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG29:![0-9]+]]
-; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]], !prof [[PROF31:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG26:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA18]]
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG29:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG30:![0-9]+]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG31:![0-9]+]], !prof [[PROF32:![0-9]+]]
; CHECK: for.cond.cleanup:
-; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG32:![0-9]+]]
-; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG32]]
+; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG33:![0-9]+]]
+; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG33]]
; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA16]]
-; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG33]]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG33]]
-; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG33]]
+; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA18]]
+; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG34]]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG34]]
+; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG34]]
; CHECK: for.inc:
-; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG36]]
-; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG36]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG32]], !llvm.loop [[LOOP37:![0-9]+]]
+; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG37:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG37]]
+; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG37]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG33]], !llvm.loop [[LOOP38:![0-9]+]]
; CHECK: for.end:
-; CHECK-NEXT: ret void, !dbg [[DBG39:![0-9]+]]
+; CHECK-NEXT: ret void, !dbg [[DBG40:![0-9]+]]
;
entry:
- %A.addr = alloca i32*, align 8
+ %A.addr = alloca i32*, align 8, !DIAssignID !62
%i = alloca i32, align 4
+ call void @llvm.dbg.assign(metadata i1 undef, metadata !13, metadata !DIExpression(), metadata !62, metadata i32** %A.addr, metadata !DIExpression()), !dbg !20
store i32* %A, i32** %A.addr, align 8, !tbaa !16
call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !13, metadata !DIExpression()), !dbg !20
%0 = bitcast i32* %i to i8*, !dbg !21
@@ -99,41 +101,41 @@ declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #2
; Function Attrs: nounwind uwtable
define dso_local void @bar(i32* %A) #0 !dbg !39 {
; CHECK-LABEL: define {{[^@]+}}@bar
-; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0]] !dbg [[DBG40:![0-9]+]] {
+; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0]] !dbg [[DBG41:![0-9]+]] {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
-; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16]]
-; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG45:![0-9]+]]
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG46:![0-9]+]]
-; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG46]]
-; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG47:![0-9]+]]
-; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG47]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG46]]
+; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA18]]
+; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]]
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG47:![0-9]+]]
+; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG47]]
+; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META44:![0-9]+]], metadata !DIExpression()), !dbg [[DBG48:![0-9]+]]
+; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG48]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG47]]
; CHECK: for.cond:
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG48:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA16]]
-; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG52:![0-9]+]]
-; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG53:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA18]]
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG52:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG53:![0-9]+]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG54:![0-9]+]]
; CHECK: for.cond.cleanup:
-; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG54:![0-9]+]]
-; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG54]]
+; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG55:![0-9]+]]
+; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG55]]
; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA16]]
-; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG55]]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG55]]
-; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG55]]
+; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA18]]
+; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG56]]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG56]]
+; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG56]]
; CHECK: for.inc:
-; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG58]]
-; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG58]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG54]], !llvm.loop [[LOOP59:![0-9]+]]
+; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG59:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG59]]
+; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG59]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG55]], !llvm.loop [[LOOP60:![0-9]+]]
; CHECK: for.end:
-; CHECK-NEXT: ret void, !dbg [[DBG61:![0-9]+]]
+; CHECK-NEXT: ret void, !dbg [[DBG62:![0-9]+]]
;
entry:
%A.addr = alloca i32*, align 8
@@ -176,6 +178,8 @@ for.end: ; preds = %for.cond.cleanup
ret void, !dbg !60
}
+declare void @llvm.dbg.assign(metadata, metadata, metadata, metadata, metadata, metadata)
+
attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="ieee,ieee" "denormal-fp-math-f32"="ieee,ieee" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone speculatable willreturn }
attributes #2 = { argmemonly nounwind willreturn }
@@ -247,3 +251,4 @@ attributes #3 = { nounwind }
!59 = !DILocation(line: 10, column: 12, scope: !43)
!60 = !DILocation(line: 11, column: 1, scope: !39)
!61 = !{!"branch_weights", i32 1, i32 1048575}
+!62 = distinct !DIAssignID()
diff --git a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected
index 345a5223fedb4..bcde7d762e304 100644
--- a/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected
+++ b/llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected
@@ -12,43 +12,45 @@ define dso_local void @foo(i32* %A) #0 !dbg !7 {
; CHECK-LABEL: define {{[^@]+}}@foo
; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0:[0-9]+]] !dbg [[DBG7:![0-9]+]] {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
+; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8, !DIAssignID !16
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
-; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16:![0-9]+]]
-; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META13:![0-9]+]], metadata !DIExpression()), !dbg [[DBG20:![0-9]+]]
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG21:![0-9]+]]
-; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3:[0-9]+]], !dbg [[DBG21]]
-; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG22:![0-9]+]]
-; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG22]], !tbaa [[TBAA23:![0-9]+]]
-; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG21]]
+; CHECK-NEXT: call void @llvm.dbg.assign(metadata i1 undef, metadata [[META13:![0-9]+]], metadata !DIExpression(), metadata [[META16:![0-9]+]], metadata i32** [[A_ADDR]], metadata !DIExpression()), !dbg [[DBG17:![0-9]+]]
+; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA18:![0-9]+]]
+; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META13]], metadata !DIExpression()), !dbg [[DBG17]]
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG22:![0-9]+]]
+; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3:[0-9]+]], !dbg [[DBG22]]
+; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META14:![0-9]+]], metadata !DIExpression()), !dbg [[DBG23:![0-9]+]]
+; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG23]], !tbaa [[TBAA24:![0-9]+]]
+; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG22]]
; CHECK: for.cond:
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG25:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG27:![0-9]+]], !tbaa [[TBAA16]]
-; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG29:![0-9]+]]
-; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG30:![0-9]+]], !prof [[PROF31:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG26:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG28:![0-9]+]], !tbaa [[TBAA18]]
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG29:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG30:![0-9]+]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG31:![0-9]+]], !prof [[PROF32:![0-9]+]]
; CHECK: for.cond.cleanup:
-; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG32:![0-9]+]]
-; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG32]]
+; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG33:![0-9]+]]
+; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG33]]
; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA16]]
-; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG33]]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG33]]
-; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG33]]
+; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG34:![0-9]+]], !tbaa [[TBAA18]]
+; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG35:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG34]]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG34]]
+; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG34]]
; CHECK: for.inc:
-; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG36:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG36]]
-; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG36]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG32]], !llvm.loop [[LOOP37:![0-9]+]]
+; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG37:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG37]]
+; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG37]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG33]], !llvm.loop [[LOOP38:![0-9]+]]
; CHECK: for.end:
-; CHECK-NEXT: ret void, !dbg [[DBG39:![0-9]+]]
+; CHECK-NEXT: ret void, !dbg [[DBG40:![0-9]+]]
;
entry:
- %A.addr = alloca i32*, align 8
+ %A.addr = alloca i32*, align 8, !DIAssignID !62
%i = alloca i32, align 4
+ call void @llvm.dbg.assign(metadata i1 undef, metadata !13, metadata !DIExpression(), metadata !62, metadata i32** %A.addr, metadata !DIExpression()), !dbg !20
store i32* %A, i32** %A.addr, align 8, !tbaa !16
call void @llvm.dbg.declare(metadata i32** %A.addr, metadata !13, metadata !DIExpression()), !dbg !20
%0 = bitcast i32* %i to i8*, !dbg !21
@@ -99,41 +101,41 @@ declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #2
; Function Attrs: nounwind uwtable
define dso_local void @bar(i32* %A) #0 !dbg !39 {
; CHECK-LABEL: define {{[^@]+}}@bar
-; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0]] !dbg [[DBG40:![0-9]+]] {
+; CHECK-SAME: (i32* [[A:%.*]]) #[[ATTR0]] !dbg [[DBG41:![0-9]+]] {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
-; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA16]]
-; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META42:![0-9]+]], metadata !DIExpression()), !dbg [[DBG45:![0-9]+]]
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG46:![0-9]+]]
-; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG46]]
-; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG47:![0-9]+]]
-; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG47]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG46]]
+; CHECK-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8, !tbaa [[TBAA18]]
+; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32** [[A_ADDR]], metadata [[META43:![0-9]+]], metadata !DIExpression()), !dbg [[DBG46:![0-9]+]]
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG47:![0-9]+]]
+; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[TMP0]]) #[[ATTR3]], !dbg [[DBG47]]
+; CHECK-NEXT: call void @llvm.dbg.declare(metadata i32* [[I]], metadata [[META44:![0-9]+]], metadata !DIExpression()), !dbg [[DBG48:![0-9]+]]
+; CHECK-NEXT: store i32 0, i32* [[I]], align 4, !dbg [[DBG48]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_COND:%.*]], !dbg [[DBG47]]
; CHECK: for.cond:
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG48:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG50:![0-9]+]], !tbaa [[TBAA16]]
-; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG52:![0-9]+]]
-; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG53:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG49:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG51:![0-9]+]], !tbaa [[TBAA18]]
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4, !dbg [[DBG52:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], [[TMP3]], !dbg [[DBG53:![0-9]+]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]], !dbg [[DBG54:![0-9]+]]
; CHECK: for.cond.cleanup:
-; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG54:![0-9]+]]
-; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG54]]
+; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[I]] to i8*, !dbg [[DBG55:![0-9]+]]
+; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[TMP4]]) #[[ATTR3]], !dbg [[DBG55]]
; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG55:![0-9]+]], !tbaa [[TBAA16]]
-; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG55]]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG55]]
-; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG55]]
+; CHECK-NEXT: [[TMP5:%.*]] = load i32*, i32** [[A_ADDR]], align 8, !dbg [[DBG56:![0-9]+]], !tbaa [[TBAA18]]
+; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG57:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64, !dbg [[DBG56]]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i64 [[IDXPROM]], !dbg [[DBG56]]
+; CHECK-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_INC:%.*]], !dbg [[DBG56]]
; CHECK: for.inc:
-; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG58:![0-9]+]], !tbaa [[TBAA23]]
-; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG58]]
-; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG58]], !tbaa [[TBAA23]]
-; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG54]], !llvm.loop [[LOOP59:![0-9]+]]
+; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4, !dbg [[DBG59:![0-9]+]], !tbaa [[TBAA24]]
+; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1, !dbg [[DBG59]]
+; CHECK-NEXT: store i32 [[INC]], i32* [[I]], align 4, !dbg [[DBG59]], !tbaa [[TBAA24]]
+; CHECK-NEXT: br label [[FOR_COND]], !dbg [[DBG55]], !llvm.loop [[LOOP60:![0-9]+]]
; CHECK: for.end:
-; CHECK-NEXT: ret void, !dbg [[DBG61:![0-9]+]]
+; CHECK-NEXT: ret void, !dbg [[DBG62:![0-9]+]]
;
entry:
%A.addr = alloca i32*, align 8
@@ -176,6 +178,8 @@ for.end: ; preds = %for.cond.cleanup
ret void, !dbg !60
}
+declare void @llvm.dbg.assign(metadata, metadata, metadata, metadata, metadata, metadata)
+
attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="ieee,ieee" "denormal-fp-math-f32"="ieee,ieee" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone speculatable willreturn }
attributes #2 = { argmemonly nounwind willreturn }
@@ -247,6 +251,7 @@ attributes #3 = { nounwind }
!59 = !DILocation(line: 10, column: 12, scope: !43)
!60 = !DILocation(line: 11, column: 1, scope: !39)
!61 = !{!"branch_weights", i32 1, i32 1048575}
+!62 = distinct !DIAssignID()
;.
; CHECK: attributes #[[ATTR0]] = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="ieee,ieee" "denormal-fp-math-f32"="ieee,ieee" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
@@ -269,50 +274,51 @@ attributes #3 = { nounwind }
; CHECK: [[META13]] = !DILocalVariable(name: "A", arg: 1, scope: !7, file: !1, line: 1, type: !10)
; CHECK: [[META14]] = !DILocalVariable(name: "i", scope: !15, file: !1, line: 3, type: !11)
; CHECK: [[META15:![0-9]+]] = distinct !DILexicalBlock(scope: !7, file: !1, line: 3, column: 3)
-; CHECK: [[TBAA16]] = !{!17, !17, i64 0}
-; CHECK: [[META17:![0-9]+]] = !{!"any pointer", !18, i64 0}
-; CHECK: [[META18:![0-9]+]] = !{!"omnipotent char", !19, i64 0}
-; CHECK: [[META19:![0-9]+]] = !{!"Simple C/C++ TBAA"}
-; CHECK: [[DBG20]] = !DILocation(line: 1, column: 15, scope: !7)
-; CHECK: [[DBG21]] = !DILocation(line: 3, column: 8, scope: !15)
-; CHECK: [[DBG22]] = !DILocation(line: 3, column: 12, scope: !15)
-; CHECK: [[TBAA23]] = !{!24, !24, i64 0}
-; CHECK: [[META24:![0-9]+]] = !{!"int", !18, i64 0}
-; CHECK: [[DBG25]] = !DILocation(line: 3, column: 19, scope: !26)
-; CHECK: [[META26:![0-9]+]] = distinct !DILexicalBlock(scope: !15, file: !1, line: 3, column: 3)
-; CHECK: [[DBG27]] = !DILocation(line: 3, column: 24, scope: !26)
-; CHECK: [[DBG28]] = !DILocation(line: 3, column: 23, scope: !26)
-; CHECK: [[DBG29]] = !DILocation(line: 3, column: 21, scope: !26)
-; CHECK: [[DBG30]] = !DILocation(line: 3, column: 3, scope: !15)
-; CHECK: [[PROF31]] = !{!"branch_weights", i32 1, i32 1048575}
-; CHECK: [[DBG32]] = !DILocation(line: 3, column: 3, scope: !26)
-; CHECK: [[DBG33]] = !DILocation(line: 4, column: 5, scope: !26)
-; CHECK: [[DBG34]] = !DILocation(line: 4, column: 7, scope: !26)
-; CHECK: [[DBG35]] = !DILocation(line: 4, column: 10, scope: !26)
-; CHECK: [[DBG36]] = !DILocation(line: 3, column: 27, scope: !26)
-; CHECK: [[LOOP37]] = distinct !{!37, !30, !38}
-; CHECK: [[META38:![0-9]+]] = !DILocation(line: 4, column: 12, scope: !15)
-; CHECK: [[DBG39]] = !DILocation(line: 5, column: 1, scope: !7)
-; CHECK: [[DBG40]] = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 7, type: !8, scopeLine: 7, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !41)
-; CHECK: [[META41:![0-9]+]] = !{!42, !43}
-; CHECK: [[META42]] = !DILocalVariable(name: "A", arg: 1, scope: !40, file: !1, line: 7, type: !10)
-; CHECK: [[META43]] = !DILocalVariable(name: "i", scope: !44, file: !1, line: 9, type: !11)
-; CHECK: [[META44:![0-9]+]] = distinct !DILexicalBlock(scope: !40, file: !1, line: 9, column: 3)
-; CHECK: [[DBG45]] = !DILocation(line: 7, column: 15, scope: !40)
-; CHECK: [[DBG46]] = !DILocation(line: 9, column: 8, scope: !44)
-; CHECK: [[DBG47]] = !DILocation(line: 9, column: 12, scope: !44)
-; CHECK: [[DBG48]] = !DILocation(line: 9, column: 19, scope: !49)
-; CHECK: [[META49:![0-9]+]] = distinct !DILexicalBlock(scope: !44, file: !1, line: 9, column: 3)
-; CHECK: [[DBG50]] = !DILocation(line: 9, column: 24, scope: !49)
-; CHECK: [[DBG51]] = !DILocation(line: 9, column: 23, scope: !49)
-; CHECK: [[DBG52]] = !DILocation(line: 9, column: 21, scope: !49)
-; CHECK: [[DBG53]] = !DILocation(line: 9, column: 3, scope: !44)
-; CHECK: [[DBG54]] = !DILocation(line: 9, column: 3, scope: !49)
-; CHECK: [[DBG55]] = !DILocation(line: 10, column: 5, scope: !49)
-; CHECK: [[DBG56]] = !DILocation(line: 10, column: 7, scope: !49)
-; CHECK: [[DBG57]] = !DILocation(line: 10, column: 10, scope: !49)
-; CHECK: [[DBG58]] = !DILocation(line: 9, column: 27, scope: !49)
-; CHECK: [[LOOP59]] = distinct !{!59, !53, !60}
-; CHECK: [[META60:![0-9]+]] = !DILocation(line: 10, column: 12, scope: !44)
-; CHECK: [[DBG61]] = !DILocation(line: 11, column: 1, scope: !40)
+; CHECK: [[META16]] = distinct !DIAssignID()
+; CHECK: [[DBG17]] = !DILocation(line: 1, column: 15, scope: !7)
+; CHECK: [[TBAA18]] = !{!19, !19, i64 0}
+; CHECK: [[META19:![0-9]+]] = !{!"any pointer", !20, i64 0}
+; CHECK: [[META20:![0-9]+]] = !{!"omnipotent char", !21, i64 0}
+; CHECK: [[META21:![0-9]+]] = !{!"Simple C/C++ TBAA"}
+; CHECK: [[DBG22]] = !DILocation(line: 3, column: 8, scope: !15)
+; CHECK: [[DBG23]] = !DILocation(line: 3, column: 12, scope: !15)
+; CHECK: [[TBAA24]] = !{!25, !25, i64 0}
+; CHECK: [[META25:![0-9]+]] = !{!"int", !20, i64 0}
+; CHECK: [[DBG26]] = !DILocation(line: 3, column: 19, scope: !27)
+; CHECK: [[META27:![0-9]+]] = distinct !DILexicalBlock(scope: !15, file: !1, line: 3, column: 3)
+; CHECK: [[DBG28]] = !DILocation(line: 3, column: 24, scope: !27)
+; CHECK: [[DBG29]] = !DILocation(line: 3, column: 23, scope: !27)
+; CHECK: [[DBG30]] = !DILocation(line: 3, column: 21, scope: !27)
+; CHECK: [[DBG31]] = !DILocation(line: 3, column: 3, scope: !15)
+; CHECK: [[PROF32]] = !{!"branch_weights", i32 1, i32 1048575}
+; CHECK: [[DBG33]] = !DILocation(line: 3, column: 3, scope: !27)
+; CHECK: [[DBG34]] = !DILocation(line: 4, column: 5, scope: !27)
+; CHECK: [[DBG35]] = !DILocation(line: 4, column: 7, scope: !27)
+; CHECK: [[DBG36]] = !DILocation(line: 4, column: 10, scope: !27)
+; CHECK: [[DBG37]] = !DILocation(line: 3, column: 27, scope: !27)
+; CHECK: [[LOOP38]] = distinct !{!38, !31, !39}
+; CHECK: [[META39:![0-9]+]] = !DILocation(line: 4, column: 12, scope: !15)
+; CHECK: [[DBG40]] = !DILocation(line: 5, column: 1, scope: !7)
+; CHECK: [[DBG41]] = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 7, type: !8, scopeLine: 7, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !42)
+; CHECK: [[META42:![0-9]+]] = !{!43, !44}
+; CHECK: [[META43]] = !DILocalVariable(name: "A", arg: 1, scope: !41, file: !1, line: 7, type: !10)
+; CHECK: [[META44]] = !DILocalVariable(name: "i", scope: !45, file: !1, line: 9, type: !11)
+; CHECK: [[META45:![0-9]+]] = distinct !DILexicalBlock(scope: !41, file: !1, line: 9, column: 3)
+; CHECK: [[DBG46]] = !DILocation(line: 7, column: 15, scope: !41)
+; CHECK: [[DBG47]] = !DILocation(line: 9, column: 8, scope: !45)
+; CHECK: [[DBG48]] = !DILocation(line: 9, column: 12, scope: !45)
+; CHECK: [[DBG49]] = !DILocation(line: 9, column: 19, scope: !50)
+; CHECK: [[META50:![0-9]+]] = distinct !DILexicalBlock(scope: !45, file: !1, line: 9, column: 3)
+; CHECK: [[DBG51]] = !DILocation(line: 9, column: 24, scope: !50)
+; CHECK: [[DBG52]] = !DILocation(line: 9, column: 23, scope: !50)
+; CHECK: [[DBG53]] = !DILocation(line: 9, column: 21, scope: !50)
+; CHECK: [[DBG54]] = !DILocation(line: 9, column: 3, scope: !45)
+; CHECK: [[DBG55]] = !DILocation(line: 9, column: 3, scope: !50)
+; CHECK: [[DBG56]] = !DILocation(line: 10, column: 5, scope: !50)
+; CHECK: [[DBG57]] = !DILocation(line: 10, column: 7, scope: !50)
+; CHECK: [[DBG58]] = !DILocation(line: 10, column: 10, scope: !50)
+; CHECK: [[DBG59]] = !DILocation(line: 9, column: 27, scope: !50)
+; CHECK: [[LOOP60]] = distinct !{!60, !54, !61}
+; CHECK: [[META61:![0-9]+]] = !DILocation(line: 10, column: 12, scope: !45)
+; CHECK: [[DBG62]] = !DILocation(line: 11, column: 1, scope: !41)
;.
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