[PATCH] D135462: [SelectionDAG] Do not second-guess alignment for alloca

[Andrew Savonichev via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGffedf47d8b79: [SelectionDAG] Do not second-guess alignment for alloca (authored by asavonic).

Changed prior to commit:
  https://reviews.llvm.org/D135462?vs=482160&id=483179#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135462/new/

https://reviews.llvm.org/D135462

Files:
  llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
  llvm/test/CodeGen/AArch64/preferred-alignment.ll
  llvm/test/CodeGen/AArch64/seh-finally.ll
  llvm/test/CodeGen/AMDGPU/call-argument-types.ll
  llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
  llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
  llvm/test/CodeGen/ARM/ssp-data-layout.ll
  llvm/test/CodeGen/BPF/pr57872.ll
  llvm/test/CodeGen/BPF/undef.ll
  llvm/test/CodeGen/Mips/Fast-ISel/fastalloca.ll
  llvm/test/CodeGen/Mips/atomic64.ll
  llvm/test/CodeGen/Mips/cconv/byval.ll
  llvm/test/CodeGen/Mips/cconv/return-struct.ll
  llvm/test/CodeGen/Mips/largeimmprinting.ll
  llvm/test/CodeGen/Mips/o32_cc_byval.ll
  llvm/test/CodeGen/NVPTX/lower-byval-args.ll
  llvm/test/CodeGen/PowerPC/aix-cc-byval.ll
  llvm/test/CodeGen/PowerPC/aix-sret-param.ll
  llvm/test/CodeGen/PowerPC/byval.ll
  llvm/test/CodeGen/PowerPC/structsinregs.ll
  llvm/test/CodeGen/PowerPC/varargs-struct-float.ll
  llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
  llvm/test/CodeGen/RISCV/frame.ll
  llvm/test/CodeGen/RISCV/mem64.ll
  llvm/test/CodeGen/RISCV/vararg.ll
  llvm/test/CodeGen/Thumb2/mve-stack.ll
  llvm/test/CodeGen/VE/Scalar/atomic_cmp_swap.ll
  llvm/test/CodeGen/VE/Scalar/atomic_load.ll
  llvm/test/CodeGen/VE/Scalar/atomic_swap.ll
  llvm/test/CodeGen/WebAssembly/PR40172.ll
  llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll
  llvm/test/CodeGen/X86/fast-isel-call.ll
  llvm/test/CodeGen/X86/load-local-v3i129.ll
  llvm/test/CodeGen/X86/pr44140.ll
  llvm/test/CodeGen/X86/ssp-data-layout.ll
  llvm/test/CodeGen/X86/win-cleanuppad.ll
  llvm/test/CodeGen/X86/x86-mixed-alignment-dagcombine.ll
  llvm/test/DebugInfo/AArch64/frameindices.ll
  llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
  llvm/test/DebugInfo/X86/dbg-addr.ll
  llvm/test/DebugInfo/X86/dbg-declare-alloca.ll
  llvm/test/DebugInfo/X86/sret.ll
  llvm/test/DebugInfo/assignment-tracking/X86/nested-loop-frags.ll

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