[PATCH] D138521: [X86] Support ANDNP combine through broadcast instructions with scalar input

Evgenii Kudriashov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 14 19:10:07 PST 2022


e-kud marked an inline comment as done.
e-kud added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:48218
+          DAG.getNode(ISD::INSERT_VECTOR_ELT, SDLoc(IVEN), IVEN.getValueType(),
+                      IVEN.getOperand(0), Not, IVEN.getOperand(2));
+      return DAG.getVectorShuffle(SVN->getValueType(0), SDLoc(SVN), NotIVEN,
----------------
RKSimon wrote:
> You might need to bitcast this back to Src.getValueType() - its less likely for scalars but IsNOT can peek through bitcasts
Indeed, I added a test where a result of xor is bitcasted and got a failed assertion. Thank you!


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  https://reviews.llvm.org/D138521/new/

https://reviews.llvm.org/D138521



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