[PATCH] D139981: [EarlyIfConversion] Add target hook to allow for multiple ifcvt iterations.

[Hendrik Greving via Phabricator via llvm-commits]

hgreving updated this revision to Diff 482892.
hgreving retitled this revision from "[EarlyIfConversion] Add switch to allow for multiple ifcvt iterations." to "[EarlyIfConversion] Add target hook to allow for multiple ifcvt iterations.".
hgreving edited the summary of this revision.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139981/new/

https://reviews.llvm.org/D139981

Files:
  llvm/include/llvm/CodeGen/TargetInstrInfo.h
  llvm/lib/CodeGen/EarlyIfConversion.cpp


Index: llvm/lib/CodeGen/EarlyIfConversion.cpp
===================================================================
--- llvm/lib/CodeGen/EarlyIfConversion.cpp
+++ llvm/lib/CodeGen/EarlyIfConversion.cpp
@@ -321,9 +321,15 @@
       return false;
     }
 
-    // Check that instruction is predicable and that it is not already
-    // predicated.
-    if (!TII->isPredicable(*I) || TII->isPredicated(*I)) {
+    // Check that instruction is predicable
+    if (!TII->isPredicable(*I)) {
+      LLVM_DEBUG(dbgs() << "Isn't predicable: " << *I);
+      return false;
+    }
+
+    // Check that instruction is not already predicated.
+    if (TII->isPredicated(*I) && !TII->canPredicatePredicatedInstr(*I)) {
+      LLVM_DEBUG(dbgs() << "Is already predicated: " << *I);
       return false;
     }
 
Index: llvm/include/llvm/CodeGen/TargetInstrInfo.h
===================================================================
--- llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -1464,6 +1464,13 @@
   /// Returns true if the instruction is already predicated.
   virtual bool isPredicated(const MachineInstr &MI) const { return false; }
 
+  /// Assumes the instruction is already predicated and returns true if the
+  /// instruction can be predicated again.
+  virtual bool canPredicatePredicatedInstr(const MachineInstr &MI) const {
+    assert(isPredicated(MI) && "Instruction is not predicated");
+    return false;
+  }
+
   // Returns a MIRPrinter comment for this machine operand.
   virtual std::string
   createMIROperandComment(const MachineInstr &MI, const MachineOperand &Op,


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D139981.482892.patch
Type: text/x-patch
Size: 1624 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20221214/0001b0a8/attachment.bin>