[PATCH] D139965: [RISCV] Add a bit to TSFlags to mark SignExtendingOpW instructions for SExtWRemoval.

[Alex Bradbury via Phabricator via llvm-commits]

asb added inline comments.


================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h:100
+  // Indicates that the result can be considered sign extended from bit 31.
+  //   // Use by SExtWRemoval
+  IsSignExtendingOpWShift = UsesMaskPolicyShift + 1,
----------------
Line wrapping related error? Should be "Used by SextWRemoval." too?

It would be nice to maintain a version of the comment from RISCVSExtWRemoval.cpp too. e.g. "Some instructions with this flag aren't W instructions, but are either sign extended from a smaller size, always outputs a small integer, or put zeros in bits 63:31."


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrFormats.td:209
+  // Indicates that the result can be considered sign extended from bit 31.
+  // Use by SExtWRemoval.
+  bit IsSignExtendingOpW = 0;
----------------
"Used by"


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139965/new/

https://reviews.llvm.org/D139965