[llvm] 3ce360f - [IndVarSimplify] Convert more tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 14 06:38:07 PST 2022
Author: Nikita Popov
Date: 2022-12-14T15:37:58+01:00
New Revision: 3ce360f15b5a790a5fd9dcab716bbed7b4d3a347
URL: https://github.com/llvm/llvm-project/commit/3ce360f15b5a790a5fd9dcab716bbed7b4d3a347
DIFF: https://github.com/llvm/llvm-project/commit/3ce360f15b5a790a5fd9dcab716bbed7b4d3a347.diff
LOG: [IndVarSimplify] Convert more tests to opaque pointers (NFC)
Added:
Modified:
llvm/test/Transforms/IndVarSimplify/2011-10-27-lftrnull.ll
llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll
llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll
llvm/test/Transforms/IndVarSimplify/ARM/indvar-cost.ll
llvm/test/Transforms/IndVarSimplify/ARM/indvar-unroll-imm-cost.ll
llvm/test/Transforms/IndVarSimplify/X86/eliminate-congruent-ivs.ll
llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll
llvm/test/Transforms/IndVarSimplify/X86/replace-iv-with-loop-invariant.ll
llvm/test/Transforms/IndVarSimplify/ashr-expansion.ll
llvm/test/Transforms/IndVarSimplify/casted-argument.ll
llvm/test/Transforms/IndVarSimplify/cycled_phis.ll
llvm/test/Transforms/IndVarSimplify/eliminate-comparison.ll
llvm/test/Transforms/IndVarSimplify/exit_value_test2.ll
llvm/test/Transforms/IndVarSimplify/iv-widen-elim-ext.ll
llvm/test/Transforms/IndVarSimplify/lftr-address-space-pointers.ll
llvm/test/Transforms/IndVarSimplify/lftr-pr31181.ll
llvm/test/Transforms/IndVarSimplify/lftr-reuse.ll
llvm/test/Transforms/IndVarSimplify/loop-predication.ll
llvm/test/Transforms/IndVarSimplify/no-iv-rewrite.ll
llvm/test/Transforms/IndVarSimplify/pr24783.ll
llvm/test/Transforms/IndVarSimplify/pr28705.ll
llvm/test/Transforms/IndVarSimplify/pr45835.ll
llvm/test/Transforms/IndVarSimplify/predicated_ranges.ll
llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-values-phi.ll
llvm/test/Transforms/IndVarSimplify/scev-expander-preserve-lcssa.ll
llvm/test/Transforms/IndVarSimplify/widen-i32-i8ptr.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/IndVarSimplify/2011-10-27-lftrnull.ll b/llvm/test/Transforms/IndVarSimplify/2011-10-27-lftrnull.ll
index 85facc232fe8c..5113451ca5d59 100644
--- a/llvm/test/Transforms/IndVarSimplify/2011-10-27-lftrnull.ll
+++ b/llvm/test/Transforms/IndVarSimplify/2011-10-27-lftrnull.ll
@@ -27,13 +27,13 @@ define void @test() nounwind {
; CHECK: for.body21.lr.ph.i:
; CHECK-NEXT: br label [[FOR_BODY21_I:%.*]]
; CHECK: for.body21.i:
-; CHECK-NEXT: [[DESTYPIXELPTR_010_I:%.*]] = phi i8* [ null, [[FOR_BODY21_LR_PH_I]] ], [ [[INCDEC_PTR_I:%.*]], [[IF_END_I126:%.*]] ]
+; CHECK-NEXT: [[DESTYPIXELPTR_010_I:%.*]] = phi ptr [ null, [[FOR_BODY21_LR_PH_I]] ], [ [[INCDEC_PTR_I:%.*]], [[IF_END_I126:%.*]] ]
; CHECK-NEXT: br i1 undef, label [[IF_END_I126]], label [[IF_ELSE_I124:%.*]]
; CHECK: if.else.i124:
-; CHECK-NEXT: store i8 undef, i8* [[DESTYPIXELPTR_010_I]], align 1
+; CHECK-NEXT: store i8 undef, ptr [[DESTYPIXELPTR_010_I]], align 1
; CHECK-NEXT: br label [[IF_END_I126]]
; CHECK: if.end.i126:
-; CHECK-NEXT: [[INCDEC_PTR_I]] = getelementptr inbounds i8, i8* [[DESTYPIXELPTR_010_I]], i32 1
+; CHECK-NEXT: [[INCDEC_PTR_I]] = getelementptr inbounds i8, ptr [[DESTYPIXELPTR_010_I]], i32 1
; CHECK-NEXT: br i1 true, label [[FOR_BODY21_I]], label [[FOR_END_I129_LOOPEXIT:%.*]]
; CHECK: for.end.i129.loopexit:
; CHECK-NEXT: br label [[FOR_END_I129]]
@@ -69,16 +69,16 @@ for.body21.lr.ph.i: ; preds = %for.body.i86
br label %for.body21.i
for.body21.i:
- %destYPixelPtr.010.i = phi i8* [ null, %for.body21.lr.ph.i ], [ %incdec.ptr.i, %if.end.i126 ]
+ %destYPixelPtr.010.i = phi ptr [ null, %for.body21.lr.ph.i ], [ %incdec.ptr.i, %if.end.i126 ]
%x.09.i = phi i32 [ 0, %for.body21.lr.ph.i ], [ %inc.i125, %if.end.i126 ]
br i1 undef, label %if.end.i126, label %if.else.i124
if.else.i124: ; preds = %for.body21.i
- store i8 undef, i8* %destYPixelPtr.010.i, align 1
+ store i8 undef, ptr %destYPixelPtr.010.i, align 1
br label %if.end.i126
if.end.i126: ; preds = %if.else.i124, %for.body21.i
- %incdec.ptr.i = getelementptr inbounds i8, i8* %destYPixelPtr.010.i, i32 1
+ %incdec.ptr.i = getelementptr inbounds i8, ptr %destYPixelPtr.010.i, i32 1
%inc.i125 = add i32 %x.09.i, 1
%cmp19.i = icmp ult i32 %inc.i125, undef
br i1 %cmp19.i, label %for.body21.i, label %for.end.i129
diff --git a/llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll b/llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll
index 7747e438a593a..ca3468579e150 100644
--- a/llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll
+++ b/llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll
@@ -12,19 +12,19 @@ target datalayout = "n8:16:32:64"
@idx = common global i32 0, align 4
@e = common global i32 0, align 4
- at ptr = common global i32* null, align 8
+ at ptr = common global ptr null, align 8
define i32 @test1() {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i32 -1, i32* @idx, align 4
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @e, align 4
+; CHECK-NEXT: store i32 -1, ptr @idx, align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @e, align 4
; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i32 [[TMP0]], 0
; CHECK-NEXT: br i1 [[CMP4]], label [[FOR_END_LOOPEXIT:%.*]], label [[FOR_BODY_LR_PH:%.*]]
; CHECK: for.body.lr.ph:
-; CHECK-NEXT: [[TMP1:%.*]] = load i32*, i32** @ptr, align 8
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* @e, align 4
+; CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr @ptr, align 8
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr @e, align 4
; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP2]], i32 0)
; CHECK-NEXT: [[TMP3:%.*]] = add nuw i32 [[SMAX]], 1
; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[TMP3]] to i64
@@ -35,32 +35,32 @@ define i32 @test1() {
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_FOR_END_LOOPEXIT_CRIT_EDGE:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV]] = phi i64 [ [[INDVARS_IV_NEXT]], [[FOR_COND:%.*]] ], [ 0, [[FOR_BODY_LR_PH]] ]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP4]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[FOR_COND]]
; CHECK: if.then:
; CHECK-NEXT: [[I_05_LCSSA_WIDE:%.*]] = phi i64 [ [[INDVARS_IV]], [[FOR_BODY]] ]
; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[I_05_LCSSA_WIDE]] to i32
-; CHECK-NEXT: store i32 [[TMP5]], i32* @idx, align 4
+; CHECK-NEXT: store i32 [[TMP5]], ptr @idx, align 4
; CHECK-NEXT: br label [[FOR_END:%.*]]
; CHECK: for.cond.for.end.loopexit_crit_edge:
; CHECK-NEXT: br label [[FOR_END_LOOPEXIT]]
; CHECK: for.end.loopexit:
; CHECK-NEXT: br label [[FOR_END]]
; CHECK: for.end:
-; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* @idx, align 4
+; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr @idx, align 4
; CHECK-NEXT: ret i32 [[TMP6]]
;
entry:
- store i32 -1, i32* @idx, align 4
- %0 = load i32, i32* @e, align 4
+ store i32 -1, ptr @idx, align 4
+ %0 = load i32, ptr @e, align 4
%cmp4 = icmp slt i32 %0, 0
br i1 %cmp4, label %for.end.loopexit, label %for.body.lr.ph
for.body.lr.ph:
- %1 = load i32*, i32** @ptr, align 8
- %2 = load i32, i32* @e, align 4
+ %1 = load ptr, ptr @ptr, align 8
+ %2 = load i32, ptr @e, align 4
br label %for.body
for.cond:
@@ -71,14 +71,14 @@ for.cond:
for.body:
%i.05 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.cond ]
%idxprom = sext i32 %i.05 to i64
- %arrayidx = getelementptr inbounds i32, i32* %1, i64 %idxprom
- %3 = load i32, i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds i32, ptr %1, i64 %idxprom
+ %3 = load i32, ptr %arrayidx, align 4
%tobool = icmp eq i32 %3, 0
br i1 %tobool, label %if.then, label %for.cond
if.then:
%i.05.lcssa = phi i32 [ %i.05, %for.body ]
- store i32 %i.05.lcssa, i32* @idx, align 4
+ store i32 %i.05.lcssa, ptr @idx, align 4
br label %for.end
for.cond.for.end.loopexit_crit_edge:
@@ -88,12 +88,12 @@ for.end.loopexit:
br label %for.end
for.end:
- %4 = load i32, i32* @idx, align 4
+ %4 = load i32, ptr @idx, align 4
ret i32 %4
}
-define void @test2([8 x i8]* %a, i8* %b, i8 %limit) {
+define void @test2(ptr %a, ptr %b, i8 %limit) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[LIMIT:%.*]] to i32
@@ -114,12 +114,12 @@ define void @test2([8 x i8]* %a, i8* %b, i8 %limit) {
; CHECK-NEXT: br i1 [[EXITCOND6]], label [[FOR_COND1_PREHEADER_US]], label [[FOR_END_LOOPEXIT1:%.*]]
; CHECK: for.body4.us:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY4_LR_PH_US]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY4_US:%.*]] ]
-; CHECK-NEXT: [[ARRAYIDX6_US:%.*]] = getelementptr inbounds [8 x i8], [8 x i8]* [[A:%.*]], i64 [[INDVARS_IV3]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* [[ARRAYIDX6_US]], align 1
+; CHECK-NEXT: [[ARRAYIDX6_US:%.*]] = getelementptr inbounds [8 x i8], ptr [[A:%.*]], i64 [[INDVARS_IV3]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[ARRAYIDX6_US]], align 1
; CHECK-NEXT: [[IDXPROM7_US:%.*]] = zext i8 [[TMP0]] to i64
-; CHECK-NEXT: [[ARRAYIDX8_US:%.*]] = getelementptr inbounds i8, i8* [[B:%.*]], i64 [[IDXPROM7_US]]
-; CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[ARRAYIDX8_US]], align 1
-; CHECK-NEXT: store i8 [[TMP1]], i8* [[ARRAYIDX6_US]], align 1
+; CHECK-NEXT: [[ARRAYIDX8_US:%.*]] = getelementptr inbounds i8, ptr [[B:%.*]], i64 [[IDXPROM7_US]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[ARRAYIDX8_US]], align 1
+; CHECK-NEXT: store i8 [[TMP1]], ptr [[ARRAYIDX6_US]], align 1
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT:%.*]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY4_US]], label [[FOR_INC13_US_LOOPEXIT:%.*]]
@@ -153,12 +153,12 @@ for.inc13.us:
for.body4.us:
%storemerge14.us = phi i32 [ 0, %for.body4.lr.ph.us ], [ %inc.us, %for.body4.us ]
%idxprom.us = sext i32 %storemerge14.us to i64
- %arrayidx6.us = getelementptr inbounds [8 x i8], [8 x i8]* %a, i64 %idxprom5.us, i64 %idxprom.us
- %0 = load i8, i8* %arrayidx6.us, align 1
+ %arrayidx6.us = getelementptr inbounds [8 x i8], ptr %a, i64 %idxprom5.us, i64 %idxprom.us
+ %0 = load i8, ptr %arrayidx6.us, align 1
%idxprom7.us = zext i8 %0 to i64
- %arrayidx8.us = getelementptr inbounds i8, i8* %b, i64 %idxprom7.us
- %1 = load i8, i8* %arrayidx8.us, align 1
- store i8 %1, i8* %arrayidx6.us, align 1
+ %arrayidx8.us = getelementptr inbounds i8, ptr %b, i64 %idxprom7.us
+ %1 = load i8, ptr %arrayidx8.us, align 1
+ store i8 %1, ptr %arrayidx6.us, align 1
%inc.us = add nsw i32 %storemerge14.us, 1
%cmp2.us = icmp slt i32 %inc.us, %conv
br i1 %cmp2.us, label %for.body4.us, label %for.inc13.us
@@ -181,7 +181,7 @@ for.end:
}
-define i32 @test3(i32* %a, i32 %b) {
+define i32 @test3(ptr %a, i32 %b) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[B:%.*]], i32 0)
@@ -193,8 +193,8 @@ define i32 @test3(i32* %a, i32 %b) {
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], [[WIDE_TRIP_COUNT]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[ADD]] = add nsw i32 [[SUM_0]], [[TMP0]]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: br label [[FOR_COND]]
@@ -213,8 +213,8 @@ for.cond:
for.body:
%idxprom = sext i32 %i.0 to i64
- %arrayidx = getelementptr inbounds i32, i32* %a, i64 %idxprom
- %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds i32, ptr %a, i64 %idxprom
+ %0 = load i32, ptr %arrayidx, align 4
%add = add nsw i32 %sum.0, %0
%inc = add nsw i32 %i.0, 1
br label %for.cond
@@ -261,7 +261,7 @@ for.end:
}
-define i32 @test5(i32* %a, i32 %b) {
+define i32 @test5(ptr %a, i32 %b) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[B:%.*]] to i64
@@ -272,8 +272,8 @@ define i32 @test5(i32* %a, i32 %b) {
; CHECK-NEXT: [[CMP:%.*]] = icmp ule i64 [[INDVARS_IV]], [[TMP0]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[ADD]] = add nsw i32 [[SUM_0]], [[TMP1]]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: br label [[FOR_COND]]
@@ -292,8 +292,8 @@ for.cond:
for.body:
%idxprom = zext i32 %i.0 to i64
- %arrayidx = getelementptr inbounds i32, i32* %a, i64 %idxprom
- %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds i32, ptr %a, i64 %idxprom
+ %0 = load i32, ptr %arrayidx, align 4
%add = add nsw i32 %sum.0, %0
%inc = add nsw i32 %i.0, 1
br label %for.cond
@@ -302,7 +302,7 @@ for.end:
ret i32 %sum.0
}
-define i32 @test6(i32* %a, i32 %b) {
+define i32 @test6(ptr %a, i32 %b) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[B:%.*]], i32 -1)
@@ -315,8 +315,8 @@ define i32 @test6(i32* %a, i32 %b) {
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], [[WIDE_TRIP_COUNT]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[ADD]] = add nsw i32 [[SUM_0]], [[TMP1]]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: br label [[FOR_COND]]
@@ -335,8 +335,8 @@ for.cond:
for.body:
%idxprom = zext i32 %i.0 to i64
- %arrayidx = getelementptr inbounds i32, i32* %a, i64 %idxprom
- %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds i32, ptr %a, i64 %idxprom
+ %0 = load i32, ptr %arrayidx, align 4
%add = add nsw i32 %sum.0, %0
%inc = add nsw i32 %i.0, 1
br label %for.cond
@@ -345,7 +345,7 @@ for.end:
ret i32 %sum.0
}
-define i32 @test7(i32* %a, i32 %b) {
+define i32 @test7(ptr %a, i32 %b) {
; CHECK-LABEL: @test7(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[B:%.*]] to i64
@@ -359,8 +359,8 @@ define i32 @test7(i32* %a, i32 %b) {
; CHECK-NEXT: [[CMP:%.*]] = icmp ule i64 [[INDVARS_IV]], [[TMP0]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[ADD]] = add nsw i32 [[SUM_0]], [[TMP2]]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
@@ -380,8 +380,8 @@ for.cond:
for.body:
%idxprom = sext i32 %i.0 to i64
- %arrayidx = getelementptr inbounds i32, i32* %a, i64 %idxprom
- %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds i32, ptr %a, i64 %idxprom
+ %0 = load i32, ptr %arrayidx, align 4
%add = add nsw i32 %sum.0, %0
%inc = add nsw i32 %i.0, 1
%cmp2 = icmp sle i32 %i.0, %b
@@ -391,7 +391,7 @@ for.end:
ret i32 %sum.0
}
-define i32 @test8(i32* %a, i32 %b, i32 %init) {
+define i32 @test8(ptr %a, i32 %b, i32 %init) {
; Note: %indvars.iv is the sign extension of %i.0
; CHECK-LABEL: @test8(
; CHECK-NEXT: entry:
@@ -407,8 +407,8 @@ define i32 @test8(i32* %a, i32 %b, i32 %init) {
; CHECK-NEXT: [[CMP:%.*]] = icmp ule i64 [[INDVARS_IV]], [[TMP1]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[ADD]] = add nsw i32 [[SUM_0]], [[TMP2]]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i64 0, [[INDVARS_IV_NEXT]]
@@ -431,8 +431,8 @@ for.cond:
for.body:
%idxprom = sext i32 %i.0 to i64
- %arrayidx = getelementptr inbounds i32, i32* %a, i64 %idxprom
- %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds i32, ptr %a, i64 %idxprom
+ %0 = load i32, ptr %arrayidx, align 4
%add = add nsw i32 %sum.0, %0
%inc = add nsw i32 %i.0, 1
%cmp2 = icmp slt i32 0, %inc
@@ -445,7 +445,7 @@ leave:
ret i32 0
}
-define i32 @test9(i32* %a, i32 %b, i32 %init) {
+define i32 @test9(ptr %a, i32 %b, i32 %init) {
; Note: %indvars.iv is the zero extension of %i.0
; CHECK-LABEL: @test9(
; CHECK-NEXT: entry:
@@ -462,8 +462,8 @@ define i32 @test9(i32* %a, i32 %b, i32 %init) {
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], [[WIDE_TRIP_COUNT]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[ADD]] = add nsw i32 [[SUM_0]], [[TMP1]]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
@@ -487,8 +487,8 @@ for.cond:
for.body:
%idxprom = zext i32 %i.0 to i64
- %arrayidx = getelementptr inbounds i32, i32* %a, i64 %idxprom
- %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds i32, ptr %a, i64 %idxprom
+ %0 = load i32, ptr %arrayidx, align 4
%add = add nsw i32 %sum.0, %0
%inc = add nsw i32 %i.0, 1
%cmp2 = icmp slt i32 0, %inc
@@ -542,7 +542,7 @@ define i32 @test10(i32 %v) {
; TODO: We don't really need trunc/zext here because when iv.next overflows,
; its value is not used.
-define i32 @test11(i32 %start, i32* %p, i32* %q) {
+define i32 @test11(i32 %start, ptr %p, ptr %q) {
; CHECK-LABEL: @test11(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
@@ -554,9 +554,9 @@ define i32 @test11(i32 %start, i32* %p, i32* %q) {
; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[BACKEDGE]]
; CHECK: backedge:
-; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[TMP1]]
-; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
-; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP1]]
+; CHECK-NEXT: store i32 1, ptr [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[STOP:%.*]] = load i32, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
; CHECK: exit:
@@ -575,10 +575,10 @@ loop:
backedge:
%index = zext i32 %iv.next to i64
- %store.addr = getelementptr i32, i32* %p, i64 %index
- store i32 1, i32* %store.addr
- %load.addr = getelementptr i32, i32* %q, i64 %index
- %stop = load i32, i32* %q
+ %store.addr = getelementptr i32, ptr %p, i64 %index
+ store i32 1, ptr %store.addr
+ %load.addr = getelementptr i32, ptr %q, i64 %index
+ %stop = load i32, ptr %q
%loop.cond = icmp eq i32 %stop, 0
br i1 %loop.cond, label %loop, label %failure
@@ -589,7 +589,7 @@ failure:
unreachable
}
-define i32 @test12(i32 %start, i32* %p, i32* %q) {
+define i32 @test12(i32 %start, ptr %p, ptr %q) {
; CHECK-LABEL: @test12(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
@@ -601,9 +601,9 @@ define i32 @test12(i32 %start, i32* %p, i32* %q) {
; CHECK: backedge:
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[INDVARS_IV]], -1
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
-; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[TMP1]]
-; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
-; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP1]]
+; CHECK-NEXT: store i32 1, ptr [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[STOP:%.*]] = load i32, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
; CHECK: exit:
@@ -622,10 +622,10 @@ loop:
backedge:
%iv.next = add i32 %iv, -1
%index = zext i32 %iv.next to i64
- %store.addr = getelementptr i32, i32* %p, i64 %index
- store i32 1, i32* %store.addr
- %load.addr = getelementptr i32, i32* %q, i64 %index
- %stop = load i32, i32* %q
+ %store.addr = getelementptr i32, ptr %p, i64 %index
+ store i32 1, ptr %store.addr
+ %load.addr = getelementptr i32, ptr %q, i64 %index
+ %stop = load i32, ptr %q
%loop.cond = icmp eq i32 %stop, 0
br i1 %loop.cond, label %loop, label %failure
@@ -636,7 +636,7 @@ failure:
unreachable
}
-define i32 @test13(i32 %start, i32* %p, i32* %q) {
+define i32 @test13(i32 %start, ptr %p, ptr %q) {
; CHECK-LABEL: @test13(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
@@ -647,9 +647,9 @@ define i32 @test13(i32 %start, i32* %p, i32* %q) {
; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[BACKEDGE]]
; CHECK: backedge:
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[INDVARS_IV]], -1
-; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[TMP1]]
-; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
-; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP1]]
+; CHECK-NEXT: store i32 1, ptr [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[STOP:%.*]] = load i32, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
@@ -669,10 +669,10 @@ loop:
backedge:
%foo = add i32 %iv, -1
%index = zext i32 %foo to i64
- %store.addr = getelementptr i32, i32* %p, i64 %index
- store i32 1, i32* %store.addr
- %load.addr = getelementptr i32, i32* %q, i64 %index
- %stop = load i32, i32* %q
+ %store.addr = getelementptr i32, ptr %p, i64 %index
+ store i32 1, ptr %store.addr
+ %load.addr = getelementptr i32, ptr %q, i64 %index
+ %stop = load i32, ptr %q
%loop.cond = icmp eq i32 %stop, 0
%iv.next.1 = add i32 %iv, -1
br i1 %loop.cond, label %loop, label %failure
@@ -684,7 +684,7 @@ failure:
unreachable
}
-define i32 @test14(i32 %start, i32* %p, i32* %q) {
+define i32 @test14(i32 %start, ptr %p, ptr %q) {
; CHECK-LABEL: @test14(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
@@ -695,9 +695,9 @@ define i32 @test14(i32 %start, i32* %p, i32* %q) {
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[INDVARS_IV]], -1
; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[BACKEDGE]]
; CHECK: backedge:
-; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[TMP1]]
-; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
-; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP1]]
+; CHECK-NEXT: store i32 1, ptr [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[STOP:%.*]] = load i32, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
@@ -718,10 +718,10 @@ loop:
backedge:
%index = zext i32 %foo to i64
- %store.addr = getelementptr i32, i32* %p, i64 %index
- store i32 1, i32* %store.addr
- %load.addr = getelementptr i32, i32* %q, i64 %index
- %stop = load i32, i32* %q
+ %store.addr = getelementptr i32, ptr %p, i64 %index
+ store i32 1, ptr %store.addr
+ %load.addr = getelementptr i32, ptr %q, i64 %index
+ %stop = load i32, ptr %q
%loop.cond = icmp eq i32 %stop, 0
%iv.next.1 = add i32 %iv, -1
br i1 %loop.cond, label %loop, label %failure
@@ -737,7 +737,7 @@ declare void @test14a-callee(i1 %cond)
; Same as @test14 but with unwind exit.
; Trunc instructions must be added below the landing pad.
-define i32 @test14a(i32 %start, i32* %p, i32* %q, i1 %c) personality i1 1 {
+define i32 @test14a(i32 %start, ptr %p, ptr %q, i1 %c) personality i1 1 {
; CHECK-LABEL: @test14a(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
@@ -748,9 +748,9 @@ define i32 @test14a(i32 %start, i32* %p, i32* %q, i1 %c) personality i1 1 {
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[INDVARS_IV]], -1
; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[BACKEDGE]]
; CHECK: backedge:
-; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[TMP1]]
-; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
-; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP1]]
+; CHECK-NEXT: store i32 1, ptr [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[STOP:%.*]] = load i32, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
; CHECK-NEXT: invoke void @test14a-callee(i1 [[LOOP_COND]])
@@ -776,10 +776,10 @@ loop:
backedge:
%index = zext i32 %foo to i64
- %store.addr = getelementptr i32, i32* %p, i64 %index
- store i32 1, i32* %store.addr
- %load.addr = getelementptr i32, i32* %q, i64 %index
- %stop = load i32, i32* %q
+ %store.addr = getelementptr i32, ptr %p, i64 %index
+ store i32 1, ptr %store.addr
+ %load.addr = getelementptr i32, ptr %q, i64 %index
+ %stop = load i32, ptr %q
%loop.cond = icmp eq i32 %stop, 0
%iv.next.1 = add i32 %iv, -1
invoke void @test14a-callee(i1 %loop.cond) to label %loop unwind label %exception
@@ -795,7 +795,7 @@ exception:
declare void @use(i32 %arg)
-define i32 @test15(i32 %start, i32* %p, i32* %q) {
+define i32 @test15(i32 %start, ptr %p, ptr %q) {
; CHECK-LABEL: @test15(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
@@ -806,9 +806,9 @@ define i32 @test15(i32 %start, i32* %p, i32* %q) {
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[INDVARS_IV]], -1
; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[BACKEDGE]]
; CHECK: backedge:
-; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[TMP1]]
-; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
-; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP1]]
+; CHECK-NEXT: store i32 1, ptr [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[STOP:%.*]] = load i32, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
@@ -833,10 +833,10 @@ loop:
backedge:
%index = zext i32 %foo to i64
- %store.addr = getelementptr i32, i32* %p, i64 %index
- store i32 1, i32* %store.addr
- %load.addr = getelementptr i32, i32* %q, i64 %index
- %stop = load i32, i32* %q
+ %store.addr = getelementptr i32, ptr %p, i64 %index
+ store i32 1, ptr %store.addr
+ %load.addr = getelementptr i32, ptr %q, i64 %index
+ %stop = load i32, ptr %q
%loop.cond = icmp eq i32 %stop, 0
%iv.next.1 = add i32 %iv, -1
br i1 %loop.cond, label %loop, label %failure
@@ -850,7 +850,7 @@ failure:
unreachable
}
-define i32 @test16_unsigned_pos1(i32 %start, i32* %p, i32* %q, i32 %x) {
+define i32 @test16_unsigned_pos1(i32 %start, ptr %p, ptr %q, i32 %x) {
; CHECK-LABEL: @test16_unsigned_pos1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
@@ -866,9 +866,9 @@ define i32 @test16_unsigned_pos1(i32 %start, i32* %p, i32* %q, i32 %x) {
; CHECK-NEXT: [[ICMP_USER_WIDE5:%.*]] = icmp ult i64 [[TMP1]], [[TMP2]]
; CHECK-NEXT: br i1 [[ICMP_USER_WIDE5]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
; CHECK: backedge:
-; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[TMP3]]
-; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
-; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP3]]
+; CHECK-NEXT: store i32 1, ptr [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[STOP:%.*]] = load i32, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
@@ -899,10 +899,10 @@ guarded:
backedge:
%index = zext i32 %foo to i64
- %store.addr = getelementptr i32, i32* %p, i64 %index
- store i32 1, i32* %store.addr
- %load.addr = getelementptr i32, i32* %q, i64 %index
- %stop = load i32, i32* %q
+ %store.addr = getelementptr i32, ptr %p, i64 %index
+ store i32 1, ptr %store.addr
+ %load.addr = getelementptr i32, ptr %q, i64 %index
+ %stop = load i32, ptr %q
%loop.cond = icmp eq i32 %stop, 0
%iv.next.1 = add i32 %iv, -1
br i1 %loop.cond, label %loop, label %failure
@@ -920,7 +920,7 @@ side_exit:
}
; TODO: We can widen here despite the icmp user of %foo in guarded block.
-define i32 @test16_unsigned_pos2(i32 %start, i32* %p, i32* %q, i32 %x) {
+define i32 @test16_unsigned_pos2(i32 %start, ptr %p, ptr %q, i32 %x) {
; CHECK-LABEL: @test16_unsigned_pos2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
@@ -935,9 +935,9 @@ define i32 @test16_unsigned_pos2(i32 %start, i32* %p, i32* %q, i32 %x) {
; CHECK-NEXT: [[ICMP_USER_WIDE:%.*]] = icmp ne i64 [[TMP1]], [[TMP2]]
; CHECK-NEXT: br i1 [[ICMP_USER_WIDE]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
; CHECK: backedge:
-; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[TMP1]]
-; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
-; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q:%.*]], align 4
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[TMP1]]
+; CHECK-NEXT: store i32 1, ptr [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[STOP:%.*]] = load i32, ptr [[Q:%.*]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
@@ -968,10 +968,10 @@ guarded:
backedge:
%index = zext i32 %foo to i64
- %store.addr = getelementptr i32, i32* %p, i64 %index
- store i32 1, i32* %store.addr
- %load.addr = getelementptr i32, i32* %q, i64 %index
- %stop = load i32, i32* %q
+ %store.addr = getelementptr i32, ptr %p, i64 %index
+ store i32 1, ptr %store.addr
+ %load.addr = getelementptr i32, ptr %q, i64 %index
+ %stop = load i32, ptr %q
%loop.cond = icmp eq i32 %stop, 0
%iv.next.1 = add i32 %iv, -1
br i1 %loop.cond, label %loop, label %failure
@@ -989,7 +989,7 @@ side_exit:
}
; icmp slt user in guarded block prevents widening.
-define i32 @test16_unsigned_neg(i32 %start, i32* %p, i32* %q, i32 %x) {
+define i32 @test16_unsigned_neg(i32 %start, ptr %p, ptr %q, i32 %x) {
; CHECK-LABEL: @test16_unsigned_neg(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
@@ -1005,10 +1005,10 @@ define i32 @test16_unsigned_neg(i32 %start, i32* %p, i32* %q, i32 %x) {
; CHECK-NEXT: br i1 [[ICMP_USER]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
; CHECK: backedge:
; CHECK-NEXT: [[INDEX:%.*]] = zext i32 [[FOO]] to i64
-; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
-; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
-; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
-; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: store i32 1, ptr [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, ptr [[Q:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: [[STOP:%.*]] = load i32, ptr [[Q]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
@@ -1037,10 +1037,10 @@ guarded:
backedge:
%index = zext i32 %foo to i64
- %store.addr = getelementptr i32, i32* %p, i64 %index
- store i32 1, i32* %store.addr
- %load.addr = getelementptr i32, i32* %q, i64 %index
- %stop = load i32, i32* %q
+ %store.addr = getelementptr i32, ptr %p, i64 %index
+ store i32 1, ptr %store.addr
+ %load.addr = getelementptr i32, ptr %q, i64 %index
+ %stop = load i32, ptr %q
%loop.cond = icmp eq i32 %stop, 0
%iv.next.1 = add i32 %iv, -1
br i1 %loop.cond, label %loop, label %failure
@@ -1058,7 +1058,7 @@ side_exit:
}
; TODO: We can widen here despite the icmp user of %foo in guarded block.
-define i32 @test16_signed_pos1(i32 %start, i32* %p, i32* %q, i32 %x) {
+define i32 @test16_signed_pos1(i32 %start, ptr %p, ptr %q, i32 %x) {
; CHECK-LABEL: @test16_signed_pos1(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
@@ -1072,10 +1072,10 @@ define i32 @test16_signed_pos1(i32 %start, i32* %p, i32* %q, i32 %x) {
; CHECK-NEXT: br i1 [[ICMP_USER]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
; CHECK: backedge:
; CHECK-NEXT: [[INDEX:%.*]] = sext i32 [[FOO]] to i64
-; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
-; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
-; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
-; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: store i32 1, ptr [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, ptr [[Q:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: [[STOP:%.*]] = load i32, ptr [[Q]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
; CHECK-NEXT: [[IV_NEXT_1]] = add i32 [[IV]], -1
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
@@ -1104,10 +1104,10 @@ guarded:
backedge:
%index = sext i32 %foo to i64
- %store.addr = getelementptr i32, i32* %p, i64 %index
- store i32 1, i32* %store.addr
- %load.addr = getelementptr i32, i32* %q, i64 %index
- %stop = load i32, i32* %q
+ %store.addr = getelementptr i32, ptr %p, i64 %index
+ store i32 1, ptr %store.addr
+ %load.addr = getelementptr i32, ptr %q, i64 %index
+ %stop = load i32, ptr %q
%loop.cond = icmp eq i32 %stop, 0
%iv.next.1 = add i32 %iv, -1
br i1 %loop.cond, label %loop, label %failure
@@ -1125,7 +1125,7 @@ side_exit:
}
; TODO: We can widen here despite the icmp user of %foo in guarded block.
-define i32 @test16_signed_pos2(i32 %start, i32* %p, i32* %q, i32 %x) {
+define i32 @test16_signed_pos2(i32 %start, ptr %p, ptr %q, i32 %x) {
; CHECK-LABEL: @test16_signed_pos2(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
@@ -1139,10 +1139,10 @@ define i32 @test16_signed_pos2(i32 %start, i32* %p, i32* %q, i32 %x) {
; CHECK-NEXT: br i1 [[ICMP_USER]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
; CHECK: backedge:
; CHECK-NEXT: [[INDEX:%.*]] = sext i32 [[FOO]] to i64
-; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
-; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
-; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
-; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: store i32 1, ptr [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, ptr [[Q:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: [[STOP:%.*]] = load i32, ptr [[Q]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
; CHECK-NEXT: [[IV_NEXT_1]] = add i32 [[IV]], -1
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
@@ -1171,10 +1171,10 @@ guarded:
backedge:
%index = sext i32 %foo to i64
- %store.addr = getelementptr i32, i32* %p, i64 %index
- store i32 1, i32* %store.addr
- %load.addr = getelementptr i32, i32* %q, i64 %index
- %stop = load i32, i32* %q
+ %store.addr = getelementptr i32, ptr %p, i64 %index
+ store i32 1, ptr %store.addr
+ %load.addr = getelementptr i32, ptr %q, i64 %index
+ %stop = load i32, ptr %q
%loop.cond = icmp eq i32 %stop, 0
%iv.next.1 = add i32 %iv, -1
br i1 %loop.cond, label %loop, label %failure
@@ -1192,7 +1192,7 @@ side_exit:
}
; icmp ult user in guarded block prevents widening.
-define i32 @test16_signed_neg(i32 %start, i32* %p, i32* %q, i32 %x) {
+define i32 @test16_signed_neg(i32 %start, ptr %p, ptr %q, i32 %x) {
; CHECK-LABEL: @test16_signed_neg(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[START:%.*]], -1
@@ -1207,10 +1207,10 @@ define i32 @test16_signed_neg(i32 %start, i32* %p, i32* %q, i32 %x) {
; CHECK-NEXT: br i1 [[ICMP_USER3]], label [[BACKEDGE]], label [[SIDE_EXIT:%.*]]
; CHECK: backedge:
; CHECK-NEXT: [[INDEX:%.*]] = sext i32 [[FOO]] to i64
-; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 [[INDEX]]
-; CHECK-NEXT: store i32 1, i32* [[STORE_ADDR]], align 4
-; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 [[INDEX]]
-; CHECK-NEXT: [[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT: [[STORE_ADDR:%.*]] = getelementptr i32, ptr [[P:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: store i32 1, ptr [[STORE_ADDR]], align 4
+; CHECK-NEXT: [[LOAD_ADDR:%.*]] = getelementptr i32, ptr [[Q:%.*]], i64 [[INDEX]]
+; CHECK-NEXT: [[STOP:%.*]] = load i32, ptr [[Q]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
; CHECK-NEXT: [[IV_NEXT_1]] = add i32 [[IV]], -1
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
@@ -1239,10 +1239,10 @@ guarded:
backedge:
%index = sext i32 %foo to i64
- %store.addr = getelementptr i32, i32* %p, i64 %index
- store i32 1, i32* %store.addr
- %load.addr = getelementptr i32, i32* %q, i64 %index
- %stop = load i32, i32* %q
+ %store.addr = getelementptr i32, ptr %p, i64 %index
+ store i32 1, ptr %store.addr
+ %load.addr = getelementptr i32, ptr %q, i64 %index
+ %stop = load i32, ptr %q
%loop.cond = icmp eq i32 %stop, 0
%iv.next.1 = add i32 %iv, -1
br i1 %loop.cond, label %loop, label %failure
@@ -1259,7 +1259,7 @@ side_exit:
ret i32 0
}
-define i32 @test17(i32* %p, i32 %len) {
+define i32 @test17(ptr %p, i32 %len) {
; CHECK-LABEL: @test17(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[LEN:%.*]] to i64
@@ -1271,8 +1271,8 @@ define i32 @test17(i32* %p, i32 %len) {
; CHECK-NEXT: [[COND_1:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
; CHECK-NEXT: br i1 [[COND_1]], label [[EXIT:%.*]], label [[BACKEDGE]]
; CHECK: backedge:
-; CHECK-NEXT: [[ADDR:%.*]] = getelementptr inbounds i32, i32* [[P:%.*]], i64 [[TMP1]]
-; CHECK-NEXT: [[LOADED:%.*]] = load atomic i32, i32* [[ADDR]] unordered, align 4
+; CHECK-NEXT: [[ADDR:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 [[TMP1]]
+; CHECK-NEXT: [[LOADED:%.*]] = load atomic i32, ptr [[ADDR]] unordered, align 4
; CHECK-NEXT: [[COND_2:%.*]] = icmp eq i32 [[LOADED]], 0
; CHECK-NEXT: br i1 [[COND_2]], label [[FAILURE:%.*]], label [[LOOP]]
; CHECK: exit:
@@ -1292,8 +1292,8 @@ loop:
backedge:
%iv.next.wide = zext i32 %iv.next to i64
- %addr = getelementptr inbounds i32, i32* %p, i64 %iv.next.wide
- %loaded = load atomic i32, i32* %addr unordered, align 4
+ %addr = getelementptr inbounds i32, ptr %p, i64 %iv.next.wide
+ %loaded = load atomic i32, ptr %addr unordered, align 4
%cond_2 = icmp eq i32 %loaded, 0
br i1 %cond_2, label %failure, label %loop
@@ -1405,16 +1405,16 @@ exit: ; preds = %loop
ret void
}
-define void @test21(i32* %ptr) {
+define void @test21(ptr %ptr) {
; CHECK-LABEL: @test21(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i32 0, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: store i32 0, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[INDVARS:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
-; CHECK-NEXT: store i32 [[INDVARS]], i32* [[PTR]], align 4
+; CHECK-NEXT: store i32 [[INDVARS]], ptr [[PTR]], align 4
; CHECK-NEXT: call void @foo(i64 [[INDVARS_IV]])
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 1000
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[EXIT:%.*]], label [[LOOP]]
@@ -1422,14 +1422,14 @@ define void @test21(i32* %ptr) {
; CHECK-NEXT: ret void
;
entry:
- store i32 0, i32* %ptr, align 4
+ store i32 0, ptr %ptr, align 4
br label %loop
loop: ; preds = %loop, %entry
%val = phi i32 [ %val.inc, %loop ], [ 0, %entry ]
%iv = phi i32 [ %iv.next, %loop ], [ 0, %entry ]
%val.inc = add i32 %val, 1
- store i32 %val.inc, i32* %ptr, align 4
+ store i32 %val.inc, ptr %ptr, align 4
%iv.wide = zext i32 %iv to i64
call void @foo(i64 %iv.wide)
%iv.next = add i32 %iv, 1
@@ -1440,16 +1440,16 @@ exit: ; preds = %loop
ret void
}
-define void @test22(i16* %ptr) {
+define void @test22(ptr %ptr) {
; CHECK-LABEL: @test22(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i16 0, i16* [[PTR:%.*]], align 4
+; CHECK-NEXT: store i16 0, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[INDVARS:%.*]] = trunc i32 [[IV]] to i16
; CHECK-NEXT: [[VAL_INC:%.*]] = add i16 [[INDVARS]], 1
-; CHECK-NEXT: store i16 [[VAL_INC]], i16* [[PTR]], align 4
+; CHECK-NEXT: store i16 [[VAL_INC]], ptr [[PTR]], align 4
; CHECK-NEXT: [[IV_WIDE:%.*]] = zext i32 [[IV]] to i64
; CHECK-NEXT: call void @foo(i64 [[IV_WIDE]])
; CHECK-NEXT: [[IV_NEXT]] = zext i16 [[VAL_INC]] to i32
@@ -1459,14 +1459,14 @@ define void @test22(i16* %ptr) {
; CHECK-NEXT: ret void
;
entry:
- store i16 0, i16* %ptr, align 4
+ store i16 0, ptr %ptr, align 4
br label %loop
loop: ; preds = %loop, %entry
%val = phi i16 [ %val.inc, %loop ], [ 0, %entry ]
%iv = phi i32 [ %iv.next, %loop ], [ 0, %entry ]
%val.inc = add i16 %val, 1
- store i16 %val.inc, i16* %ptr, align 4
+ store i16 %val.inc, ptr %ptr, align 4
%iv.wide = zext i32 %iv to i64
call void @foo(i64 %iv.wide)
%iv.next = zext i16 %val.inc to i32
diff --git a/llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll b/llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll
index 3ff0aaa1c3c47..c7231392229c9 100644
--- a/llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll
+++ b/llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll
@@ -130,7 +130,7 @@ exit:
ret void
}
-define i32 @test1(i32* %array, i32 %length, i32 %n) #0 {
+define i32 @test1(ptr %array, i32 %length, i32 %n) #0 {
; CHECK-V8M-LABEL: @test1(
; CHECK-V8M-NEXT: loop.preheader:
; CHECK-V8M-NEXT: [[UMAX:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 1)
@@ -148,8 +148,8 @@ define i32 @test1(i32* %array, i32 %length, i32 %n) #0 {
; CHECK-V8M-NEXT: ret i32 -1
; CHECK-V8M: guarded:
; CHECK-V8M-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-V8M-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
-; CHECK-V8M-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-V8M-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-V8M-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-V8M-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-V8M-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-V8M-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -175,8 +175,8 @@ define i32 @test1(i32* %array, i32 %length, i32 %n) #0 {
; CHECK-V8A-NEXT: ret i32 -1
; CHECK-V8A: guarded:
; CHECK-V8A-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-V8A-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
-; CHECK-V8A-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-V8A-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-V8A-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-V8A-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-V8A-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-V8A-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -200,8 +200,8 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
- %array.i = load i32, i32* %array.i.ptr, align 4
+ %array.i.ptr = getelementptr inbounds i32, ptr %array, i64 %i.i64
+ %array.i = load i32, ptr %array.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc, %array.i
%i.next = add nuw i32 %i, 1
%continue = icmp ult i32 %i.next, %n
@@ -214,7 +214,7 @@ exit: ; preds = %guarded, %entry
declare void @maythrow()
-define i32 @test2(i32* %array, i32 %length, i32 %n) #0 {
+define i32 @test2(ptr %array, i32 %length, i32 %n) #0 {
; CHECK-V8M-LABEL: @test2(
; CHECK-V8M-NEXT: loop.preheader:
; CHECK-V8M-NEXT: [[TMP0:%.*]] = add i32 [[N:%.*]], -1
@@ -231,8 +231,8 @@ define i32 @test2(i32* %array, i32 %length, i32 %n) #0 {
; CHECK-V8M-NEXT: ret i32 -1
; CHECK-V8M: guarded:
; CHECK-V8M-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-V8M-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
-; CHECK-V8M-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-V8M-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-V8M-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-V8M-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-V8M-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-V8M-NEXT: [[CONTINUE:%.*]] = icmp ne i32 [[I_NEXT]], [[N]]
@@ -257,8 +257,8 @@ define i32 @test2(i32* %array, i32 %length, i32 %n) #0 {
; CHECK-V8A-NEXT: ret i32 -1
; CHECK-V8A: guarded:
; CHECK-V8A-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-V8A-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
-; CHECK-V8A-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-V8A-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-V8A-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-V8A-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-V8A-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-V8A-NEXT: [[CONTINUE:%.*]] = icmp ne i32 [[I_NEXT]], [[N]]
@@ -282,8 +282,8 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
- %array.i = load i32, i32* %array.i.ptr, align 4
+ %array.i.ptr = getelementptr inbounds i32, ptr %array, i64 %i.i64
+ %array.i = load i32, ptr %array.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc, %array.i
%i.next = add nuw i32 %i, 1
%continue = icmp ne i32 %i.next, %n
@@ -294,7 +294,7 @@ exit: ; preds = %guarded, %entry
ret i32 %result
}
-define i32 @two_range_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32 %length.2, i32 %n) #0 {
+define i32 @two_range_checks(ptr %array.1, i32 %length.1, ptr %array.2, i32 %length.2, i32 %n) #0 {
; CHECK-V8M-LABEL: @two_range_checks(
; CHECK-V8M-NEXT: loop.preheader:
; CHECK-V8M-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[LENGTH_2:%.*]], i32 [[LENGTH_1:%.*]])
@@ -313,11 +313,11 @@ define i32 @two_range_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32 %l
; CHECK-V8M-NEXT: ret i32 -1
; CHECK-V8M: guarded:
; CHECK-V8M-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-V8M-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
-; CHECK-V8M-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-V8M-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-V8M-NEXT: [[ARRAY_1_I:%.*]] = load i32, ptr [[ARRAY_1_I_PTR]], align 4
; CHECK-V8M-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
-; CHECK-V8M-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_2:%.*]], i64 [[I_I64]]
-; CHECK-V8M-NEXT: [[ARRAY_2_I:%.*]] = load i32, i32* [[ARRAY_2_I_PTR]], align 4
+; CHECK-V8M-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_2:%.*]], i64 [[I_I64]]
+; CHECK-V8M-NEXT: [[ARRAY_2_I:%.*]] = load i32, ptr [[ARRAY_2_I_PTR]], align 4
; CHECK-V8M-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_1]], [[ARRAY_2_I]]
; CHECK-V8M-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-V8M-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -344,11 +344,11 @@ define i32 @two_range_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32 %l
; CHECK-V8A-NEXT: ret i32 -1
; CHECK-V8A: guarded:
; CHECK-V8A-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-V8A-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
-; CHECK-V8A-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-V8A-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-V8A-NEXT: [[ARRAY_1_I:%.*]] = load i32, ptr [[ARRAY_1_I_PTR]], align 4
; CHECK-V8A-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
-; CHECK-V8A-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_2:%.*]], i64 [[I_I64]]
-; CHECK-V8A-NEXT: [[ARRAY_2_I:%.*]] = load i32, i32* [[ARRAY_2_I_PTR]], align 4
+; CHECK-V8A-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_2:%.*]], i64 [[I_I64]]
+; CHECK-V8A-NEXT: [[ARRAY_2_I:%.*]] = load i32, ptr [[ARRAY_2_I_PTR]], align 4
; CHECK-V8A-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_1]], [[ARRAY_2_I]]
; CHECK-V8A-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-V8A-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -374,11 +374,11 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.1.i.ptr = getelementptr inbounds i32, i32* %array.1, i64 %i.i64
- %array.1.i = load i32, i32* %array.1.i.ptr, align 4
+ %array.1.i.ptr = getelementptr inbounds i32, ptr %array.1, i64 %i.i64
+ %array.1.i = load i32, ptr %array.1.i.ptr, align 4
%loop.acc.1 = add i32 %loop.acc, %array.1.i
- %array.2.i.ptr = getelementptr inbounds i32, i32* %array.2, i64 %i.i64
- %array.2.i = load i32, i32* %array.2.i.ptr, align 4
+ %array.2.i.ptr = getelementptr inbounds i32, ptr %array.2, i64 %i.i64
+ %array.2.i = load i32, ptr %array.2.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc.1, %array.2.i
%i.next = add nuw i32 %i, 1
%continue = icmp ult i32 %i.next, %n
@@ -389,7 +389,7 @@ exit: ; preds = %guarded, %entry
ret i32 %result
}
-define i32 @three_range_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32 %length.2, i32* %array.3, i32 %length.3, i32 %n) #0 {
+define i32 @three_range_checks(ptr %array.1, i32 %length.1, ptr %array.2, i32 %length.2, ptr %array.3, i32 %length.3, i32 %n) #0 {
; CHECK-V8M-LABEL: @three_range_checks(
; CHECK-V8M-NEXT: loop.preheader:
; CHECK-V8M-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[LENGTH_3:%.*]], i32 [[LENGTH_2:%.*]])
@@ -409,14 +409,14 @@ define i32 @three_range_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32
; CHECK-V8M-NEXT: ret i32 -1
; CHECK-V8M: guarded:
; CHECK-V8M-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-V8M-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
-; CHECK-V8M-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-V8M-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-V8M-NEXT: [[ARRAY_1_I:%.*]] = load i32, ptr [[ARRAY_1_I_PTR]], align 4
; CHECK-V8M-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
-; CHECK-V8M-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_2:%.*]], i64 [[I_I64]]
-; CHECK-V8M-NEXT: [[ARRAY_2_I:%.*]] = load i32, i32* [[ARRAY_2_I_PTR]], align 4
+; CHECK-V8M-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_2:%.*]], i64 [[I_I64]]
+; CHECK-V8M-NEXT: [[ARRAY_2_I:%.*]] = load i32, ptr [[ARRAY_2_I_PTR]], align 4
; CHECK-V8M-NEXT: [[LOOP_ACC_2:%.*]] = add i32 [[LOOP_ACC_1]], [[ARRAY_2_I]]
-; CHECK-V8M-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_3:%.*]], i64 [[I_I64]]
-; CHECK-V8M-NEXT: [[ARRAY_3_I:%.*]] = load i32, i32* [[ARRAY_3_I_PTR]], align 4
+; CHECK-V8M-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_3:%.*]], i64 [[I_I64]]
+; CHECK-V8M-NEXT: [[ARRAY_3_I:%.*]] = load i32, ptr [[ARRAY_3_I_PTR]], align 4
; CHECK-V8M-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_2]], [[ARRAY_3_I]]
; CHECK-V8M-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-V8M-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -444,14 +444,14 @@ define i32 @three_range_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32
; CHECK-V8A-NEXT: ret i32 -1
; CHECK-V8A: guarded:
; CHECK-V8A-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-V8A-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
-; CHECK-V8A-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-V8A-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-V8A-NEXT: [[ARRAY_1_I:%.*]] = load i32, ptr [[ARRAY_1_I_PTR]], align 4
; CHECK-V8A-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
-; CHECK-V8A-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_2:%.*]], i64 [[I_I64]]
-; CHECK-V8A-NEXT: [[ARRAY_2_I:%.*]] = load i32, i32* [[ARRAY_2_I_PTR]], align 4
+; CHECK-V8A-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_2:%.*]], i64 [[I_I64]]
+; CHECK-V8A-NEXT: [[ARRAY_2_I:%.*]] = load i32, ptr [[ARRAY_2_I_PTR]], align 4
; CHECK-V8A-NEXT: [[LOOP_ACC_2:%.*]] = add i32 [[LOOP_ACC_1]], [[ARRAY_2_I]]
-; CHECK-V8A-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_3:%.*]], i64 [[I_I64]]
-; CHECK-V8A-NEXT: [[ARRAY_3_I:%.*]] = load i32, i32* [[ARRAY_3_I_PTR]], align 4
+; CHECK-V8A-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_3:%.*]], i64 [[I_I64]]
+; CHECK-V8A-NEXT: [[ARRAY_3_I:%.*]] = load i32, ptr [[ARRAY_3_I_PTR]], align 4
; CHECK-V8A-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_2]], [[ARRAY_3_I]]
; CHECK-V8A-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-V8A-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -479,14 +479,14 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.1.i.ptr = getelementptr inbounds i32, i32* %array.1, i64 %i.i64
- %array.1.i = load i32, i32* %array.1.i.ptr, align 4
+ %array.1.i.ptr = getelementptr inbounds i32, ptr %array.1, i64 %i.i64
+ %array.1.i = load i32, ptr %array.1.i.ptr, align 4
%loop.acc.1 = add i32 %loop.acc, %array.1.i
- %array.2.i.ptr = getelementptr inbounds i32, i32* %array.2, i64 %i.i64
- %array.2.i = load i32, i32* %array.2.i.ptr, align 4
+ %array.2.i.ptr = getelementptr inbounds i32, ptr %array.2, i64 %i.i64
+ %array.2.i = load i32, ptr %array.2.i.ptr, align 4
%loop.acc.2 = add i32 %loop.acc.1, %array.2.i
- %array.3.i.ptr = getelementptr inbounds i32, i32* %array.3, i64 %i.i64
- %array.3.i = load i32, i32* %array.3.i.ptr, align 4
+ %array.3.i.ptr = getelementptr inbounds i32, ptr %array.3, i64 %i.i64
+ %array.3.i = load i32, ptr %array.3.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc.2, %array.3.i
%i.next = add nuw i32 %i, 1
%continue = icmp ult i32 %i.next, %n
@@ -498,7 +498,7 @@ exit: ; preds = %guarded, %entry
}
; Analogous to the above, but with two distinct branches (on
diff erent conditions)
-define i32 @distinct_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32 %length.2, i32* %array.3, i32 %length.3, i32 %n) #0 {
+define i32 @distinct_checks(ptr %array.1, i32 %length.1, ptr %array.2, i32 %length.2, ptr %array.3, i32 %length.3, i32 %n) #0 {
; CHECK-V8M-LABEL: @distinct_checks(
; CHECK-V8M-NEXT: loop.preheader:
; CHECK-V8M-NEXT: [[UMAX:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 1)
@@ -519,16 +519,16 @@ define i32 @distinct_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32 %le
; CHECK-V8M-NEXT: ret i32 -1
; CHECK-V8M: guarded:
; CHECK-V8M-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-V8M-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
-; CHECK-V8M-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-V8M-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-V8M-NEXT: [[ARRAY_1_I:%.*]] = load i32, ptr [[ARRAY_1_I_PTR]], align 4
; CHECK-V8M-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
; CHECK-V8M-NEXT: br i1 [[TMP4]], label [[GUARDED1]], label [[DEOPT2:%.*]], !prof [[PROF0]]
; CHECK-V8M: deopt2:
; CHECK-V8M-NEXT: call void @prevent_merging()
; CHECK-V8M-NEXT: ret i32 -1
; CHECK-V8M: guarded1:
-; CHECK-V8M-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_3:%.*]], i64 [[I_I64]]
-; CHECK-V8M-NEXT: [[ARRAY_3_I:%.*]] = load i32, i32* [[ARRAY_3_I_PTR]], align 4
+; CHECK-V8M-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_3:%.*]], i64 [[I_I64]]
+; CHECK-V8M-NEXT: [[ARRAY_3_I:%.*]] = load i32, ptr [[ARRAY_3_I_PTR]], align 4
; CHECK-V8M-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_1]], [[ARRAY_3_I]]
; CHECK-V8M-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-V8M-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -557,16 +557,16 @@ define i32 @distinct_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32 %le
; CHECK-V8A-NEXT: ret i32 -1
; CHECK-V8A: guarded:
; CHECK-V8A-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-V8A-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
-; CHECK-V8A-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-V8A-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-V8A-NEXT: [[ARRAY_1_I:%.*]] = load i32, ptr [[ARRAY_1_I_PTR]], align 4
; CHECK-V8A-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
; CHECK-V8A-NEXT: br i1 [[TMP4]], label [[GUARDED1]], label [[DEOPT2:%.*]], !prof [[PROF0]]
; CHECK-V8A: deopt2:
; CHECK-V8A-NEXT: call void @prevent_merging()
; CHECK-V8A-NEXT: ret i32 -1
; CHECK-V8A: guarded1:
-; CHECK-V8A-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_3:%.*]], i64 [[I_I64]]
-; CHECK-V8A-NEXT: [[ARRAY_3_I:%.*]] = load i32, i32* [[ARRAY_3_I_PTR]], align 4
+; CHECK-V8A-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_3:%.*]], i64 [[I_I64]]
+; CHECK-V8A-NEXT: [[ARRAY_3_I:%.*]] = load i32, ptr [[ARRAY_3_I_PTR]], align 4
; CHECK-V8A-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_1]], [[ARRAY_3_I]]
; CHECK-V8A-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-V8A-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -590,8 +590,8 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.1.i.ptr = getelementptr inbounds i32, i32* %array.1, i64 %i.i64
- %array.1.i = load i32, i32* %array.1.i.ptr, align 4
+ %array.1.i.ptr = getelementptr inbounds i32, ptr %array.1, i64 %i.i64
+ %array.1.i = load i32, ptr %array.1.i.ptr, align 4
%loop.acc.1 = add i32 %loop.acc, %array.1.i
%within.bounds.2 = icmp ult i32 %i, %length.2
br i1 %within.bounds.2, label %guarded1, label %deopt2, !prof !0
@@ -601,8 +601,8 @@ deopt2: ; preds = %guarded
ret i32 -1
guarded1: ; preds = %guarded1
- %array.3.i.ptr = getelementptr inbounds i32, i32* %array.3, i64 %i.i64
- %array.3.i = load i32, i32* %array.3.i.ptr, align 4
+ %array.3.i.ptr = getelementptr inbounds i32, ptr %array.3, i64 %i.i64
+ %array.3.i = load i32, ptr %array.3.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc.1, %array.3.i
%i.next = add nuw i32 %i, 1
%continue = icmp ult i32 %i.next, %n
@@ -613,7 +613,7 @@ exit:
ret i32 %result
}
-define i32 @duplicate_checks(i32* %array.1, i32* %array.2, i32* %array.3, i32 %length, i32 %n) #0 {
+define i32 @duplicate_checks(ptr %array.1, ptr %array.2, ptr %array.3, i32 %length, i32 %n) #0 {
; CHECK-V8M-LABEL: @duplicate_checks(
; CHECK-V8M-NEXT: loop.preheader:
; CHECK-V8M-NEXT: [[UMAX:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 1)
@@ -631,16 +631,16 @@ define i32 @duplicate_checks(i32* %array.1, i32* %array.2, i32* %array.3, i32 %l
; CHECK-V8M-NEXT: ret i32 -1
; CHECK-V8M: guarded:
; CHECK-V8M-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-V8M-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
-; CHECK-V8M-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-V8M-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-V8M-NEXT: [[ARRAY_1_I:%.*]] = load i32, ptr [[ARRAY_1_I_PTR]], align 4
; CHECK-V8M-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
; CHECK-V8M-NEXT: br i1 true, label [[GUARDED1]], label [[DEOPT2:%.*]], !prof [[PROF0]]
; CHECK-V8M: deopt2:
; CHECK-V8M-NEXT: call void @prevent_merging()
; CHECK-V8M-NEXT: ret i32 -1
; CHECK-V8M: guarded1:
-; CHECK-V8M-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_3:%.*]], i64 [[I_I64]]
-; CHECK-V8M-NEXT: [[ARRAY_3_I:%.*]] = load i32, i32* [[ARRAY_3_I_PTR]], align 4
+; CHECK-V8M-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_3:%.*]], i64 [[I_I64]]
+; CHECK-V8M-NEXT: [[ARRAY_3_I:%.*]] = load i32, ptr [[ARRAY_3_I_PTR]], align 4
; CHECK-V8M-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_1]], [[ARRAY_3_I]]
; CHECK-V8M-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-V8M-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -666,16 +666,16 @@ define i32 @duplicate_checks(i32* %array.1, i32* %array.2, i32* %array.3, i32 %l
; CHECK-V8A-NEXT: ret i32 -1
; CHECK-V8A: guarded:
; CHECK-V8A-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-V8A-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
-; CHECK-V8A-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-V8A-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-V8A-NEXT: [[ARRAY_1_I:%.*]] = load i32, ptr [[ARRAY_1_I_PTR]], align 4
; CHECK-V8A-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
; CHECK-V8A-NEXT: br i1 true, label [[GUARDED1]], label [[DEOPT2:%.*]], !prof [[PROF0]]
; CHECK-V8A: deopt2:
; CHECK-V8A-NEXT: call void @prevent_merging()
; CHECK-V8A-NEXT: ret i32 -1
; CHECK-V8A: guarded1:
-; CHECK-V8A-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_3:%.*]], i64 [[I_I64]]
-; CHECK-V8A-NEXT: [[ARRAY_3_I:%.*]] = load i32, i32* [[ARRAY_3_I_PTR]], align 4
+; CHECK-V8A-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_3:%.*]], i64 [[I_I64]]
+; CHECK-V8A-NEXT: [[ARRAY_3_I:%.*]] = load i32, ptr [[ARRAY_3_I_PTR]], align 4
; CHECK-V8A-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_1]], [[ARRAY_3_I]]
; CHECK-V8A-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-V8A-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -699,8 +699,8 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.1.i.ptr = getelementptr inbounds i32, i32* %array.1, i64 %i.i64
- %array.1.i = load i32, i32* %array.1.i.ptr, align 4
+ %array.1.i.ptr = getelementptr inbounds i32, ptr %array.1, i64 %i.i64
+ %array.1.i = load i32, ptr %array.1.i.ptr, align 4
%loop.acc.1 = add i32 %loop.acc, %array.1.i
%within.bounds.2 = icmp ult i32 %i, %length
br i1 %within.bounds.2, label %guarded1, label %deopt2, !prof !0
@@ -710,8 +710,8 @@ deopt2: ; preds = %guarded
ret i32 -1
guarded1: ; preds = %guarded1
- %array.3.i.ptr = getelementptr inbounds i32, i32* %array.3, i64 %i.i64
- %array.3.i = load i32, i32* %array.3.i.ptr, align 4
+ %array.3.i.ptr = getelementptr inbounds i32, ptr %array.3, i64 %i.i64
+ %array.3.i = load i32, ptr %array.3.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc.1, %array.3.i
%i.next = add nuw i32 %i, 1
%continue = icmp ult i32 %i.next, %n
@@ -725,7 +725,7 @@ exit:
; Demonstrate that this approach works with IVs of
diff erent steps, and types
; This version uses a manually lftred exit condition to work around an issue described
; in detail on next test.
-define i32 @
diff erent_ivs(i32* %array, i32 %length, i32 %n) #0 {
+define i32 @
diff erent_ivs(ptr %array, i32 %length, i32 %n) #0 {
; CHECK-V8M-LABEL: @
diff erent_ivs(
; CHECK-V8M-NEXT: loop.preheader:
; CHECK-V8M-NEXT: [[N64:%.*]] = zext i32 [[N:%.*]] to i64
@@ -745,8 +745,8 @@ define i32 @
diff erent_ivs(i32* %array, i32 %length, i32 %n) #0 {
; CHECK-V8M-NEXT: call void @prevent_merging()
; CHECK-V8M-NEXT: ret i32 -1
; CHECK-V8M: guarded:
-; CHECK-V8M-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I]]
-; CHECK-V8M-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-V8M-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i64 [[I]]
+; CHECK-V8M-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-V8M-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-V8M-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1
; CHECK-V8M-NEXT: [[CONTINUE:%.*]] = icmp ult i64 [[I_NEXT]], [[N64]]
@@ -774,8 +774,8 @@ define i32 @
diff erent_ivs(i32* %array, i32 %length, i32 %n) #0 {
; CHECK-V8A-NEXT: call void @prevent_merging()
; CHECK-V8A-NEXT: ret i32 -1
; CHECK-V8A: guarded:
-; CHECK-V8A-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I]]
-; CHECK-V8A-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-V8A-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i64 [[I]]
+; CHECK-V8A-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-V8A-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-V8A-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1
; CHECK-V8A-NEXT: [[CONTINUE:%.*]] = icmp ult i64 [[I_NEXT]], [[N64]]
@@ -801,8 +801,8 @@ deopt:
ret i32 -1
guarded:
- %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i
- %array.i = load i32, i32* %array.i.ptr, align 4
+ %array.i.ptr = getelementptr inbounds i32, ptr %array, i64 %i
+ %array.i = load i32, ptr %array.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc, %array.i
%i.next = add nuw i64 %i, 1
%j.next = sub nuw i32 %j, 1
diff --git a/llvm/test/Transforms/IndVarSimplify/ARM/indvar-cost.ll b/llvm/test/Transforms/IndVarSimplify/ARM/indvar-cost.ll
index d5b1eaa1ed92e..2c92f2a315362 100644
--- a/llvm/test/Transforms/IndVarSimplify/ARM/indvar-cost.ll
+++ b/llvm/test/Transforms/IndVarSimplify/ARM/indvar-cost.ll
@@ -2,13 +2,13 @@
; RUN: opt -passes=indvars -mtriple=thumbv8m.base -S %s -o - | FileCheck %s --check-prefix=CHECK-T1
; RUN: opt -passes=indvars -mtriple=thumbv8m.main -S %s -o - | FileCheck %s --check-prefix=CHECK-T2
-define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen, i16* %pSrcB, i32 %srcBLen, i16* %pDst, i16** %store.px, i16** %store.py, i32* %store.res) local_unnamed_addr {
+define dso_local arm_aapcscc void @arm_conv_fast_q15(ptr %pSrcA, i32 %srcALen, ptr %pSrcB, i32 %srcBLen, ptr %pDst, ptr %store.px, ptr %store.py, ptr %store.res) local_unnamed_addr {
; CHECK-T1-LABEL: @arm_conv_fast_q15(
; CHECK-T1-NEXT: entry:
; CHECK-T1-NEXT: [[CMP:%.*]] = icmp ult i32 [[SRCALEN:%.*]], [[SRCBLEN:%.*]]
; CHECK-T1-NEXT: [[SRCALEN_SRCBLEN:%.*]] = select i1 [[CMP]], i32 [[SRCALEN]], i32 [[SRCBLEN]]
-; CHECK-T1-NEXT: [[PSRCB_PSRCA:%.*]] = select i1 [[CMP]], i16* [[PSRCB:%.*]], i16* [[PSRCA:%.*]]
-; CHECK-T1-NEXT: [[PSRCA_PSRCB:%.*]] = select i1 [[CMP]], i16* [[PSRCA]], i16* [[PSRCB]]
+; CHECK-T1-NEXT: [[PSRCB_PSRCA:%.*]] = select i1 [[CMP]], ptr [[PSRCB:%.*]], ptr [[PSRCA:%.*]]
+; CHECK-T1-NEXT: [[PSRCA_PSRCB:%.*]] = select i1 [[CMP]], ptr [[PSRCA]], ptr [[PSRCB]]
; CHECK-T1-NEXT: [[SUB:%.*]] = add i32 [[SRCALEN_SRCBLEN]], -1
; CHECK-T1-NEXT: [[CMP41080:%.*]] = icmp eq i32 [[SUB]], 0
; CHECK-T1-NEXT: br i1 [[CMP41080]], label [[WHILE_END13:%.*]], label [[WHILE_COND5_PREHEADER_PREHEADER:%.*]]
@@ -17,19 +17,19 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T1: while.cond5.preheader:
; CHECK-T1-NEXT: [[COUNT_01084:%.*]] = phi i32 [ [[INC:%.*]], [[WHILE_END:%.*]] ], [ 1, [[WHILE_COND5_PREHEADER_PREHEADER]] ]
; CHECK-T1-NEXT: [[BLOCKSIZE1_01083:%.*]] = phi i32 [ [[DEC12:%.*]], [[WHILE_END]] ], [ [[SUB]], [[WHILE_COND5_PREHEADER_PREHEADER]] ]
-; CHECK-T1-NEXT: [[PY_01082:%.*]] = phi i16* [ [[ADD_PTR:%.*]], [[WHILE_END]] ], [ [[PSRCA_PSRCB]], [[WHILE_COND5_PREHEADER_PREHEADER]] ]
-; CHECK-T1-NEXT: [[POUT_01081:%.*]] = phi i16* [ [[INCDEC_PTR11:%.*]], [[WHILE_END]] ], [ [[PDST:%.*]], [[WHILE_COND5_PREHEADER_PREHEADER]] ]
+; CHECK-T1-NEXT: [[PY_01082:%.*]] = phi ptr [ [[ADD_PTR:%.*]], [[WHILE_END]] ], [ [[PSRCA_PSRCB]], [[WHILE_COND5_PREHEADER_PREHEADER]] ]
+; CHECK-T1-NEXT: [[POUT_01081:%.*]] = phi ptr [ [[INCDEC_PTR11:%.*]], [[WHILE_END]] ], [ [[PDST:%.*]], [[WHILE_COND5_PREHEADER_PREHEADER]] ]
; CHECK-T1-NEXT: br label [[WHILE_BODY7:%.*]]
; CHECK-T1: while.body7:
; CHECK-T1-NEXT: [[K_01078:%.*]] = phi i32 [ [[DEC:%.*]], [[WHILE_BODY7]] ], [ [[COUNT_01084]], [[WHILE_COND5_PREHEADER]] ]
; CHECK-T1-NEXT: [[SUM_01077:%.*]] = phi i32 [ [[ADD6_I:%.*]], [[WHILE_BODY7]] ], [ 0, [[WHILE_COND5_PREHEADER]] ]
-; CHECK-T1-NEXT: [[PY_11076:%.*]] = phi i16* [ [[INCDEC_PTR8:%.*]], [[WHILE_BODY7]] ], [ [[PY_01082]], [[WHILE_COND5_PREHEADER]] ]
-; CHECK-T1-NEXT: [[PX_11075:%.*]] = phi i16* [ [[INCDEC_PTR:%.*]], [[WHILE_BODY7]] ], [ [[PSRCB_PSRCA]], [[WHILE_COND5_PREHEADER]] ]
-; CHECK-T1-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i16, i16* [[PX_11075]], i32 1
-; CHECK-T1-NEXT: [[TMP0:%.*]] = load i16, i16* [[PX_11075]], align 2
+; CHECK-T1-NEXT: [[PY_11076:%.*]] = phi ptr [ [[INCDEC_PTR8:%.*]], [[WHILE_BODY7]] ], [ [[PY_01082]], [[WHILE_COND5_PREHEADER]] ]
+; CHECK-T1-NEXT: [[PX_11075:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[WHILE_BODY7]] ], [ [[PSRCB_PSRCA]], [[WHILE_COND5_PREHEADER]] ]
+; CHECK-T1-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i16, ptr [[PX_11075]], i32 1
+; CHECK-T1-NEXT: [[TMP0:%.*]] = load i16, ptr [[PX_11075]], align 2
; CHECK-T1-NEXT: [[CONV:%.*]] = sext i16 [[TMP0]] to i32
-; CHECK-T1-NEXT: [[INCDEC_PTR8]] = getelementptr inbounds i16, i16* [[PY_11076]], i32 -1
-; CHECK-T1-NEXT: [[TMP1:%.*]] = load i16, i16* [[PY_11076]], align 2
+; CHECK-T1-NEXT: [[INCDEC_PTR8]] = getelementptr inbounds i16, ptr [[PY_11076]], i32 -1
+; CHECK-T1-NEXT: [[TMP1:%.*]] = load i16, ptr [[PY_11076]], align 2
; CHECK-T1-NEXT: [[CONV9:%.*]] = sext i16 [[TMP1]] to i32
; CHECK-T1-NEXT: [[MUL_I:%.*]] = mul nsw i32 [[CONV9]], [[CONV]]
; CHECK-T1-NEXT: [[SHR3_I:%.*]] = ashr i32 [[CONV]], 16
@@ -44,9 +44,9 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T1-NEXT: [[ADD6_I_LCSSA:%.*]] = phi i32 [ [[ADD6_I]], [[WHILE_BODY7]] ]
; CHECK-T1-NEXT: [[TMP2:%.*]] = lshr i32 [[ADD6_I_LCSSA]], 15
; CHECK-T1-NEXT: [[CONV10:%.*]] = trunc i32 [[TMP2]] to i16
-; CHECK-T1-NEXT: [[INCDEC_PTR11]] = getelementptr inbounds i16, i16* [[POUT_01081]], i32 1
-; CHECK-T1-NEXT: store i16 [[CONV10]], i16* [[POUT_01081]], align 2
-; CHECK-T1-NEXT: [[ADD_PTR]] = getelementptr inbounds i16, i16* [[PSRCA_PSRCB]], i32 [[COUNT_01084]]
+; CHECK-T1-NEXT: [[INCDEC_PTR11]] = getelementptr inbounds i16, ptr [[POUT_01081]], i32 1
+; CHECK-T1-NEXT: store i16 [[CONV10]], ptr [[POUT_01081]], align 2
+; CHECK-T1-NEXT: [[ADD_PTR]] = getelementptr inbounds i16, ptr [[PSRCA_PSRCB]], i32 [[COUNT_01084]]
; CHECK-T1-NEXT: [[INC]] = add nuw nsw i32 [[COUNT_01084]], 1
; CHECK-T1-NEXT: [[DEC12]] = add i32 [[BLOCKSIZE1_01083]], -1
; CHECK-T1-NEXT: [[CMP3:%.*]] = icmp ult i32 [[COUNT_01084]], 3
@@ -54,26 +54,26 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T1-NEXT: [[TMP3:%.*]] = and i1 [[CMP4]], [[CMP3]]
; CHECK-T1-NEXT: br i1 [[TMP3]], label [[WHILE_COND5_PREHEADER]], label [[WHILE_END13_LOOPEXIT:%.*]]
; CHECK-T1: while.end13.loopexit:
-; CHECK-T1-NEXT: [[INCDEC_PTR11_LCSSA:%.*]] = phi i16* [ [[INCDEC_PTR11]], [[WHILE_END]] ]
-; CHECK-T1-NEXT: [[ADD_PTR_LCSSA:%.*]] = phi i16* [ [[ADD_PTR]], [[WHILE_END]] ]
+; CHECK-T1-NEXT: [[INCDEC_PTR11_LCSSA:%.*]] = phi ptr [ [[INCDEC_PTR11]], [[WHILE_END]] ]
+; CHECK-T1-NEXT: [[ADD_PTR_LCSSA:%.*]] = phi ptr [ [[ADD_PTR]], [[WHILE_END]] ]
; CHECK-T1-NEXT: [[INC_LCSSA:%.*]] = phi i32 [ [[INC]], [[WHILE_END]] ]
; CHECK-T1-NEXT: [[DEC12_LCSSA:%.*]] = phi i32 [ [[DEC12]], [[WHILE_END]] ]
; CHECK-T1-NEXT: br label [[WHILE_END13]]
; CHECK-T1: while.end13:
-; CHECK-T1-NEXT: [[POUT_0_LCSSA:%.*]] = phi i16* [ [[PDST]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR11_LCSSA]], [[WHILE_END13_LOOPEXIT]] ]
-; CHECK-T1-NEXT: [[PY_0_LCSSA:%.*]] = phi i16* [ [[PSRCA_PSRCB]], [[ENTRY]] ], [ [[ADD_PTR_LCSSA]], [[WHILE_END13_LOOPEXIT]] ]
+; CHECK-T1-NEXT: [[POUT_0_LCSSA:%.*]] = phi ptr [ [[PDST]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR11_LCSSA]], [[WHILE_END13_LOOPEXIT]] ]
+; CHECK-T1-NEXT: [[PY_0_LCSSA:%.*]] = phi ptr [ [[PSRCA_PSRCB]], [[ENTRY]] ], [ [[ADD_PTR_LCSSA]], [[WHILE_END13_LOOPEXIT]] ]
; CHECK-T1-NEXT: [[BLOCKSIZE1_0_LCSSA:%.*]] = phi i32 [ [[SUB]], [[ENTRY]] ], [ [[DEC12_LCSSA]], [[WHILE_END13_LOOPEXIT]] ]
; CHECK-T1-NEXT: [[COUNT_0_LCSSA:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[INC_LCSSA]], [[WHILE_END13_LOOPEXIT]] ]
; CHECK-T1-NEXT: [[CMP161068:%.*]] = icmp eq i32 [[BLOCKSIZE1_0_LCSSA]], 0
; CHECK-T1-NEXT: br i1 [[CMP161068]], label [[EXIT:%.*]], label [[WHILE_BODY18_PREHEADER:%.*]]
; CHECK-T1: while.body18.preheader:
-; CHECK-T1-NEXT: [[ADD_PTR14:%.*]] = getelementptr inbounds i16, i16* [[PY_0_LCSSA]], i32 -1
+; CHECK-T1-NEXT: [[ADD_PTR14:%.*]] = getelementptr inbounds i16, ptr [[PY_0_LCSSA]], i32 -1
; CHECK-T1-NEXT: br label [[WHILE_BODY18:%.*]]
; CHECK-T1: while.body18:
; CHECK-T1-NEXT: [[COUNT_11072:%.*]] = phi i32 [ [[INC49:%.*]], [[WHILE_END43:%.*]] ], [ [[COUNT_0_LCSSA]], [[WHILE_BODY18_PREHEADER]] ]
; CHECK-T1-NEXT: [[BLOCKSIZE1_11071:%.*]] = phi i32 [ [[DEC50:%.*]], [[WHILE_END43]] ], [ [[BLOCKSIZE1_0_LCSSA]], [[WHILE_BODY18_PREHEADER]] ]
-; CHECK-T1-NEXT: [[PY_21070:%.*]] = phi i16* [ [[ADD_PTR48:%.*]], [[WHILE_END43]] ], [ [[ADD_PTR14]], [[WHILE_BODY18_PREHEADER]] ]
-; CHECK-T1-NEXT: [[POUT_11069:%.*]] = phi i16* [ [[INCDEC_PTR46:%.*]], [[WHILE_END43]] ], [ [[POUT_0_LCSSA]], [[WHILE_BODY18_PREHEADER]] ]
+; CHECK-T1-NEXT: [[PY_21070:%.*]] = phi ptr [ [[ADD_PTR48:%.*]], [[WHILE_END43]] ], [ [[ADD_PTR14]], [[WHILE_BODY18_PREHEADER]] ]
+; CHECK-T1-NEXT: [[POUT_11069:%.*]] = phi ptr [ [[INCDEC_PTR46:%.*]], [[WHILE_END43]] ], [ [[POUT_0_LCSSA]], [[WHILE_BODY18_PREHEADER]] ]
; CHECK-T1-NEXT: [[SHR19:%.*]] = lshr i32 [[COUNT_11072]], 2
; CHECK-T1-NEXT: [[CMP211054:%.*]] = icmp eq i32 [[SHR19]], 0
; CHECK-T1-NEXT: br i1 [[CMP211054]], label [[WHILE_END31:%.*]], label [[WHILE_BODY23_PREHEADER:%.*]]
@@ -82,16 +82,16 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T1: while.body23:
; CHECK-T1-NEXT: [[K_11058:%.*]] = phi i32 [ [[DEC30:%.*]], [[WHILE_BODY23]] ], [ [[SHR19]], [[WHILE_BODY23_PREHEADER]] ]
; CHECK-T1-NEXT: [[SUM_11057:%.*]] = phi i32 [ [[ADD6_I878:%.*]], [[WHILE_BODY23]] ], [ 0, [[WHILE_BODY23_PREHEADER]] ]
-; CHECK-T1-NEXT: [[PY_31056:%.*]] = phi i16* [ [[ADD_PTR_I884:%.*]], [[WHILE_BODY23]] ], [ [[PY_21070]], [[WHILE_BODY23_PREHEADER]] ]
-; CHECK-T1-NEXT: [[PX_31055:%.*]] = phi i16* [ [[ADD_PTR_I890:%.*]], [[WHILE_BODY23]] ], [ [[PSRCB_PSRCA]], [[WHILE_BODY23_PREHEADER]] ]
-; CHECK-T1-NEXT: [[ARRAYIDX_I907:%.*]] = getelementptr inbounds i16, i16* [[PX_31055]], i32 1
-; CHECK-T1-NEXT: [[TMP4:%.*]] = load i16, i16* [[ARRAYIDX_I907]], align 2
-; CHECK-T1-NEXT: [[TMP5:%.*]] = load i16, i16* [[PX_31055]], align 2
-; CHECK-T1-NEXT: [[ADD_PTR_I912:%.*]] = getelementptr inbounds i16, i16* [[PX_31055]], i32 2
-; CHECK-T1-NEXT: [[ARRAYIDX_I901:%.*]] = getelementptr inbounds i16, i16* [[PY_31056]], i32 1
-; CHECK-T1-NEXT: [[TMP6:%.*]] = load i16, i16* [[ARRAYIDX_I901]], align 2
-; CHECK-T1-NEXT: [[TMP7:%.*]] = load i16, i16* [[PY_31056]], align 2
-; CHECK-T1-NEXT: [[ADD_PTR_I906:%.*]] = getelementptr inbounds i16, i16* [[PY_31056]], i32 -2
+; CHECK-T1-NEXT: [[PY_31056:%.*]] = phi ptr [ [[ADD_PTR_I884:%.*]], [[WHILE_BODY23]] ], [ [[PY_21070]], [[WHILE_BODY23_PREHEADER]] ]
+; CHECK-T1-NEXT: [[PX_31055:%.*]] = phi ptr [ [[ADD_PTR_I890:%.*]], [[WHILE_BODY23]] ], [ [[PSRCB_PSRCA]], [[WHILE_BODY23_PREHEADER]] ]
+; CHECK-T1-NEXT: [[ARRAYIDX_I907:%.*]] = getelementptr inbounds i16, ptr [[PX_31055]], i32 1
+; CHECK-T1-NEXT: [[TMP4:%.*]] = load i16, ptr [[ARRAYIDX_I907]], align 2
+; CHECK-T1-NEXT: [[TMP5:%.*]] = load i16, ptr [[PX_31055]], align 2
+; CHECK-T1-NEXT: [[ADD_PTR_I912:%.*]] = getelementptr inbounds i16, ptr [[PX_31055]], i32 2
+; CHECK-T1-NEXT: [[ARRAYIDX_I901:%.*]] = getelementptr inbounds i16, ptr [[PY_31056]], i32 1
+; CHECK-T1-NEXT: [[TMP6:%.*]] = load i16, ptr [[ARRAYIDX_I901]], align 2
+; CHECK-T1-NEXT: [[TMP7:%.*]] = load i16, ptr [[PY_31056]], align 2
+; CHECK-T1-NEXT: [[ADD_PTR_I906:%.*]] = getelementptr inbounds i16, ptr [[PY_31056]], i32 -2
; CHECK-T1-NEXT: [[SHR_I892:%.*]] = sext i16 [[TMP5]] to i32
; CHECK-T1-NEXT: [[SHR1_I893:%.*]] = sext i16 [[TMP6]] to i32
; CHECK-T1-NEXT: [[MUL_I894:%.*]] = mul nsw i32 [[SHR1_I893]], [[SHR_I892]]
@@ -100,14 +100,14 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T1-NEXT: [[MUL5_I898:%.*]] = mul nsw i32 [[SHR4_I897]], [[SHR2_I895]]
; CHECK-T1-NEXT: [[ADD_I899:%.*]] = add i32 [[MUL_I894]], [[SUM_11057]]
; CHECK-T1-NEXT: [[ADD6_I900:%.*]] = add i32 [[ADD_I899]], [[MUL5_I898]]
-; CHECK-T1-NEXT: [[ARRAYIDX_I885:%.*]] = getelementptr inbounds i16, i16* [[PX_31055]], i32 3
-; CHECK-T1-NEXT: [[TMP8:%.*]] = load i16, i16* [[ARRAYIDX_I885]], align 2
-; CHECK-T1-NEXT: [[TMP9:%.*]] = load i16, i16* [[ADD_PTR_I912]], align 2
-; CHECK-T1-NEXT: [[ADD_PTR_I890]] = getelementptr inbounds i16, i16* [[PX_31055]], i32 4
-; CHECK-T1-NEXT: [[ARRAYIDX_I879:%.*]] = getelementptr inbounds i16, i16* [[PY_31056]], i32 -1
-; CHECK-T1-NEXT: [[TMP10:%.*]] = load i16, i16* [[ARRAYIDX_I879]], align 2
-; CHECK-T1-NEXT: [[TMP11:%.*]] = load i16, i16* [[ADD_PTR_I906]], align 2
-; CHECK-T1-NEXT: [[ADD_PTR_I884]] = getelementptr inbounds i16, i16* [[PY_31056]], i32 -4
+; CHECK-T1-NEXT: [[ARRAYIDX_I885:%.*]] = getelementptr inbounds i16, ptr [[PX_31055]], i32 3
+; CHECK-T1-NEXT: [[TMP8:%.*]] = load i16, ptr [[ARRAYIDX_I885]], align 2
+; CHECK-T1-NEXT: [[TMP9:%.*]] = load i16, ptr [[ADD_PTR_I912]], align 2
+; CHECK-T1-NEXT: [[ADD_PTR_I890]] = getelementptr inbounds i16, ptr [[PX_31055]], i32 4
+; CHECK-T1-NEXT: [[ARRAYIDX_I879:%.*]] = getelementptr inbounds i16, ptr [[PY_31056]], i32 -1
+; CHECK-T1-NEXT: [[TMP10:%.*]] = load i16, ptr [[ARRAYIDX_I879]], align 2
+; CHECK-T1-NEXT: [[TMP11:%.*]] = load i16, ptr [[ADD_PTR_I906]], align 2
+; CHECK-T1-NEXT: [[ADD_PTR_I884]] = getelementptr inbounds i16, ptr [[PY_31056]], i32 -4
; CHECK-T1-NEXT: [[SHR_I870:%.*]] = sext i16 [[TMP9]] to i32
; CHECK-T1-NEXT: [[SHR1_I871:%.*]] = sext i16 [[TMP10]] to i32
; CHECK-T1-NEXT: [[MUL_I872:%.*]] = mul nsw i32 [[SHR1_I871]], [[SHR_I870]]
@@ -120,30 +120,30 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T1-NEXT: [[CMP21:%.*]] = icmp eq i32 [[DEC30]], 0
; CHECK-T1-NEXT: br i1 [[CMP21]], label [[WHILE_END31_LOOPEXIT:%.*]], label [[WHILE_BODY23]]
; CHECK-T1: while.end31.loopexit:
-; CHECK-T1-NEXT: [[ADD_PTR_I890_LCSSA:%.*]] = phi i16* [ [[ADD_PTR_I890]], [[WHILE_BODY23]] ]
-; CHECK-T1-NEXT: [[ADD_PTR_I884_LCSSA:%.*]] = phi i16* [ [[ADD_PTR_I884]], [[WHILE_BODY23]] ]
+; CHECK-T1-NEXT: [[ADD_PTR_I890_LCSSA:%.*]] = phi ptr [ [[ADD_PTR_I890]], [[WHILE_BODY23]] ]
+; CHECK-T1-NEXT: [[ADD_PTR_I884_LCSSA:%.*]] = phi ptr [ [[ADD_PTR_I884]], [[WHILE_BODY23]] ]
; CHECK-T1-NEXT: [[ADD6_I878_LCSSA:%.*]] = phi i32 [ [[ADD6_I878]], [[WHILE_BODY23]] ]
; CHECK-T1-NEXT: br label [[WHILE_END31]]
; CHECK-T1: while.end31:
-; CHECK-T1-NEXT: [[PX_3_LCSSA:%.*]] = phi i16* [ [[PSRCB_PSRCA]], [[WHILE_BODY18]] ], [ [[ADD_PTR_I890_LCSSA]], [[WHILE_END31_LOOPEXIT]] ]
-; CHECK-T1-NEXT: [[PY_3_LCSSA:%.*]] = phi i16* [ [[PY_21070]], [[WHILE_BODY18]] ], [ [[ADD_PTR_I884_LCSSA]], [[WHILE_END31_LOOPEXIT]] ]
+; CHECK-T1-NEXT: [[PX_3_LCSSA:%.*]] = phi ptr [ [[PSRCB_PSRCA]], [[WHILE_BODY18]] ], [ [[ADD_PTR_I890_LCSSA]], [[WHILE_END31_LOOPEXIT]] ]
+; CHECK-T1-NEXT: [[PY_3_LCSSA:%.*]] = phi ptr [ [[PY_21070]], [[WHILE_BODY18]] ], [ [[ADD_PTR_I884_LCSSA]], [[WHILE_END31_LOOPEXIT]] ]
; CHECK-T1-NEXT: [[SUM_1_LCSSA:%.*]] = phi i32 [ 0, [[WHILE_BODY18]] ], [ [[ADD6_I878_LCSSA]], [[WHILE_END31_LOOPEXIT]] ]
; CHECK-T1-NEXT: [[REM:%.*]] = and i32 [[COUNT_11072]], 3
; CHECK-T1-NEXT: [[CMP341062:%.*]] = icmp eq i32 [[REM]], 0
; CHECK-T1-NEXT: br i1 [[CMP341062]], label [[WHILE_END43]], label [[WHILE_BODY36_PREHEADER:%.*]]
; CHECK-T1: while.body36.preheader:
-; CHECK-T1-NEXT: [[ADD_PTR32:%.*]] = getelementptr inbounds i16, i16* [[PY_3_LCSSA]], i32 1
+; CHECK-T1-NEXT: [[ADD_PTR32:%.*]] = getelementptr inbounds i16, ptr [[PY_3_LCSSA]], i32 1
; CHECK-T1-NEXT: br label [[WHILE_BODY36:%.*]]
; CHECK-T1: while.body36:
; CHECK-T1-NEXT: [[K_21066:%.*]] = phi i32 [ [[DEC42:%.*]], [[WHILE_BODY36]] ], [ [[REM]], [[WHILE_BODY36_PREHEADER]] ]
; CHECK-T1-NEXT: [[SUM_21065:%.*]] = phi i32 [ [[ADD6_I868:%.*]], [[WHILE_BODY36]] ], [ [[SUM_1_LCSSA]], [[WHILE_BODY36_PREHEADER]] ]
-; CHECK-T1-NEXT: [[PY_41064:%.*]] = phi i16* [ [[INCDEC_PTR39:%.*]], [[WHILE_BODY36]] ], [ [[ADD_PTR32]], [[WHILE_BODY36_PREHEADER]] ]
-; CHECK-T1-NEXT: [[PX_41063:%.*]] = phi i16* [ [[INCDEC_PTR37:%.*]], [[WHILE_BODY36]] ], [ [[PX_3_LCSSA]], [[WHILE_BODY36_PREHEADER]] ]
-; CHECK-T1-NEXT: [[INCDEC_PTR37]] = getelementptr inbounds i16, i16* [[PX_41063]], i32 1
-; CHECK-T1-NEXT: [[TMP12:%.*]] = load i16, i16* [[PX_41063]], align 2
+; CHECK-T1-NEXT: [[PY_41064:%.*]] = phi ptr [ [[INCDEC_PTR39:%.*]], [[WHILE_BODY36]] ], [ [[ADD_PTR32]], [[WHILE_BODY36_PREHEADER]] ]
+; CHECK-T1-NEXT: [[PX_41063:%.*]] = phi ptr [ [[INCDEC_PTR37:%.*]], [[WHILE_BODY36]] ], [ [[PX_3_LCSSA]], [[WHILE_BODY36_PREHEADER]] ]
+; CHECK-T1-NEXT: [[INCDEC_PTR37]] = getelementptr inbounds i16, ptr [[PX_41063]], i32 1
+; CHECK-T1-NEXT: [[TMP12:%.*]] = load i16, ptr [[PX_41063]], align 2
; CHECK-T1-NEXT: [[CONV38:%.*]] = sext i16 [[TMP12]] to i32
-; CHECK-T1-NEXT: [[INCDEC_PTR39]] = getelementptr inbounds i16, i16* [[PY_41064]], i32 -1
-; CHECK-T1-NEXT: [[TMP13:%.*]] = load i16, i16* [[PY_41064]], align 2
+; CHECK-T1-NEXT: [[INCDEC_PTR39]] = getelementptr inbounds i16, ptr [[PY_41064]], i32 -1
+; CHECK-T1-NEXT: [[TMP13:%.*]] = load i16, ptr [[PY_41064]], align 2
; CHECK-T1-NEXT: [[CONV40:%.*]] = sext i16 [[TMP13]] to i32
; CHECK-T1-NEXT: [[MUL_I863:%.*]] = mul nsw i32 [[CONV40]], [[CONV38]]
; CHECK-T1-NEXT: [[SHR3_I864:%.*]] = ashr i32 [[CONV38]], 16
@@ -161,10 +161,10 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T1-NEXT: [[SUM_2_LCSSA:%.*]] = phi i32 [ [[SUM_1_LCSSA]], [[WHILE_END31]] ], [ [[ADD6_I868_LCSSA]], [[WHILE_END43_LOOPEXIT]] ]
; CHECK-T1-NEXT: [[TMP14:%.*]] = lshr i32 [[SUM_2_LCSSA]], 15
; CHECK-T1-NEXT: [[CONV45:%.*]] = trunc i32 [[TMP14]] to i16
-; CHECK-T1-NEXT: [[INCDEC_PTR46]] = getelementptr inbounds i16, i16* [[POUT_11069]], i32 1
-; CHECK-T1-NEXT: store i16 [[CONV45]], i16* [[POUT_11069]], align 2
+; CHECK-T1-NEXT: [[INCDEC_PTR46]] = getelementptr inbounds i16, ptr [[POUT_11069]], i32 1
+; CHECK-T1-NEXT: store i16 [[CONV45]], ptr [[POUT_11069]], align 2
; CHECK-T1-NEXT: [[SUB47:%.*]] = add i32 [[COUNT_11072]], -1
-; CHECK-T1-NEXT: [[ADD_PTR48]] = getelementptr inbounds i16, i16* [[PSRCA_PSRCB]], i32 [[SUB47]]
+; CHECK-T1-NEXT: [[ADD_PTR48]] = getelementptr inbounds i16, ptr [[PSRCA_PSRCB]], i32 [[SUB47]]
; CHECK-T1-NEXT: [[INC49]] = add i32 [[COUNT_11072]], 1
; CHECK-T1-NEXT: [[DEC50]] = add i32 [[BLOCKSIZE1_11071]], -1
; CHECK-T1-NEXT: [[CMP16:%.*]] = icmp eq i32 [[DEC50]], 0
@@ -178,8 +178,8 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T2-NEXT: entry:
; CHECK-T2-NEXT: [[CMP:%.*]] = icmp ult i32 [[SRCALEN:%.*]], [[SRCBLEN:%.*]]
; CHECK-T2-NEXT: [[SRCALEN_SRCBLEN:%.*]] = select i1 [[CMP]], i32 [[SRCALEN]], i32 [[SRCBLEN]]
-; CHECK-T2-NEXT: [[PSRCB_PSRCA:%.*]] = select i1 [[CMP]], i16* [[PSRCB:%.*]], i16* [[PSRCA:%.*]]
-; CHECK-T2-NEXT: [[PSRCA_PSRCB:%.*]] = select i1 [[CMP]], i16* [[PSRCA]], i16* [[PSRCB]]
+; CHECK-T2-NEXT: [[PSRCB_PSRCA:%.*]] = select i1 [[CMP]], ptr [[PSRCB:%.*]], ptr [[PSRCA:%.*]]
+; CHECK-T2-NEXT: [[PSRCA_PSRCB:%.*]] = select i1 [[CMP]], ptr [[PSRCA]], ptr [[PSRCB]]
; CHECK-T2-NEXT: [[SUB:%.*]] = add i32 [[SRCALEN_SRCBLEN]], -1
; CHECK-T2-NEXT: [[CMP41080:%.*]] = icmp eq i32 [[SUB]], 0
; CHECK-T2-NEXT: br i1 [[CMP41080]], label [[WHILE_END13:%.*]], label [[WHILE_COND5_PREHEADER_PREHEADER:%.*]]
@@ -188,19 +188,19 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T2: while.cond5.preheader:
; CHECK-T2-NEXT: [[COUNT_01084:%.*]] = phi i32 [ [[INC:%.*]], [[WHILE_END:%.*]] ], [ 1, [[WHILE_COND5_PREHEADER_PREHEADER]] ]
; CHECK-T2-NEXT: [[BLOCKSIZE1_01083:%.*]] = phi i32 [ [[DEC12:%.*]], [[WHILE_END]] ], [ [[SUB]], [[WHILE_COND5_PREHEADER_PREHEADER]] ]
-; CHECK-T2-NEXT: [[PY_01082:%.*]] = phi i16* [ [[ADD_PTR:%.*]], [[WHILE_END]] ], [ [[PSRCA_PSRCB]], [[WHILE_COND5_PREHEADER_PREHEADER]] ]
-; CHECK-T2-NEXT: [[POUT_01081:%.*]] = phi i16* [ [[INCDEC_PTR11:%.*]], [[WHILE_END]] ], [ [[PDST:%.*]], [[WHILE_COND5_PREHEADER_PREHEADER]] ]
+; CHECK-T2-NEXT: [[PY_01082:%.*]] = phi ptr [ [[ADD_PTR:%.*]], [[WHILE_END]] ], [ [[PSRCA_PSRCB]], [[WHILE_COND5_PREHEADER_PREHEADER]] ]
+; CHECK-T2-NEXT: [[POUT_01081:%.*]] = phi ptr [ [[INCDEC_PTR11:%.*]], [[WHILE_END]] ], [ [[PDST:%.*]], [[WHILE_COND5_PREHEADER_PREHEADER]] ]
; CHECK-T2-NEXT: br label [[WHILE_BODY7:%.*]]
; CHECK-T2: while.body7:
; CHECK-T2-NEXT: [[K_01078:%.*]] = phi i32 [ [[DEC:%.*]], [[WHILE_BODY7]] ], [ [[COUNT_01084]], [[WHILE_COND5_PREHEADER]] ]
; CHECK-T2-NEXT: [[SUM_01077:%.*]] = phi i32 [ [[ADD6_I:%.*]], [[WHILE_BODY7]] ], [ 0, [[WHILE_COND5_PREHEADER]] ]
-; CHECK-T2-NEXT: [[PY_11076:%.*]] = phi i16* [ [[INCDEC_PTR8:%.*]], [[WHILE_BODY7]] ], [ [[PY_01082]], [[WHILE_COND5_PREHEADER]] ]
-; CHECK-T2-NEXT: [[PX_11075:%.*]] = phi i16* [ [[INCDEC_PTR:%.*]], [[WHILE_BODY7]] ], [ [[PSRCB_PSRCA]], [[WHILE_COND5_PREHEADER]] ]
-; CHECK-T2-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i16, i16* [[PX_11075]], i32 1
-; CHECK-T2-NEXT: [[TMP0:%.*]] = load i16, i16* [[PX_11075]], align 2
+; CHECK-T2-NEXT: [[PY_11076:%.*]] = phi ptr [ [[INCDEC_PTR8:%.*]], [[WHILE_BODY7]] ], [ [[PY_01082]], [[WHILE_COND5_PREHEADER]] ]
+; CHECK-T2-NEXT: [[PX_11075:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[WHILE_BODY7]] ], [ [[PSRCB_PSRCA]], [[WHILE_COND5_PREHEADER]] ]
+; CHECK-T2-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i16, ptr [[PX_11075]], i32 1
+; CHECK-T2-NEXT: [[TMP0:%.*]] = load i16, ptr [[PX_11075]], align 2
; CHECK-T2-NEXT: [[CONV:%.*]] = sext i16 [[TMP0]] to i32
-; CHECK-T2-NEXT: [[INCDEC_PTR8]] = getelementptr inbounds i16, i16* [[PY_11076]], i32 -1
-; CHECK-T2-NEXT: [[TMP1:%.*]] = load i16, i16* [[PY_11076]], align 2
+; CHECK-T2-NEXT: [[INCDEC_PTR8]] = getelementptr inbounds i16, ptr [[PY_11076]], i32 -1
+; CHECK-T2-NEXT: [[TMP1:%.*]] = load i16, ptr [[PY_11076]], align 2
; CHECK-T2-NEXT: [[CONV9:%.*]] = sext i16 [[TMP1]] to i32
; CHECK-T2-NEXT: [[MUL_I:%.*]] = mul nsw i32 [[CONV9]], [[CONV]]
; CHECK-T2-NEXT: [[SHR3_I:%.*]] = ashr i32 [[CONV]], 16
@@ -215,9 +215,9 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T2-NEXT: [[ADD6_I_LCSSA:%.*]] = phi i32 [ [[ADD6_I]], [[WHILE_BODY7]] ]
; CHECK-T2-NEXT: [[TMP2:%.*]] = lshr i32 [[ADD6_I_LCSSA]], 15
; CHECK-T2-NEXT: [[CONV10:%.*]] = trunc i32 [[TMP2]] to i16
-; CHECK-T2-NEXT: [[INCDEC_PTR11]] = getelementptr inbounds i16, i16* [[POUT_01081]], i32 1
-; CHECK-T2-NEXT: store i16 [[CONV10]], i16* [[POUT_01081]], align 2
-; CHECK-T2-NEXT: [[ADD_PTR]] = getelementptr inbounds i16, i16* [[PSRCA_PSRCB]], i32 [[COUNT_01084]]
+; CHECK-T2-NEXT: [[INCDEC_PTR11]] = getelementptr inbounds i16, ptr [[POUT_01081]], i32 1
+; CHECK-T2-NEXT: store i16 [[CONV10]], ptr [[POUT_01081]], align 2
+; CHECK-T2-NEXT: [[ADD_PTR]] = getelementptr inbounds i16, ptr [[PSRCA_PSRCB]], i32 [[COUNT_01084]]
; CHECK-T2-NEXT: [[INC]] = add nuw nsw i32 [[COUNT_01084]], 1
; CHECK-T2-NEXT: [[DEC12]] = add i32 [[BLOCKSIZE1_01083]], -1
; CHECK-T2-NEXT: [[CMP3:%.*]] = icmp ult i32 [[COUNT_01084]], 3
@@ -225,26 +225,26 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T2-NEXT: [[TMP3:%.*]] = and i1 [[CMP4]], [[CMP3]]
; CHECK-T2-NEXT: br i1 [[TMP3]], label [[WHILE_COND5_PREHEADER]], label [[WHILE_END13_LOOPEXIT:%.*]]
; CHECK-T2: while.end13.loopexit:
-; CHECK-T2-NEXT: [[INCDEC_PTR11_LCSSA:%.*]] = phi i16* [ [[INCDEC_PTR11]], [[WHILE_END]] ]
-; CHECK-T2-NEXT: [[ADD_PTR_LCSSA:%.*]] = phi i16* [ [[ADD_PTR]], [[WHILE_END]] ]
+; CHECK-T2-NEXT: [[INCDEC_PTR11_LCSSA:%.*]] = phi ptr [ [[INCDEC_PTR11]], [[WHILE_END]] ]
+; CHECK-T2-NEXT: [[ADD_PTR_LCSSA:%.*]] = phi ptr [ [[ADD_PTR]], [[WHILE_END]] ]
; CHECK-T2-NEXT: [[INC_LCSSA:%.*]] = phi i32 [ [[INC]], [[WHILE_END]] ]
; CHECK-T2-NEXT: [[DEC12_LCSSA:%.*]] = phi i32 [ [[DEC12]], [[WHILE_END]] ]
; CHECK-T2-NEXT: br label [[WHILE_END13]]
; CHECK-T2: while.end13:
-; CHECK-T2-NEXT: [[POUT_0_LCSSA:%.*]] = phi i16* [ [[PDST]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR11_LCSSA]], [[WHILE_END13_LOOPEXIT]] ]
-; CHECK-T2-NEXT: [[PY_0_LCSSA:%.*]] = phi i16* [ [[PSRCA_PSRCB]], [[ENTRY]] ], [ [[ADD_PTR_LCSSA]], [[WHILE_END13_LOOPEXIT]] ]
+; CHECK-T2-NEXT: [[POUT_0_LCSSA:%.*]] = phi ptr [ [[PDST]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR11_LCSSA]], [[WHILE_END13_LOOPEXIT]] ]
+; CHECK-T2-NEXT: [[PY_0_LCSSA:%.*]] = phi ptr [ [[PSRCA_PSRCB]], [[ENTRY]] ], [ [[ADD_PTR_LCSSA]], [[WHILE_END13_LOOPEXIT]] ]
; CHECK-T2-NEXT: [[BLOCKSIZE1_0_LCSSA:%.*]] = phi i32 [ [[SUB]], [[ENTRY]] ], [ [[DEC12_LCSSA]], [[WHILE_END13_LOOPEXIT]] ]
; CHECK-T2-NEXT: [[COUNT_0_LCSSA:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[INC_LCSSA]], [[WHILE_END13_LOOPEXIT]] ]
; CHECK-T2-NEXT: [[CMP161068:%.*]] = icmp eq i32 [[BLOCKSIZE1_0_LCSSA]], 0
; CHECK-T2-NEXT: br i1 [[CMP161068]], label [[EXIT:%.*]], label [[WHILE_BODY18_PREHEADER:%.*]]
; CHECK-T2: while.body18.preheader:
-; CHECK-T2-NEXT: [[ADD_PTR14:%.*]] = getelementptr inbounds i16, i16* [[PY_0_LCSSA]], i32 -1
+; CHECK-T2-NEXT: [[ADD_PTR14:%.*]] = getelementptr inbounds i16, ptr [[PY_0_LCSSA]], i32 -1
; CHECK-T2-NEXT: br label [[WHILE_BODY18:%.*]]
; CHECK-T2: while.body18:
; CHECK-T2-NEXT: [[COUNT_11072:%.*]] = phi i32 [ [[INC49:%.*]], [[WHILE_END43:%.*]] ], [ [[COUNT_0_LCSSA]], [[WHILE_BODY18_PREHEADER]] ]
; CHECK-T2-NEXT: [[BLOCKSIZE1_11071:%.*]] = phi i32 [ [[DEC50:%.*]], [[WHILE_END43]] ], [ [[BLOCKSIZE1_0_LCSSA]], [[WHILE_BODY18_PREHEADER]] ]
-; CHECK-T2-NEXT: [[PY_21070:%.*]] = phi i16* [ [[ADD_PTR48:%.*]], [[WHILE_END43]] ], [ [[ADD_PTR14]], [[WHILE_BODY18_PREHEADER]] ]
-; CHECK-T2-NEXT: [[POUT_11069:%.*]] = phi i16* [ [[INCDEC_PTR46:%.*]], [[WHILE_END43]] ], [ [[POUT_0_LCSSA]], [[WHILE_BODY18_PREHEADER]] ]
+; CHECK-T2-NEXT: [[PY_21070:%.*]] = phi ptr [ [[ADD_PTR48:%.*]], [[WHILE_END43]] ], [ [[ADD_PTR14]], [[WHILE_BODY18_PREHEADER]] ]
+; CHECK-T2-NEXT: [[POUT_11069:%.*]] = phi ptr [ [[INCDEC_PTR46:%.*]], [[WHILE_END43]] ], [ [[POUT_0_LCSSA]], [[WHILE_BODY18_PREHEADER]] ]
; CHECK-T2-NEXT: [[SHR19:%.*]] = lshr i32 [[COUNT_11072]], 2
; CHECK-T2-NEXT: [[CMP211054:%.*]] = icmp eq i32 [[SHR19]], 0
; CHECK-T2-NEXT: br i1 [[CMP211054]], label [[WHILE_END31:%.*]], label [[WHILE_BODY23_PREHEADER:%.*]]
@@ -253,16 +253,16 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T2: while.body23:
; CHECK-T2-NEXT: [[K_11058:%.*]] = phi i32 [ [[DEC30:%.*]], [[WHILE_BODY23]] ], [ [[SHR19]], [[WHILE_BODY23_PREHEADER]] ]
; CHECK-T2-NEXT: [[SUM_11057:%.*]] = phi i32 [ [[ADD6_I878:%.*]], [[WHILE_BODY23]] ], [ 0, [[WHILE_BODY23_PREHEADER]] ]
-; CHECK-T2-NEXT: [[PY_31056:%.*]] = phi i16* [ [[ADD_PTR_I884:%.*]], [[WHILE_BODY23]] ], [ [[PY_21070]], [[WHILE_BODY23_PREHEADER]] ]
-; CHECK-T2-NEXT: [[PX_31055:%.*]] = phi i16* [ [[ADD_PTR_I890:%.*]], [[WHILE_BODY23]] ], [ [[PSRCB_PSRCA]], [[WHILE_BODY23_PREHEADER]] ]
-; CHECK-T2-NEXT: [[ARRAYIDX_I907:%.*]] = getelementptr inbounds i16, i16* [[PX_31055]], i32 1
-; CHECK-T2-NEXT: [[TMP4:%.*]] = load i16, i16* [[ARRAYIDX_I907]], align 2
-; CHECK-T2-NEXT: [[TMP5:%.*]] = load i16, i16* [[PX_31055]], align 2
-; CHECK-T2-NEXT: [[ADD_PTR_I912:%.*]] = getelementptr inbounds i16, i16* [[PX_31055]], i32 2
-; CHECK-T2-NEXT: [[ARRAYIDX_I901:%.*]] = getelementptr inbounds i16, i16* [[PY_31056]], i32 1
-; CHECK-T2-NEXT: [[TMP6:%.*]] = load i16, i16* [[ARRAYIDX_I901]], align 2
-; CHECK-T2-NEXT: [[TMP7:%.*]] = load i16, i16* [[PY_31056]], align 2
-; CHECK-T2-NEXT: [[ADD_PTR_I906:%.*]] = getelementptr inbounds i16, i16* [[PY_31056]], i32 -2
+; CHECK-T2-NEXT: [[PY_31056:%.*]] = phi ptr [ [[ADD_PTR_I884:%.*]], [[WHILE_BODY23]] ], [ [[PY_21070]], [[WHILE_BODY23_PREHEADER]] ]
+; CHECK-T2-NEXT: [[PX_31055:%.*]] = phi ptr [ [[ADD_PTR_I890:%.*]], [[WHILE_BODY23]] ], [ [[PSRCB_PSRCA]], [[WHILE_BODY23_PREHEADER]] ]
+; CHECK-T2-NEXT: [[ARRAYIDX_I907:%.*]] = getelementptr inbounds i16, ptr [[PX_31055]], i32 1
+; CHECK-T2-NEXT: [[TMP4:%.*]] = load i16, ptr [[ARRAYIDX_I907]], align 2
+; CHECK-T2-NEXT: [[TMP5:%.*]] = load i16, ptr [[PX_31055]], align 2
+; CHECK-T2-NEXT: [[ADD_PTR_I912:%.*]] = getelementptr inbounds i16, ptr [[PX_31055]], i32 2
+; CHECK-T2-NEXT: [[ARRAYIDX_I901:%.*]] = getelementptr inbounds i16, ptr [[PY_31056]], i32 1
+; CHECK-T2-NEXT: [[TMP6:%.*]] = load i16, ptr [[ARRAYIDX_I901]], align 2
+; CHECK-T2-NEXT: [[TMP7:%.*]] = load i16, ptr [[PY_31056]], align 2
+; CHECK-T2-NEXT: [[ADD_PTR_I906:%.*]] = getelementptr inbounds i16, ptr [[PY_31056]], i32 -2
; CHECK-T2-NEXT: [[SHR_I892:%.*]] = sext i16 [[TMP5]] to i32
; CHECK-T2-NEXT: [[SHR1_I893:%.*]] = sext i16 [[TMP6]] to i32
; CHECK-T2-NEXT: [[MUL_I894:%.*]] = mul nsw i32 [[SHR1_I893]], [[SHR_I892]]
@@ -271,14 +271,14 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T2-NEXT: [[MUL5_I898:%.*]] = mul nsw i32 [[SHR4_I897]], [[SHR2_I895]]
; CHECK-T2-NEXT: [[ADD_I899:%.*]] = add i32 [[MUL_I894]], [[SUM_11057]]
; CHECK-T2-NEXT: [[ADD6_I900:%.*]] = add i32 [[ADD_I899]], [[MUL5_I898]]
-; CHECK-T2-NEXT: [[ARRAYIDX_I885:%.*]] = getelementptr inbounds i16, i16* [[PX_31055]], i32 3
-; CHECK-T2-NEXT: [[TMP8:%.*]] = load i16, i16* [[ARRAYIDX_I885]], align 2
-; CHECK-T2-NEXT: [[TMP9:%.*]] = load i16, i16* [[ADD_PTR_I912]], align 2
-; CHECK-T2-NEXT: [[ADD_PTR_I890]] = getelementptr inbounds i16, i16* [[PX_31055]], i32 4
-; CHECK-T2-NEXT: [[ARRAYIDX_I879:%.*]] = getelementptr inbounds i16, i16* [[PY_31056]], i32 -1
-; CHECK-T2-NEXT: [[TMP10:%.*]] = load i16, i16* [[ARRAYIDX_I879]], align 2
-; CHECK-T2-NEXT: [[TMP11:%.*]] = load i16, i16* [[ADD_PTR_I906]], align 2
-; CHECK-T2-NEXT: [[ADD_PTR_I884]] = getelementptr inbounds i16, i16* [[PY_31056]], i32 -4
+; CHECK-T2-NEXT: [[ARRAYIDX_I885:%.*]] = getelementptr inbounds i16, ptr [[PX_31055]], i32 3
+; CHECK-T2-NEXT: [[TMP8:%.*]] = load i16, ptr [[ARRAYIDX_I885]], align 2
+; CHECK-T2-NEXT: [[TMP9:%.*]] = load i16, ptr [[ADD_PTR_I912]], align 2
+; CHECK-T2-NEXT: [[ADD_PTR_I890]] = getelementptr inbounds i16, ptr [[PX_31055]], i32 4
+; CHECK-T2-NEXT: [[ARRAYIDX_I879:%.*]] = getelementptr inbounds i16, ptr [[PY_31056]], i32 -1
+; CHECK-T2-NEXT: [[TMP10:%.*]] = load i16, ptr [[ARRAYIDX_I879]], align 2
+; CHECK-T2-NEXT: [[TMP11:%.*]] = load i16, ptr [[ADD_PTR_I906]], align 2
+; CHECK-T2-NEXT: [[ADD_PTR_I884]] = getelementptr inbounds i16, ptr [[PY_31056]], i32 -4
; CHECK-T2-NEXT: [[SHR_I870:%.*]] = sext i16 [[TMP9]] to i32
; CHECK-T2-NEXT: [[SHR1_I871:%.*]] = sext i16 [[TMP10]] to i32
; CHECK-T2-NEXT: [[MUL_I872:%.*]] = mul nsw i32 [[SHR1_I871]], [[SHR_I870]]
@@ -291,30 +291,30 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T2-NEXT: [[CMP21:%.*]] = icmp eq i32 [[DEC30]], 0
; CHECK-T2-NEXT: br i1 [[CMP21]], label [[WHILE_END31_LOOPEXIT:%.*]], label [[WHILE_BODY23]]
; CHECK-T2: while.end31.loopexit:
-; CHECK-T2-NEXT: [[ADD_PTR_I890_LCSSA:%.*]] = phi i16* [ [[ADD_PTR_I890]], [[WHILE_BODY23]] ]
-; CHECK-T2-NEXT: [[ADD_PTR_I884_LCSSA:%.*]] = phi i16* [ [[ADD_PTR_I884]], [[WHILE_BODY23]] ]
+; CHECK-T2-NEXT: [[ADD_PTR_I890_LCSSA:%.*]] = phi ptr [ [[ADD_PTR_I890]], [[WHILE_BODY23]] ]
+; CHECK-T2-NEXT: [[ADD_PTR_I884_LCSSA:%.*]] = phi ptr [ [[ADD_PTR_I884]], [[WHILE_BODY23]] ]
; CHECK-T2-NEXT: [[ADD6_I878_LCSSA:%.*]] = phi i32 [ [[ADD6_I878]], [[WHILE_BODY23]] ]
; CHECK-T2-NEXT: br label [[WHILE_END31]]
; CHECK-T2: while.end31:
-; CHECK-T2-NEXT: [[PX_3_LCSSA:%.*]] = phi i16* [ [[PSRCB_PSRCA]], [[WHILE_BODY18]] ], [ [[ADD_PTR_I890_LCSSA]], [[WHILE_END31_LOOPEXIT]] ]
-; CHECK-T2-NEXT: [[PY_3_LCSSA:%.*]] = phi i16* [ [[PY_21070]], [[WHILE_BODY18]] ], [ [[ADD_PTR_I884_LCSSA]], [[WHILE_END31_LOOPEXIT]] ]
+; CHECK-T2-NEXT: [[PX_3_LCSSA:%.*]] = phi ptr [ [[PSRCB_PSRCA]], [[WHILE_BODY18]] ], [ [[ADD_PTR_I890_LCSSA]], [[WHILE_END31_LOOPEXIT]] ]
+; CHECK-T2-NEXT: [[PY_3_LCSSA:%.*]] = phi ptr [ [[PY_21070]], [[WHILE_BODY18]] ], [ [[ADD_PTR_I884_LCSSA]], [[WHILE_END31_LOOPEXIT]] ]
; CHECK-T2-NEXT: [[SUM_1_LCSSA:%.*]] = phi i32 [ 0, [[WHILE_BODY18]] ], [ [[ADD6_I878_LCSSA]], [[WHILE_END31_LOOPEXIT]] ]
; CHECK-T2-NEXT: [[REM:%.*]] = and i32 [[COUNT_11072]], 3
; CHECK-T2-NEXT: [[CMP341062:%.*]] = icmp eq i32 [[REM]], 0
; CHECK-T2-NEXT: br i1 [[CMP341062]], label [[WHILE_END43]], label [[WHILE_BODY36_PREHEADER:%.*]]
; CHECK-T2: while.body36.preheader:
-; CHECK-T2-NEXT: [[ADD_PTR32:%.*]] = getelementptr inbounds i16, i16* [[PY_3_LCSSA]], i32 1
+; CHECK-T2-NEXT: [[ADD_PTR32:%.*]] = getelementptr inbounds i16, ptr [[PY_3_LCSSA]], i32 1
; CHECK-T2-NEXT: br label [[WHILE_BODY36:%.*]]
; CHECK-T2: while.body36:
; CHECK-T2-NEXT: [[K_21066:%.*]] = phi i32 [ [[DEC42:%.*]], [[WHILE_BODY36]] ], [ [[REM]], [[WHILE_BODY36_PREHEADER]] ]
; CHECK-T2-NEXT: [[SUM_21065:%.*]] = phi i32 [ [[ADD6_I868:%.*]], [[WHILE_BODY36]] ], [ [[SUM_1_LCSSA]], [[WHILE_BODY36_PREHEADER]] ]
-; CHECK-T2-NEXT: [[PY_41064:%.*]] = phi i16* [ [[INCDEC_PTR39:%.*]], [[WHILE_BODY36]] ], [ [[ADD_PTR32]], [[WHILE_BODY36_PREHEADER]] ]
-; CHECK-T2-NEXT: [[PX_41063:%.*]] = phi i16* [ [[INCDEC_PTR37:%.*]], [[WHILE_BODY36]] ], [ [[PX_3_LCSSA]], [[WHILE_BODY36_PREHEADER]] ]
-; CHECK-T2-NEXT: [[INCDEC_PTR37]] = getelementptr inbounds i16, i16* [[PX_41063]], i32 1
-; CHECK-T2-NEXT: [[TMP12:%.*]] = load i16, i16* [[PX_41063]], align 2
+; CHECK-T2-NEXT: [[PY_41064:%.*]] = phi ptr [ [[INCDEC_PTR39:%.*]], [[WHILE_BODY36]] ], [ [[ADD_PTR32]], [[WHILE_BODY36_PREHEADER]] ]
+; CHECK-T2-NEXT: [[PX_41063:%.*]] = phi ptr [ [[INCDEC_PTR37:%.*]], [[WHILE_BODY36]] ], [ [[PX_3_LCSSA]], [[WHILE_BODY36_PREHEADER]] ]
+; CHECK-T2-NEXT: [[INCDEC_PTR37]] = getelementptr inbounds i16, ptr [[PX_41063]], i32 1
+; CHECK-T2-NEXT: [[TMP12:%.*]] = load i16, ptr [[PX_41063]], align 2
; CHECK-T2-NEXT: [[CONV38:%.*]] = sext i16 [[TMP12]] to i32
-; CHECK-T2-NEXT: [[INCDEC_PTR39]] = getelementptr inbounds i16, i16* [[PY_41064]], i32 -1
-; CHECK-T2-NEXT: [[TMP13:%.*]] = load i16, i16* [[PY_41064]], align 2
+; CHECK-T2-NEXT: [[INCDEC_PTR39]] = getelementptr inbounds i16, ptr [[PY_41064]], i32 -1
+; CHECK-T2-NEXT: [[TMP13:%.*]] = load i16, ptr [[PY_41064]], align 2
; CHECK-T2-NEXT: [[CONV40:%.*]] = sext i16 [[TMP13]] to i32
; CHECK-T2-NEXT: [[MUL_I863:%.*]] = mul nsw i32 [[CONV40]], [[CONV38]]
; CHECK-T2-NEXT: [[SHR3_I864:%.*]] = ashr i32 [[CONV38]], 16
@@ -332,10 +332,10 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
; CHECK-T2-NEXT: [[SUM_2_LCSSA:%.*]] = phi i32 [ [[SUM_1_LCSSA]], [[WHILE_END31]] ], [ [[ADD6_I868_LCSSA]], [[WHILE_END43_LOOPEXIT]] ]
; CHECK-T2-NEXT: [[TMP14:%.*]] = lshr i32 [[SUM_2_LCSSA]], 15
; CHECK-T2-NEXT: [[CONV45:%.*]] = trunc i32 [[TMP14]] to i16
-; CHECK-T2-NEXT: [[INCDEC_PTR46]] = getelementptr inbounds i16, i16* [[POUT_11069]], i32 1
-; CHECK-T2-NEXT: store i16 [[CONV45]], i16* [[POUT_11069]], align 2
+; CHECK-T2-NEXT: [[INCDEC_PTR46]] = getelementptr inbounds i16, ptr [[POUT_11069]], i32 1
+; CHECK-T2-NEXT: store i16 [[CONV45]], ptr [[POUT_11069]], align 2
; CHECK-T2-NEXT: [[SUB47:%.*]] = add i32 [[COUNT_11072]], -1
-; CHECK-T2-NEXT: [[ADD_PTR48]] = getelementptr inbounds i16, i16* [[PSRCA_PSRCB]], i32 [[SUB47]]
+; CHECK-T2-NEXT: [[ADD_PTR48]] = getelementptr inbounds i16, ptr [[PSRCA_PSRCB]], i32 [[SUB47]]
; CHECK-T2-NEXT: [[INC49]] = add i32 [[COUNT_11072]], 1
; CHECK-T2-NEXT: [[DEC50]] = add i32 [[BLOCKSIZE1_11071]], -1
; CHECK-T2-NEXT: [[CMP16:%.*]] = icmp eq i32 [[DEC50]], 0
@@ -348,8 +348,8 @@ define dso_local arm_aapcscc void @arm_conv_fast_q15(i16* %pSrcA, i32 %srcALen,
entry:
%cmp = icmp ult i32 %srcALen, %srcBLen
%srcALen.srcBLen = select i1 %cmp, i32 %srcALen, i32 %srcBLen
- %pSrcB.pSrcA = select i1 %cmp, i16* %pSrcB, i16* %pSrcA
- %pSrcA.pSrcB = select i1 %cmp, i16* %pSrcA, i16* %pSrcB
+ %pSrcB.pSrcA = select i1 %cmp, ptr %pSrcB, ptr %pSrcA
+ %pSrcA.pSrcB = select i1 %cmp, ptr %pSrcA, ptr %pSrcB
%sub = add i32 %srcALen.srcBLen, -1
%cmp41080 = icmp eq i32 %sub, 0
br i1 %cmp41080, label %while.end13, label %while.cond5.preheader
@@ -357,20 +357,20 @@ entry:
while.cond5.preheader: ; preds = %while.end, %entry
%count.01084 = phi i32 [ %inc, %while.end ], [ 1, %entry ]
%blockSize1.01083 = phi i32 [ %dec12, %while.end ], [ %sub, %entry ]
- %py.01082 = phi i16* [ %add.ptr, %while.end ], [ %pSrcA.pSrcB, %entry ]
- %pOut.01081 = phi i16* [ %incdec.ptr11, %while.end ], [ %pDst, %entry ]
+ %py.01082 = phi ptr [ %add.ptr, %while.end ], [ %pSrcA.pSrcB, %entry ]
+ %pOut.01081 = phi ptr [ %incdec.ptr11, %while.end ], [ %pDst, %entry ]
br label %while.body7
while.body7: ; preds = %while.body7, %while.cond5.preheader
%k.01078 = phi i32 [ %dec, %while.body7 ], [ %count.01084, %while.cond5.preheader ]
%sum.01077 = phi i32 [ %add6.i, %while.body7 ], [ 0, %while.cond5.preheader ]
- %py.11076 = phi i16* [ %incdec.ptr8, %while.body7 ], [ %py.01082, %while.cond5.preheader ]
- %px.11075 = phi i16* [ %incdec.ptr, %while.body7 ], [ %pSrcB.pSrcA, %while.cond5.preheader ]
- %incdec.ptr = getelementptr inbounds i16, i16* %px.11075, i32 1
- %0 = load i16, i16* %px.11075, align 2
+ %py.11076 = phi ptr [ %incdec.ptr8, %while.body7 ], [ %py.01082, %while.cond5.preheader ]
+ %px.11075 = phi ptr [ %incdec.ptr, %while.body7 ], [ %pSrcB.pSrcA, %while.cond5.preheader ]
+ %incdec.ptr = getelementptr inbounds i16, ptr %px.11075, i32 1
+ %0 = load i16, ptr %px.11075, align 2
%conv = sext i16 %0 to i32
- %incdec.ptr8 = getelementptr inbounds i16, i16* %py.11076, i32 -1
- %1 = load i16, i16* %py.11076, align 2
+ %incdec.ptr8 = getelementptr inbounds i16, ptr %py.11076, i32 -1
+ %1 = load i16, ptr %py.11076, align 2
%conv9 = sext i16 %1 to i32
%mul.i = mul nsw i32 %conv9, %conv
%shr3.i = ashr i32 %conv, 16
@@ -385,9 +385,9 @@ while.body7: ; preds = %while.body7, %while
while.end: ; preds = %while.body7
%2 = lshr i32 %add6.i, 15
%conv10 = trunc i32 %2 to i16
- %incdec.ptr11 = getelementptr inbounds i16, i16* %pOut.01081, i32 1
- store i16 %conv10, i16* %pOut.01081, align 2
- %add.ptr = getelementptr inbounds i16, i16* %pSrcA.pSrcB, i32 %count.01084
+ %incdec.ptr11 = getelementptr inbounds i16, ptr %pOut.01081, i32 1
+ store i16 %conv10, ptr %pOut.01081, align 2
+ %add.ptr = getelementptr inbounds i16, ptr %pSrcA.pSrcB, i32 %count.01084
%inc = add nuw nsw i32 %count.01084, 1
%dec12 = add i32 %blockSize1.01083, -1
%cmp3 = icmp ult i32 %count.01084, 3
@@ -396,22 +396,22 @@ while.end: ; preds = %while.body7
br i1 %3, label %while.cond5.preheader, label %while.end13
while.end13: ; preds = %while.end, %entry
- %pOut.0.lcssa = phi i16* [ %pDst, %entry ], [ %incdec.ptr11, %while.end ]
- %py.0.lcssa = phi i16* [ %pSrcA.pSrcB, %entry ], [ %add.ptr, %while.end ]
+ %pOut.0.lcssa = phi ptr [ %pDst, %entry ], [ %incdec.ptr11, %while.end ]
+ %py.0.lcssa = phi ptr [ %pSrcA.pSrcB, %entry ], [ %add.ptr, %while.end ]
%blockSize1.0.lcssa = phi i32 [ %sub, %entry ], [ %dec12, %while.end ]
%count.0.lcssa = phi i32 [ 1, %entry ], [ %inc, %while.end ]
%cmp161068 = icmp eq i32 %blockSize1.0.lcssa, 0
br i1 %cmp161068, label %exit, label %while.body18.preheader
while.body18.preheader: ; preds = %while.end13
- %add.ptr14 = getelementptr inbounds i16, i16* %py.0.lcssa, i32 -1
+ %add.ptr14 = getelementptr inbounds i16, ptr %py.0.lcssa, i32 -1
br label %while.body18
while.body18: ; preds = %while.end43, %while.body18.preheader
%count.11072 = phi i32 [ %inc49, %while.end43 ], [ %count.0.lcssa, %while.body18.preheader ]
%blockSize1.11071 = phi i32 [ %dec50, %while.end43 ], [ %blockSize1.0.lcssa, %while.body18.preheader ]
- %py.21070 = phi i16* [ %add.ptr48, %while.end43 ], [ %add.ptr14, %while.body18.preheader ]
- %pOut.11069 = phi i16* [ %incdec.ptr46, %while.end43 ], [ %pOut.0.lcssa, %while.body18.preheader ]
+ %py.21070 = phi ptr [ %add.ptr48, %while.end43 ], [ %add.ptr14, %while.body18.preheader ]
+ %pOut.11069 = phi ptr [ %incdec.ptr46, %while.end43 ], [ %pOut.0.lcssa, %while.body18.preheader ]
%shr19 = lshr i32 %count.11072, 2
%cmp211054 = icmp eq i32 %shr19, 0
br i1 %cmp211054, label %while.end31, label %while.body23
@@ -419,16 +419,16 @@ while.body18: ; preds = %while.end43, %while
while.body23: ; preds = %while.body23, %while.body18
%k.11058 = phi i32 [ %dec30, %while.body23 ], [ %shr19, %while.body18 ]
%sum.11057 = phi i32 [ %add6.i878, %while.body23 ], [ 0, %while.body18 ]
- %py.31056 = phi i16* [ %add.ptr.i884, %while.body23 ], [ %py.21070, %while.body18 ]
- %px.31055 = phi i16* [ %add.ptr.i890, %while.body23 ], [ %pSrcB.pSrcA, %while.body18 ]
- %arrayidx.i907 = getelementptr inbounds i16, i16* %px.31055, i32 1
- %4 = load i16, i16* %arrayidx.i907, align 2
- %5 = load i16, i16* %px.31055, align 2
- %add.ptr.i912 = getelementptr inbounds i16, i16* %px.31055, i32 2
- %arrayidx.i901 = getelementptr inbounds i16, i16* %py.31056, i32 1
- %6 = load i16, i16* %arrayidx.i901, align 2
- %7 = load i16, i16* %py.31056, align 2
- %add.ptr.i906 = getelementptr inbounds i16, i16* %py.31056, i32 -2
+ %py.31056 = phi ptr [ %add.ptr.i884, %while.body23 ], [ %py.21070, %while.body18 ]
+ %px.31055 = phi ptr [ %add.ptr.i890, %while.body23 ], [ %pSrcB.pSrcA, %while.body18 ]
+ %arrayidx.i907 = getelementptr inbounds i16, ptr %px.31055, i32 1
+ %4 = load i16, ptr %arrayidx.i907, align 2
+ %5 = load i16, ptr %px.31055, align 2
+ %add.ptr.i912 = getelementptr inbounds i16, ptr %px.31055, i32 2
+ %arrayidx.i901 = getelementptr inbounds i16, ptr %py.31056, i32 1
+ %6 = load i16, ptr %arrayidx.i901, align 2
+ %7 = load i16, ptr %py.31056, align 2
+ %add.ptr.i906 = getelementptr inbounds i16, ptr %py.31056, i32 -2
%shr.i892 = sext i16 %5 to i32
%shr1.i893 = sext i16 %6 to i32
%mul.i894 = mul nsw i32 %shr1.i893, %shr.i892
@@ -437,14 +437,14 @@ while.body23: ; preds = %while.body23, %whil
%mul5.i898 = mul nsw i32 %shr4.i897, %shr2.i895
%add.i899 = add i32 %mul.i894, %sum.11057
%add6.i900 = add i32 %add.i899, %mul5.i898
- %arrayidx.i885 = getelementptr inbounds i16, i16* %px.31055, i32 3
- %8 = load i16, i16* %arrayidx.i885, align 2
- %9 = load i16, i16* %add.ptr.i912, align 2
- %add.ptr.i890 = getelementptr inbounds i16, i16* %px.31055, i32 4
- %arrayidx.i879 = getelementptr inbounds i16, i16* %py.31056, i32 -1
- %10 = load i16, i16* %arrayidx.i879, align 2
- %11 = load i16, i16* %add.ptr.i906, align 2
- %add.ptr.i884 = getelementptr inbounds i16, i16* %py.31056, i32 -4
+ %arrayidx.i885 = getelementptr inbounds i16, ptr %px.31055, i32 3
+ %8 = load i16, ptr %arrayidx.i885, align 2
+ %9 = load i16, ptr %add.ptr.i912, align 2
+ %add.ptr.i890 = getelementptr inbounds i16, ptr %px.31055, i32 4
+ %arrayidx.i879 = getelementptr inbounds i16, ptr %py.31056, i32 -1
+ %10 = load i16, ptr %arrayidx.i879, align 2
+ %11 = load i16, ptr %add.ptr.i906, align 2
+ %add.ptr.i884 = getelementptr inbounds i16, ptr %py.31056, i32 -4
%shr.i870 = sext i16 %9 to i32
%shr1.i871 = sext i16 %10 to i32
%mul.i872 = mul nsw i32 %shr1.i871, %shr.i870
@@ -458,27 +458,27 @@ while.body23: ; preds = %while.body23, %whil
br i1 %cmp21, label %while.end31, label %while.body23
while.end31: ; preds = %while.body23, %while.body18
- %px.3.lcssa = phi i16* [ %pSrcB.pSrcA, %while.body18 ], [ %add.ptr.i890, %while.body23 ]
- %py.3.lcssa = phi i16* [ %py.21070, %while.body18 ], [ %add.ptr.i884, %while.body23 ]
+ %px.3.lcssa = phi ptr [ %pSrcB.pSrcA, %while.body18 ], [ %add.ptr.i890, %while.body23 ]
+ %py.3.lcssa = phi ptr [ %py.21070, %while.body18 ], [ %add.ptr.i884, %while.body23 ]
%sum.1.lcssa = phi i32 [ 0, %while.body18 ], [ %add6.i878, %while.body23 ]
%rem = and i32 %count.11072, 3
%cmp341062 = icmp eq i32 %rem, 0
br i1 %cmp341062, label %while.end43, label %while.body36.preheader
while.body36.preheader: ; preds = %while.end31
- %add.ptr32 = getelementptr inbounds i16, i16* %py.3.lcssa, i32 1
+ %add.ptr32 = getelementptr inbounds i16, ptr %py.3.lcssa, i32 1
br label %while.body36
while.body36: ; preds = %while.body36, %while.body36.preheader
%k.21066 = phi i32 [ %dec42, %while.body36 ], [ %rem, %while.body36.preheader ]
%sum.21065 = phi i32 [ %add6.i868, %while.body36 ], [ %sum.1.lcssa, %while.body36.preheader ]
- %py.41064 = phi i16* [ %incdec.ptr39, %while.body36 ], [ %add.ptr32, %while.body36.preheader ]
- %px.41063 = phi i16* [ %incdec.ptr37, %while.body36 ], [ %px.3.lcssa, %while.body36.preheader ]
- %incdec.ptr37 = getelementptr inbounds i16, i16* %px.41063, i32 1
- %12 = load i16, i16* %px.41063, align 2
+ %py.41064 = phi ptr [ %incdec.ptr39, %while.body36 ], [ %add.ptr32, %while.body36.preheader ]
+ %px.41063 = phi ptr [ %incdec.ptr37, %while.body36 ], [ %px.3.lcssa, %while.body36.preheader ]
+ %incdec.ptr37 = getelementptr inbounds i16, ptr %px.41063, i32 1
+ %12 = load i16, ptr %px.41063, align 2
%conv38 = sext i16 %12 to i32
- %incdec.ptr39 = getelementptr inbounds i16, i16* %py.41064, i32 -1
- %13 = load i16, i16* %py.41064, align 2
+ %incdec.ptr39 = getelementptr inbounds i16, ptr %py.41064, i32 -1
+ %13 = load i16, ptr %py.41064, align 2
%conv40 = sext i16 %13 to i32
%mul.i863 = mul nsw i32 %conv40, %conv38
%shr3.i864 = ashr i32 %conv38, 16
@@ -494,10 +494,10 @@ while.end43: ; preds = %while.body36, %whil
%sum.2.lcssa = phi i32 [ %sum.1.lcssa, %while.end31 ], [ %add6.i868, %while.body36 ]
%14 = lshr i32 %sum.2.lcssa, 15
%conv45 = trunc i32 %14 to i16
- %incdec.ptr46 = getelementptr inbounds i16, i16* %pOut.11069, i32 1
- store i16 %conv45, i16* %pOut.11069, align 2
+ %incdec.ptr46 = getelementptr inbounds i16, ptr %pOut.11069, i32 1
+ store i16 %conv45, ptr %pOut.11069, align 2
%sub47 = add i32 %count.11072, -1
- %add.ptr48 = getelementptr inbounds i16, i16* %pSrcA.pSrcB, i32 %sub47
+ %add.ptr48 = getelementptr inbounds i16, ptr %pSrcA.pSrcB, i32 %sub47
%inc49 = add i32 %count.11072, 1
%dec50 = add i32 %blockSize1.11071, -1
%cmp16 = icmp eq i32 %dec50, 0
diff --git a/llvm/test/Transforms/IndVarSimplify/ARM/indvar-unroll-imm-cost.ll b/llvm/test/Transforms/IndVarSimplify/ARM/indvar-unroll-imm-cost.ll
index 15bcb006303ed..f907f23e0b520 100644
--- a/llvm/test/Transforms/IndVarSimplify/ARM/indvar-unroll-imm-cost.ll
+++ b/llvm/test/Transforms/IndVarSimplify/ARM/indvar-unroll-imm-cost.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes='loop(indvars),loop-unroll' -mtriple=thumbv8m.main %s -S -o - | FileCheck %s
-define dso_local arm_aapcscc void @test(i32* nocapture %pDest, i16* nocapture readonly %pSrcA, i16* nocapture readonly %pSrcB, i32 %blkCnt) local_unnamed_addr #0 {
+define dso_local arm_aapcscc void @test(ptr nocapture %pDest, ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, i32 %blkCnt) local_unnamed_addr #0 {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP88:%.*]] = icmp eq i32 [[BLKCNT:%.*]], 0
@@ -14,9 +14,9 @@ define dso_local arm_aapcscc void @test(i32* nocapture %pDest, i16* nocapture re
; CHECK-NEXT: ret void
; CHECK: for.body:
; CHECK-NEXT: [[I_092:%.*]] = phi i32 [ [[INC42:%.*]], [[FOR_END40:%.*]] ], [ 0, [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[PDEST_ADDR_091:%.*]] = phi i32* [ [[PDEST_ADDR_2_LCSSA:%.*]], [[FOR_END40]] ], [ [[PDEST:%.*]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[PSRCA_ADDR_090:%.*]] = phi i16* [ [[PSRCA_ADDR_2_LCSSA:%.*]], [[FOR_END40]] ], [ [[PSRCA:%.*]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[PSRCB_ADDR_089:%.*]] = phi i16* [ [[PSRCB_ADDR_2_LCSSA:%.*]], [[FOR_END40]] ], [ [[PSRCB:%.*]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[PDEST_ADDR_091:%.*]] = phi ptr [ [[PDEST_ADDR_2_LCSSA:%.*]], [[FOR_END40]] ], [ [[PDEST:%.*]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[PSRCA_ADDR_090:%.*]] = phi ptr [ [[PSRCA_ADDR_2_LCSSA:%.*]], [[FOR_END40]] ], [ [[PSRCA:%.*]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[PSRCB_ADDR_089:%.*]] = phi ptr [ [[PSRCB_ADDR_2_LCSSA:%.*]], [[FOR_END40]] ], [ [[PSRCB:%.*]], [[FOR_BODY_PREHEADER]] ]
; CHECK-NEXT: [[TMP0:%.*]] = lshr i32 [[I_092]], 2
; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw i32 [[TMP0]], 3
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 2147483644
@@ -26,51 +26,51 @@ define dso_local arm_aapcscc void @test(i32* nocapture %pDest, i16* nocapture re
; CHECK-NEXT: br label [[FOR_BODY3:%.*]]
; CHECK: for.body3:
; CHECK-NEXT: [[J_076:%.*]] = phi i32 [ [[ADD24:%.*]], [[FOR_BODY3]] ], [ 0, [[FOR_BODY3_PREHEADER]] ]
-; CHECK-NEXT: [[PDEST_ADDR_175:%.*]] = phi i32* [ [[INCDEC_PTR:%.*]], [[FOR_BODY3]] ], [ [[PDEST_ADDR_091]], [[FOR_BODY3_PREHEADER]] ]
-; CHECK-NEXT: [[PSRCA_ADDR_174:%.*]] = phi i16* [ [[ADD_PTR:%.*]], [[FOR_BODY3]] ], [ [[PSRCA_ADDR_090]], [[FOR_BODY3_PREHEADER]] ]
-; CHECK-NEXT: [[PSRCB_ADDR_173:%.*]] = phi i16* [ [[ADD_PTR23:%.*]], [[FOR_BODY3]] ], [ [[PSRCB_ADDR_089]], [[FOR_BODY3_PREHEADER]] ]
-; CHECK-NEXT: [[TMP3:%.*]] = load i16, i16* [[PSRCA_ADDR_174]], align 2
+; CHECK-NEXT: [[PDEST_ADDR_175:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[FOR_BODY3]] ], [ [[PDEST_ADDR_091]], [[FOR_BODY3_PREHEADER]] ]
+; CHECK-NEXT: [[PSRCA_ADDR_174:%.*]] = phi ptr [ [[ADD_PTR:%.*]], [[FOR_BODY3]] ], [ [[PSRCA_ADDR_090]], [[FOR_BODY3_PREHEADER]] ]
+; CHECK-NEXT: [[PSRCB_ADDR_173:%.*]] = phi ptr [ [[ADD_PTR23:%.*]], [[FOR_BODY3]] ], [ [[PSRCB_ADDR_089]], [[FOR_BODY3_PREHEADER]] ]
+; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[PSRCA_ADDR_174]], align 2
; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP3]] to i32
-; CHECK-NEXT: [[TMP4:%.*]] = load i16, i16* [[PSRCB_ADDR_173]], align 2
+; CHECK-NEXT: [[TMP4:%.*]] = load i16, ptr [[PSRCB_ADDR_173]], align 2
; CHECK-NEXT: [[CONV5:%.*]] = sext i16 [[TMP4]] to i32
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[CONV5]], [[CONV]]
-; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, i16* [[PSRCA_ADDR_174]], i32 1
-; CHECK-NEXT: [[TMP5:%.*]] = load i16, i16* [[ARRAYIDX6]], align 2
+; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds i16, ptr [[PSRCA_ADDR_174]], i32 1
+; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[ARRAYIDX6]], align 2
; CHECK-NEXT: [[CONV7:%.*]] = sext i16 [[TMP5]] to i32
-; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, i16* [[PSRCB_ADDR_173]], i32 1
-; CHECK-NEXT: [[TMP6:%.*]] = load i16, i16* [[ARRAYIDX8]], align 2
+; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i16, ptr [[PSRCB_ADDR_173]], i32 1
+; CHECK-NEXT: [[TMP6:%.*]] = load i16, ptr [[ARRAYIDX8]], align 2
; CHECK-NEXT: [[CONV9:%.*]] = sext i16 [[TMP6]] to i32
; CHECK-NEXT: [[MUL10:%.*]] = mul nsw i32 [[CONV9]], [[CONV7]]
-; CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i16, i16* [[PSRCA_ADDR_174]], i32 2
-; CHECK-NEXT: [[TMP7:%.*]] = load i16, i16* [[ARRAYIDX11]], align 2
+; CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i16, ptr [[PSRCA_ADDR_174]], i32 2
+; CHECK-NEXT: [[TMP7:%.*]] = load i16, ptr [[ARRAYIDX11]], align 2
; CHECK-NEXT: [[CONV12:%.*]] = sext i16 [[TMP7]] to i32
-; CHECK-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i16, i16* [[PSRCB_ADDR_173]], i32 3
-; CHECK-NEXT: [[TMP8:%.*]] = load i16, i16* [[ARRAYIDX13]], align 2
+; CHECK-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i16, ptr [[PSRCB_ADDR_173]], i32 3
+; CHECK-NEXT: [[TMP8:%.*]] = load i16, ptr [[ARRAYIDX13]], align 2
; CHECK-NEXT: [[CONV14:%.*]] = sext i16 [[TMP8]] to i32
; CHECK-NEXT: [[MUL15:%.*]] = mul nsw i32 [[CONV14]], [[CONV12]]
-; CHECK-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds i16, i16* [[PSRCA_ADDR_174]], i32 3
-; CHECK-NEXT: [[TMP9:%.*]] = load i16, i16* [[ARRAYIDX17]], align 2
+; CHECK-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds i16, ptr [[PSRCA_ADDR_174]], i32 3
+; CHECK-NEXT: [[TMP9:%.*]] = load i16, ptr [[ARRAYIDX17]], align 2
; CHECK-NEXT: [[CONV18:%.*]] = sext i16 [[TMP9]] to i32
; CHECK-NEXT: [[ADD21:%.*]] = add i32 [[MUL10]], [[MUL]]
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[ADD21]], [[CONV14]]
; CHECK-NEXT: [[ADD16:%.*]] = add i32 [[ADD]], [[MUL15]]
; CHECK-NEXT: [[ADD22:%.*]] = add i32 [[ADD16]], [[CONV18]]
-; CHECK-NEXT: store i32 [[ADD22]], i32* [[PDEST_ADDR_175]], align 4
-; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i16, i16* [[PSRCA_ADDR_174]], i32 4
-; CHECK-NEXT: [[ADD_PTR23]] = getelementptr inbounds i16, i16* [[PSRCB_ADDR_173]], i32 4
-; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i32, i32* [[PDEST_ADDR_175]], i32 1
+; CHECK-NEXT: store i32 [[ADD22]], ptr [[PDEST_ADDR_175]], align 4
+; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i16, ptr [[PSRCA_ADDR_174]], i32 4
+; CHECK-NEXT: [[ADD_PTR23]] = getelementptr inbounds i16, ptr [[PSRCB_ADDR_173]], i32 4
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i32, ptr [[PDEST_ADDR_175]], i32 1
; CHECK-NEXT: [[ADD24]] = add nuw nsw i32 [[J_076]], 4
; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[ADD24]], [[TMP0]]
; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_BODY3]], label [[FOR_END_LOOPEXIT:%.*]]
; CHECK: for.end.loopexit:
-; CHECK-NEXT: [[ADD_PTR_LCSSA:%.*]] = phi i16* [ [[ADD_PTR]], [[FOR_BODY3]] ]
-; CHECK-NEXT: [[ADD_PTR23_LCSSA:%.*]] = phi i16* [ [[ADD_PTR23]], [[FOR_BODY3]] ]
-; CHECK-NEXT: [[INCDEC_PTR_LCSSA:%.*]] = phi i32* [ [[INCDEC_PTR]], [[FOR_BODY3]] ]
+; CHECK-NEXT: [[ADD_PTR_LCSSA:%.*]] = phi ptr [ [[ADD_PTR]], [[FOR_BODY3]] ]
+; CHECK-NEXT: [[ADD_PTR23_LCSSA:%.*]] = phi ptr [ [[ADD_PTR23]], [[FOR_BODY3]] ]
+; CHECK-NEXT: [[INCDEC_PTR_LCSSA:%.*]] = phi ptr [ [[INCDEC_PTR]], [[FOR_BODY3]] ]
; CHECK-NEXT: br label [[FOR_END]]
; CHECK: for.end:
-; CHECK-NEXT: [[PSRCB_ADDR_1_LCSSA:%.*]] = phi i16* [ [[PSRCB_ADDR_089]], [[FOR_BODY]] ], [ [[ADD_PTR23_LCSSA]], [[FOR_END_LOOPEXIT]] ]
-; CHECK-NEXT: [[PSRCA_ADDR_1_LCSSA:%.*]] = phi i16* [ [[PSRCA_ADDR_090]], [[FOR_BODY]] ], [ [[ADD_PTR_LCSSA]], [[FOR_END_LOOPEXIT]] ]
-; CHECK-NEXT: [[PDEST_ADDR_1_LCSSA:%.*]] = phi i32* [ [[PDEST_ADDR_091]], [[FOR_BODY]] ], [ [[INCDEC_PTR_LCSSA]], [[FOR_END_LOOPEXIT]] ]
+; CHECK-NEXT: [[PSRCB_ADDR_1_LCSSA:%.*]] = phi ptr [ [[PSRCB_ADDR_089]], [[FOR_BODY]] ], [ [[ADD_PTR23_LCSSA]], [[FOR_END_LOOPEXIT]] ]
+; CHECK-NEXT: [[PSRCA_ADDR_1_LCSSA:%.*]] = phi ptr [ [[PSRCA_ADDR_090]], [[FOR_BODY]] ], [ [[ADD_PTR_LCSSA]], [[FOR_END_LOOPEXIT]] ]
+; CHECK-NEXT: [[PDEST_ADDR_1_LCSSA:%.*]] = phi ptr [ [[PDEST_ADDR_091]], [[FOR_BODY]] ], [ [[INCDEC_PTR_LCSSA]], [[FOR_END_LOOPEXIT]] ]
; CHECK-NEXT: [[J_0_LCSSA:%.*]] = phi i32 [ 0, [[FOR_BODY]] ], [ [[TMP2]], [[FOR_END_LOOPEXIT]] ]
; CHECK-NEXT: [[REM:%.*]] = and i32 [[TMP0]], 3
; CHECK-NEXT: [[ADD25:%.*]] = or i32 [[J_0_LCSSA]], [[REM]]
@@ -81,34 +81,34 @@ define dso_local arm_aapcscc void @test(i32* nocapture %pDest, i16* nocapture re
; CHECK-NEXT: br label [[FOR_BODY29:%.*]]
; CHECK: for.body29:
; CHECK-NEXT: [[J_184:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY29]] ], [ [[J_0_LCSSA]], [[FOR_BODY29_PREHEADER]] ]
-; CHECK-NEXT: [[PDEST_ADDR_283:%.*]] = phi i32* [ [[INCDEC_PTR38:%.*]], [[FOR_BODY29]] ], [ [[PDEST_ADDR_1_LCSSA]], [[FOR_BODY29_PREHEADER]] ]
-; CHECK-NEXT: [[PSRCA_ADDR_282:%.*]] = phi i16* [ [[INCDEC_PTR36:%.*]], [[FOR_BODY29]] ], [ [[PSRCA_ADDR_1_LCSSA]], [[FOR_BODY29_PREHEADER]] ]
-; CHECK-NEXT: [[PSRCB_ADDR_281:%.*]] = phi i16* [ [[INCDEC_PTR37:%.*]], [[FOR_BODY29]] ], [ [[PSRCB_ADDR_1_LCSSA]], [[FOR_BODY29_PREHEADER]] ]
-; CHECK-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds i16, i16* [[PSRCA_ADDR_282]], i32 [[J_184]]
-; CHECK-NEXT: [[TMP11:%.*]] = load i16, i16* [[ARRAYIDX30]], align 2
+; CHECK-NEXT: [[PDEST_ADDR_283:%.*]] = phi ptr [ [[INCDEC_PTR38:%.*]], [[FOR_BODY29]] ], [ [[PDEST_ADDR_1_LCSSA]], [[FOR_BODY29_PREHEADER]] ]
+; CHECK-NEXT: [[PSRCA_ADDR_282:%.*]] = phi ptr [ [[INCDEC_PTR36:%.*]], [[FOR_BODY29]] ], [ [[PSRCA_ADDR_1_LCSSA]], [[FOR_BODY29_PREHEADER]] ]
+; CHECK-NEXT: [[PSRCB_ADDR_281:%.*]] = phi ptr [ [[INCDEC_PTR37:%.*]], [[FOR_BODY29]] ], [ [[PSRCB_ADDR_1_LCSSA]], [[FOR_BODY29_PREHEADER]] ]
+; CHECK-NEXT: [[ARRAYIDX30:%.*]] = getelementptr inbounds i16, ptr [[PSRCA_ADDR_282]], i32 [[J_184]]
+; CHECK-NEXT: [[TMP11:%.*]] = load i16, ptr [[ARRAYIDX30]], align 2
; CHECK-NEXT: [[CONV31:%.*]] = sext i16 [[TMP11]] to i32
-; CHECK-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds i16, i16* [[PSRCB_ADDR_281]], i32 [[J_184]]
-; CHECK-NEXT: [[TMP12:%.*]] = load i16, i16* [[ARRAYIDX32]], align 2
+; CHECK-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds i16, ptr [[PSRCB_ADDR_281]], i32 [[J_184]]
+; CHECK-NEXT: [[TMP12:%.*]] = load i16, ptr [[ARRAYIDX32]], align 2
; CHECK-NEXT: [[CONV33:%.*]] = sext i16 [[TMP12]] to i32
; CHECK-NEXT: [[MUL34:%.*]] = mul nsw i32 [[CONV33]], [[CONV31]]
-; CHECK-NEXT: [[TMP13:%.*]] = load i32, i32* [[PDEST_ADDR_283]], align 4
+; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[PDEST_ADDR_283]], align 4
; CHECK-NEXT: [[ADD35:%.*]] = add nsw i32 [[MUL34]], [[TMP13]]
-; CHECK-NEXT: store i32 [[ADD35]], i32* [[PDEST_ADDR_283]], align 4
-; CHECK-NEXT: [[INCDEC_PTR36]] = getelementptr inbounds i16, i16* [[PSRCA_ADDR_282]], i32 1
-; CHECK-NEXT: [[INCDEC_PTR37]] = getelementptr inbounds i16, i16* [[PSRCB_ADDR_281]], i32 1
-; CHECK-NEXT: [[INCDEC_PTR38]] = getelementptr inbounds i32, i32* [[PDEST_ADDR_283]], i32 1
+; CHECK-NEXT: store i32 [[ADD35]], ptr [[PDEST_ADDR_283]], align 4
+; CHECK-NEXT: [[INCDEC_PTR36]] = getelementptr inbounds i16, ptr [[PSRCA_ADDR_282]], i32 1
+; CHECK-NEXT: [[INCDEC_PTR37]] = getelementptr inbounds i16, ptr [[PSRCB_ADDR_281]], i32 1
+; CHECK-NEXT: [[INCDEC_PTR38]] = getelementptr inbounds i32, ptr [[PDEST_ADDR_283]], i32 1
; CHECK-NEXT: [[INC]] = add nuw i32 [[J_184]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INC]], [[ADD25]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END40_LOOPEXIT:%.*]], label [[FOR_BODY29]]
; CHECK: for.end40.loopexit:
-; CHECK-NEXT: [[SCEVGEP93:%.*]] = getelementptr i16, i16* [[PSRCB_ADDR_1_LCSSA]], i32 [[TMP10]]
-; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i16, i16* [[PSRCA_ADDR_1_LCSSA]], i32 [[TMP10]]
-; CHECK-NEXT: [[SCEVGEP94:%.*]] = getelementptr i32, i32* [[PDEST_ADDR_1_LCSSA]], i32 [[TMP10]]
+; CHECK-NEXT: [[SCEVGEP93:%.*]] = getelementptr i16, ptr [[PSRCB_ADDR_1_LCSSA]], i32 [[TMP10]]
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i16, ptr [[PSRCA_ADDR_1_LCSSA]], i32 [[TMP10]]
+; CHECK-NEXT: [[SCEVGEP94:%.*]] = getelementptr i32, ptr [[PDEST_ADDR_1_LCSSA]], i32 [[TMP10]]
; CHECK-NEXT: br label [[FOR_END40]]
; CHECK: for.end40:
-; CHECK-NEXT: [[PSRCB_ADDR_2_LCSSA]] = phi i16* [ [[PSRCB_ADDR_1_LCSSA]], [[FOR_END]] ], [ [[SCEVGEP93]], [[FOR_END40_LOOPEXIT]] ]
-; CHECK-NEXT: [[PSRCA_ADDR_2_LCSSA]] = phi i16* [ [[PSRCA_ADDR_1_LCSSA]], [[FOR_END]] ], [ [[SCEVGEP]], [[FOR_END40_LOOPEXIT]] ]
-; CHECK-NEXT: [[PDEST_ADDR_2_LCSSA]] = phi i32* [ [[PDEST_ADDR_1_LCSSA]], [[FOR_END]] ], [ [[SCEVGEP94]], [[FOR_END40_LOOPEXIT]] ]
+; CHECK-NEXT: [[PSRCB_ADDR_2_LCSSA]] = phi ptr [ [[PSRCB_ADDR_1_LCSSA]], [[FOR_END]] ], [ [[SCEVGEP93]], [[FOR_END40_LOOPEXIT]] ]
+; CHECK-NEXT: [[PSRCA_ADDR_2_LCSSA]] = phi ptr [ [[PSRCA_ADDR_1_LCSSA]], [[FOR_END]] ], [ [[SCEVGEP]], [[FOR_END40_LOOPEXIT]] ]
+; CHECK-NEXT: [[PDEST_ADDR_2_LCSSA]] = phi ptr [ [[PDEST_ADDR_1_LCSSA]], [[FOR_END]] ], [ [[SCEVGEP94]], [[FOR_END40_LOOPEXIT]] ]
; CHECK-NEXT: [[INC42]] = add nuw i32 [[I_092]], 1
; CHECK-NEXT: [[EXITCOND95:%.*]] = icmp eq i32 [[INC42]], [[BLKCNT]]
; CHECK-NEXT: br i1 [[EXITCOND95]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[FOR_BODY]]
@@ -122,9 +122,9 @@ for.cond.cleanup: ; preds = %for.end40, %entry
for.body: ; preds = %for.end40, %entry
%i.092 = phi i32 [ %inc42, %for.end40 ], [ 0, %entry ]
- %pDest.addr.091 = phi i32* [ %pDest.addr.2.lcssa, %for.end40 ], [ %pDest, %entry ]
- %pSrcA.addr.090 = phi i16* [ %pSrcA.addr.2.lcssa, %for.end40 ], [ %pSrcA, %entry ]
- %pSrcB.addr.089 = phi i16* [ %pSrcB.addr.2.lcssa, %for.end40 ], [ %pSrcB, %entry ]
+ %pDest.addr.091 = phi ptr [ %pDest.addr.2.lcssa, %for.end40 ], [ %pDest, %entry ]
+ %pSrcA.addr.090 = phi ptr [ %pSrcA.addr.2.lcssa, %for.end40 ], [ %pSrcA, %entry ]
+ %pSrcB.addr.089 = phi ptr [ %pSrcB.addr.2.lcssa, %for.end40 ], [ %pSrcB, %entry ]
%0 = lshr i32 %i.092, 2
%1 = add nuw nsw i32 %0, 3
%2 = and i32 %1, 2147483644
@@ -133,47 +133,47 @@ for.body: ; preds = %for.end40, %entry
for.body3: ; preds = %for.body3, %for.body
%j.076 = phi i32 [ %add24, %for.body3 ], [ 0, %for.body ]
- %pDest.addr.175 = phi i32* [ %incdec.ptr, %for.body3 ], [ %pDest.addr.091, %for.body ]
- %pSrcA.addr.174 = phi i16* [ %add.ptr, %for.body3 ], [ %pSrcA.addr.090, %for.body ]
- %pSrcB.addr.173 = phi i16* [ %add.ptr23, %for.body3 ], [ %pSrcB.addr.089, %for.body ]
- %3 = load i16, i16* %pSrcA.addr.174, align 2
+ %pDest.addr.175 = phi ptr [ %incdec.ptr, %for.body3 ], [ %pDest.addr.091, %for.body ]
+ %pSrcA.addr.174 = phi ptr [ %add.ptr, %for.body3 ], [ %pSrcA.addr.090, %for.body ]
+ %pSrcB.addr.173 = phi ptr [ %add.ptr23, %for.body3 ], [ %pSrcB.addr.089, %for.body ]
+ %3 = load i16, ptr %pSrcA.addr.174, align 2
%conv = sext i16 %3 to i32
- %4 = load i16, i16* %pSrcB.addr.173, align 2
+ %4 = load i16, ptr %pSrcB.addr.173, align 2
%conv5 = sext i16 %4 to i32
%mul = mul nsw i32 %conv5, %conv
- %arrayidx6 = getelementptr inbounds i16, i16* %pSrcA.addr.174, i32 1
- %5 = load i16, i16* %arrayidx6, align 2
+ %arrayidx6 = getelementptr inbounds i16, ptr %pSrcA.addr.174, i32 1
+ %5 = load i16, ptr %arrayidx6, align 2
%conv7 = sext i16 %5 to i32
- %arrayidx8 = getelementptr inbounds i16, i16* %pSrcB.addr.173, i32 1
- %6 = load i16, i16* %arrayidx8, align 2
+ %arrayidx8 = getelementptr inbounds i16, ptr %pSrcB.addr.173, i32 1
+ %6 = load i16, ptr %arrayidx8, align 2
%conv9 = sext i16 %6 to i32
%mul10 = mul nsw i32 %conv9, %conv7
- %arrayidx11 = getelementptr inbounds i16, i16* %pSrcA.addr.174, i32 2
- %7 = load i16, i16* %arrayidx11, align 2
+ %arrayidx11 = getelementptr inbounds i16, ptr %pSrcA.addr.174, i32 2
+ %7 = load i16, ptr %arrayidx11, align 2
%conv12 = sext i16 %7 to i32
- %arrayidx13 = getelementptr inbounds i16, i16* %pSrcB.addr.173, i32 3
- %8 = load i16, i16* %arrayidx13, align 2
+ %arrayidx13 = getelementptr inbounds i16, ptr %pSrcB.addr.173, i32 3
+ %8 = load i16, ptr %arrayidx13, align 2
%conv14 = sext i16 %8 to i32
%mul15 = mul nsw i32 %conv14, %conv12
- %arrayidx17 = getelementptr inbounds i16, i16* %pSrcA.addr.174, i32 3
- %9 = load i16, i16* %arrayidx17, align 2
+ %arrayidx17 = getelementptr inbounds i16, ptr %pSrcA.addr.174, i32 3
+ %9 = load i16, ptr %arrayidx17, align 2
%conv18 = sext i16 %9 to i32
%add21 = add i32 %mul10, %mul
%add = add i32 %add21, %conv14
%add16 = add i32 %add, %mul15
%add22 = add i32 %add16, %conv18
- store i32 %add22, i32* %pDest.addr.175, align 4
- %add.ptr = getelementptr inbounds i16, i16* %pSrcA.addr.174, i32 4
- %add.ptr23 = getelementptr inbounds i16, i16* %pSrcB.addr.173, i32 4
- %incdec.ptr = getelementptr inbounds i32, i32* %pDest.addr.175, i32 1
+ store i32 %add22, ptr %pDest.addr.175, align 4
+ %add.ptr = getelementptr inbounds i16, ptr %pSrcA.addr.174, i32 4
+ %add.ptr23 = getelementptr inbounds i16, ptr %pSrcB.addr.173, i32 4
+ %incdec.ptr = getelementptr inbounds i32, ptr %pDest.addr.175, i32 1
%add24 = add nuw nsw i32 %j.076, 4
%cmp2 = icmp ult i32 %add24, %0
br i1 %cmp2, label %for.body3, label %for.end
for.end: ; preds = %for.body3, %for.body
- %pSrcB.addr.1.lcssa = phi i16* [ %pSrcB.addr.089, %for.body ], [ %add.ptr23, %for.body3 ]
- %pSrcA.addr.1.lcssa = phi i16* [ %pSrcA.addr.090, %for.body ], [ %add.ptr, %for.body3 ]
- %pDest.addr.1.lcssa = phi i32* [ %pDest.addr.091, %for.body ], [ %incdec.ptr, %for.body3 ]
+ %pSrcB.addr.1.lcssa = phi ptr [ %pSrcB.addr.089, %for.body ], [ %add.ptr23, %for.body3 ]
+ %pSrcA.addr.1.lcssa = phi ptr [ %pSrcA.addr.090, %for.body ], [ %add.ptr, %for.body3 ]
+ %pDest.addr.1.lcssa = phi ptr [ %pDest.addr.091, %for.body ], [ %incdec.ptr, %for.body3 ]
%j.0.lcssa = phi i32 [ 0, %for.body ], [ %2, %for.body3 ]
%rem = and i32 %0, 3
%add25 = or i32 %j.0.lcssa, %rem
@@ -182,40 +182,40 @@ for.end: ; preds = %for.body3, %for.bod
for.body29.preheader: ; preds = %for.end
%10 = sub nsw i32 %add25, %j.0.lcssa
- %scevgep93 = getelementptr i16, i16* %pSrcB.addr.1.lcssa, i32 %10
+ %scevgep93 = getelementptr i16, ptr %pSrcB.addr.1.lcssa, i32 %10
br label %for.body29
for.body29: ; preds = %for.body29, %for.body29.preheader
%j.184 = phi i32 [ %inc, %for.body29 ], [ %j.0.lcssa, %for.body29.preheader ]
- %pDest.addr.283 = phi i32* [ %incdec.ptr38, %for.body29 ], [ %pDest.addr.1.lcssa, %for.body29.preheader ]
- %pSrcA.addr.282 = phi i16* [ %incdec.ptr36, %for.body29 ], [ %pSrcA.addr.1.lcssa, %for.body29.preheader ]
- %pSrcB.addr.281 = phi i16* [ %incdec.ptr37, %for.body29 ], [ %pSrcB.addr.1.lcssa, %for.body29.preheader ]
- %arrayidx30 = getelementptr inbounds i16, i16* %pSrcA.addr.282, i32 %j.184
- %11 = load i16, i16* %arrayidx30, align 2
+ %pDest.addr.283 = phi ptr [ %incdec.ptr38, %for.body29 ], [ %pDest.addr.1.lcssa, %for.body29.preheader ]
+ %pSrcA.addr.282 = phi ptr [ %incdec.ptr36, %for.body29 ], [ %pSrcA.addr.1.lcssa, %for.body29.preheader ]
+ %pSrcB.addr.281 = phi ptr [ %incdec.ptr37, %for.body29 ], [ %pSrcB.addr.1.lcssa, %for.body29.preheader ]
+ %arrayidx30 = getelementptr inbounds i16, ptr %pSrcA.addr.282, i32 %j.184
+ %11 = load i16, ptr %arrayidx30, align 2
%conv31 = sext i16 %11 to i32
- %arrayidx32 = getelementptr inbounds i16, i16* %pSrcB.addr.281, i32 %j.184
- %12 = load i16, i16* %arrayidx32, align 2
+ %arrayidx32 = getelementptr inbounds i16, ptr %pSrcB.addr.281, i32 %j.184
+ %12 = load i16, ptr %arrayidx32, align 2
%conv33 = sext i16 %12 to i32
%mul34 = mul nsw i32 %conv33, %conv31
- %13 = load i32, i32* %pDest.addr.283, align 4
+ %13 = load i32, ptr %pDest.addr.283, align 4
%add35 = add nsw i32 %mul34, %13
- store i32 %add35, i32* %pDest.addr.283, align 4
- %incdec.ptr36 = getelementptr inbounds i16, i16* %pSrcA.addr.282, i32 1
- %incdec.ptr37 = getelementptr inbounds i16, i16* %pSrcB.addr.281, i32 1
- %incdec.ptr38 = getelementptr inbounds i32, i32* %pDest.addr.283, i32 1
+ store i32 %add35, ptr %pDest.addr.283, align 4
+ %incdec.ptr36 = getelementptr inbounds i16, ptr %pSrcA.addr.282, i32 1
+ %incdec.ptr37 = getelementptr inbounds i16, ptr %pSrcB.addr.281, i32 1
+ %incdec.ptr38 = getelementptr inbounds i32, ptr %pDest.addr.283, i32 1
%inc = add nuw i32 %j.184, 1
%exitcond = icmp eq i32 %inc, %add25
br i1 %exitcond, label %for.end40.loopexit, label %for.body29
for.end40.loopexit: ; preds = %for.body29
- %scevgep = getelementptr i16, i16* %pSrcA.addr.1.lcssa, i32 %10
- %scevgep94 = getelementptr i32, i32* %pDest.addr.1.lcssa, i32 %10
+ %scevgep = getelementptr i16, ptr %pSrcA.addr.1.lcssa, i32 %10
+ %scevgep94 = getelementptr i32, ptr %pDest.addr.1.lcssa, i32 %10
br label %for.end40
for.end40: ; preds = %for.end40.loopexit, %for.end
- %pSrcB.addr.2.lcssa = phi i16* [ %pSrcB.addr.1.lcssa, %for.end ], [ %scevgep93, %for.end40.loopexit ]
- %pSrcA.addr.2.lcssa = phi i16* [ %pSrcA.addr.1.lcssa, %for.end ], [ %scevgep, %for.end40.loopexit ]
- %pDest.addr.2.lcssa = phi i32* [ %pDest.addr.1.lcssa, %for.end ], [ %scevgep94, %for.end40.loopexit ]
+ %pSrcB.addr.2.lcssa = phi ptr [ %pSrcB.addr.1.lcssa, %for.end ], [ %scevgep93, %for.end40.loopexit ]
+ %pSrcA.addr.2.lcssa = phi ptr [ %pSrcA.addr.1.lcssa, %for.end ], [ %scevgep, %for.end40.loopexit ]
+ %pDest.addr.2.lcssa = phi ptr [ %pDest.addr.1.lcssa, %for.end ], [ %scevgep94, %for.end40.loopexit ]
%inc42 = add nuw i32 %i.092, 1
%exitcond95 = icmp eq i32 %inc42, %blkCnt
br i1 %exitcond95, label %for.cond.cleanup, label %for.body
diff --git a/llvm/test/Transforms/IndVarSimplify/X86/eliminate-congruent-ivs.ll b/llvm/test/Transforms/IndVarSimplify/X86/eliminate-congruent-ivs.ll
index 8f29bbefa0e08..33b0a879b0aa2 100644
--- a/llvm/test/Transforms/IndVarSimplify/X86/eliminate-congruent-ivs.ll
+++ b/llvm/test/Transforms/IndVarSimplify/X86/eliminate-congruent-ivs.ll
@@ -107,16 +107,16 @@ exit: ; preds = %loop
ret void
}
-define void @test4(i32* %ptr) {
+define void @test4(ptr %ptr) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: entry:
-; CHECK-NEXT: store i32 0, i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: store i32 0, ptr [[PTR:%.*]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[INDVARS:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
-; CHECK-NEXT: store i32 [[INDVARS]], i32* [[PTR]], align 4
+; CHECK-NEXT: store i32 [[INDVARS]], ptr [[PTR]], align 4
; CHECK-NEXT: call void @foo(i64 [[INDVARS_IV]])
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 1000
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[EXIT:%.*]], label [[LOOP]]
@@ -124,14 +124,14 @@ define void @test4(i32* %ptr) {
; CHECK-NEXT: ret void
;
entry:
- store i32 0, i32* %ptr, align 4
+ store i32 0, ptr %ptr, align 4
br label %loop
loop: ; preds = %loop, %entry
%val = phi i32 [ %val.inc, %loop ], [ 0, %entry ]
%iv = phi i32 [ %iv.next, %loop ], [ 0, %entry ]
%val.inc = add i32 %val, 1
- store i32 %val.inc, i32* %ptr, align 4
+ store i32 %val.inc, ptr %ptr, align 4
%iv.wide = zext i32 %iv to i64
call void @foo(i64 %iv.wide)
%iv.next = add i32 %iv, 1
diff --git a/llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll b/llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll
index 89de7ac152de3..9eebb712b8937 100644
--- a/llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll
+++ b/llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll
@@ -13,7 +13,7 @@ declare void @use(i64 %x)
; Only one phi now.
; One trunc for the gep.
; One trunc for the dummy() call.
-define void @loop_0(i32* %a) {
+define void @loop_0(ptr %a) {
; CHECK-LABEL: @loop_0(
; CHECK-NEXT: Prologue:
; CHECK-NEXT: br i1 undef, label [[B18_PREHEADER:%.*]], label [[B6:%.*]]
@@ -24,8 +24,8 @@ define void @loop_0(i32* %a) {
; CHECK-NEXT: call void @use(i64 [[INDVARS_IV]])
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT: [[O:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 [[TMP0]]
-; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[O]], align 4
+; CHECK-NEXT: [[O:%.*]] = getelementptr i32, ptr [[A:%.*]], i32 [[TMP0]]
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[O]], align 4
; CHECK-NEXT: [[T:%.*]] = icmp eq i32 [[V]], 0
; CHECK-NEXT: br i1 [[T]], label [[EXIT24:%.*]], label [[B24]]
; CHECK: B24:
@@ -49,8 +49,8 @@ B18: ; preds = %B24, %Prologue
%tmp23 = zext i32 %.02 to i64
call void @use(i64 %tmp23)
%tmp33 = add i32 %.02, 1
- %o = getelementptr i32, i32* %a, i32 %.02
- %v = load i32, i32* %o
+ %o = getelementptr i32, ptr %a, i32 %.02
+ %v = load i32, ptr %o
%t = icmp eq i32 %v, 0
br i1 %t, label %exit24, label %B24
@@ -67,7 +67,7 @@ exit24: ; preds = %B18
}
; Make sure that dead zext is removed and no widening happens.
-define void @loop_0_dead(i32* %a) {
+define void @loop_0_dead(ptr %a) {
; CHECK-LABEL: @loop_0_dead(
; CHECK-NEXT: Prologue:
; CHECK-NEXT: br i1 undef, label [[B18_PREHEADER:%.*]], label [[B6:%.*]]
@@ -76,8 +76,8 @@ define void @loop_0_dead(i32* %a) {
; CHECK: B18:
; CHECK-NEXT: [[DOT02:%.*]] = phi i32 [ [[TMP33:%.*]], [[B24:%.*]] ], [ 0, [[B18_PREHEADER]] ]
; CHECK-NEXT: [[TMP33]] = add nuw nsw i32 [[DOT02]], 1
-; CHECK-NEXT: [[O:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 [[DOT02]]
-; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[O]], align 4
+; CHECK-NEXT: [[O:%.*]] = getelementptr i32, ptr [[A:%.*]], i32 [[DOT02]]
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[O]], align 4
; CHECK-NEXT: [[T:%.*]] = icmp eq i32 [[V]], 0
; CHECK-NEXT: br i1 [[T]], label [[EXIT24:%.*]], label [[B24]]
; CHECK: B24:
@@ -99,8 +99,8 @@ B18: ; preds = %B24, %Prologue
%.02 = phi i32 [ 0, %Prologue ], [ %tmp33, %B24 ]
%tmp23 = zext i32 %.02 to i64
%tmp33 = add i32 %.02, 1
- %o = getelementptr i32, i32* %a, i32 %.02
- %v = load i32, i32* %o
+ %o = getelementptr i32, ptr %a, i32 %.02
+ %v = load i32, ptr %o
%t = icmp eq i32 %v, 0
br i1 %t, label %exit24, label %B24
@@ -159,11 +159,10 @@ declare void @dummy(i32)
declare void @dummy.i64(i64)
-define void @loop_2(i32 %size, i32 %nsteps, i32 %hsize, i32* %lined, i8 %tmp1) {
+define void @loop_2(i32 %size, i32 %nsteps, i32 %hsize, ptr %lined, i8 %tmp1) {
; CHECK-LABEL: @loop_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP215:%.*]] = icmp sgt i32 [[SIZE:%.*]], 1
-; CHECK-NEXT: [[BC0:%.*]] = bitcast i32* [[LINED:%.*]] to i8*
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[SIZE]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[HSIZE:%.*]] to i64
; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[NSTEPS:%.*]], i32 1)
@@ -180,8 +179,8 @@ define void @loop_2(i32 %size, i32 %nsteps, i32 %hsize, i32* %lined, i8 %tmp1) {
; CHECK: for.body2:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 1, [[FOR_BODY2_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY2]] ]
; CHECK-NEXT: [[TMP4:%.*]] = add nsw i64 [[TMP3]], [[INDVARS_IV]]
-; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[BC0]], i64 [[TMP4]]
-; CHECK-NEXT: store i8 [[TMP1:%.*]], i8* [[ADD_PTR]], align 1
+; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, ptr [[LINED:%.*]], i64 [[TMP4]]
+; CHECK-NEXT: store i8 [[TMP1:%.*]], ptr [[ADD_PTR]], align 1
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY2]], label [[FOR_BODY3_PREHEADER:%.*]]
@@ -193,8 +192,8 @@ define void @loop_2(i32 %size, i32 %nsteps, i32 %hsize, i32* %lined, i8 %tmp1) {
; CHECK: for.body3:
; CHECK-NEXT: [[INDVARS_IV3:%.*]] = phi i64 [ 1, [[FOR_BODY3_PREHEADER]] ], [ [[INDVARS_IV_NEXT4:%.*]], [[FOR_BODY3]] ]
; CHECK-NEXT: [[TMP7:%.*]] = add nuw nsw i64 [[TMP6]], [[INDVARS_IV3]]
-; CHECK-NEXT: [[ADD_PTR2:%.*]] = getelementptr inbounds i8, i8* [[BC0]], i64 [[TMP7]]
-; CHECK-NEXT: store i8 [[TMP1]], i8* [[ADD_PTR2]], align 1
+; CHECK-NEXT: [[ADD_PTR2:%.*]] = getelementptr inbounds i8, ptr [[LINED]], i64 [[TMP7]]
+; CHECK-NEXT: store i8 [[TMP1]], ptr [[ADD_PTR2]], align 1
; CHECK-NEXT: [[INDVARS_IV_NEXT4]] = add nuw nsw i64 [[INDVARS_IV3]], 1
; CHECK-NEXT: [[EXITCOND8:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT4]], [[WIDE_TRIP_COUNT7]]
; CHECK-NEXT: br i1 [[EXITCOND8]], label [[FOR_BODY3]], label [[FOR_INC_LOOPEXIT:%.*]]
@@ -209,7 +208,6 @@ define void @loop_2(i32 %size, i32 %nsteps, i32 %hsize, i32* %lined, i8 %tmp1) {
;
entry:
%cmp215 = icmp sgt i32 %size, 1
- %bc0 = bitcast i32* %lined to i8*
br label %for.body
for.body:
@@ -223,8 +221,8 @@ for.body2:
%k = phi i32 [ %inc, %for.body2 ], [ 1, %for.body ]
%add4 = add nsw i32 %add, %k
%idx.ext = sext i32 %add4 to i64
- %add.ptr = getelementptr inbounds i8, i8* %bc0, i64 %idx.ext
- store i8 %tmp1, i8* %add.ptr, align 1
+ %add.ptr = getelementptr inbounds i8, ptr %lined, i64 %idx.ext
+ store i8 %tmp1, ptr %add.ptr, align 1
%inc = add nsw i32 %k, 1
%cmp2 = icmp slt i32 %inc, %size
br i1 %cmp2, label %for.body2, label %for.body3
@@ -234,8 +232,8 @@ for.body3:
%l = phi i32 [ %inc2, %for.body3 ], [ 1, %for.body2 ]
%add5 = add nuw i32 %add, %l
%idx.ext2 = zext i32 %add5 to i64
- %add.ptr2 = getelementptr inbounds i8, i8* %bc0, i64 %idx.ext2
- store i8 %tmp1, i8* %add.ptr2, align 1
+ %add.ptr2 = getelementptr inbounds i8, ptr %lined, i64 %idx.ext2
+ store i8 %tmp1, ptr %add.ptr2, align 1
%inc2 = add nsw i32 %l, 1
%cmp3 = icmp slt i32 %inc2, %size
br i1 %cmp3, label %for.body3, label %for.inc
diff --git a/llvm/test/Transforms/IndVarSimplify/X86/replace-iv-with-loop-invariant.ll b/llvm/test/Transforms/IndVarSimplify/X86/replace-iv-with-loop-invariant.ll
index da83593ebc8f3..2501a5e304bdf 100644
--- a/llvm/test/Transforms/IndVarSimplify/X86/replace-iv-with-loop-invariant.ll
+++ b/llvm/test/Transforms/IndVarSimplify/X86/replace-iv-with-loop-invariant.ll
@@ -6,120 +6,120 @@ target triple = "x86_64-unknown-linux-gnu"
@G = external global i32
-define void @test0(i64* %arg) {
+define void @test0(ptr %arg) {
; CHECK-LABEL: @test0(
; CHECK-NEXT: bb:
; CHECK-NEXT: br label [[BB2:%.*]]
; CHECK: bb2:
-; CHECK-NEXT: [[TMP:%.*]] = phi i64* [ [[ARG:%.*]], [[BB:%.*]] ], [ [[TMP7:%.*]], [[BB2]] ]
-; CHECK-NEXT: [[TMP4:%.*]] = call i32* @wobble(i64* nonnull [[TMP]], i32* null)
-; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* null, align 8
-; CHECK-NEXT: [[TMP7]] = load i64*, i64** undef, align 8
+; CHECK-NEXT: [[TMP:%.*]] = phi ptr [ [[ARG:%.*]], [[BB:%.*]] ], [ [[TMP7:%.*]], [[BB2]] ]
+; CHECK-NEXT: [[TMP4:%.*]] = call ptr @wobble(ptr nonnull [[TMP]], ptr null)
+; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr null, align 8
+; CHECK-NEXT: [[TMP7]] = load ptr, ptr undef, align 8
; CHECK-NEXT: br label [[BB2]]
;
bb:
br label %bb2
bb2:
- %tmp = phi i64* [%arg, %bb ], [ %tmp7, %bb2 ]
- %tmp4 = call i32* @wobble(i64* nonnull %tmp, i32* null)
- %tmp5 = load i32, i32* %tmp4, align 8
- %tmp7 = load i64*, i64** undef, align 8
+ %tmp = phi ptr [%arg, %bb ], [ %tmp7, %bb2 ]
+ %tmp4 = call ptr @wobble(ptr nonnull %tmp, ptr null)
+ %tmp5 = load i32, ptr %tmp4, align 8
+ %tmp7 = load ptr, ptr undef, align 8
br label %bb2
}
-define void @test1(i64* %arg) {
+define void @test1(ptr %arg) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: bb:
; CHECK-NEXT: br label [[BB2:%.*]]
; CHECK: bb2:
-; CHECK-NEXT: [[TMP:%.*]] = phi i64* [ [[ARG:%.*]], [[BB:%.*]] ], [ [[TMP7:%.*]], [[BB2]] ]
-; CHECK-NEXT: [[TMP4:%.*]] = call i32* @wobble(i64* nonnull [[TMP]], i32* inttoptr (i64 4 to i32*))
-; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* inttoptr (i64 4 to i32*), align 4
-; CHECK-NEXT: [[TMP7]] = load i64*, i64** undef, align 8
+; CHECK-NEXT: [[TMP:%.*]] = phi ptr [ [[ARG:%.*]], [[BB:%.*]] ], [ [[TMP7:%.*]], [[BB2]] ]
+; CHECK-NEXT: [[TMP4:%.*]] = call ptr @wobble(ptr nonnull [[TMP]], ptr inttoptr (i64 4 to ptr))
+; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr inttoptr (i64 4 to ptr), align 4
+; CHECK-NEXT: [[TMP7]] = load ptr, ptr undef, align 8
; CHECK-NEXT: br label [[BB2]]
;
bb:
br label %bb2
bb2:
- %tmp = phi i64* [%arg, %bb ], [ %tmp7, %bb2 ]
- %tmp4 = call i32* @wobble(i64* nonnull %tmp, i32* inttoptr (i64 4 to i32*))
- %tmp5 = load i32, i32* %tmp4
- %tmp7 = load i64*, i64** undef, align 8
+ %tmp = phi ptr [%arg, %bb ], [ %tmp7, %bb2 ]
+ %tmp4 = call ptr @wobble(ptr nonnull %tmp, ptr inttoptr (i64 4 to ptr))
+ %tmp5 = load i32, ptr %tmp4
+ %tmp7 = load ptr, ptr undef, align 8
br label %bb2
}
-define void @test2(i64* %arg) {
+define void @test2(ptr %arg) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: bb:
; CHECK-NEXT: br label [[BB2:%.*]]
; CHECK: bb2:
-; CHECK-NEXT: [[TMP:%.*]] = phi i64* [ [[ARG:%.*]], [[BB:%.*]] ], [ [[TMP7:%.*]], [[BB2]] ]
-; CHECK-NEXT: [[TMP4:%.*]] = call i32* @wobble(i64* nonnull [[TMP]], i32* @G)
-; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* @G, align 4
-; CHECK-NEXT: [[TMP7]] = load i64*, i64** undef, align 8
+; CHECK-NEXT: [[TMP:%.*]] = phi ptr [ [[ARG:%.*]], [[BB:%.*]] ], [ [[TMP7:%.*]], [[BB2]] ]
+; CHECK-NEXT: [[TMP4:%.*]] = call ptr @wobble(ptr nonnull [[TMP]], ptr @G)
+; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr @G, align 4
+; CHECK-NEXT: [[TMP7]] = load ptr, ptr undef, align 8
; CHECK-NEXT: br label [[BB2]]
;
bb:
br label %bb2
bb2:
- %tmp = phi i64* [%arg, %bb ], [ %tmp7, %bb2 ]
- %tmp4 = call i32* @wobble(i64* nonnull %tmp, i32* @G)
- %tmp5 = load i32, i32* %tmp4
- %tmp7 = load i64*, i64** undef, align 8
+ %tmp = phi ptr [%arg, %bb ], [ %tmp7, %bb2 ]
+ %tmp4 = call ptr @wobble(ptr nonnull %tmp, ptr @G)
+ %tmp5 = load i32, ptr %tmp4
+ %tmp7 = load ptr, ptr undef, align 8
br label %bb2
}
-define void @test3(i64* %arg, i32* %loop.invariant) {
+define void @test3(ptr %arg, ptr %loop.invariant) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: bb:
; CHECK-NEXT: br label [[BB2:%.*]]
; CHECK: bb2:
-; CHECK-NEXT: [[TMP:%.*]] = phi i64* [ [[ARG:%.*]], [[BB:%.*]] ], [ [[TMP7:%.*]], [[BB2]] ]
-; CHECK-NEXT: [[TMP4:%.*]] = call i32* @wobble(i64* nonnull [[TMP]], i32* [[LOOP_INVARIANT:%.*]])
-; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[LOOP_INVARIANT]], align 4
-; CHECK-NEXT: [[TMP7]] = load i64*, i64** undef, align 8
+; CHECK-NEXT: [[TMP:%.*]] = phi ptr [ [[ARG:%.*]], [[BB:%.*]] ], [ [[TMP7:%.*]], [[BB2]] ]
+; CHECK-NEXT: [[TMP4:%.*]] = call ptr @wobble(ptr nonnull [[TMP]], ptr [[LOOP_INVARIANT:%.*]])
+; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[LOOP_INVARIANT]], align 4
+; CHECK-NEXT: [[TMP7]] = load ptr, ptr undef, align 8
; CHECK-NEXT: br label [[BB2]]
;
bb:
br label %bb2
bb2:
- %tmp = phi i64* [%arg, %bb ], [ %tmp7, %bb2 ]
- %tmp4 = call i32* @wobble(i64* nonnull %tmp, i32* %loop.invariant)
- %tmp5 = load i32, i32* %tmp4
- %tmp7 = load i64*, i64** undef, align 8
+ %tmp = phi ptr [%arg, %bb ], [ %tmp7, %bb2 ]
+ %tmp4 = call ptr @wobble(ptr nonnull %tmp, ptr %loop.invariant)
+ %tmp5 = load i32, ptr %tmp4
+ %tmp7 = load ptr, ptr undef, align 8
br label %bb2
}
-define void @test4(i64* %arg, i32* %loop.invariant, i64 %N) {
+define void @test4(ptr %arg, ptr %loop.invariant, i64 %N) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: bb:
-; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[N:%.*]], 6
-; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[LOOP_INVARIANT:%.*]], i64 [[TMP0]]
+; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[N:%.*]], 8
+; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr i8, ptr [[LOOP_INVARIANT:%.*]], i64 [[TMP0]]
; CHECK-NEXT: br label [[BB2:%.*]]
; CHECK: bb2:
-; CHECK-NEXT: [[TMP:%.*]] = phi i64* [ [[ARG:%.*]], [[BB:%.*]] ], [ [[TMP7:%.*]], [[BB2]] ]
+; CHECK-NEXT: [[TMP:%.*]] = phi ptr [ [[ARG:%.*]], [[BB:%.*]] ], [ [[TMP7:%.*]], [[BB2]] ]
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i64 [[N]], 64
-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i32, i32* [[LOOP_INVARIANT]], i64 [[MUL]]
-; CHECK-NEXT: [[TMP4:%.*]] = call i32* @wobble(i64* nonnull [[TMP]], i32* [[PTR]])
-; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[SCEVGEP]], align 4
-; CHECK-NEXT: [[TMP7]] = load i64*, i64** undef, align 8
+; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i32, ptr [[LOOP_INVARIANT]], i64 [[MUL]]
+; CHECK-NEXT: [[TMP4:%.*]] = call ptr @wobble(ptr nonnull [[TMP]], ptr [[PTR]])
+; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[UGLYGEP]], align 4
+; CHECK-NEXT: [[TMP7]] = load ptr, ptr undef, align 8
; CHECK-NEXT: br label [[BB2]]
;
bb:
br label %bb2
bb2:
- %tmp = phi i64* [%arg, %bb ], [ %tmp7, %bb2 ]
+ %tmp = phi ptr [%arg, %bb ], [ %tmp7, %bb2 ]
%mul = mul nsw i64 %N, 64
- %ptr = getelementptr inbounds i32, i32* %loop.invariant, i64 %mul
- %tmp4 = call i32* @wobble(i64* nonnull %tmp, i32* %ptr)
- %tmp5 = load i32, i32* %tmp4
- %tmp7 = load i64*, i64** undef, align 8
+ %ptr = getelementptr inbounds i32, ptr %loop.invariant, i64 %mul
+ %tmp4 = call ptr @wobble(ptr nonnull %tmp, ptr %ptr)
+ %tmp5 = load i32, ptr %tmp4
+ %tmp7 = load ptr, ptr undef, align 8
br label %bb2
}
-declare i32* @wobble(i64*, i32* returned)
+declare ptr @wobble(ptr, ptr returned)
diff --git a/llvm/test/Transforms/IndVarSimplify/ashr-expansion.ll b/llvm/test/Transforms/IndVarSimplify/ashr-expansion.ll
index fa1ab67794989..090e02c163933 100644
--- a/llvm/test/Transforms/IndVarSimplify/ashr-expansion.ll
+++ b/llvm/test/Transforms/IndVarSimplify/ashr-expansion.ll
@@ -3,7 +3,7 @@
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
-define float @ashr_expansion_valid(i64 %x, float* %ptr) {
+define float @ashr_expansion_valid(i64 %x, ptr %ptr) {
; CHECK-LABEL: @ashr_expansion_valid(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[BOUND:%.*]] = ashr exact i64 [[X:%.*]], 4
@@ -12,8 +12,8 @@ define float @ashr_expansion_valid(i64 %x, float* %ptr) {
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[RED:%.*]] = phi float [ 0.000000e+00, [[ENTRY]] ], [ [[RED_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr float, float* [[PTR:%.*]], i64 [[IV]]
-; CHECK-NEXT: [[LV:%.*]] = load float, float* [[GEP]], align 4
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr float, ptr [[PTR:%.*]], i64 [[IV]]
+; CHECK-NEXT: [[LV:%.*]] = load float, ptr [[GEP]], align 4
; CHECK-NEXT: [[RED_NEXT]] = fadd float [[LV]], [[RED]]
; CHECK-NEXT: [[IV_NEXT]] = add nuw i64 [[IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[IV_NEXT]], [[UMAX]]
@@ -29,8 +29,8 @@ entry:
loop:
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
%red = phi float [ 0.0, %entry ], [ %red.next, %loop ]
- %gep = getelementptr float, float* %ptr, i64 %iv
- %lv = load float, float* %gep
+ %gep = getelementptr float, ptr %ptr, i64 %iv
+ %lv = load float, ptr %gep
%red.next = fadd float %lv, %red
%iv.next = add nuw i64 %iv, 1
%cond = icmp ult i64 %iv.next, %bound
@@ -42,7 +42,7 @@ exit: ; preds = %bb135
}
; No explicit ashr, but a chain of operations that can be replaced by ashr.
-define float @ashr_equivalent_expansion(i64 %x, float* %ptr) {
+define float @ashr_equivalent_expansion(i64 %x, ptr %ptr) {
; CHECK-LABEL: @ashr_equivalent_expansion(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ABS_X:%.*]] = call i64 @llvm.abs.i64(i64 [[X:%.*]], i1 false)
@@ -55,8 +55,8 @@ define float @ashr_equivalent_expansion(i64 %x, float* %ptr) {
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[RED:%.*]] = phi float [ 0.000000e+00, [[ENTRY]] ], [ [[RED_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr float, float* [[PTR:%.*]], i64 [[IV]]
-; CHECK-NEXT: [[LV:%.*]] = load float, float* [[GEP]], align 4
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr float, ptr [[PTR:%.*]], i64 [[IV]]
+; CHECK-NEXT: [[LV:%.*]] = load float, ptr [[GEP]], align 4
; CHECK-NEXT: [[RED_NEXT]] = fadd float [[LV]], [[RED]]
; CHECK-NEXT: [[IV_NEXT]] = add nuw i64 [[IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[IV_NEXT]], [[UMAX]]
@@ -76,8 +76,8 @@ entry:
loop:
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
%red = phi float [ 0.0, %entry ], [ %red.next, %loop ]
- %gep = getelementptr float, float* %ptr, i64 %iv
- %lv = load float, float* %gep
+ %gep = getelementptr float, ptr %ptr, i64 %iv
+ %lv = load float, ptr %gep
%red.next = fadd float %lv, %red
%iv.next = add nuw i64 %iv, 1
%cond = icmp ult i64 %iv.next, %bound
@@ -90,7 +90,7 @@ exit: ; preds = %bb135
; Chain of operations that *cannot* be replaced by ashr, because the udiv is
; missing exact.
-define float @no_ashr_due_to_missing_exact_udiv(i64 %x, float* %ptr) {
+define float @no_ashr_due_to_missing_exact_udiv(i64 %x, ptr %ptr) {
; CHECK-LABEL: @no_ashr_due_to_missing_exact_udiv(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ABS_X:%.*]] = call i64 @llvm.abs.i64(i64 [[X:%.*]], i1 false)
@@ -103,8 +103,8 @@ define float @no_ashr_due_to_missing_exact_udiv(i64 %x, float* %ptr) {
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[RED:%.*]] = phi float [ 0.000000e+00, [[ENTRY]] ], [ [[RED_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr float, float* [[PTR:%.*]], i64 [[IV]]
-; CHECK-NEXT: [[LV:%.*]] = load float, float* [[GEP]], align 4
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr float, ptr [[PTR:%.*]], i64 [[IV]]
+; CHECK-NEXT: [[LV:%.*]] = load float, ptr [[GEP]], align 4
; CHECK-NEXT: [[RED_NEXT]] = fadd float [[LV]], [[RED]]
; CHECK-NEXT: [[IV_NEXT]] = add nuw i64 [[IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[IV_NEXT]], [[UMAX]]
@@ -124,8 +124,8 @@ entry:
loop:
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
%red = phi float [ 0.0, %entry ], [ %red.next, %loop ]
- %gep = getelementptr float, float* %ptr, i64 %iv
- %lv = load float, float* %gep
+ %gep = getelementptr float, ptr %ptr, i64 %iv
+ %lv = load float, ptr %gep
%red.next = fadd float %lv, %red
%iv.next = add nuw i64 %iv, 1
%cond = icmp ult i64 %iv.next, %bound
@@ -138,7 +138,7 @@ exit: ; preds = %bb135
; Chain of operations that *cannot* be replaced by ashr, because abs and
; signum have
diff erent operands.
-define float @no_ashr_due_to_
diff erent_ops(i64 %x, i64 %y, float* %ptr) {
+define float @no_ashr_due_to_
diff erent_ops(i64 %x, i64 %y, ptr %ptr) {
; CHECK-LABEL: @no_ashr_due_to_
diff erent_ops(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ABS_X:%.*]] = call i64 @llvm.abs.i64(i64 [[X:%.*]], i1 false)
@@ -151,8 +151,8 @@ define float @no_ashr_due_to_
diff erent_ops(i64 %x, i64 %y, float* %ptr) {
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[RED:%.*]] = phi float [ 0.000000e+00, [[ENTRY]] ], [ [[RED_NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr float, float* [[PTR:%.*]], i64 [[IV]]
-; CHECK-NEXT: [[LV:%.*]] = load float, float* [[GEP]], align 4
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr float, ptr [[PTR:%.*]], i64 [[IV]]
+; CHECK-NEXT: [[LV:%.*]] = load float, ptr [[GEP]], align 4
; CHECK-NEXT: [[RED_NEXT]] = fadd float [[LV]], [[RED]]
; CHECK-NEXT: [[IV_NEXT]] = add nuw i64 [[IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[IV_NEXT]], [[UMAX]]
@@ -172,8 +172,8 @@ entry:
loop:
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
%red = phi float [ 0.0, %entry ], [ %red.next, %loop ]
- %gep = getelementptr float, float* %ptr, i64 %iv
- %lv = load float, float* %gep
+ %gep = getelementptr float, ptr %ptr, i64 %iv
+ %lv = load float, ptr %gep
%red.next = fadd float %lv, %red
%iv.next = add nuw i64 %iv, 1
%cond = icmp ult i64 %iv.next, %bound
diff --git a/llvm/test/Transforms/IndVarSimplify/casted-argument.ll b/llvm/test/Transforms/IndVarSimplify/casted-argument.ll
index 2db53f388211c..b19e505d5724d 100644
--- a/llvm/test/Transforms/IndVarSimplify/casted-argument.ll
+++ b/llvm/test/Transforms/IndVarSimplify/casted-argument.ll
@@ -5,24 +5,24 @@
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i386-pc-linux-gnu"
-define void @safe_bcopy(i8* %to) nounwind {
+define void @safe_bcopy(ptr %to) nounwind {
entry:
- %cmp11 = icmp ult i8* %to, null ; <i1> [#uses=1]
+ %cmp11 = icmp ult ptr %to, null ; <i1> [#uses=1]
br i1 %cmp11, label %loop, label %return
return: ; preds = %entry
ret void
loop: ; preds = %loop, %if.else
- %pn = phi i8* [ %ge, %loop ], [ null, %entry ] ; <i8*> [#uses=1]
- %cp = ptrtoint i8* %to to i32 ; <i32> [#uses=1]
+ %pn = phi ptr [ %ge, %loop ], [ null, %entry ] ; <ptr> [#uses=1]
+ %cp = ptrtoint ptr %to to i32 ; <i32> [#uses=1]
%su = sub i32 0, %cp ; <i32> [#uses=1]
- %ge = getelementptr i8, i8* %pn, i32 %su ; <i8*> [#uses=2]
- tail call void @bcopy(i8* %ge) nounwind
+ %ge = getelementptr i8, ptr %pn, i32 %su ; <ptr> [#uses=2]
+ tail call void @bcopy(ptr %ge) nounwind
br label %loop
}
-define void @safe_bcopy_4038(i8* %from, i8* %to, i32 %size) nounwind {
+define void @safe_bcopy_4038(ptr %from, ptr %to, i32 %size) nounwind {
entry:
br i1 false, label %if.else, label %if.then12
@@ -30,21 +30,21 @@ if.then12: ; preds = %entry
ret void
if.else: ; preds = %entry
- %sub.ptr.rhs.cast40 = ptrtoint i8* %from to i32 ; <i32> [#uses=1]
+ %sub.ptr.rhs.cast40 = ptrtoint ptr %from to i32 ; <i32> [#uses=1]
br label %if.end54
if.end54: ; preds = %if.end54, %if.else
- %sub.ptr4912.pn = phi i8* [ %sub.ptr4912, %if.end54 ], [ null, %if.else ] ; <i8*> [#uses=1]
- %sub.ptr7 = phi i8* [ %sub.ptr, %if.end54 ], [ null, %if.else ] ; <i8*> [#uses=2]
- %sub.ptr.rhs.cast46.pn = ptrtoint i8* %from to i32 ; <i32> [#uses=1]
- %sub.ptr.lhs.cast45.pn = ptrtoint i8* %to to i32 ; <i32> [#uses=1]
+ %sub.ptr4912.pn = phi ptr [ %sub.ptr4912, %if.end54 ], [ null, %if.else ] ; <ptr> [#uses=1]
+ %sub.ptr7 = phi ptr [ %sub.ptr, %if.end54 ], [ null, %if.else ] ; <ptr> [#uses=2]
+ %sub.ptr.rhs.cast46.pn = ptrtoint ptr %from to i32 ; <i32> [#uses=1]
+ %sub.ptr.lhs.cast45.pn = ptrtoint ptr %to to i32 ; <i32> [#uses=1]
%sub.ptr.sub47.pn = sub i32 %sub.ptr.rhs.cast46.pn, %sub.ptr.lhs.cast45.pn ; <i32> [#uses=1]
- %sub.ptr4912 = getelementptr i8, i8* %sub.ptr4912.pn, i32 %sub.ptr.sub47.pn ; <i8*> [#uses=2]
- tail call void @bcopy_4038(i8* %sub.ptr4912, i8* %sub.ptr7, i32 0) nounwind
- %sub.ptr = getelementptr i8, i8* %sub.ptr7, i32 %sub.ptr.rhs.cast40 ; <i8*> [#uses=1]
+ %sub.ptr4912 = getelementptr i8, ptr %sub.ptr4912.pn, i32 %sub.ptr.sub47.pn ; <ptr> [#uses=2]
+ tail call void @bcopy_4038(ptr %sub.ptr4912, ptr %sub.ptr7, i32 0) nounwind
+ %sub.ptr = getelementptr i8, ptr %sub.ptr7, i32 %sub.ptr.rhs.cast40 ; <ptr> [#uses=1]
br label %if.end54
}
-declare void @bcopy(i8* nocapture) nounwind
+declare void @bcopy(ptr nocapture) nounwind
-declare void @bcopy_4038(i8*, i8*, i32) nounwind
+declare void @bcopy_4038(ptr, ptr, i32) nounwind
diff --git a/llvm/test/Transforms/IndVarSimplify/cycled_phis.ll b/llvm/test/Transforms/IndVarSimplify/cycled_phis.ll
index 809ec68d483f8..d8f5b0c3af9d8 100644
--- a/llvm/test/Transforms/IndVarSimplify/cycled_phis.ll
+++ b/llvm/test/Transforms/IndVarSimplify/cycled_phis.ll
@@ -7,10 +7,10 @@ declare i32 @switch.cond()
declare i32 @llvm.smax.i32(i32 %a, i32 %b)
; Unsigned comparison here is redundant and can be safely deleted.
-define i32 @trivial.case(i32* %len.ptr) {
+define i32 @trivial.case(ptr %len.ptr) {
; CHECK-LABEL: @trivial.case(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], align 4, !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[LEN_PTR:%.*]], align 4, !range [[RNG0:![0-9]+]]
; CHECK-NEXT: br label [[PREHEADER:%.*]]
; CHECK: preheader:
; CHECK-NEXT: br label [[LOOP:%.*]]
@@ -35,7 +35,7 @@ define i32 @trivial.case(i32* %len.ptr) {
; CHECK-NEXT: ret i32 [[IV_LCSSA2]]
;
entry:
- %len = load i32, i32* %len.ptr, !range !0
+ %len = load i32, ptr %len.ptr, !range !0
br label %preheader
preheader:
@@ -70,10 +70,10 @@ done:
; TODO: The 2nd check can be made invariant.
; slt and ult checks are equivalent. When IV is negative, slt check will pass and ult will
; fail. Because IV is incrementing, this will fail on 1st iteration or never.
-define i32 @unknown.start(i32 %start, i32* %len.ptr) {
+define i32 @unknown.start(i32 %start, ptr %len.ptr) {
; CHECK-LABEL: @unknown.start(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
; CHECK-NEXT: br label [[PREHEADER:%.*]]
; CHECK: preheader:
; CHECK-NEXT: br label [[LOOP:%.*]]
@@ -99,7 +99,7 @@ define i32 @unknown.start(i32 %start, i32* %len.ptr) {
; CHECK-NEXT: ret i32 [[IV_LCSSA2]]
;
entry:
- %len = load i32, i32* %len.ptr, !range !0
+ %len = load i32, ptr %len.ptr, !range !0
br label %preheader
preheader:
@@ -136,11 +136,11 @@ done:
; - %sibling.iv.next is non-negative;
; - therefore, %iv is non-negative;
; - therefore, unsigned check can be removed.
-define i32 @start.from.sibling.iv(i32* %len.ptr, i32* %sibling.len.ptr) {
+define i32 @start.from.sibling.iv(ptr %len.ptr, ptr %sibling.len.ptr) {
; CHECK-LABEL: @start.from.sibling.iv(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
-; CHECK-NEXT: [[SIBLING_LEN:%.*]] = load i32, i32* [[SIBLING_LEN_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[SIBLING_LEN:%.*]] = load i32, ptr [[SIBLING_LEN_PTR:%.*]], align 4, !range [[RNG0]]
; CHECK-NEXT: br label [[SIBLING_LOOP:%.*]]
; CHECK: sibling.loop:
; CHECK-NEXT: [[SIBLING_IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[SIBLING_IV_NEXT:%.*]], [[SIBLING_BACKEDGE:%.*]] ]
@@ -178,8 +178,8 @@ define i32 @start.from.sibling.iv(i32* %len.ptr, i32* %sibling.len.ptr) {
; CHECK-NEXT: ret i32 [[IV_LCSSA2]]
;
entry:
- %len = load i32, i32* %len.ptr, !range !0
- %sibling.len = load i32, i32* %sibling.len.ptr, !range !0
+ %len = load i32, ptr %len.ptr, !range !0
+ %sibling.len = load i32, ptr %sibling.len.ptr, !range !0
br label %sibling.loop
sibling.loop:
@@ -226,11 +226,11 @@ done:
}
; Same as above, but the sibling loop is now wide. We can eliminate the unsigned comparison here.
-define i32 @start.from.sibling.iv.wide(i32* %len.ptr, i32* %sibling.len.ptr) {
+define i32 @start.from.sibling.iv.wide(ptr %len.ptr, ptr %sibling.len.ptr) {
; CHECK-LABEL: @start.from.sibling.iv.wide(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
-; CHECK-NEXT: [[SIBLING_LEN:%.*]] = load i32, i32* [[SIBLING_LEN_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[SIBLING_LEN:%.*]] = load i32, ptr [[SIBLING_LEN_PTR:%.*]], align 4, !range [[RNG0]]
; CHECK-NEXT: [[SIBLING_LEN_WIDE:%.*]] = zext i32 [[SIBLING_LEN]] to i64
; CHECK-NEXT: br label [[SIBLING_LOOP:%.*]]
; CHECK: sibling.loop:
@@ -269,8 +269,8 @@ define i32 @start.from.sibling.iv.wide(i32* %len.ptr, i32* %sibling.len.ptr) {
; CHECK-NEXT: ret i32 [[IV_LCSSA2]]
;
entry:
- %len = load i32, i32* %len.ptr, !range !0
- %sibling.len = load i32, i32* %sibling.len.ptr, !range !0
+ %len = load i32, ptr %len.ptr, !range !0
+ %sibling.len = load i32, ptr %sibling.len.ptr, !range !0
%sibling.len.wide = zext i32 %sibling.len to i64
br label %sibling.loop
@@ -322,11 +322,11 @@ done:
; TODO: remove unsigned comparison by proving non-negativity of iv.start.
; TODO: When we check against IV_START, for some reason we then cannot infer nuw for IV.next.
; It was possible while checking against IV. Missing inference logic somewhere.
-define i32 @start.from.sibling.iv.wide.cycled.phis(i32* %len.ptr, i32* %sibling.len.ptr) {
+define i32 @start.from.sibling.iv.wide.cycled.phis(ptr %len.ptr, ptr %sibling.len.ptr) {
; CHECK-LABEL: @start.from.sibling.iv.wide.cycled.phis(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
-; CHECK-NEXT: [[SIBLING_LEN:%.*]] = load i32, i32* [[SIBLING_LEN_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[SIBLING_LEN:%.*]] = load i32, ptr [[SIBLING_LEN_PTR:%.*]], align 4, !range [[RNG0]]
; CHECK-NEXT: [[SIBLING_LEN_WIDE:%.*]] = zext i32 [[SIBLING_LEN]] to i64
; CHECK-NEXT: br label [[SIBLING_LOOP:%.*]]
; CHECK: sibling.loop:
@@ -376,8 +376,8 @@ define i32 @start.from.sibling.iv.wide.cycled.phis(i32* %len.ptr, i32* %sibling.
; CHECK-NEXT: ret i32 [[IV_LCSSA2_LCSSA]]
;
entry:
- %len = load i32, i32* %len.ptr, !range !0
- %sibling.len = load i32, i32* %sibling.len.ptr, !range !0
+ %len = load i32, ptr %len.ptr, !range !0
+ %sibling.len = load i32, ptr %sibling.len.ptr, !range !0
%sibling.len.wide = zext i32 %sibling.len to i64
br label %sibling.loop
@@ -440,11 +440,11 @@ done:
; Even more complex version of previous one (more sophisticated cycled phis).
; TODO: remove unsigned comparison by proving non-negativity of iv.start.
-define i32 @start.from.sibling.iv.wide.cycled.phis.complex.phis(i32* %len.ptr, i32* %sibling.len.ptr, i32 %some.random.value) {
+define i32 @start.from.sibling.iv.wide.cycled.phis.complex.phis(ptr %len.ptr, ptr %sibling.len.ptr, i32 %some.random.value) {
; CHECK-LABEL: @start.from.sibling.iv.wide.cycled.phis.complex.phis(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
-; CHECK-NEXT: [[SIBLING_LEN:%.*]] = load i32, i32* [[SIBLING_LEN_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[SIBLING_LEN:%.*]] = load i32, ptr [[SIBLING_LEN_PTR:%.*]], align 4, !range [[RNG0]]
; CHECK-NEXT: [[SIBLING_LEN_WIDE:%.*]] = zext i32 [[SIBLING_LEN]] to i64
; CHECK-NEXT: br label [[SIBLING_LOOP:%.*]]
; CHECK: sibling.loop:
@@ -508,8 +508,8 @@ define i32 @start.from.sibling.iv.wide.cycled.phis.complex.phis(i32* %len.ptr, i
; CHECK-NEXT: ret i32 [[IV_LCSSA2_LCSSA]]
;
entry:
- %len = load i32, i32* %len.ptr, !range !0
- %sibling.len = load i32, i32* %sibling.len.ptr, !range !0
+ %len = load i32, ptr %len.ptr, !range !0
+ %sibling.len = load i32, ptr %sibling.len.ptr, !range !0
%sibling.len.wide = zext i32 %sibling.len to i64
br label %sibling.loop
diff --git a/llvm/test/Transforms/IndVarSimplify/eliminate-comparison.ll b/llvm/test/Transforms/IndVarSimplify/eliminate-comparison.ll
index 1e99c387a6877..f0690f89f85d2 100644
--- a/llvm/test/Transforms/IndVarSimplify/eliminate-comparison.ll
+++ b/llvm/test/Transforms/IndVarSimplify/eliminate-comparison.ll
@@ -8,13 +8,13 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; Indvars should be able to simplify simple comparisons involving
; induction variables.
-define void @foo(i64 %n, i32* nocapture %p) nounwind {
+define void @foo(i64 %n, ptr nocapture %p) nounwind {
; CHECK-LABEL: @foo(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP9:%.*]] = icmp sgt i64 [[N:%.*]], 0
; CHECK-NEXT: br i1 [[CMP9]], label [[PRE:%.*]], label [[RETURN:%.*]]
; CHECK: pre:
-; CHECK-NEXT: [[T3:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[T3:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp ne i32 [[T3]], 0
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
@@ -22,8 +22,8 @@ define void @foo(i64 %n, i32* nocapture %p) nounwind {
; CHECK-NEXT: [[COND:%.*]] = and i1 [[TOBOOL_NOT]], true
; CHECK-NEXT: br i1 [[COND]], label [[IF_THEN:%.*]], label [[FOR_INC]]
; CHECK: if.then:
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr [0 x double], [0 x double]* @X, i64 0, i64 [[I]]
-; CHECK-NEXT: store double 3.200000e+00, double* [[ARRAYIDX]], align 8
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr [0 x double], ptr @X, i64 0, i64 [[I]]
+; CHECK-NEXT: store double 3.200000e+00, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: br label [[FOR_INC]]
; CHECK: for.inc:
; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I]], 1
@@ -39,7 +39,7 @@ entry:
br i1 %cmp9, label %pre, label %return
pre:
- %t3 = load i32, i32* %p
+ %t3 = load i32, ptr %p
%tobool.not = icmp ne i32 %t3, 0
br label %loop
@@ -50,8 +50,8 @@ loop:
br i1 %cond, label %if.then, label %for.inc
if.then:
- %arrayidx = getelementptr [0 x double], [0 x double]* @X, i64 0, i64 %i
- store double 3.200000e+00, double* %arrayidx
+ %arrayidx = getelementptr [0 x double], ptr @X, i64 0, i64 %i
+ store double 3.200000e+00, ptr %arrayidx
br label %for.inc
for.inc:
@@ -65,26 +65,26 @@ return:
; Don't eliminate an icmp that's contributing to the loop exit test though.
-define i32 @_ZNK4llvm5APInt3ultERKS0_(i32 %tmp2.i1, i64** %tmp65, i64** %tmp73, i64** %tmp82, i64** %tmp90) {
+define i32 @_ZNK4llvm5APInt3ultERKS0_(i32 %tmp2.i1, ptr %tmp65, ptr %tmp73, ptr %tmp82, ptr %tmp90) {
; CHECK-LABEL: @_ZNK4llvm5APInt3ultERKS0_(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[BB18:%.*]]
; CHECK: bb13:
-; CHECK-NEXT: [[TMP66:%.*]] = load i64*, i64** [[TMP65:%.*]], align 4
-; CHECK-NEXT: [[TMP68:%.*]] = getelementptr inbounds i64, i64* [[TMP66]], i32 [[I:%.*]]
-; CHECK-NEXT: [[TMP69:%.*]] = load i64, i64* [[TMP68]], align 4
-; CHECK-NEXT: [[TMP74:%.*]] = load i64*, i64** [[TMP73:%.*]], align 4
-; CHECK-NEXT: [[TMP76:%.*]] = getelementptr inbounds i64, i64* [[TMP74]], i32 [[I]]
-; CHECK-NEXT: [[TMP77:%.*]] = load i64, i64* [[TMP76]], align 4
+; CHECK-NEXT: [[TMP66:%.*]] = load ptr, ptr [[TMP65:%.*]], align 4
+; CHECK-NEXT: [[TMP68:%.*]] = getelementptr inbounds i64, ptr [[TMP66]], i32 [[I:%.*]]
+; CHECK-NEXT: [[TMP69:%.*]] = load i64, ptr [[TMP68]], align 4
+; CHECK-NEXT: [[TMP74:%.*]] = load ptr, ptr [[TMP73:%.*]], align 4
+; CHECK-NEXT: [[TMP76:%.*]] = getelementptr inbounds i64, ptr [[TMP74]], i32 [[I]]
+; CHECK-NEXT: [[TMP77:%.*]] = load i64, ptr [[TMP76]], align 4
; CHECK-NEXT: [[TMP78:%.*]] = icmp ugt i64 [[TMP69]], [[TMP77]]
; CHECK-NEXT: br i1 [[TMP78]], label [[BB20_LOOPEXIT:%.*]], label [[BB15:%.*]]
; CHECK: bb15:
-; CHECK-NEXT: [[TMP83:%.*]] = load i64*, i64** [[TMP82:%.*]], align 4
-; CHECK-NEXT: [[TMP85:%.*]] = getelementptr inbounds i64, i64* [[TMP83]], i32 [[I]]
-; CHECK-NEXT: [[TMP86:%.*]] = load i64, i64* [[TMP85]], align 4
-; CHECK-NEXT: [[TMP91:%.*]] = load i64*, i64** [[TMP90:%.*]], align 4
-; CHECK-NEXT: [[TMP93:%.*]] = getelementptr inbounds i64, i64* [[TMP91]], i32 [[I]]
-; CHECK-NEXT: [[TMP94:%.*]] = load i64, i64* [[TMP93]], align 4
+; CHECK-NEXT: [[TMP83:%.*]] = load ptr, ptr [[TMP82:%.*]], align 4
+; CHECK-NEXT: [[TMP85:%.*]] = getelementptr inbounds i64, ptr [[TMP83]], i32 [[I]]
+; CHECK-NEXT: [[TMP86:%.*]] = load i64, ptr [[TMP85]], align 4
+; CHECK-NEXT: [[TMP91:%.*]] = load ptr, ptr [[TMP90:%.*]], align 4
+; CHECK-NEXT: [[TMP93:%.*]] = getelementptr inbounds i64, ptr [[TMP91]], i32 [[I]]
+; CHECK-NEXT: [[TMP94:%.*]] = load i64, ptr [[TMP93]], align 4
; CHECK-NEXT: [[TMP95:%.*]] = icmp ult i64 [[TMP86]], [[TMP94]]
; CHECK-NEXT: br i1 [[TMP95]], label [[BB20_LOOPEXIT]], label [[BB17:%.*]]
; CHECK: bb17:
@@ -102,22 +102,22 @@ entry:
br label %bb18
bb13:
- %tmp66 = load i64*, i64** %tmp65, align 4
- %tmp68 = getelementptr inbounds i64, i64* %tmp66, i32 %i
- %tmp69 = load i64, i64* %tmp68, align 4
- %tmp74 = load i64*, i64** %tmp73, align 4
- %tmp76 = getelementptr inbounds i64, i64* %tmp74, i32 %i
- %tmp77 = load i64, i64* %tmp76, align 4
+ %tmp66 = load ptr, ptr %tmp65, align 4
+ %tmp68 = getelementptr inbounds i64, ptr %tmp66, i32 %i
+ %tmp69 = load i64, ptr %tmp68, align 4
+ %tmp74 = load ptr, ptr %tmp73, align 4
+ %tmp76 = getelementptr inbounds i64, ptr %tmp74, i32 %i
+ %tmp77 = load i64, ptr %tmp76, align 4
%tmp78 = icmp ugt i64 %tmp69, %tmp77
br i1 %tmp78, label %bb20.loopexit, label %bb15
bb15:
- %tmp83 = load i64*, i64** %tmp82, align 4
- %tmp85 = getelementptr inbounds i64, i64* %tmp83, i32 %i
- %tmp86 = load i64, i64* %tmp85, align 4
- %tmp91 = load i64*, i64** %tmp90, align 4
- %tmp93 = getelementptr inbounds i64, i64* %tmp91, i32 %i
- %tmp94 = load i64, i64* %tmp93, align 4
+ %tmp83 = load ptr, ptr %tmp82, align 4
+ %tmp85 = getelementptr inbounds i64, ptr %tmp83, i32 %i
+ %tmp86 = load i64, ptr %tmp85, align 4
+ %tmp91 = load ptr, ptr %tmp90, align 4
+ %tmp93 = getelementptr inbounds i64, ptr %tmp91, i32 %i
+ %tmp94 = load i64, ptr %tmp93, align 4
%tmp95 = icmp ult i64 %tmp86, %tmp94
br i1 %tmp95, label %bb20.loopexit, label %bb17
@@ -143,7 +143,7 @@ define void @func_10() nounwind {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: store i64 0, i64* null, align 8
+; CHECK-NEXT: store i64 0, ptr null, align 8
; CHECK-NEXT: br i1 false, label [[LOOP]], label [[RETURN:%.*]]
; CHECK: return:
; CHECK-NEXT: ret void
@@ -157,7 +157,7 @@ loop:
%t1 = zext i1 %t0 to i32
%t2 = add i32 %t1, %i
%u3 = zext i32 %t2 to i64
- store i64 %u3, i64* null
+ store i64 %u3, ptr null
%i.next = add i32 %i, 1
br i1 undef, label %loop, label %return
@@ -375,10 +375,10 @@ unrolledend: ; preds = %forcond38
declare void @side_effect()
-define void @func_13(i32* %len.ptr) {
+define void @func_13(ptr %len.ptr) {
; CHECK-LABEL: @func_13(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], align 4, !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[LEN_PTR:%.*]], align 4, !range [[RNG0:![0-9]+]]
; CHECK-NEXT: [[LEN_IS_ZERO:%.*]] = icmp eq i32 [[LEN]], 0
; CHECK-NEXT: br i1 [[LEN_IS_ZERO]], label [[LEAVE:%.*]], label [[LOOP_PREHEADER:%.*]]
; CHECK: loop.preheader:
@@ -398,7 +398,7 @@ define void @func_13(i32* %len.ptr) {
; CHECK-NEXT: ret void
;
entry:
- %len = load i32, i32* %len.ptr, !range !0
+ %len = load i32, ptr %len.ptr, !range !0
%len.sub.1 = add i32 %len, -1
%len.is.zero = icmp eq i32 %len, 0
br i1 %len.is.zero, label %leave, label %loop
@@ -419,10 +419,10 @@ leave:
ret void
}
-define void @func_14(i32* %len.ptr) {
+define void @func_14(ptr %len.ptr) {
; CHECK-LABEL: @func_14(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
; CHECK-NEXT: [[LEN_IS_ZERO:%.*]] = icmp eq i32 [[LEN]], 0
; CHECK-NEXT: [[LEN_IS_INT_MIN:%.*]] = icmp eq i32 [[LEN]], -2147483648
; CHECK-NEXT: [[NO_ENTRY:%.*]] = or i1 [[LEN_IS_ZERO]], [[LEN_IS_INT_MIN]]
@@ -444,7 +444,7 @@ define void @func_14(i32* %len.ptr) {
; CHECK-NEXT: ret void
;
entry:
- %len = load i32, i32* %len.ptr, !range !0
+ %len = load i32, ptr %len.ptr, !range !0
%len.sub.1 = add i32 %len, -1
%len.is.zero = icmp eq i32 %len, 0
%len.is.int_min = icmp eq i32 %len, 2147483648
@@ -467,10 +467,10 @@ leave:
ret void
}
-define void @func_15(i32* %len.ptr) {
+define void @func_15(ptr %len.ptr) {
; CHECK-LABEL: @func_15(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
; CHECK-NEXT: [[LEN_ADD_1:%.*]] = add i32 [[LEN]], 1
; CHECK-NEXT: [[LEN_ADD_1_IS_ZERO:%.*]] = icmp eq i32 [[LEN_ADD_1]], 0
; CHECK-NEXT: br i1 [[LEN_ADD_1_IS_ZERO]], label [[LEAVE:%.*]], label [[LOOP_PREHEADER:%.*]]
@@ -491,7 +491,7 @@ define void @func_15(i32* %len.ptr) {
; CHECK-NEXT: ret void
;
entry:
- %len = load i32, i32* %len.ptr, !range !0
+ %len = load i32, ptr %len.ptr, !range !0
%len.add.1 = add i32 %len, 1
%len.add.1.is.zero = icmp eq i32 %len.add.1, 0
br i1 %len.add.1.is.zero, label %leave, label %loop
@@ -512,10 +512,10 @@ leave:
ret void
}
-define void @func_16(i32* %len.ptr) {
+define void @func_16(ptr %len.ptr) {
; CHECK-LABEL: @func_16(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[LEN_PTR:%.*]], align 4, !range [[RNG0]]
; CHECK-NEXT: [[LEN_ADD_5:%.*]] = add i32 [[LEN]], 5
; CHECK-NEXT: [[ENTRY_COND_0:%.*]] = icmp slt i32 [[LEN]], 2147483643
; CHECK-NEXT: [[ENTRY_COND_1:%.*]] = icmp slt i32 4, [[LEN_ADD_5]]
@@ -539,7 +539,7 @@ define void @func_16(i32* %len.ptr) {
; CHECK-NEXT: ret void
;
entry:
- %len = load i32, i32* %len.ptr, !range !0
+ %len = load i32, ptr %len.ptr, !range !0
%len.add.5 = add i32 %len, 5
%entry.cond.0 = icmp slt i32 %len, 2147483643
%entry.cond.1 = icmp slt i32 4, %len.add.5
@@ -563,10 +563,10 @@ leave:
ret void
}
-define void @func_17(i32* %len.ptr) {
+define void @func_17(ptr %len.ptr) {
; CHECK-LABEL: @func_17(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_PTR:%.*]], align 4
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[LEN_PTR:%.*]], align 4
; CHECK-NEXT: [[LEN_ADD_5:%.*]] = add i32 [[LEN]], -5
; CHECK-NEXT: [[ENTRY_COND_0:%.*]] = icmp slt i32 [[LEN]], -2147483643
; CHECK-NEXT: [[ENTRY_COND_1:%.*]] = icmp slt i32 -6, [[LEN_ADD_5]]
@@ -591,7 +591,7 @@ define void @func_17(i32* %len.ptr) {
; CHECK-NEXT: ret void
;
entry:
- %len = load i32, i32* %len.ptr
+ %len = load i32, ptr %len.ptr
%len.add.5 = add i32 %len, -5
%entry.cond.0 = icmp slt i32 %len, 2147483653 ;; 2147483653 == INT_MIN - (-5)
%entry.cond.1 = icmp slt i32 -6, %len.add.5
@@ -619,10 +619,10 @@ leave:
ret void
}
-define i1 @func_18(i16* %tmp20, i32* %len.addr) {
+define i1 @func_18(ptr %tmp20, ptr %len.addr) {
; CHECK-LABEL: @func_18(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[LEN_ADDR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[LEN_ADDR:%.*]], align 4, !range [[RNG0]]
; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i32 [[LEN]], 0
; CHECK-NEXT: br i1 [[TMP18]], label [[BB2:%.*]], label [[BB0_PREHEADER:%.*]]
; CHECK: bb0.preheader:
@@ -633,8 +633,8 @@ define i1 @func_18(i16* %tmp20, i32* %len.addr) {
; CHECK-NEXT: [[VAR_0]] = add nsw i32 [[VAR_0_IN]], -1
; CHECK-NEXT: br i1 true, label [[STAY:%.*]], label [[BB2_LOOPEXIT:%.*]]
; CHECK: stay:
-; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i16, i16* [[TMP20:%.*]], i32 [[VAR_1]]
-; CHECK-NEXT: [[TMP26:%.*]] = load i16, i16* [[TMP25]], align 2
+; CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds i16, ptr [[TMP20:%.*]], i32 [[VAR_1]]
+; CHECK-NEXT: [[TMP26:%.*]] = load i16, ptr [[TMP25]], align 2
; CHECK-NEXT: [[TMP29:%.*]] = icmp eq i16 [[TMP26]], 0
; CHECK-NEXT: br i1 [[TMP29]], label [[BB1]], label [[BB2_LOOPEXIT]]
; CHECK: bb1:
@@ -649,7 +649,7 @@ define i1 @func_18(i16* %tmp20, i32* %len.addr) {
; CHECK-NEXT: ret i1 true
;
entry:
- %len = load i32, i32* %len.addr, !range !0
+ %len = load i32, ptr %len.addr, !range !0
%tmp18 = icmp eq i32 %len, 0
br i1 %tmp18, label %bb2, label %bb0.preheader
@@ -664,8 +664,8 @@ bb0:
br i1 %tmp23, label %stay, label %bb2
stay:
- %tmp25 = getelementptr inbounds i16, i16* %tmp20, i32 %var_1
- %tmp26 = load i16, i16* %tmp25
+ %tmp25 = getelementptr inbounds i16, ptr %tmp20, i32 %var_1
+ %tmp26 = load i16, ptr %tmp25
%tmp29 = icmp eq i16 %tmp26, 0
br i1 %tmp29, label %bb1, label %bb2
@@ -681,10 +681,10 @@ bb3:
ret i1 true
}
-define void @func_19(i32* %length.ptr) {
+define void @func_19(ptr %length.ptr) {
; CHECK-LABEL: @func_19(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LENGTH:%.*]] = load i32, i32* [[LENGTH_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[LENGTH:%.*]] = load i32, ptr [[LENGTH_PTR:%.*]], align 4, !range [[RNG0]]
; CHECK-NEXT: [[LENGTH_IS_NONZERO:%.*]] = icmp ne i32 [[LENGTH]], 0
; CHECK-NEXT: br i1 [[LENGTH_IS_NONZERO]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]]
; CHECK: loop.preheader:
@@ -703,7 +703,7 @@ define void @func_19(i32* %length.ptr) {
; CHECK-NEXT: ret void
;
entry:
- %length = load i32, i32* %length.ptr, !range !0
+ %length = load i32, ptr %length.ptr, !range !0
%length.is.nonzero = icmp ne i32 %length, 0
br i1 %length.is.nonzero, label %loop, label %leave
@@ -724,10 +724,10 @@ leave:
; Like @func_19, but %length is no longer provably positive, so
; %range.check cannot be proved to be always true.
-define void @func_20(i32* %length.ptr) {
+define void @func_20(ptr %length.ptr) {
; CHECK-LABEL: @func_20(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LENGTH:%.*]] = load i32, i32* [[LENGTH_PTR:%.*]], align 4
+; CHECK-NEXT: [[LENGTH:%.*]] = load i32, ptr [[LENGTH_PTR:%.*]], align 4
; CHECK-NEXT: [[LENGTH_IS_NONZERO:%.*]] = icmp ne i32 [[LENGTH]], 0
; CHECK-NEXT: br i1 [[LENGTH_IS_NONZERO]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]]
; CHECK: loop.preheader:
@@ -748,7 +748,7 @@ define void @func_20(i32* %length.ptr) {
; CHECK-NEXT: ret void
;
entry:
- %length = load i32, i32* %length.ptr
+ %length = load i32, ptr %length.ptr
%length.is.nonzero = icmp ne i32 %length, 0
br i1 %length.is.nonzero, label %loop, label %leave
@@ -769,10 +769,10 @@ leave:
; This checks that the backedge condition, (I + 1) < Length - 1 implies
; (I + 1) < Length
-define void @func_21(i32* %length.ptr) {
+define void @func_21(ptr %length.ptr) {
; CHECK-LABEL: @func_21(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LENGTH:%.*]] = load i32, i32* [[LENGTH_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[LENGTH:%.*]] = load i32, ptr [[LENGTH_PTR:%.*]], align 4, !range [[RNG0]]
; CHECK-NEXT: [[LIM:%.*]] = sub i32 [[LENGTH]], 1
; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp sgt i32 [[LENGTH]], 1
; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]]
@@ -792,7 +792,7 @@ define void @func_21(i32* %length.ptr) {
; CHECK-NEXT: ret void
;
entry:
- %length = load i32, i32* %length.ptr, !range !0
+ %length = load i32, ptr %length.ptr, !range !0
%lim = sub i32 %length, 1
%entry.cond = icmp sgt i32 %length, 1
br i1 %entry.cond, label %loop, label %leave
@@ -814,10 +814,10 @@ leave:
; This checks that the backedge condition, (I + 1) < Length - 1 implies
; (I + 1) < Length
-define void @func_22(i32* %length.ptr) {
+define void @func_22(ptr %length.ptr) {
; CHECK-LABEL: @func_22(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LENGTH:%.*]] = load i32, i32* [[LENGTH_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[LENGTH:%.*]] = load i32, ptr [[LENGTH_PTR:%.*]], align 4, !range [[RNG0]]
; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp sgt i32 [[LENGTH]], 1
; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]]
; CHECK: loop.preheader:
@@ -836,7 +836,7 @@ define void @func_22(i32* %length.ptr) {
; CHECK-NEXT: ret void
;
entry:
- %length = load i32, i32* %length.ptr, !range !0
+ %length = load i32, ptr %length.ptr, !range !0
%lim = sub i32 %length, 1
%entry.cond = icmp sgt i32 %length, 1
br i1 %entry.cond, label %loop, label %leave
@@ -856,10 +856,10 @@ leave:
ret void
}
-define void @func_23(i32* %length.ptr) {
+define void @func_23(ptr %length.ptr) {
; CHECK-LABEL: @func_23(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[LENGTH:%.*]] = load i32, i32* [[LENGTH_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[LENGTH:%.*]] = load i32, ptr [[LENGTH_PTR:%.*]], align 4, !range [[RNG0]]
; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp ult i32 4, [[LENGTH]]
; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]]
; CHECK: loop.preheader:
@@ -878,7 +878,7 @@ define void @func_23(i32* %length.ptr) {
; CHECK-NEXT: ret void
;
entry:
- %length = load i32, i32* %length.ptr, !range !0
+ %length = load i32, ptr %length.ptr, !range !0
%entry.cond = icmp ult i32 4, %length
br i1 %entry.cond, label %loop, label %leave
@@ -897,10 +897,10 @@ leave:
ret void
}
-define void @func_24(i32* %init.ptr) {
+define void @func_24(ptr %init.ptr) {
; CHECK-LABEL: @func_24(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[INIT:%.*]] = load i32, i32* [[INIT_PTR:%.*]], align 4, !range [[RNG0]]
+; CHECK-NEXT: [[INIT:%.*]] = load i32, ptr [[INIT_PTR:%.*]], align 4, !range [[RNG0]]
; CHECK-NEXT: [[ENTRY_COND:%.*]] = icmp ugt i32 [[INIT]], 4
; CHECK-NEXT: br i1 [[ENTRY_COND]], label [[LOOP_PREHEADER:%.*]], label [[LEAVE:%.*]]
; CHECK: loop.preheader:
@@ -919,7 +919,7 @@ define void @func_24(i32* %init.ptr) {
; CHECK-NEXT: ret void
;
entry:
- %init = load i32, i32* %init.ptr, !range !0
+ %init = load i32, ptr %init.ptr, !range !0
%entry.cond = icmp ugt i32 %init, 4
br i1 %entry.cond, label %loop, label %leave
diff --git a/llvm/test/Transforms/IndVarSimplify/exit_value_test2.ll b/llvm/test/Transforms/IndVarSimplify/exit_value_test2.ll
index f85c348c4efdc..66c7222ce6d4e 100644
--- a/llvm/test/Transforms/IndVarSimplify/exit_value_test2.ll
+++ b/llvm/test/Transforms/IndVarSimplify/exit_value_test2.ll
@@ -5,33 +5,31 @@
; Check IndVarSimplify should not replace exit value because or else
; udiv will be introduced by expand and the cost will be high.
-declare void @_Z3mixRjj(i32* dereferenceable(4), i32)
-declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
-declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
+declare void @_Z3mixRjj(ptr dereferenceable(4), i32)
+declare void @llvm.lifetime.start.p0(i64, ptr nocapture)
+declare void @llvm.lifetime.end.p0(i64, ptr nocapture)
-define i32 @_Z3fooPKcjj(i8* nocapture readonly %s, i32 %len, i32 %c) {
+define i32 @_Z3fooPKcjj(ptr nocapture readonly %s, i32 %len, i32 %c) {
; CHECK-LABEL: @_Z3fooPKcjj(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
-; CHECK-NEXT: [[T:%.*]] = bitcast i32* [[A]] to i8*
-; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[T]])
-; CHECK-NEXT: store i32 -1640531527, i32* [[A]], align 4
+; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr [[A]])
+; CHECK-NEXT: store i32 -1640531527, ptr [[A]], align 4
; CHECK-NEXT: [[CMP8:%.*]] = icmp ugt i32 [[LEN:%.*]], 11
; CHECK-NEXT: br i1 [[CMP8]], label [[WHILE_BODY_LR_PH:%.*]], label [[WHILE_END:%.*]]
; CHECK: while.body.lr.ph:
; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
; CHECK: while.body:
; CHECK-NEXT: [[KEYLEN_010:%.*]] = phi i32 [ [[LEN]], [[WHILE_BODY_LR_PH]] ], [ [[SUB:%.*]], [[WHILE_BODY]] ]
-; CHECK-NEXT: [[S_ADDR_09:%.*]] = phi i8* [ [[S:%.*]], [[WHILE_BODY_LR_PH]] ], [ [[ADD_PTR:%.*]], [[WHILE_BODY]] ]
-; CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[S_ADDR_09]] to i32*
-; CHECK-NEXT: [[T2:%.*]] = load i32, i32* [[T1]], align 4
+; CHECK-NEXT: [[S_ADDR_09:%.*]] = phi ptr [ [[S:%.*]], [[WHILE_BODY_LR_PH]] ], [ [[ADD_PTR:%.*]], [[WHILE_BODY]] ]
+; CHECK-NEXT: [[T2:%.*]] = load i32, ptr [[S_ADDR_09]], align 4
; CHECK-NEXT: [[SHL_I:%.*]] = shl i32 [[T2]], 1
; CHECK-NEXT: [[AND_I:%.*]] = and i32 [[SHL_I]], 16843008
-; CHECK-NEXT: [[T3:%.*]] = load i32, i32* [[A]], align 4
+; CHECK-NEXT: [[T3:%.*]] = load i32, ptr [[A]], align 4
; CHECK-NEXT: [[SUB_I:%.*]] = add i32 [[T3]], [[T2]]
; CHECK-NEXT: [[ADD:%.*]] = sub i32 [[SUB_I]], [[AND_I]]
-; CHECK-NEXT: store i32 [[ADD]], i32* [[A]], align 4
-; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, i8* [[S_ADDR_09]], i64 12
+; CHECK-NEXT: store i32 [[ADD]], ptr [[A]], align 4
+; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, ptr [[S_ADDR_09]], i64 12
; CHECK-NEXT: [[SUB]] = add i32 [[KEYLEN_010]], -12
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[SUB]], 11
; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_BODY]], label [[WHILE_COND_WHILE_END_CRIT_EDGE:%.*]]
@@ -40,16 +38,15 @@ define i32 @_Z3fooPKcjj(i8* nocapture readonly %s, i32 %len, i32 %c) {
; CHECK-NEXT: br label [[WHILE_END]]
; CHECK: while.end:
; CHECK-NEXT: [[KEYLEN_0_LCSSA:%.*]] = phi i32 [ [[SUB_LCSSA]], [[WHILE_COND_WHILE_END_CRIT_EDGE]] ], [ [[LEN]], [[ENTRY:%.*]] ]
-; CHECK-NEXT: call void @_Z3mixRjj(i32* dereferenceable(4) [[A]], i32 [[KEYLEN_0_LCSSA]])
-; CHECK-NEXT: [[T4:%.*]] = load i32, i32* [[A]], align 4
-; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[T]])
+; CHECK-NEXT: call void @_Z3mixRjj(ptr dereferenceable(4) [[A]], i32 [[KEYLEN_0_LCSSA]])
+; CHECK-NEXT: [[T4:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr [[A]])
; CHECK-NEXT: ret i32 [[T4]]
;
entry:
%a = alloca i32, align 4
- %t = bitcast i32* %a to i8*
- call void @llvm.lifetime.start.p0i8(i64 4, i8* %t)
- store i32 -1640531527, i32* %a, align 4
+ call void @llvm.lifetime.start.p0(i64 4, ptr %a)
+ store i32 -1640531527, ptr %a, align 4
%cmp8 = icmp ugt i32 %len, 11
br i1 %cmp8, label %while.body.lr.ph, label %while.end
@@ -58,16 +55,15 @@ while.body.lr.ph: ; preds = %entry
while.body: ; preds = %while.body, %while.body.lr.ph
%keylen.010 = phi i32 [ %len, %while.body.lr.ph ], [ %sub, %while.body ]
- %s.addr.09 = phi i8* [ %s, %while.body.lr.ph ], [ %add.ptr, %while.body ]
- %t1 = bitcast i8* %s.addr.09 to i32*
- %t2 = load i32, i32* %t1, align 4
+ %s.addr.09 = phi ptr [ %s, %while.body.lr.ph ], [ %add.ptr, %while.body ]
+ %t2 = load i32, ptr %s.addr.09, align 4
%shl.i = shl i32 %t2, 1
%and.i = and i32 %shl.i, 16843008
- %t3 = load i32, i32* %a, align 4
+ %t3 = load i32, ptr %a, align 4
%sub.i = add i32 %t3, %t2
%add = sub i32 %sub.i, %and.i
- store i32 %add, i32* %a, align 4
- %add.ptr = getelementptr inbounds i8, i8* %s.addr.09, i64 12
+ store i32 %add, ptr %a, align 4
+ %add.ptr = getelementptr inbounds i8, ptr %s.addr.09, i64 12
%sub = add i32 %keylen.010, -12
%cmp = icmp ugt i32 %sub, 11
br i1 %cmp, label %while.body, label %while.cond.while.end_crit_edge
@@ -78,18 +74,18 @@ while.cond.while.end_crit_edge: ; preds = %while.body
while.end: ; preds = %while.cond.while.end_crit_edge, %entry
%keylen.0.lcssa = phi i32 [ %sub.lcssa, %while.cond.while.end_crit_edge ], [ %len, %entry ]
- call void @_Z3mixRjj(i32* dereferenceable(4) %a, i32 %keylen.0.lcssa)
- %t4 = load i32, i32* %a, align 4
- call void @llvm.lifetime.end.p0i8(i64 4, i8* %t)
+ call void @_Z3mixRjj(ptr dereferenceable(4) %a, i32 %keylen.0.lcssa)
+ %t4 = load i32, ptr %a, align 4
+ call void @llvm.lifetime.end.p0(i64 4, ptr %a)
ret i32 %t4
}
-define i32 @zero_backedge_count_test(i32 %unknown_init, i32* %unknown_mem) {
+define i32 @zero_backedge_count_test(i32 %unknown_init, ptr %unknown_mem) {
; CHECK-LABEL: @zero_backedge_count_test(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[UNKNOWN_NEXT:%.*]] = load volatile i32, i32* [[UNKNOWN_MEM:%.*]], align 4
+; CHECK-NEXT: [[UNKNOWN_NEXT:%.*]] = load volatile i32, ptr [[UNKNOWN_MEM:%.*]], align 4
; CHECK-NEXT: br label [[LEAVE:%.*]]
; CHECK: leave:
; CHECK-NEXT: ret i32 [[UNKNOWN_INIT:%.*]]
@@ -102,7 +98,7 @@ loop:
%unknown_phi = phi i32 [ %unknown_init, %entry ], [ %unknown_next, %loop ]
%iv.inc = add i32 %iv, 1
%be_taken = icmp ne i32 %iv.inc, 1
- %unknown_next = load volatile i32, i32* %unknown_mem
+ %unknown_next = load volatile i32, ptr %unknown_mem
br i1 %be_taken, label %loop, label %leave
leave:
diff --git a/llvm/test/Transforms/IndVarSimplify/iv-widen-elim-ext.ll b/llvm/test/Transforms/IndVarSimplify/iv-widen-elim-ext.ll
index 6145a27460dca..42649ad73a2ce 100644
--- a/llvm/test/Transforms/IndVarSimplify/iv-widen-elim-ext.ll
+++ b/llvm/test/Transforms/IndVarSimplify/iv-widen-elim-ext.ll
@@ -6,7 +6,7 @@ target datalayout = "e-m:e-i64:64-p:64:64:64-n8:16:32:64-S128"
; When widening IV and its users, trunc and zext/sext are not needed
; if the original 32-bit user is known to be non-negative, whether
; the IV is considered signed or unsigned.
-define void @foo(i32* %A, i32* %B, i32* %C, i32 %N) {
+define void @foo(ptr %A, ptr %B, ptr %C, i32 %N) {
; CHECK-LABEL: @foo(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 0, [[N:%.*]]
@@ -16,17 +16,17 @@ define void @foo(i32* %A, i32* %B, i32* %C, i32 %N) {
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[FOR_BODY_LR_PH]] ]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 2
-; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[C:%.*]], i64 [[TMP1]]
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[C:%.*]], i64 [[TMP1]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP0]], [[TMP2]]
; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP1]] to i32
; CHECK-NEXT: [[DIV0:%.*]] = udiv i32 5, [[TMP3]]
; CHECK-NEXT: [[ADD4:%.*]] = add nsw i32 [[ADD3]], [[DIV0]]
-; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store i32 [[ADD4]], i32* [[ARRAYIDX5]], align 4
+; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store i32 [[ADD4]], ptr [[ARRAYIDX5]], align 4
; CHECK-NEXT: br label [[FOR_INC]]
; CHECK: for.inc:
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
@@ -47,18 +47,18 @@ for.body.lr.ph: ; preds = %entry
for.body: ; preds = %for.body.lr.ph, %for.inc
%i.02 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
%idxprom = sext i32 %i.02 to i64
- %arrayidx = getelementptr inbounds i32, i32* %B, i64 %idxprom
- %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds i32, ptr %B, i64 %idxprom
+ %0 = load i32, ptr %arrayidx, align 4
%add = add nsw i32 %i.02, 2
%idxprom1 = zext i32 %add to i64
- %arrayidx2 = getelementptr inbounds i32, i32* %C, i64 %idxprom1
- %1 = load i32, i32* %arrayidx2, align 4
+ %arrayidx2 = getelementptr inbounds i32, ptr %C, i64 %idxprom1
+ %1 = load i32, ptr %arrayidx2, align 4
%add3 = add nsw i32 %0, %1
%div0 = udiv i32 5, %add
%add4 = add nsw i32 %add3, %div0
%idxprom4 = zext i32 %i.02 to i64
- %arrayidx5 = getelementptr inbounds i32, i32* %A, i64 %idxprom4
- store i32 %add4, i32* %arrayidx5, align 4
+ %arrayidx5 = getelementptr inbounds i32, ptr %A, i64 %idxprom4
+ store i32 %add4, ptr %arrayidx5, align 4
br label %for.inc
for.inc: ; preds = %for.body
@@ -73,7 +73,7 @@ for.end: ; preds = %for.cond.for.end_cr
ret void
}
-define void @foo1(i32* %A, i32* %B, i32* %C, i32 %N) {
+define void @foo1(ptr %A, ptr %B, ptr %C, i32 %N) {
; CHECK-LABEL: @foo1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 0, [[N:%.*]]
@@ -83,14 +83,14 @@ define void @foo1(i32* %A, i32* %B, i32* %C, i32 %N) {
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[FOR_BODY_LR_PH]] ]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 2
-; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[C:%.*]], i64 [[TMP1]]
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[C:%.*]], i64 [[TMP1]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP0]], [[TMP2]]
-; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX5]], align 4
+; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: store i32 [[ADD3]], ptr [[ARRAYIDX5]], align 4
; CHECK-NEXT: br label [[FOR_INC]]
; CHECK: for.inc:
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
@@ -111,16 +111,16 @@ for.body.lr.ph: ; preds = %entry
for.body: ; preds = %for.body.lr.ph, %for.inc
%i.02 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
%idxprom = zext i32 %i.02 to i64
- %arrayidx = getelementptr inbounds i32, i32* %B, i64 %idxprom
- %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds i32, ptr %B, i64 %idxprom
+ %0 = load i32, ptr %arrayidx, align 4
%add = add nsw i32 %i.02, 2
%idxprom1 = sext i32 %add to i64
- %arrayidx2 = getelementptr inbounds i32, i32* %C, i64 %idxprom1
- %1 = load i32, i32* %arrayidx2, align 4
+ %arrayidx2 = getelementptr inbounds i32, ptr %C, i64 %idxprom1
+ %1 = load i32, ptr %arrayidx2, align 4
%add3 = add nsw i32 %0, %1
%idxprom4 = sext i32 %i.02 to i64
- %arrayidx5 = getelementptr inbounds i32, i32* %A, i64 %idxprom4
- store i32 %add3, i32* %arrayidx5, align 4
+ %arrayidx5 = getelementptr inbounds i32, ptr %A, i64 %idxprom4
+ store i32 %add3, ptr %arrayidx5, align 4
br label %for.inc
for.inc: ; preds = %for.body
@@ -150,14 +150,14 @@ define i32 @foo2(i32 %M) {
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[FOR_BODY_LR_PH]] ]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @b, i64 0, i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr @a, i64 0, i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [100 x i32], ptr @b, i64 0, i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[TMP3:%.*]] = add nsw i64 [[INDVARS_IV]], [[TMP0]]
-; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[TMP3]]
-; CHECK-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX5]], align 4
+; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x i32], ptr @a, i64 0, i64 [[TMP3]]
+; CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX5]], align 4
; CHECK-NEXT: br label [[FOR_INC]]
; CHECK: for.inc:
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
@@ -166,7 +166,7 @@ define i32 @foo2(i32 %M) {
; CHECK: for.cond.for.end_crit_edge:
; CHECK-NEXT: br label [[FOR_END]]
; CHECK: for.end:
-; CHECK-NEXT: [[CALL:%.*]] = call i32 @dummy(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32* getelementptr inbounds ([100 x i32], [100 x i32]* @b, i32 0, i32 0))
+; CHECK-NEXT: [[CALL:%.*]] = call i32 @dummy(ptr @a, ptr @b)
; CHECK-NEXT: ret i32 0
;
entry:
@@ -179,16 +179,16 @@ for.body.lr.ph: ; preds = %entry
for.body: ; preds = %for.body.lr.ph, %for.inc
%i.02 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
%idxprom = zext i32 %i.02 to i64
- %arrayidx = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 %idxprom
- %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds [100 x i32], ptr @a, i64 0, i64 %idxprom
+ %0 = load i32, ptr %arrayidx, align 4
%idxprom1 = sext i32 %i.02 to i64
- %arrayidx2 = getelementptr inbounds [100 x i32], [100 x i32]* @b, i64 0, i64 %idxprom1
- %1 = load i32, i32* %arrayidx2, align 4
+ %arrayidx2 = getelementptr inbounds [100 x i32], ptr @b, i64 0, i64 %idxprom1
+ %1 = load i32, ptr %arrayidx2, align 4
%add = add nsw i32 %0, %1
%add3 = add nsw i32 %i.02, %M
%idxprom4 = sext i32 %add3 to i64
- %arrayidx5 = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 %idxprom4
- store i32 %add, i32* %arrayidx5, align 4
+ %arrayidx5 = getelementptr inbounds [100 x i32], ptr @a, i64 0, i64 %idxprom4
+ store i32 %add, ptr %arrayidx5, align 4
br label %for.inc
for.inc: ; preds = %for.body
@@ -200,11 +200,11 @@ for.cond.for.end_crit_edge: ; preds = %for.inc
br label %for.end
for.end: ; preds = %for.cond.for.end_crit_edge, %entry
- %call = call i32 @dummy(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32* getelementptr inbounds ([100 x i32], [100 x i32]* @b, i32 0, i32 0))
+ %call = call i32 @dummy(ptr @a, ptr @b)
ret i32 0
}
-declare i32 @dummy(i32*, i32*)
+declare i32 @dummy(ptr, ptr)
; A case where zext should not be eliminated when its operands could only be extended by sext.
define i32 @foo3(i32 %M) {
@@ -218,16 +218,16 @@ define i32 @foo3(i32 %M) {
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[FOR_BODY_LR_PH]] ]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @b, i64 0, i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr @a, i64 0, i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [100 x i32], ptr @b, i64 0, i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[TMP3:%.*]] = add nsw i64 [[INDVARS_IV]], [[TMP0]]
; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i32
; CHECK-NEXT: [[IDXPROM4:%.*]] = zext i32 [[TMP4]] to i64
-; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM4]]
-; CHECK-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX5]], align 4
+; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x i32], ptr @a, i64 0, i64 [[IDXPROM4]]
+; CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX5]], align 4
; CHECK-NEXT: br label [[FOR_INC]]
; CHECK: for.inc:
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
@@ -236,7 +236,7 @@ define i32 @foo3(i32 %M) {
; CHECK: for.cond.for.end_crit_edge:
; CHECK-NEXT: br label [[FOR_END]]
; CHECK: for.end:
-; CHECK-NEXT: [[CALL:%.*]] = call i32 @dummy(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32* getelementptr inbounds ([100 x i32], [100 x i32]* @b, i32 0, i32 0))
+; CHECK-NEXT: [[CALL:%.*]] = call i32 @dummy(ptr @a, ptr @b)
; CHECK-NEXT: ret i32 0
;
entry:
@@ -249,16 +249,16 @@ for.body.lr.ph: ; preds = %entry
for.body: ; preds = %for.body.lr.ph, %for.inc
%i.02 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
%idxprom = sext i32 %i.02 to i64
- %arrayidx = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 %idxprom
- %0 = load i32, i32* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds [100 x i32], ptr @a, i64 0, i64 %idxprom
+ %0 = load i32, ptr %arrayidx, align 4
%idxprom1 = sext i32 %i.02 to i64
- %arrayidx2 = getelementptr inbounds [100 x i32], [100 x i32]* @b, i64 0, i64 %idxprom1
- %1 = load i32, i32* %arrayidx2, align 4
+ %arrayidx2 = getelementptr inbounds [100 x i32], ptr @b, i64 0, i64 %idxprom1
+ %1 = load i32, ptr %arrayidx2, align 4
%add = add nsw i32 %0, %1
%add3 = add nsw i32 %i.02, %M
%idxprom4 = zext i32 %add3 to i64
- %arrayidx5 = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 %idxprom4
- store i32 %add, i32* %arrayidx5, align 4
+ %arrayidx5 = getelementptr inbounds [100 x i32], ptr @a, i64 0, i64 %idxprom4
+ store i32 %add, ptr %arrayidx5, align 4
br label %for.inc
for.inc: ; preds = %for.body
@@ -270,20 +270,19 @@ for.cond.for.end_crit_edge: ; preds = %for.inc
br label %for.end
for.end: ; preds = %for.cond.for.end_crit_edge, %entry
- %call = call i32 @dummy(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32* getelementptr inbounds ([100 x i32], [100 x i32]* @b, i32 0, i32 0))
+ %call = call i32 @dummy(ptr @a, ptr @b)
ret i32 0
}
%struct.image = type {i32, i32}
-define i32 @foo4(%struct.image* %input, i32 %length, i32* %in) {
+define i32 @foo4(ptr %input, i32 %length, ptr %in) {
; CHECK-LABEL: @foo4(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[STRIDE:%.*]] = getelementptr inbounds [[STRUCT_IMAGE:%.*]], %struct.image* [[INPUT:%.*]], i64 0, i32 1
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[STRIDE]], align 4
+; CHECK-NEXT: [[STRIDE:%.*]] = getelementptr inbounds [[STRUCT_IMAGE:%.*]], ptr [[INPUT:%.*]], i64 0, i32 1
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[STRIDE]], align 4
; CHECK-NEXT: [[CMP17:%.*]] = icmp sgt i32 [[LENGTH:%.*]], 1
; CHECK-NEXT: br i1 [[CMP17]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; CHECK: for.body.lr.ph:
-; CHECK-NEXT: [[CHANNEL:%.*]] = getelementptr inbounds [[STRUCT_IMAGE]], %struct.image* [[INPUT]], i64 0, i32 0
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[TMP0]] to i64
; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[LENGTH]] to i64
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
@@ -296,26 +295,25 @@ define i32 @foo4(%struct.image* %input, i32 %length, i32* %in) {
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 1, [[FOR_BODY_LR_PH]] ]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[CHANNEL]], align 8
+; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[INPUT]], align 8
; CHECK-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
; CHECK-NEXT: [[TMP6:%.*]] = mul nsw i64 [[TMP5]], [[INDVARS_IV_NEXT]]
-; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[IN:%.*]], i64 [[TMP6]]
-; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[ADD_PTR]], align 4
+; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[IN:%.*]], i64 [[TMP6]]
+; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[ADD_PTR]], align 4
; CHECK-NEXT: [[TMP8:%.*]] = mul nsw i64 [[TMP1]], [[INDVARS_IV_NEXT]]
-; CHECK-NEXT: [[ADD_PTR1:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[TMP8]]
-; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[ADD_PTR1]], align 4
+; CHECK-NEXT: [[ADD_PTR1:%.*]] = getelementptr inbounds i32, ptr [[IN]], i64 [[TMP8]]
+; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[ADD_PTR1]], align 4
; CHECK-NEXT: [[TMP10]] = add i32 [[TMP7]], [[TMP9]]
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP_LOOPEXIT]]
;
entry:
- %stride = getelementptr inbounds %struct.image, %struct.image* %input, i64 0, i32 1
- %0 = load i32, i32* %stride, align 4
+ %stride = getelementptr inbounds %struct.image, ptr %input, i64 0, i32 1
+ %0 = load i32, ptr %stride, align 4
%cmp17 = icmp sgt i32 %length, 1
br i1 %cmp17, label %for.body.lr.ph, label %for.cond.cleanup
for.body.lr.ph: ; preds = %entry
- %channel = getelementptr inbounds %struct.image, %struct.image* %input, i64 0, i32 0
br label %for.body
for.cond.cleanup.loopexit: ; preds = %for.body
@@ -331,30 +329,29 @@ for.cond.cleanup: ; preds = %for.cond.cleanup.lo
for.body: ; preds = %for.body.lr.ph, %for.body
%x.018 = phi i32 [ 1, %for.body.lr.ph ], [ %add, %for.body ]
%add = add nuw nsw i32 %x.018, 1
- %3 = load i32, i32* %channel, align 8
+ %3 = load i32, ptr %input, align 8
%mul = mul nsw i32 %3, %add
%idx.ext = sext i32 %mul to i64
- %add.ptr = getelementptr inbounds i32, i32* %in, i64 %idx.ext
- %4 = load i32, i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, ptr %in, i64 %idx.ext
+ %4 = load i32, ptr %add.ptr, align 4
%mul1 = mul nsw i32 %0, %add
%idx.ext1 = sext i32 %mul1 to i64
- %add.ptr1 = getelementptr inbounds i32, i32* %in, i64 %idx.ext1
- %5 = load i32, i32* %add.ptr1, align 4
+ %add.ptr1 = getelementptr inbounds i32, ptr %in, i64 %idx.ext1
+ %5 = load i32, ptr %add.ptr1, align 4
%6 = add i32 %4, %5
%cmp = icmp slt i32 %add, %length
br i1 %cmp, label %for.body, label %for.cond.cleanup.loopexit
}
-define i32 @foo5(%struct.image* %input, i32 %length, i32* %in) {
+define i32 @foo5(ptr %input, i32 %length, ptr %in) {
; CHECK-LABEL: @foo5(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[STRIDE:%.*]] = getelementptr inbounds [[STRUCT_IMAGE:%.*]], %struct.image* [[INPUT:%.*]], i64 0, i32 1
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[STRIDE]], align 4
+; CHECK-NEXT: [[STRIDE:%.*]] = getelementptr inbounds [[STRUCT_IMAGE:%.*]], ptr [[INPUT:%.*]], i64 0, i32 1
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[STRIDE]], align 4
; CHECK-NEXT: [[CMP17:%.*]] = icmp sgt i32 [[LENGTH:%.*]], 1
; CHECK-NEXT: br i1 [[CMP17]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; CHECK: for.body.lr.ph:
-; CHECK-NEXT: [[CHANNEL:%.*]] = getelementptr inbounds [[STRUCT_IMAGE]], %struct.image* [[INPUT]], i64 0, i32 0
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[TMP0]] to i64
; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[LENGTH]] to i64
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
@@ -367,28 +364,27 @@ define i32 @foo5(%struct.image* %input, i32 %length, i32* %in) {
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 1, [[FOR_BODY_LR_PH]] ]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
-; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[CHANNEL]], align 8
+; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[INPUT]], align 8
; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], [[TMP5]]
; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL]] to i64
-; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[IN:%.*]], i64 [[IDX_EXT]]
-; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[ADD_PTR]], align 4
+; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[IN:%.*]], i64 [[IDX_EXT]]
+; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[ADD_PTR]], align 4
; CHECK-NEXT: [[TMP7:%.*]] = mul nsw i64 [[TMP1]], [[INDVARS_IV_NEXT]]
-; CHECK-NEXT: [[ADD_PTR1:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[TMP7]]
-; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[ADD_PTR1]], align 4
+; CHECK-NEXT: [[ADD_PTR1:%.*]] = getelementptr inbounds i32, ptr [[IN]], i64 [[TMP7]]
+; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[ADD_PTR1]], align 4
; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP6]], [[TMP8]]
; CHECK-NEXT: [[TMP10]] = add i32 [[TMP9]], [[MUL]]
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP_LOOPEXIT]]
;
entry:
- %stride = getelementptr inbounds %struct.image, %struct.image* %input, i64 0, i32 1
- %0 = load i32, i32* %stride, align 4
+ %stride = getelementptr inbounds %struct.image, ptr %input, i64 0, i32 1
+ %0 = load i32, ptr %stride, align 4
%cmp17 = icmp sgt i32 %length, 1
br i1 %cmp17, label %for.body.lr.ph, label %for.cond.cleanup
for.body.lr.ph: ; preds = %entry
- %channel = getelementptr inbounds %struct.image, %struct.image* %input, i64 0, i32 0
br label %for.body
for.cond.cleanup.loopexit: ; preds = %for.body
@@ -405,30 +401,29 @@ for.cond.cleanup: ; preds = %for.cond.cleanup.lo
for.body: ; preds = %for.body.lr.ph, %for.body
%x.018 = phi i32 [ 1, %for.body.lr.ph ], [ %add, %for.body ]
%add = add nuw nsw i32 %x.018, 1
- %3 = load i32, i32* %channel, align 8
+ %3 = load i32, ptr %input, align 8
%mul = mul nsw i32 %3, %add
%idx.ext = sext i32 %mul to i64
- %add.ptr = getelementptr inbounds i32, i32* %in, i64 %idx.ext
- %4 = load i32, i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, ptr %in, i64 %idx.ext
+ %4 = load i32, ptr %add.ptr, align 4
%mul1 = mul nsw i32 %0, %add
%idx.ext1 = sext i32 %mul1 to i64
- %add.ptr1 = getelementptr inbounds i32, i32* %in, i64 %idx.ext1
- %5 = load i32, i32* %add.ptr1, align 4
+ %add.ptr1 = getelementptr inbounds i32, ptr %in, i64 %idx.ext1
+ %5 = load i32, ptr %add.ptr1, align 4
%6 = add i32 %4, %5
%7 = add i32 %6, %mul
%cmp = icmp slt i32 %add, %length
br i1 %cmp, label %for.body, label %for.cond.cleanup.loopexit
}
-define i32 @foo6(%struct.image* %input, i32 %length, i32* %in) {
+define i32 @foo6(ptr %input, i32 %length, ptr %in) {
entry:
- %stride = getelementptr inbounds %struct.image, %struct.image* %input, i64 0, i32 1
- %0 = load i32, i32* %stride, align 4
+ %stride = getelementptr inbounds %struct.image, ptr %input, i64 0, i32 1
+ %0 = load i32, ptr %stride, align 4
%cmp17 = icmp sgt i32 %length, 1
br i1 %cmp17, label %for.body.lr.ph, label %for.cond.cleanup
for.body.lr.ph: ; preds = %entry
- %channel = getelementptr inbounds %struct.image, %struct.image* %input, i64 0, i32 0
br label %for.body
for.cond.cleanup.loopexit: ; preds = %for.body
@@ -453,17 +448,17 @@ for.body: ; preds = %for.body.lr.ph, %fo
%3 = and i32 %length, %0
%mul = mul nuw i32 %3, %add
%idx.ext = zext i32 %mul to i64
- %add.ptr = getelementptr inbounds i32, i32* %in, i64 %idx.ext
- %4 = load i32, i32* %add.ptr, align 4
+ %add.ptr = getelementptr inbounds i32, ptr %in, i64 %idx.ext
+ %4 = load i32, ptr %add.ptr, align 4
%mul1 = mul nuw i32 %0, %add
%idx.ext1 = zext i32 %mul1 to i64
- %add.ptr1 = getelementptr inbounds i32, i32* %in, i64 %idx.ext1
- %5 = load i32, i32* %add.ptr1, align 4
+ %add.ptr1 = getelementptr inbounds i32, ptr %in, i64 %idx.ext1
+ %5 = load i32, ptr %add.ptr1, align 4
%or = or i32 %length, %5
%sub.or = sub nuw i32 %or, %add
%or.ext = zext i32 %sub.or to i64
- %ptr.or = getelementptr inbounds i32, i32* %in, i64 %or.ext
- %val.or = load i32, i32* %ptr.or
+ %ptr.or = getelementptr inbounds i32, ptr %in, i64 %or.ext
+ %val.or = load i32, ptr %ptr.or
%6 = add i32 %4, %val.or
%cmp = icmp ult i32 %add, %length
br i1 %cmp, label %for.body, label %for.cond.cleanup.loopexit
diff --git a/llvm/test/Transforms/IndVarSimplify/lftr-address-space-pointers.ll b/llvm/test/Transforms/IndVarSimplify/lftr-address-space-pointers.ll
index 9033bd6a85353..107a61597797a 100644
--- a/llvm/test/Transforms/IndVarSimplify/lftr-address-space-pointers.ll
+++ b/llvm/test/Transforms/IndVarSimplify/lftr-address-space-pointers.ll
@@ -3,23 +3,23 @@
target datalayout = "e-p:32:32:32-p1:64:64:64-p2:8:8:8-p3:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-n8:16:32:64"
; Derived from ptriv in lftr-reuse.ll
-define void @ptriv_as2(i8 addrspace(2)* %base, i32 %n) nounwind {
+define void @ptriv_as2(ptr addrspace(2) %base, i32 %n) nounwind {
; CHECK-LABEL: @ptriv_as2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[IDX_TRUNC:%.*]] = trunc i32 [[N:%.*]] to i8
-; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8 addrspace(2)* [[BASE:%.*]], i8 [[IDX_TRUNC]]
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i8 addrspace(2)* [[BASE]], [[ADD_PTR]]
+; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, ptr addrspace(2) [[BASE:%.*]], i8 [[IDX_TRUNC]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult ptr addrspace(2) [[BASE]], [[ADD_PTR]]
; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
; CHECK: for.body.preheader:
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[P_02:%.*]] = phi i8 addrspace(2)* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[BASE]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint i8 addrspace(2)* [[P_02]] to i8
-; CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint i8 addrspace(2)* [[BASE]] to i8
+; CHECK-NEXT: [[P_02:%.*]] = phi ptr addrspace(2) [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[BASE]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr addrspace(2) [[P_02]] to i8
+; CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr addrspace(2) [[BASE]] to i8
; CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = sub i8 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]]
-; CHECK-NEXT: store i8 [[SUB_PTR_SUB]], i8 addrspace(2)* [[P_02]], align 1
-; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, i8 addrspace(2)* [[P_02]], i32 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i8 addrspace(2)* [[INCDEC_PTR]], [[ADD_PTR]]
+; CHECK-NEXT: store i8 [[SUB_PTR_SUB]], ptr addrspace(2) [[P_02]], align 1
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr addrspace(2) [[P_02]], i32 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne ptr addrspace(2) [[INCDEC_PTR]], [[ADD_PTR]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
; CHECK: for.end.loopexit:
; CHECK-NEXT: br label [[FOR_END]]
@@ -28,45 +28,45 @@ define void @ptriv_as2(i8 addrspace(2)* %base, i32 %n) nounwind {
;
entry:
%idx.trunc = trunc i32 %n to i8
- %add.ptr = getelementptr inbounds i8, i8 addrspace(2)* %base, i8 %idx.trunc
- %cmp1 = icmp ult i8 addrspace(2)* %base, %add.ptr
+ %add.ptr = getelementptr inbounds i8, ptr addrspace(2) %base, i8 %idx.trunc
+ %cmp1 = icmp ult ptr addrspace(2) %base, %add.ptr
br i1 %cmp1, label %for.body, label %for.end
; Make sure the added GEP has the right index type
for.body:
- %p.02 = phi i8 addrspace(2)* [ %base, %entry ], [ %incdec.ptr, %for.body ]
+ %p.02 = phi ptr addrspace(2) [ %base, %entry ], [ %incdec.ptr, %for.body ]
; cruft to make the IV useful
- %sub.ptr.lhs.cast = ptrtoint i8 addrspace(2)* %p.02 to i8
- %sub.ptr.rhs.cast = ptrtoint i8 addrspace(2)* %base to i8
+ %sub.ptr.lhs.cast = ptrtoint ptr addrspace(2) %p.02 to i8
+ %sub.ptr.rhs.cast = ptrtoint ptr addrspace(2) %base to i8
%sub.ptr.sub = sub i8 %sub.ptr.lhs.cast, %sub.ptr.rhs.cast
- store i8 %sub.ptr.sub, i8 addrspace(2)* %p.02
- %incdec.ptr = getelementptr inbounds i8, i8 addrspace(2)* %p.02, i32 1
- %cmp = icmp ult i8 addrspace(2)* %incdec.ptr, %add.ptr
+ store i8 %sub.ptr.sub, ptr addrspace(2) %p.02
+ %incdec.ptr = getelementptr inbounds i8, ptr addrspace(2) %p.02, i32 1
+ %cmp = icmp ult ptr addrspace(2) %incdec.ptr, %add.ptr
br i1 %cmp, label %for.body, label %for.end
for.end:
ret void
}
-define void @ptriv_as3(i8 addrspace(3)* %base, i32 %n) nounwind {
+define void @ptriv_as3(ptr addrspace(3) %base, i32 %n) nounwind {
; CHECK-LABEL: @ptriv_as3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[IDX_TRUNC:%.*]] = trunc i32 [[N:%.*]] to i16
-; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8 addrspace(3)* [[BASE:%.*]], i16 [[IDX_TRUNC]]
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i8 addrspace(3)* [[BASE]], [[ADD_PTR]]
+; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[BASE:%.*]], i16 [[IDX_TRUNC]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult ptr addrspace(3) [[BASE]], [[ADD_PTR]]
; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
; CHECK: for.body.preheader:
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[P_02:%.*]] = phi i8 addrspace(3)* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[BASE]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint i8 addrspace(3)* [[P_02]] to i16
-; CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint i8 addrspace(3)* [[BASE]] to i16
+; CHECK-NEXT: [[P_02:%.*]] = phi ptr addrspace(3) [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[BASE]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr addrspace(3) [[P_02]] to i16
+; CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr addrspace(3) [[BASE]] to i16
; CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = sub i16 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]]
; CHECK-NEXT: [[CONV:%.*]] = trunc i16 [[SUB_PTR_SUB]] to i8
-; CHECK-NEXT: store i8 [[CONV]], i8 addrspace(3)* [[P_02]], align 1
-; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, i8 addrspace(3)* [[P_02]], i32 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i8 addrspace(3)* [[INCDEC_PTR]], [[ADD_PTR]]
+; CHECK-NEXT: store i8 [[CONV]], ptr addrspace(3) [[P_02]], align 1
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr addrspace(3) [[P_02]], i32 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne ptr addrspace(3) [[INCDEC_PTR]], [[ADD_PTR]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
; CHECK: for.end.loopexit:
; CHECK-NEXT: br label [[FOR_END]]
@@ -75,22 +75,22 @@ define void @ptriv_as3(i8 addrspace(3)* %base, i32 %n) nounwind {
;
entry:
%idx.trunc = trunc i32 %n to i16
- %add.ptr = getelementptr inbounds i8, i8 addrspace(3)* %base, i16 %idx.trunc
- %cmp1 = icmp ult i8 addrspace(3)* %base, %add.ptr
+ %add.ptr = getelementptr inbounds i8, ptr addrspace(3) %base, i16 %idx.trunc
+ %cmp1 = icmp ult ptr addrspace(3) %base, %add.ptr
br i1 %cmp1, label %for.body, label %for.end
; Make sure the added GEP has the right index type
for.body:
- %p.02 = phi i8 addrspace(3)* [ %base, %entry ], [ %incdec.ptr, %for.body ]
+ %p.02 = phi ptr addrspace(3) [ %base, %entry ], [ %incdec.ptr, %for.body ]
; cruft to make the IV useful
- %sub.ptr.lhs.cast = ptrtoint i8 addrspace(3)* %p.02 to i16
- %sub.ptr.rhs.cast = ptrtoint i8 addrspace(3)* %base to i16
+ %sub.ptr.lhs.cast = ptrtoint ptr addrspace(3) %p.02 to i16
+ %sub.ptr.rhs.cast = ptrtoint ptr addrspace(3) %base to i16
%sub.ptr.sub = sub i16 %sub.ptr.lhs.cast, %sub.ptr.rhs.cast
%conv = trunc i16 %sub.ptr.sub to i8
- store i8 %conv, i8 addrspace(3)* %p.02
- %incdec.ptr = getelementptr inbounds i8, i8 addrspace(3)* %p.02, i32 1
- %cmp = icmp ult i8 addrspace(3)* %incdec.ptr, %add.ptr
+ store i8 %conv, ptr addrspace(3) %p.02
+ %incdec.ptr = getelementptr inbounds i8, ptr addrspace(3) %p.02, i32 1
+ %cmp = icmp ult ptr addrspace(3) %incdec.ptr, %add.ptr
br i1 %cmp, label %for.body, label %for.end
for.end:
diff --git a/llvm/test/Transforms/IndVarSimplify/lftr-pr31181.ll b/llvm/test/Transforms/IndVarSimplify/lftr-pr31181.ll
index 470573580111d..e836a7dfccea0 100644
--- a/llvm/test/Transforms/IndVarSimplify/lftr-pr31181.ll
+++ b/llvm/test/Transforms/IndVarSimplify/lftr-pr31181.ll
@@ -14,7 +14,7 @@ define i32 @test_drop_nuw() {
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32 [ -2, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[LOOP]] ]
-; CHECK-NEXT: store i32 [[STOREMERGE]], i32* @a, align 4
+; CHECK-NEXT: store i32 [[STOREMERGE]], ptr @a, align 4
; CHECK-NEXT: [[INC]] = add nsw i32 [[STOREMERGE]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INC]], 0
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
@@ -26,7 +26,7 @@ entry:
loop:
%storemerge = phi i32 [ -2, %entry ], [ %inc, %loop ]
- store i32 %storemerge, i32* @a
+ store i32 %storemerge, ptr @a
%cmp = icmp slt i32 %storemerge, -1
%inc = add nuw nsw i32 %storemerge, 1
br i1 %cmp, label %loop, label %exit
@@ -41,7 +41,7 @@ define i32 @test_drop_nsw() {
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[LOOP]] ]
-; CHECK-NEXT: store i32 [[STOREMERGE]], i32* @a, align 4
+; CHECK-NEXT: store i32 [[STOREMERGE]], ptr @a, align 4
; CHECK-NEXT: [[INC]] = add nuw i32 [[STOREMERGE]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INC]], -2147483648
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
@@ -53,7 +53,7 @@ entry:
loop:
%storemerge = phi i32 [ 0, %entry ], [ %inc, %loop ]
- store i32 %storemerge, i32* @a
+ store i32 %storemerge, ptr @a
%cmp = icmp ult i32 %storemerge, 2147483647
%inc = add nuw nsw i32 %storemerge, 1
br i1 %cmp, label %loop, label %exit
@@ -68,7 +68,7 @@ define i32 @test_no_drop_nuw() {
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32 [ -3, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[LOOP]] ]
-; CHECK-NEXT: store i32 [[STOREMERGE]], i32* @a, align 4
+; CHECK-NEXT: store i32 [[STOREMERGE]], ptr @a, align 4
; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[STOREMERGE]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INC]], -1
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
@@ -80,7 +80,7 @@ entry:
loop:
%storemerge = phi i32 [ -3, %entry ], [ %inc, %loop ]
- store i32 %storemerge, i32* @a
+ store i32 %storemerge, ptr @a
%cmp = icmp slt i32 %storemerge, -2
%inc = add nuw nsw i32 %storemerge, 1
br i1 %cmp, label %loop, label %exit
@@ -96,7 +96,7 @@ define i32 @test_no_drop_nsw() {
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[LOOP]] ]
-; CHECK-NEXT: store i32 [[STOREMERGE]], i32* @a, align 4
+; CHECK-NEXT: store i32 [[STOREMERGE]], ptr @a, align 4
; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[STOREMERGE]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INC]], 2147483647
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
@@ -108,7 +108,7 @@ entry:
loop:
%storemerge = phi i32 [ 0, %entry ], [ %inc, %loop ]
- store i32 %storemerge, i32* @a
+ store i32 %storemerge, ptr @a
%cmp = icmp ult i32 %storemerge, 2147483646
%inc = add nuw nsw i32 %storemerge, 1
br i1 %cmp, label %loop, label %exit
@@ -123,7 +123,7 @@ define i32 @test_no_add_nuw() {
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[LOOP]] ]
-; CHECK-NEXT: store i32 [[STOREMERGE]], i32* @a, align 4
+; CHECK-NEXT: store i32 [[STOREMERGE]], ptr @a, align 4
; CHECK-NEXT: [[INC]] = add nsw i32 [[STOREMERGE]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INC]], 10
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
@@ -135,7 +135,7 @@ entry:
loop:
%storemerge = phi i32 [ -1, %entry ], [ %inc, %loop ]
- store i32 %storemerge, i32* @a
+ store i32 %storemerge, ptr @a
%cmp = icmp slt i32 %storemerge, 9
%inc = add i32 %storemerge, 1
br i1 %cmp, label %loop, label %exit
@@ -154,7 +154,7 @@ define i32 @test_drop_nsw_var_lim(i32 %lim) {
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32 [ [[INC:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ]
-; CHECK-NEXT: store i32 [[STOREMERGE]], i32* @a, align 4
+; CHECK-NEXT: store i32 [[STOREMERGE]], ptr @a, align 4
; CHECK-NEXT: [[INC]] = add nuw i32 [[STOREMERGE]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INC]], [[TMP0]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
@@ -169,7 +169,7 @@ entry:
loop:
%storemerge = phi i32 [ 0, %entry ], [ %inc, %loop ]
- store i32 %storemerge, i32* @a
+ store i32 %storemerge, ptr @a
%cmp = icmp ult i32 %storemerge, %lim
%inc = add nuw nsw i32 %storemerge, 1
br i1 %cmp, label %loop, label %exit
@@ -180,17 +180,17 @@ exit:
; Adopted from D30446.
; We switch from %iv to %iv2 and need to change nsw to nuw in the process.
-define i32 @switch_to_
diff erent_iv_post_inc(i32* %ptr, i1 %always_false) {
+define i32 @switch_to_
diff erent_iv_post_inc(ptr %ptr, i1 %always_false) {
; CHECK-LABEL: @switch_to_
diff erent_iv_post_inc(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_COND:%.*]]
; CHECK: for.cond:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ -2147483648, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[ALWAYS_TAKEN:%.*]] ]
; CHECK-NEXT: [[IV2:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[IV2_INC:%.*]], [[ALWAYS_TAKEN]] ]
-; CHECK-NEXT: store i32 [[IV]], i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: store i32 [[IV]], ptr [[PTR:%.*]], align 4
; CHECK-NEXT: br i1 [[ALWAYS_FALSE:%.*]], label [[NEVER_TAKEN:%.*]], label [[ALWAYS_TAKEN]]
; CHECK: never_taken:
-; CHECK-NEXT: store volatile i32 [[IV2]], i32* [[PTR]], align 4
+; CHECK-NEXT: store volatile i32 [[IV2]], ptr [[PTR]], align 4
; CHECK-NEXT: br label [[ALWAYS_TAKEN]]
; CHECK: always_taken:
; CHECK-NEXT: [[IV_INC]] = add nsw i32 [[IV]], 1
@@ -206,11 +206,11 @@ entry:
for.cond:
%iv = phi i32 [ -2147483648, %entry ], [ %iv.inc, %always_taken ]
%iv2 = phi i32 [ 0, %entry ], [ %iv2.inc, %always_taken ]
- store i32 %iv, i32* %ptr
+ store i32 %iv, ptr %ptr
br i1 %always_false, label %never_taken, label %always_taken
never_taken:
- store volatile i32 %iv2, i32* %ptr
+ store volatile i32 %iv2, ptr %ptr
br label %always_taken
always_taken:
@@ -225,20 +225,20 @@ for.end:
; Same as previous test case, but with exit block and loop latch being distinct
; blocks requiring the use of pre-increment.
-define i32 @switch_to_
diff erent_iv_pre_inc(i32* %ptr, i1 %always_false) {
+define i32 @switch_to_
diff erent_iv_pre_inc(ptr %ptr, i1 %always_false) {
; CHECK-LABEL: @switch_to_
diff erent_iv_pre_inc(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_COND:%.*]]
; CHECK: for.cond:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ -2147483648, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[ALWAYS_TAKEN:%.*]] ]
; CHECK-NEXT: [[IV2:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[IV2_INC:%.*]], [[ALWAYS_TAKEN]] ]
-; CHECK-NEXT: store i32 [[IV]], i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: store i32 [[IV]], ptr [[PTR:%.*]], align 4
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[IV2]], -2147483628
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
; CHECK: for.body:
; CHECK-NEXT: br i1 [[ALWAYS_FALSE:%.*]], label [[NEVER_TAKEN:%.*]], label [[ALWAYS_TAKEN]]
; CHECK: never_taken:
-; CHECK-NEXT: store volatile i32 [[IV2]], i32* [[PTR]], align 4
+; CHECK-NEXT: store volatile i32 [[IV2]], ptr [[PTR]], align 4
; CHECK-NEXT: br label [[ALWAYS_TAKEN]]
; CHECK: always_taken:
; CHECK-NEXT: [[IV_INC]] = add nsw i32 [[IV]], 1
@@ -253,7 +253,7 @@ entry:
for.cond:
%iv = phi i32 [ -2147483648, %entry ], [ %iv.inc, %always_taken ]
%iv2 = phi i32 [ 0, %entry ], [ %iv2.inc, %always_taken ]
- store i32 %iv, i32* %ptr
+ store i32 %iv, ptr %ptr
%cmp = icmp slt i32 %iv, 20
br i1 %cmp, label %for.body, label %for.end
@@ -261,7 +261,7 @@ for.body:
br i1 %always_false, label %never_taken, label %always_taken
never_taken:
- store volatile i32 %iv2, i32* %ptr
+ store volatile i32 %iv2, ptr %ptr
br label %always_taken
always_taken:
@@ -273,17 +273,17 @@ for.end:
ret i32 0
}
-define i32 @switch_to_
diff erent_iv_first_poison(i32* %ptr, i1 %always_false) {
+define i32 @switch_to_
diff erent_iv_first_poison(ptr %ptr, i1 %always_false) {
; CHECK-LABEL: @switch_to_
diff erent_iv_first_poison(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_COND:%.*]]
; CHECK: for.cond:
; CHECK-NEXT: [[IV2:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ [[IV2_INC:%.*]], [[ALWAYS_TAKEN:%.*]] ]
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ -2147483648, [[ENTRY]] ], [ [[IV_INC:%.*]], [[ALWAYS_TAKEN]] ]
-; CHECK-NEXT: store i32 [[IV]], i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: store i32 [[IV]], ptr [[PTR:%.*]], align 4
; CHECK-NEXT: br i1 [[ALWAYS_FALSE:%.*]], label [[NEVER_TAKEN:%.*]], label [[ALWAYS_TAKEN]]
; CHECK: never_taken:
-; CHECK-NEXT: store volatile i32 [[IV2]], i32* [[PTR]], align 4
+; CHECK-NEXT: store volatile i32 [[IV2]], ptr [[PTR]], align 4
; CHECK-NEXT: br label [[ALWAYS_TAKEN]]
; CHECK: always_taken:
; CHECK-NEXT: [[IV2_INC]] = add nuw nsw i32 [[IV2]], 1
@@ -299,11 +299,11 @@ entry:
for.cond:
%iv2 = phi i32 [ -1, %entry ], [ %iv2.inc, %always_taken ]
%iv = phi i32 [ -2147483648, %entry ], [ %iv.inc, %always_taken ]
- store i32 %iv, i32* %ptr
+ store i32 %iv, ptr %ptr
br i1 %always_false, label %never_taken, label %always_taken
never_taken:
- store volatile i32 %iv2, i32* %ptr
+ store volatile i32 %iv2, ptr %ptr
br label %always_taken
always_taken:
@@ -316,17 +316,17 @@ for.end:
ret i32 0
}
-define i32 @switch_to_
diff erent_iv_second_poison(i32* %ptr, i1 %always_false) {
+define i32 @switch_to_
diff erent_iv_second_poison(ptr %ptr, i1 %always_false) {
; CHECK-LABEL: @switch_to_
diff erent_iv_second_poison(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_COND:%.*]]
; CHECK: for.cond:
; CHECK-NEXT: [[IV2:%.*]] = phi i32 [ -2, [[ENTRY:%.*]] ], [ [[IV2_INC:%.*]], [[ALWAYS_TAKEN:%.*]] ]
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ -2147483648, [[ENTRY]] ], [ [[IV_INC:%.*]], [[ALWAYS_TAKEN]] ]
-; CHECK-NEXT: store i32 [[IV]], i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: store i32 [[IV]], ptr [[PTR:%.*]], align 4
; CHECK-NEXT: br i1 [[ALWAYS_FALSE:%.*]], label [[NEVER_TAKEN:%.*]], label [[ALWAYS_TAKEN]]
; CHECK: never_taken:
-; CHECK-NEXT: store volatile i32 [[IV2]], i32* [[PTR]], align 4
+; CHECK-NEXT: store volatile i32 [[IV2]], ptr [[PTR]], align 4
; CHECK-NEXT: br label [[ALWAYS_TAKEN]]
; CHECK: always_taken:
; CHECK-NEXT: [[IV2_INC]] = add nsw i32 [[IV2]], 1
@@ -342,11 +342,11 @@ entry:
for.cond:
%iv2 = phi i32 [ -2, %entry ], [ %iv2.inc, %always_taken ]
%iv = phi i32 [ -2147483648, %entry ], [ %iv.inc, %always_taken ]
- store i32 %iv, i32* %ptr
+ store i32 %iv, ptr %ptr
br i1 %always_false, label %never_taken, label %always_taken
never_taken:
- store volatile i32 %iv2, i32* %ptr
+ store volatile i32 %iv2, ptr %ptr
br label %always_taken
always_taken:
diff --git a/llvm/test/Transforms/IndVarSimplify/lftr-reuse.ll b/llvm/test/Transforms/IndVarSimplify/lftr-reuse.ll
index b5e7cf61e5db1..4a9f6a10a0f49 100644
--- a/llvm/test/Transforms/IndVarSimplify/lftr-reuse.ll
+++ b/llvm/test/Transforms/IndVarSimplify/lftr-reuse.ll
@@ -12,24 +12,24 @@ declare void @use(double %x)
; for(char* p = base; p < base + n; ++p) {
; *p = p-base;
; }
-define void @ptriv(i8* %base, i32 %n) nounwind {
+define void @ptriv(ptr %base, i32 %n) nounwind {
; CHECK-LABEL: @ptriv(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[N:%.*]] to i64
-; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[BASE:%.*]], i64 [[IDX_EXT]]
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i8* [[BASE]], [[ADD_PTR]]
+; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, ptr [[BASE:%.*]], i64 [[IDX_EXT]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult ptr [[BASE]], [[ADD_PTR]]
; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
; CHECK: for.body.preheader:
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[P_02:%.*]] = phi i8* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[BASE]], [[FOR_BODY_PREHEADER]] ]
-; CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint i8* [[P_02]] to i64
-; CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint i8* [[BASE]] to i64
+; CHECK-NEXT: [[P_02:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[BASE]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[P_02]] to i64
+; CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[BASE]] to i64
; CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]]
; CHECK-NEXT: [[CONV:%.*]] = trunc i64 [[SUB_PTR_SUB]] to i8
-; CHECK-NEXT: store i8 [[CONV]], i8* [[P_02]], align 1
-; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, i8* [[P_02]], i32 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i8* [[INCDEC_PTR]], [[ADD_PTR]]
+; CHECK-NEXT: store i8 [[CONV]], ptr [[P_02]], align 1
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr [[P_02]], i32 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne ptr [[INCDEC_PTR]], [[ADD_PTR]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
; CHECK: for.end.loopexit:
; CHECK-NEXT: br label [[FOR_END]]
@@ -38,20 +38,20 @@ define void @ptriv(i8* %base, i32 %n) nounwind {
;
entry:
%idx.ext = sext i32 %n to i64
- %add.ptr = getelementptr inbounds i8, i8* %base, i64 %idx.ext
- %cmp1 = icmp ult i8* %base, %add.ptr
+ %add.ptr = getelementptr inbounds i8, ptr %base, i64 %idx.ext
+ %cmp1 = icmp ult ptr %base, %add.ptr
br i1 %cmp1, label %for.body, label %for.end
for.body:
- %p.02 = phi i8* [ %base, %entry ], [ %incdec.ptr, %for.body ]
+ %p.02 = phi ptr [ %base, %entry ], [ %incdec.ptr, %for.body ]
; cruft to make the IV useful
- %sub.ptr.lhs.cast = ptrtoint i8* %p.02 to i64
- %sub.ptr.rhs.cast = ptrtoint i8* %base to i64
+ %sub.ptr.lhs.cast = ptrtoint ptr %p.02 to i64
+ %sub.ptr.rhs.cast = ptrtoint ptr %base to i64
%sub.ptr.sub = sub i64 %sub.ptr.lhs.cast, %sub.ptr.rhs.cast
%conv = trunc i64 %sub.ptr.sub to i8
- store i8 %conv, i8* %p.02
- %incdec.ptr = getelementptr inbounds i8, i8* %p.02, i32 1
- %cmp = icmp ult i8* %incdec.ptr, %add.ptr
+ store i8 %conv, ptr %p.02
+ %incdec.ptr = getelementptr inbounds i8, ptr %p.02, i32 1
+ %cmp = icmp ult ptr %incdec.ptr, %add.ptr
br i1 %cmp, label %for.body, label %for.end
for.end:
@@ -126,7 +126,7 @@ exit:
; Force SCEVExpander to look for an existing well-formed phi.
; Perform LFTR without generating extra preheader code.
-define void @guardedloop([0 x double]* %matrix, [0 x double]* %vector,
+define void @guardedloop(ptr %matrix, ptr %vector,
;
; CHECK-LABEL: @guardedloop(
; CHECK-NEXT: entry:
@@ -140,11 +140,11 @@ define void @guardedloop([0 x double]* %matrix, [0 x double]* %vector,
; CHECK-NEXT: [[INDVARS_IV2:%.*]] = phi i64 [ 0, [[LOOP_PREHEADER]] ], [ [[INDVARS_IV_NEXT3:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[LOOP_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i64 [[INDVARS_IV]], [[INDVARS_IV2]]
-; CHECK-NEXT: [[MATRIXP:%.*]] = getelementptr inbounds [0 x double], [0 x double]* [[MATRIX:%.*]], i32 0, i64 [[TMP1]]
-; CHECK-NEXT: [[V1:%.*]] = load double, double* [[MATRIXP]], align 8
+; CHECK-NEXT: [[MATRIXP:%.*]] = getelementptr inbounds [0 x double], ptr [[MATRIX:%.*]], i32 0, i64 [[TMP1]]
+; CHECK-NEXT: [[V1:%.*]] = load double, ptr [[MATRIXP]], align 8
; CHECK-NEXT: call void @use(double [[V1]])
-; CHECK-NEXT: [[VECTORP:%.*]] = getelementptr inbounds [0 x double], [0 x double]* [[VECTOR:%.*]], i32 0, i64 [[INDVARS_IV2]]
-; CHECK-NEXT: [[V2:%.*]] = load double, double* [[VECTORP]], align 8
+; CHECK-NEXT: [[VECTORP:%.*]] = getelementptr inbounds [0 x double], ptr [[VECTOR:%.*]], i32 0, i64 [[INDVARS_IV2]]
+; CHECK-NEXT: [[V2:%.*]] = load double, ptr [[VECTORP]], align 8
; CHECK-NEXT: call void @use(double [[V2]])
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], [[TMP0]]
; CHECK-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV2]], 1
@@ -165,12 +165,12 @@ loop:
%i = phi i32 [ 0, %entry ], [ %i.inc, %loop ]
%diagidx = add nsw i32 %rowidx, %i
%diagidxw = sext i32 %diagidx to i64
- %matrixp = getelementptr inbounds [0 x double], [0 x double]* %matrix, i32 0, i64 %diagidxw
- %v1 = load double, double* %matrixp
+ %matrixp = getelementptr inbounds [0 x double], ptr %matrix, i32 0, i64 %diagidxw
+ %v1 = load double, ptr %matrixp
call void @use(double %v1)
%iw = sext i32 %i to i64
- %vectorp = getelementptr inbounds [0 x double], [0 x double]* %vector, i32 0, i64 %iw
- %v2 = load double, double* %vectorp
+ %vectorp = getelementptr inbounds [0 x double], ptr %vector, i32 0, i64 %iw
+ %v2 = load double, ptr %vectorp
call void @use(double %v2)
%row.inc = add nsw i32 %rowidx, %ilead
%i.inc = add nsw i32 %i, 1
@@ -182,7 +182,7 @@ return:
}
; Avoid generating extra code to materialize a trip count. Skip LFTR.
-define void @unguardedloop([0 x double]* %matrix, [0 x double]* %vector,
+define void @unguardedloop(ptr %matrix, ptr %vector,
;
; CHECK-LABEL: @unguardedloop(
; CHECK-NEXT: entry:
@@ -206,11 +206,11 @@ loop:
%i = phi i32 [ 0, %entry ], [ %i.inc, %loop ]
%diagidx = add nsw i32 %rowidx, %i
%diagidxw = sext i32 %diagidx to i64
- %matrixp = getelementptr inbounds [0 x double], [0 x double]* %matrix, i32 0, i64 %diagidxw
- %v1 = load double, double* %matrixp
+ %matrixp = getelementptr inbounds [0 x double], ptr %matrix, i32 0, i64 %diagidxw
+ %v1 = load double, ptr %matrixp
%iw = sext i32 %i to i64
- %vectorp = getelementptr inbounds [0 x double], [0 x double]* %vector, i32 0, i64 %iw
- %v2 = load double, double* %vectorp
+ %vectorp = getelementptr inbounds [0 x double], ptr %vector, i32 0, i64 %iw
+ %v2 = load double, ptr %vectorp
%row.inc = add nsw i32 %rowidx, %ilead
%i.inc = add nsw i32 %i, 1
%cmp196 = icmp slt i32 %i.inc, %irow
@@ -226,13 +226,13 @@ return:
;
; TODO: Fix for PR13371 currently makes this impossible. See
; IndVarSimplify.cpp hasConcreteDef(). We may want to change to undef rules.
-define void @geplftr(i8* %base, i32 %x, i32 %y, i32 %n) nounwind {
+define void @geplftr(ptr %base, i32 %x, i32 %y, i32 %n) nounwind {
; CHECK-LABEL: @geplftr(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[X_EXT:%.*]] = sext i32 [[X:%.*]] to i64
-; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[BASE:%.*]], i64 [[X_EXT]]
+; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, ptr [[BASE:%.*]], i64 [[X_EXT]]
; CHECK-NEXT: [[Y_EXT:%.*]] = sext i32 [[Y:%.*]] to i64
-; CHECK-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds i8, i8* [[ADD_PTR]], i64 [[Y_EXT]]
+; CHECK-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds i8, ptr [[ADD_PTR]], i64 [[Y_EXT]]
; CHECK-NEXT: [[LIM:%.*]] = add i32 [[X]], [[N:%.*]]
; CHECK-NEXT: [[CMP_PH:%.*]] = icmp ult i32 [[X]], [[LIM]]
; CHECK-NEXT: br i1 [[CMP_PH]], label [[LOOP_PREHEADER:%.*]], label [[EXIT:%.*]]
@@ -240,9 +240,9 @@ define void @geplftr(i8* %base, i32 %x, i32 %y, i32 %n) nounwind {
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[INC:%.*]], [[LOOP]] ], [ [[X]], [[LOOP_PREHEADER]] ]
-; CHECK-NEXT: [[APTR:%.*]] = phi i8* [ [[INCDEC_PTR:%.*]], [[LOOP]] ], [ [[ADD_PTR10]], [[LOOP_PREHEADER]] ]
-; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, i8* [[APTR]], i32 1
-; CHECK-NEXT: store i8 3, i8* [[APTR]], align 1
+; CHECK-NEXT: [[APTR:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[LOOP]] ], [ [[ADD_PTR10]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr [[APTR]], i32 1
+; CHECK-NEXT: store i8 3, ptr [[APTR]], align 1
; CHECK-NEXT: [[INC]] = add nuw i32 [[I]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[INC]], [[LIM]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
@@ -253,17 +253,17 @@ define void @geplftr(i8* %base, i32 %x, i32 %y, i32 %n) nounwind {
;
entry:
%x.ext = sext i32 %x to i64
- %add.ptr = getelementptr inbounds i8, i8* %base, i64 %x.ext
+ %add.ptr = getelementptr inbounds i8, ptr %base, i64 %x.ext
%y.ext = sext i32 %y to i64
- %add.ptr10 = getelementptr inbounds i8, i8* %add.ptr, i64 %y.ext
+ %add.ptr10 = getelementptr inbounds i8, ptr %add.ptr, i64 %y.ext
%lim = add i32 %x, %n
%cmp.ph = icmp ult i32 %x, %lim
br i1 %cmp.ph, label %loop, label %exit
loop:
%i = phi i32 [ %x, %entry ], [ %inc, %loop ]
- %aptr = phi i8* [ %add.ptr10, %entry ], [ %incdec.ptr, %loop ]
- %incdec.ptr = getelementptr inbounds i8, i8* %aptr, i32 1
- store i8 3, i8* %aptr
+ %aptr = phi ptr [ %add.ptr10, %entry ], [ %incdec.ptr, %loop ]
+ %incdec.ptr = getelementptr inbounds i8, ptr %aptr, i32 1
+ store i8 3, ptr %aptr
%inc = add i32 %i, 1
%cmp = icmp ult i32 %inc, %lim
br i1 %cmp, label %loop, label %exit
@@ -295,22 +295,19 @@ exit:
}
; Test LFTR on an IV whose recurrence start is a non-unit pointer type.
-define void @aryptriv([256 x i8]* %base, i32 %n) nounwind {
+define void @aryptriv(ptr %base, i32 %n) nounwind {
; CHECK-LABEL: @aryptriv(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[IVSTART:%.*]] = getelementptr inbounds [256 x i8], [256 x i8]* [[BASE:%.*]], i32 0, i32 0
-; CHECK-NEXT: [[IVEND:%.*]] = getelementptr inbounds [256 x i8], [256 x i8]* [[BASE]], i32 0, i32 [[N:%.*]]
-; CHECK-NEXT: [[CMP_PH:%.*]] = icmp ult i8* [[IVSTART]], [[IVEND]]
+; CHECK-NEXT: [[IVEND:%.*]] = getelementptr inbounds [256 x i8], ptr [[BASE:%.*]], i32 0, i32 [[N:%.*]]
+; CHECK-NEXT: [[CMP_PH:%.*]] = icmp ult ptr [[BASE]], [[IVEND]]
; CHECK-NEXT: br i1 [[CMP_PH]], label [[LOOP_PREHEADER:%.*]], label [[EXIT:%.*]]
; CHECK: loop.preheader:
-; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[N]] to i64
-; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr [256 x i8], [256 x i8]* [[BASE]], i64 0, i64 [[TMP0]]
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[APTR:%.*]] = phi i8* [ [[INCDEC_PTR:%.*]], [[LOOP]] ], [ [[IVSTART]], [[LOOP_PREHEADER]] ]
-; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, i8* [[APTR]], i32 1
-; CHECK-NEXT: store i8 3, i8* [[APTR]], align 1
-; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i8* [[INCDEC_PTR]], [[SCEVGEP]]
+; CHECK-NEXT: [[APTR:%.*]] = phi ptr [ [[INCDEC_PTR:%.*]], [[LOOP]] ], [ [[BASE]], [[LOOP_PREHEADER]] ]
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr [[APTR]], i32 1
+; CHECK-NEXT: store i8 3, ptr [[APTR]], align 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne ptr [[INCDEC_PTR]], [[IVEND]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
; CHECK: exit.loopexit:
; CHECK-NEXT: br label [[EXIT]]
@@ -318,16 +315,15 @@ define void @aryptriv([256 x i8]* %base, i32 %n) nounwind {
; CHECK-NEXT: ret void
;
entry:
- %ivstart = getelementptr inbounds [256 x i8], [256 x i8]* %base, i32 0, i32 0
- %ivend = getelementptr inbounds [256 x i8], [256 x i8]* %base, i32 0, i32 %n
- %cmp.ph = icmp ult i8* %ivstart, %ivend
+ %ivend = getelementptr inbounds [256 x i8], ptr %base, i32 0, i32 %n
+ %cmp.ph = icmp ult ptr %base, %ivend
br i1 %cmp.ph, label %loop, label %exit
loop:
- %aptr = phi i8* [ %ivstart, %entry ], [ %incdec.ptr, %loop ]
- %incdec.ptr = getelementptr inbounds i8, i8* %aptr, i32 1
- store i8 3, i8* %aptr
- %cmp = icmp ult i8* %incdec.ptr, %ivend
+ %aptr = phi ptr [ %base, %entry ], [ %incdec.ptr, %loop ]
+ %incdec.ptr = getelementptr inbounds i8, ptr %aptr, i32 1
+ store i8 3, ptr %aptr
+ %cmp = icmp ult ptr %incdec.ptr, %ivend
br i1 %cmp, label %loop, label %exit
exit:
diff --git a/llvm/test/Transforms/IndVarSimplify/loop-predication.ll b/llvm/test/Transforms/IndVarSimplify/loop-predication.ll
index 5630bbeb937bb..3246220da87b1 100644
--- a/llvm/test/Transforms/IndVarSimplify/loop-predication.ll
+++ b/llvm/test/Transforms/IndVarSimplify/loop-predication.ll
@@ -4,7 +4,7 @@
declare void @prevent_merging()
; Base case
-define i32 @test1(i32* %array, i32 %length, i32 %n) {
+define i32 @test1(ptr %array, i32 %length, i32 %n) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: loop.preheader:
; CHECK-NEXT: [[UMAX:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 1)
@@ -22,8 +22,8 @@ define i32 @test1(i32* %array, i32 %length, i32 %n) {
; CHECK-NEXT: ret i32 -1
; CHECK: guarded:
; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -47,8 +47,8 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
- %array.i = load i32, i32* %array.i.ptr, align 4
+ %array.i.ptr = getelementptr inbounds i32, ptr %array, i64 %i.i64
+ %array.i = load i32, ptr %array.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc, %array.i
%i.next = add nuw i32 %i, 1
%continue = icmp ult i32 %i.next, %n
@@ -60,7 +60,7 @@ exit: ; preds = %guarded, %entry
}
; Has side effect which must be reflected
-define i32 @neg_store(i32* %array, i32 %length, i32 %n) {
+define i32 @neg_store(ptr %array, i32 %length, i32 %n) {
; CHECK-LABEL: @neg_store(
; CHECK-NEXT: loop.preheader:
; CHECK-NEXT: br label [[LOOP:%.*]]
@@ -74,10 +74,10 @@ define i32 @neg_store(i32* %array, i32 %length, i32 %n) {
; CHECK-NEXT: ret i32 -1
; CHECK: guarded:
; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
-; CHECK-NEXT: store i32 0, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: store i32 0, ptr [[ARRAY_I_PTR]], align 4
; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N:%.*]]
; CHECK-NEXT: br i1 [[CONTINUE]], label [[LOOP]], label [[EXIT:%.*]]
@@ -100,10 +100,10 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
- %array.i = load i32, i32* %array.i.ptr, align 4
+ %array.i.ptr = getelementptr inbounds i32, ptr %array, i64 %i.i64
+ %array.i = load i32, ptr %array.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc, %array.i
- store i32 0, i32* %array.i.ptr
+ store i32 0, ptr %array.i.ptr
%i.next = add nuw i32 %i, 1
%continue = icmp ult i32 %i.next, %n
br i1 %continue, label %loop, label %exit
@@ -116,7 +116,7 @@ exit: ; preds = %guarded, %entry
declare void @maythrow()
; May exit through implicit exception edge
-define i32 @neg_implicit_exit(i32* %array, i32 %length, i32 %n) {
+define i32 @neg_implicit_exit(ptr %array, i32 %length, i32 %n) {
; CHECK-LABEL: @neg_implicit_exit(
; CHECK-NEXT: loop.preheader:
; CHECK-NEXT: br label [[LOOP:%.*]]
@@ -131,8 +131,8 @@ define i32 @neg_implicit_exit(i32* %array, i32 %length, i32 %n) {
; CHECK-NEXT: ret i32 -1
; CHECK: guarded:
; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N:%.*]]
@@ -157,8 +157,8 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
- %array.i = load i32, i32* %array.i.ptr, align 4
+ %array.i.ptr = getelementptr inbounds i32, ptr %array, i64 %i.i64
+ %array.i = load i32, ptr %array.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc, %array.i
%i.next = add nuw i32 %i, 1
%continue = icmp ult i32 %i.next, %n
@@ -172,7 +172,7 @@ exit: ; preds = %guarded, %entry
; Base case, but in LFTR form (just for basic correctness checking)
-define i32 @test2(i32* %array, i32 %length, i32 %n) {
+define i32 @test2(ptr %array, i32 %length, i32 %n) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: loop.preheader:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N:%.*]], -1
@@ -189,8 +189,8 @@ define i32 @test2(i32* %array, i32 %length, i32 %n) {
; CHECK-NEXT: ret i32 -1
; CHECK: guarded:
; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ne i32 [[I_NEXT]], [[N]]
@@ -214,8 +214,8 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
- %array.i = load i32, i32* %array.i.ptr, align 4
+ %array.i.ptr = getelementptr inbounds i32, ptr %array, i64 %i.i64
+ %array.i = load i32, ptr %array.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc, %array.i
%i.next = add nuw i32 %i, 1
%continue = icmp ne i32 %i.next, %n
@@ -227,7 +227,7 @@ exit: ; preds = %guarded, %entry
}
; br (and rcheck1, rcheck2)
-define i32 @two_range_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32 %length.2, i32 %n) {
+define i32 @two_range_checks(ptr %array.1, i32 %length.1, ptr %array.2, i32 %length.2, i32 %n) {
; CHECK-LABEL: @two_range_checks(
; CHECK-NEXT: loop.preheader:
; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[LENGTH_2:%.*]], i32 [[LENGTH_1:%.*]])
@@ -246,11 +246,11 @@ define i32 @two_range_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32 %l
; CHECK-NEXT: ret i32 -1
; CHECK: guarded:
; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_1_I:%.*]] = load i32, ptr [[ARRAY_1_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
-; CHECK-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_2:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_2_I:%.*]] = load i32, i32* [[ARRAY_2_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_2:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_2_I:%.*]] = load i32, ptr [[ARRAY_2_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_1]], [[ARRAY_2_I]]
; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -276,11 +276,11 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.1.i.ptr = getelementptr inbounds i32, i32* %array.1, i64 %i.i64
- %array.1.i = load i32, i32* %array.1.i.ptr, align 4
+ %array.1.i.ptr = getelementptr inbounds i32, ptr %array.1, i64 %i.i64
+ %array.1.i = load i32, ptr %array.1.i.ptr, align 4
%loop.acc.1 = add i32 %loop.acc, %array.1.i
- %array.2.i.ptr = getelementptr inbounds i32, i32* %array.2, i64 %i.i64
- %array.2.i = load i32, i32* %array.2.i.ptr, align 4
+ %array.2.i.ptr = getelementptr inbounds i32, ptr %array.2, i64 %i.i64
+ %array.2.i = load i32, ptr %array.2.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc.1, %array.2.i
%i.next = add nuw i32 %i, 1
%continue = icmp ult i32 %i.next, %n
@@ -291,7 +291,7 @@ exit: ; preds = %guarded, %entry
ret i32 %result
}
-define i32 @three_range_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32 %length.2, i32* %array.3, i32 %length.3, i32 %n) {
+define i32 @three_range_checks(ptr %array.1, i32 %length.1, ptr %array.2, i32 %length.2, ptr %array.3, i32 %length.3, i32 %n) {
; CHECK-LABEL: @three_range_checks(
; CHECK-NEXT: loop.preheader:
; CHECK-NEXT: [[UMIN:%.*]] = call i32 @llvm.umin.i32(i32 [[LENGTH_3:%.*]], i32 [[LENGTH_2:%.*]])
@@ -311,14 +311,14 @@ define i32 @three_range_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32
; CHECK-NEXT: ret i32 -1
; CHECK: guarded:
; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_1_I:%.*]] = load i32, ptr [[ARRAY_1_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
-; CHECK-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_2:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_2_I:%.*]] = load i32, i32* [[ARRAY_2_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_2_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_2:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_2_I:%.*]] = load i32, ptr [[ARRAY_2_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_2:%.*]] = add i32 [[LOOP_ACC_1]], [[ARRAY_2_I]]
-; CHECK-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_3:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_3_I:%.*]] = load i32, i32* [[ARRAY_3_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_3:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_3_I:%.*]] = load i32, ptr [[ARRAY_3_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_2]], [[ARRAY_3_I]]
; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -346,14 +346,14 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.1.i.ptr = getelementptr inbounds i32, i32* %array.1, i64 %i.i64
- %array.1.i = load i32, i32* %array.1.i.ptr, align 4
+ %array.1.i.ptr = getelementptr inbounds i32, ptr %array.1, i64 %i.i64
+ %array.1.i = load i32, ptr %array.1.i.ptr, align 4
%loop.acc.1 = add i32 %loop.acc, %array.1.i
- %array.2.i.ptr = getelementptr inbounds i32, i32* %array.2, i64 %i.i64
- %array.2.i = load i32, i32* %array.2.i.ptr, align 4
+ %array.2.i.ptr = getelementptr inbounds i32, ptr %array.2, i64 %i.i64
+ %array.2.i = load i32, ptr %array.2.i.ptr, align 4
%loop.acc.2 = add i32 %loop.acc.1, %array.2.i
- %array.3.i.ptr = getelementptr inbounds i32, i32* %array.3, i64 %i.i64
- %array.3.i = load i32, i32* %array.3.i.ptr, align 4
+ %array.3.i.ptr = getelementptr inbounds i32, ptr %array.3, i64 %i.i64
+ %array.3.i = load i32, ptr %array.3.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc.2, %array.3.i
%i.next = add nuw i32 %i, 1
%continue = icmp ult i32 %i.next, %n
@@ -365,7 +365,7 @@ exit: ; preds = %guarded, %entry
}
; Analogous to the above, but with two distinct branches (on
diff erent conditions)
-define i32 @distinct_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32 %length.2, i32* %array.3, i32 %length.3, i32 %n) {
+define i32 @distinct_checks(ptr %array.1, i32 %length.1, ptr %array.2, i32 %length.2, ptr %array.3, i32 %length.3, i32 %n) {
; CHECK-LABEL: @distinct_checks(
; CHECK-NEXT: loop.preheader:
; CHECK-NEXT: [[UMAX:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 1)
@@ -386,16 +386,16 @@ define i32 @distinct_checks(i32* %array.1, i32 %length.1, i32* %array.2, i32 %le
; CHECK-NEXT: ret i32 -1
; CHECK: guarded:
; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_1_I:%.*]] = load i32, ptr [[ARRAY_1_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
; CHECK-NEXT: br i1 [[TMP4]], label [[GUARDED1]], label [[DEOPT2:%.*]], !prof [[PROF0]]
; CHECK: deopt2:
; CHECK-NEXT: call void @prevent_merging()
; CHECK-NEXT: ret i32 -1
; CHECK: guarded1:
-; CHECK-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_3:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_3_I:%.*]] = load i32, i32* [[ARRAY_3_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_3:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_3_I:%.*]] = load i32, ptr [[ARRAY_3_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_1]], [[ARRAY_3_I]]
; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -419,8 +419,8 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.1.i.ptr = getelementptr inbounds i32, i32* %array.1, i64 %i.i64
- %array.1.i = load i32, i32* %array.1.i.ptr, align 4
+ %array.1.i.ptr = getelementptr inbounds i32, ptr %array.1, i64 %i.i64
+ %array.1.i = load i32, ptr %array.1.i.ptr, align 4
%loop.acc.1 = add i32 %loop.acc, %array.1.i
%within.bounds.2 = icmp ult i32 %i, %length.2
br i1 %within.bounds.2, label %guarded1, label %deopt2, !prof !0
@@ -430,8 +430,8 @@ deopt2: ; preds = %guarded
ret i32 -1
guarded1: ; preds = %guarded1
- %array.3.i.ptr = getelementptr inbounds i32, i32* %array.3, i64 %i.i64
- %array.3.i = load i32, i32* %array.3.i.ptr, align 4
+ %array.3.i.ptr = getelementptr inbounds i32, ptr %array.3, i64 %i.i64
+ %array.3.i = load i32, ptr %array.3.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc.1, %array.3.i
%i.next = add nuw i32 %i, 1
%continue = icmp ult i32 %i.next, %n
@@ -442,7 +442,7 @@ exit:
ret i32 %result
}
-define i32 @duplicate_checks(i32* %array.1, i32* %array.2, i32* %array.3, i32 %length, i32 %n) {
+define i32 @duplicate_checks(ptr %array.1, ptr %array.2, ptr %array.3, i32 %length, i32 %n) {
; CHECK-LABEL: @duplicate_checks(
; CHECK-NEXT: loop.preheader:
; CHECK-NEXT: [[UMAX:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 1)
@@ -460,16 +460,16 @@ define i32 @duplicate_checks(i32* %array.1, i32* %array.2, i32* %array.3, i32 %l
; CHECK-NEXT: ret i32 -1
; CHECK: guarded:
; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_1:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_1_I:%.*]] = load i32, i32* [[ARRAY_1_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_1_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_1:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_1_I:%.*]] = load i32, ptr [[ARRAY_1_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_1:%.*]] = add i32 [[LOOP_ACC]], [[ARRAY_1_I]]
; CHECK-NEXT: br i1 true, label [[GUARDED1]], label [[DEOPT2:%.*]], !prof [[PROF0]]
; CHECK: deopt2:
; CHECK-NEXT: call void @prevent_merging()
; CHECK-NEXT: ret i32 -1
; CHECK: guarded1:
-; CHECK-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY_3:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_3_I:%.*]] = load i32, i32* [[ARRAY_3_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_3_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY_3:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_3_I:%.*]] = load i32, ptr [[ARRAY_3_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC_1]], [[ARRAY_3_I]]
; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N]]
@@ -493,8 +493,8 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.1.i.ptr = getelementptr inbounds i32, i32* %array.1, i64 %i.i64
- %array.1.i = load i32, i32* %array.1.i.ptr, align 4
+ %array.1.i.ptr = getelementptr inbounds i32, ptr %array.1, i64 %i.i64
+ %array.1.i = load i32, ptr %array.1.i.ptr, align 4
%loop.acc.1 = add i32 %loop.acc, %array.1.i
%within.bounds.2 = icmp ult i32 %i, %length
br i1 %within.bounds.2, label %guarded1, label %deopt2, !prof !0
@@ -504,8 +504,8 @@ deopt2: ; preds = %guarded
ret i32 -1
guarded1: ; preds = %guarded1
- %array.3.i.ptr = getelementptr inbounds i32, i32* %array.3, i64 %i.i64
- %array.3.i = load i32, i32* %array.3.i.ptr, align 4
+ %array.3.i.ptr = getelementptr inbounds i32, ptr %array.3, i64 %i.i64
+ %array.3.i = load i32, ptr %array.3.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc.1, %array.3.i
%i.next = add nuw i32 %i, 1
%continue = icmp ult i32 %i.next, %n
@@ -517,7 +517,7 @@ exit:
}
-define i32 @provably_taken(i32* %array, i32* %length.ptr) {
+define i32 @provably_taken(ptr %array, ptr %length.ptr) {
; CHECK-LABEL: @provably_taken(
; CHECK-NEXT: loop.preheader:
; CHECK-NEXT: br label [[LOOP:%.*]]
@@ -530,8 +530,8 @@ define i32 @provably_taken(i32* %array, i32* %length.ptr) {
; CHECK-NEXT: ret i32 -1
; CHECK: guarded:
; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i32 [[I]], 1
; CHECK-NEXT: br i1 true, label [[LOOP]], label [[EXIT:%.*]]
@@ -540,7 +540,7 @@ define i32 @provably_taken(i32* %array, i32* %length.ptr) {
; CHECK-NEXT: ret i32 [[RESULT]]
;
loop.preheader:
- %length = load i32, i32* %length.ptr, !range !2
+ %length = load i32, ptr %length.ptr, !range !2
br label %loop
loop: ; preds = %guarded, %loop.preheader
@@ -555,8 +555,8 @@ deopt: ; preds = %loop
guarded: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
- %array.i = load i32, i32* %array.i.ptr, align 4
+ %array.i.ptr = getelementptr inbounds i32, ptr %array, i64 %i.i64
+ %array.i = load i32, ptr %array.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc, %array.i
%i.next = add nuw i32 %i, 1
%continue = icmp slt i32 %i.next, 200
@@ -568,7 +568,7 @@ exit: ; preds = %guarded
}
; Non-latch exits can still be predicated
-define i32 @unconditional_latch(i32* %a, i32 %length) {
+define i32 @unconditional_latch(ptr %a, i32 %length) {
; CHECK-LABEL: @unconditional_latch(
; CHECK-NEXT: loop.preheader:
; CHECK-NEXT: br label [[LOOP:%.*]]
@@ -598,7 +598,7 @@ guarded: ; preds = %loop
}
; Side effect in loop must run proper number of times
-define i32 @unconditional_latch_with_side_effect(i32* %a, i32 %length) {
+define i32 @unconditional_latch_with_side_effect(ptr %a, i32 %length) {
; CHECK-LABEL: @unconditional_latch_with_side_effect(
; CHECK-NEXT: loop.preheader:
; CHECK-NEXT: br label [[LOOP:%.*]]
@@ -610,7 +610,7 @@ define i32 @unconditional_latch_with_side_effect(i32* %a, i32 %length) {
; CHECK-NEXT: call void @prevent_merging()
; CHECK-NEXT: ret i32 -1
; CHECK: guarded:
-; CHECK-NEXT: store volatile i32 0, i32* [[A:%.*]], align 4
+; CHECK-NEXT: store volatile i32 0, ptr [[A:%.*]], align 4
; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-NEXT: br label [[LOOP]]
;
@@ -627,7 +627,7 @@ deopt: ; preds = %loop
ret i32 -1
guarded: ; preds = %loop
- store volatile i32 0, i32* %a
+ store volatile i32 0, ptr %a
%i.next = add i32 %i, 1
br label %loop
}
@@ -635,7 +635,7 @@ guarded: ; preds = %loop
; Demonstrate that this approach works with IVs of
diff erent steps, and types
; This version uses a manually lftred exit condition to work around an issue described
; in detail on next test.
-define i32 @
diff erent_ivs(i32* %array, i32 %length, i32 %n) {
+define i32 @
diff erent_ivs(ptr %array, i32 %length, i32 %n) {
; CHECK-LABEL: @
diff erent_ivs(
; CHECK-NEXT: loop.preheader:
; CHECK-NEXT: [[N64:%.*]] = zext i32 [[N:%.*]] to i64
@@ -655,8 +655,8 @@ define i32 @
diff erent_ivs(i32* %array, i32 %length, i32 %n) {
; CHECK-NEXT: call void @prevent_merging()
; CHECK-NEXT: ret i32 -1
; CHECK: guarded:
-; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I]]
-; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i64 [[I]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1
; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i64 [[I_NEXT]], [[N64]]
@@ -682,8 +682,8 @@ deopt:
ret i32 -1
guarded:
- %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i
- %array.i = load i32, i32* %array.i.ptr, align 4
+ %array.i.ptr = getelementptr inbounds i32, ptr %array, i64 %i
+ %array.i = load i32, ptr %array.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc, %array.i
%i.next = add nuw i64 %i, 1
%j.next = sub nuw i32 %j, 1
@@ -698,7 +698,7 @@ exit:
; TODO: We're failing to compute an exit count for the bounds check.
; From some quick analysis, it looks like we don't handle -1 step
; in howManyLessThans. Should be a simple fix.
-define i32 @
diff erent_ivs2(i32* %array, i32 %length, i32 %n) {
+define i32 @
diff erent_ivs2(ptr %array, i32 %length, i32 %n) {
; CHECK-LABEL: @
diff erent_ivs2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[POS_LENGTH:%.*]] = icmp sgt i32 [[LENGTH:%.*]], 0
@@ -717,8 +717,8 @@ define i32 @
diff erent_ivs2(i32* %array, i32 %length, i32 %n) {
; CHECK-NEXT: call void @prevent_merging()
; CHECK-NEXT: ret i32 -1
; CHECK: guarded:
-; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I]]
-; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i64 [[I]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1
; CHECK-NEXT: [[J_NEXT]] = sub nuw i32 [[J]], 1
@@ -752,8 +752,8 @@ deopt:
ret i32 -1
guarded:
- %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i
- %array.i = load i32, i32* %array.i.ptr, align 4
+ %array.i.ptr = getelementptr inbounds i32, ptr %array, i64 %i
+ %array.i = load i32, ptr %array.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc, %array.i
%i.next = add nuw i64 %i, 1
%j.next = sub nuw i32 %j, 1
@@ -768,7 +768,7 @@ exit:
; If we have a dominating exit (exit1) which can't be itself rewritten, we
; can't rewrite a later exit (exit2). Doing so would cause the loop to exit
; from the exit2 when it should have exited from exit1.
-define i32 @neg_dominating_exit(i32* %array, i32 %length, i32 %length2, i32 %n) {
+define i32 @neg_dominating_exit(ptr %array, i32 %length, i32 %length2, i32 %n) {
; CHECK-LABEL: @neg_dominating_exit(
; CHECK-NEXT: loop.preheader:
; CHECK-NEXT: br label [[LOOP:%.*]]
@@ -789,8 +789,8 @@ define i32 @neg_dominating_exit(i32* %array, i32 %length, i32 %length2, i32 %n)
; CHECK-NEXT: ret i32 -1
; CHECK: guarded2:
; CHECK-NEXT: [[I_I64:%.*]] = zext i32 [[I]] to i64
-; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, i32* [[ARRAY:%.*]], i64 [[I_I64]]
-; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, i32* [[ARRAY_I_PTR]], align 4
+; CHECK-NEXT: [[ARRAY_I_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARRAY:%.*]], i64 [[I_I64]]
+; CHECK-NEXT: [[ARRAY_I:%.*]] = load i32, ptr [[ARRAY_I_PTR]], align 4
; CHECK-NEXT: [[LOOP_ACC_NEXT]] = add i32 [[LOOP_ACC]], [[ARRAY_I]]
; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
; CHECK-NEXT: [[CONTINUE:%.*]] = icmp ult i32 [[I_NEXT]], [[N:%.*]]
@@ -823,8 +823,8 @@ deopt2: ; preds = %loop
guarded2: ; preds = %loop
%i.i64 = zext i32 %i to i64
- %array.i.ptr = getelementptr inbounds i32, i32* %array, i64 %i.i64
- %array.i = load i32, i32* %array.i.ptr, align 4
+ %array.i.ptr = getelementptr inbounds i32, ptr %array, i64 %i.i64
+ %array.i = load i32, ptr %array.i.ptr, align 4
%loop.acc.next = add i32 %loop.acc, %array.i
%i.next = add nuw i32 %i, 1
%continue = icmp ult i32 %i.next, %n
diff --git a/llvm/test/Transforms/IndVarSimplify/no-iv-rewrite.ll b/llvm/test/Transforms/IndVarSimplify/no-iv-rewrite.ll
index c2d77d8cb2f2f..355c927b0accf 100644
--- a/llvm/test/Transforms/IndVarSimplify/no-iv-rewrite.ll
+++ b/llvm/test/Transforms/IndVarSimplify/no-iv-rewrite.ll
@@ -8,7 +8,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; We should only have 2 IVs.
; sext should be eliminated while preserving gep inboundsness.
-define i32 @sum(i32* %arr, i32 %n) nounwind {
+define i32 @sum(ptr %arr, i32 %n) nounwind {
; CHECK-LABEL: @sum(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[PRECOND:%.*]] = icmp slt i32 0, [[N:%.*]]
@@ -19,8 +19,8 @@ define i32 @sum(i32* %arr, i32 %n) nounwind {
; CHECK: loop:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[PH]] ]
; CHECK-NEXT: [[S_01:%.*]] = phi i32 [ 0, [[PH]] ], [ [[SINC:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[ADR:%.*]] = getelementptr inbounds i32, i32* [[ARR:%.*]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[VAL:%.*]] = load i32, i32* [[ADR]], align 4
+; CHECK-NEXT: [[ADR:%.*]] = getelementptr inbounds i32, ptr [[ARR:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[ADR]], align 4
; CHECK-NEXT: [[SINC]] = add nsw i32 [[S_01]], [[VAL]]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
@@ -43,8 +43,8 @@ loop:
%i.02 = phi i32 [ 0, %ph ], [ %iinc, %loop ]
%s.01 = phi i32 [ 0, %ph ], [ %sinc, %loop ]
%ofs = sext i32 %i.02 to i64
- %adr = getelementptr inbounds i32, i32* %arr, i64 %ofs
- %val = load i32, i32* %adr
+ %adr = getelementptr inbounds i32, ptr %arr, i64 %ofs
+ %val = load i32, ptr %adr
%sinc = add nsw i32 %s.01, %val
%iinc = add nsw i32 %i.02, 1
%cond = icmp slt i32 %iinc, %n
@@ -62,7 +62,7 @@ return:
; We should only have 2 IVs.
; %ofs sext should be eliminated while preserving gep inboundsness.
; %vall sext should obviously not be eliminated
-define i64 @suml(i32* %arr, i32 %n) nounwind {
+define i64 @suml(ptr %arr, i32 %n) nounwind {
; CHECK-LABEL: @suml(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[PRECOND:%.*]] = icmp slt i32 0, [[N:%.*]]
@@ -73,8 +73,8 @@ define i64 @suml(i32* %arr, i32 %n) nounwind {
; CHECK: loop:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[PH]] ]
; CHECK-NEXT: [[S_01:%.*]] = phi i64 [ 0, [[PH]] ], [ [[SINC:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[ADR:%.*]] = getelementptr inbounds i32, i32* [[ARR:%.*]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[VAL:%.*]] = load i32, i32* [[ADR]], align 4
+; CHECK-NEXT: [[ADR:%.*]] = getelementptr inbounds i32, ptr [[ARR:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[ADR]], align 4
; CHECK-NEXT: [[VALL:%.*]] = sext i32 [[VAL]] to i64
; CHECK-NEXT: [[SINC]] = add nsw i64 [[S_01]], [[VALL]]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
@@ -98,8 +98,8 @@ loop:
%i.02 = phi i32 [ 0, %ph ], [ %iinc, %loop ]
%s.01 = phi i64 [ 0, %ph ], [ %sinc, %loop ]
%ofs = sext i32 %i.02 to i64
- %adr = getelementptr inbounds i32, i32* %arr, i64 %ofs
- %val = load i32, i32* %adr
+ %adr = getelementptr inbounds i32, ptr %arr, i64 %ofs
+ %val = load i32, ptr %adr
%vall = sext i32 %val to i64
%sinc = add nsw i64 %s.01, %vall
%iinc = add nsw i32 %i.02, 1
@@ -119,38 +119,38 @@ return:
; Preserve exactly one pointer type IV.
; Don't create any extra adds.
; Preserve gep inboundsness, and don't factor it.
-define void @outofbounds(i32* %first, i32* %last, i32 %idx) nounwind {
+define void @outofbounds(ptr %first, ptr %last, i32 %idx) nounwind {
; CHECK-LABEL: @outofbounds(
-; CHECK-NEXT: [[PRECOND:%.*]] = icmp ne i32* [[FIRST:%.*]], [[LAST:%.*]]
+; CHECK-NEXT: [[PRECOND:%.*]] = icmp ne ptr [[FIRST:%.*]], [[LAST:%.*]]
; CHECK-NEXT: br i1 [[PRECOND]], label [[PH:%.*]], label [[RETURN:%.*]]
; CHECK: ph:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[PTRIV:%.*]] = phi i32* [ [[FIRST]], [[PH]] ], [ [[PTRPOST:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[PTRIV:%.*]] = phi ptr [ [[FIRST]], [[PH]] ], [ [[PTRPOST:%.*]], [[LOOP]] ]
; CHECK-NEXT: [[OFS:%.*]] = sext i32 [[IDX:%.*]] to i64
-; CHECK-NEXT: [[ADR:%.*]] = getelementptr inbounds i32, i32* [[PTRIV]], i64 [[OFS]]
-; CHECK-NEXT: store i32 3, i32* [[ADR]], align 4
-; CHECK-NEXT: [[PTRPOST]] = getelementptr inbounds i32, i32* [[PTRIV]], i32 1
-; CHECK-NEXT: [[COND:%.*]] = icmp ne i32* [[PTRPOST]], [[LAST]]
+; CHECK-NEXT: [[ADR:%.*]] = getelementptr inbounds i32, ptr [[PTRIV]], i64 [[OFS]]
+; CHECK-NEXT: store i32 3, ptr [[ADR]], align 4
+; CHECK-NEXT: [[PTRPOST]] = getelementptr inbounds i32, ptr [[PTRIV]], i32 1
+; CHECK-NEXT: [[COND:%.*]] = icmp ne ptr [[PTRPOST]], [[LAST]]
; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: ret void
;
- %precond = icmp ne i32* %first, %last
+ %precond = icmp ne ptr %first, %last
br i1 %precond, label %ph, label %return
ph:
br label %loop
loop:
- %ptriv = phi i32* [ %first, %ph ], [ %ptrpost, %loop ]
+ %ptriv = phi ptr [ %first, %ph ], [ %ptrpost, %loop ]
%ofs = sext i32 %idx to i64
- %adr = getelementptr inbounds i32, i32* %ptriv, i64 %ofs
- store i32 3, i32* %adr
- %ptrpost = getelementptr inbounds i32, i32* %ptriv, i32 1
- %cond = icmp ne i32* %ptrpost, %last
+ %adr = getelementptr inbounds i32, ptr %ptriv, i64 %ofs
+ store i32 3, ptr %adr
+ %ptrpost = getelementptr inbounds i32, ptr %ptriv, i32 1
+ %cond = icmp ne ptr %ptrpost, %last
br i1 %cond, label %loop, label %exit
exit:
@@ -163,18 +163,16 @@ return:
%structI = type { i32 }
; Preserve casts
-define void @bitcastiv(i32 %start, i32 %limit, i32 %step, %structI* %base)
+define void @bitcastiv(i32 %start, i32 %limit, i32 %step, ptr %base)
; CHECK-LABEL: @bitcastiv(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START:%.*]], [[ENTRY:%.*]] ], [ [[NEXT:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[P:%.*]] = phi %structI* [ [[BASE:%.*]], [[ENTRY]] ], [ [[PINC:%.*]], [[LOOP]] ]
-; CHECK-NEXT: [[ADR:%.*]] = getelementptr [[STRUCTI:%.*]], %structI* [[P]], i32 0, i32 0
-; CHECK-NEXT: store i32 3, i32* [[ADR]], align 4
-; CHECK-NEXT: [[PP:%.*]] = bitcast %structI* [[P]] to i32*
-; CHECK-NEXT: store i32 4, i32* [[PP]], align 4
-; CHECK-NEXT: [[PINC]] = getelementptr [[STRUCTI]], %structI* [[P]], i32 1
+; CHECK-NEXT: [[P:%.*]] = phi ptr [ [[BASE:%.*]], [[ENTRY]] ], [ [[PINC:%.*]], [[LOOP]] ]
+; CHECK-NEXT: store i32 3, ptr [[P]], align 4
+; CHECK-NEXT: store i32 4, ptr [[P]], align 4
+; CHECK-NEXT: [[PINC]] = getelementptr [[STRUCTI:%.*]], ptr [[P]], i32 1
; CHECK-NEXT: [[NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[NEXT]], [[LIMIT:%.*]]
; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]]
@@ -188,12 +186,10 @@ entry:
loop:
%iv = phi i32 [%start, %entry], [%next, %loop]
- %p = phi %structI* [%base, %entry], [%pinc, %loop]
- %adr = getelementptr %structI, %structI* %p, i32 0, i32 0
- store i32 3, i32* %adr
- %pp = bitcast %structI* %p to i32*
- store i32 4, i32* %pp
- %pinc = getelementptr %structI, %structI* %p, i32 1
+ %p = phi ptr [%base, %entry], [%pinc, %loop]
+ store i32 3, ptr %p
+ store i32 4, ptr %p
+ %pinc = getelementptr %structI, ptr %p, i32 1
%next = add i32 %iv, 1
%cond = icmp ne i32 %next, %limit
br i1 %cond, label %loop, label %exit
@@ -203,7 +199,7 @@ exit:
}
; Test inserting a truncate at a phi use.
-define void @maxvisitor(i32 %limit, i32* %base) nounwind {
+define void @maxvisitor(i32 %limit, ptr %base) nounwind {
; CHECK-LABEL: @maxvisitor(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[LIMIT:%.*]], i32 1)
@@ -212,8 +208,8 @@ define void @maxvisitor(i32 %limit, i32* %base) nounwind {
; CHECK: loop:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[MAX:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[MAX_NEXT:%.*]], [[LOOP_INC]] ]
-; CHECK-NEXT: [[ADR:%.*]] = getelementptr inbounds i32, i32* [[BASE:%.*]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[VAL:%.*]] = load i32, i32* [[ADR]], align 4
+; CHECK-NEXT: [[ADR:%.*]] = getelementptr inbounds i32, ptr [[BASE:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[ADR]], align 4
; CHECK-NEXT: [[CMP19:%.*]] = icmp sgt i32 [[VAL]], [[MAX]]
; CHECK-NEXT: br i1 [[CMP19]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; CHECK: if.then:
@@ -236,8 +232,8 @@ loop:
%idx = phi i32 [ 0, %entry ], [ %idx.next, %loop.inc ]
%max = phi i32 [ 0, %entry ], [ %max.next, %loop.inc ]
%idxprom = sext i32 %idx to i64
- %adr = getelementptr inbounds i32, i32* %base, i64 %idxprom
- %val = load i32, i32* %adr
+ %adr = getelementptr inbounds i32, ptr %base, i64 %idxprom
+ %val = load i32, ptr %adr
%cmp19 = icmp sgt i32 %val, %max
br i1 %cmp19, label %if.then, label %if.else
@@ -293,7 +289,7 @@ exit:
}
; Test cloning an or, which is not an OverflowBinaryOperator.
-define i64 @cloneOr(i32 %limit, i64* %base) nounwind {
+define i64 @cloneOr(i32 %limit, ptr %base) nounwind {
; CHECK-LABEL: @cloneOr(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[HALFLIM:%.*]] = ashr i32 [[LIMIT:%.*]], 2
@@ -301,8 +297,8 @@ define i64 @cloneOr(i32 %limit, i64* %base) nounwind {
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
-; CHECK-NEXT: [[ADR:%.*]] = getelementptr i64, i64* [[BASE:%.*]], i64 [[INDVARS_IV]]
-; CHECK-NEXT: [[VAL:%.*]] = load i64, i64* [[ADR]], align 8
+; CHECK-NEXT: [[ADR:%.*]] = getelementptr i64, ptr [[BASE:%.*]], i64 [[INDVARS_IV]]
+; CHECK-NEXT: [[VAL:%.*]] = load i64, ptr [[ADR]], align 8
; CHECK-NEXT: [[TMP1:%.*]] = or i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 2
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT]], [[TMP0]]
@@ -321,8 +317,8 @@ entry:
loop:
%iv = phi i32 [ 0, %entry], [ %iv.next, %loop ]
%t1 = sext i32 %iv to i64
- %adr = getelementptr i64, i64* %base, i64 %t1
- %val = load i64, i64* %adr
+ %adr = getelementptr i64, ptr %base, i64 %t1
+ %val = load i64, ptr %adr
%t2 = or i32 %iv, 1
%t3 = sext i32 %t2 to i64
%iv.next = add i32 %iv, 2
@@ -431,13 +427,12 @@ return:
; lowers the type without changing the expression.
%structIF = type { i32, float }
-define void @congruentgepiv(%structIF* %base) nounwind uwtable ssp {
+define void @congruentgepiv(ptr %base) nounwind uwtable ssp {
; CHECK-LABEL: @congruentgepiv(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[INDVARS1:%.*]] = bitcast %structIF* [[BASE:%.*]] to i32*
-; CHECK-NEXT: store i32 4, i32* [[INDVARS1]], align 4
+; CHECK-NEXT: store i32 4, ptr [[BASE:%.*]], align 4
; CHECK-NEXT: br i1 false, label [[LATCH:%.*]], label [[EXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: br label [[LOOP]]
@@ -445,18 +440,16 @@ define void @congruentgepiv(%structIF* %base) nounwind uwtable ssp {
; CHECK-NEXT: ret void
;
entry:
- %first = getelementptr inbounds %structIF, %structIF* %base, i64 0, i32 0
br label %loop
loop:
- %ptr.iv = phi %structIF* [ %ptr.inc, %latch ], [ %base, %entry ]
- %next = phi i32* [ %next.inc, %latch ], [ %first, %entry ]
- store i32 4, i32* %next
+ %ptr.iv = phi ptr [ %ptr.inc, %latch ], [ %base, %entry ]
+ %next = phi ptr [ %next, %latch ], [ %base, %entry ]
+ store i32 4, ptr %next
br i1 undef, label %latch, label %exit
latch: ; preds = %for.inc50.i
- %ptr.inc = getelementptr inbounds %structIF, %structIF* %ptr.iv, i64 1
- %next.inc = getelementptr inbounds %structIF, %structIF* %ptr.inc, i64 0, i32 0
+ %ptr.inc = getelementptr inbounds %structIF, ptr %ptr.iv, i64 1
br label %loop
exit:
diff --git a/llvm/test/Transforms/IndVarSimplify/pr24783.ll b/llvm/test/Transforms/IndVarSimplify/pr24783.ll
index 3f3ec2ba9fb2f..c521bcaf59d49 100644
--- a/llvm/test/Transforms/IndVarSimplify/pr24783.ll
+++ b/llvm/test/Transforms/IndVarSimplify/pr24783.ll
@@ -4,32 +4,29 @@
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
-define void @f(i32* %end.s, i8** %loc, i32 %p) {
+define void @f(ptr %end.s, ptr %loc, i32 %p) {
; CHECK-LABEL: @f(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[END:%.*]] = getelementptr inbounds i32, i32* [[END_S:%.*]], i32 [[P:%.*]]
; CHECK-NEXT: br label [[WHILE_BODY_I:%.*]]
; CHECK: while.body.i:
; CHECK-NEXT: br i1 true, label [[LOOP_EXIT:%.*]], label [[WHILE_BODY_I]]
; CHECK: loop.exit:
-; CHECK-NEXT: [[END1:%.*]] = bitcast i32* [[END]] to i8*
-; CHECK-NEXT: store i8* [[END1]], i8** [[LOC:%.*]], align 8
+; CHECK-NEXT: [[END:%.*]] = getelementptr inbounds i32, ptr [[END_S:%.*]], i32 [[P:%.*]]
+; CHECK-NEXT: store ptr [[END]], ptr [[LOC:%.*]], align 8
; CHECK-NEXT: ret void
;
entry:
- %end = getelementptr inbounds i32, i32* %end.s, i32 %p
- %init = bitcast i32* %end.s to i8*
+ %end = getelementptr inbounds i32, ptr %end.s, i32 %p
br label %while.body.i
while.body.i:
- %ptr = phi i8* [ %ptr.inc, %while.body.i ], [ %init, %entry ]
- %ptr.inc = getelementptr inbounds i8, i8* %ptr, i8 1
- %ptr.inc.cast = bitcast i8* %ptr.inc to i32*
- %cmp.i = icmp eq i32* %ptr.inc.cast, %end
+ %ptr = phi ptr [ %ptr.inc, %while.body.i ], [ %end.s, %entry ]
+ %ptr.inc = getelementptr inbounds i8, ptr %ptr, i8 1
+ %cmp.i = icmp eq ptr %ptr.inc, %end
br i1 %cmp.i, label %loop.exit, label %while.body.i
loop.exit:
- %ptr.inc.lcssa = phi i8* [ %ptr.inc, %while.body.i ]
- store i8* %ptr.inc.lcssa, i8** %loc
+ %ptr.inc.lcssa = phi ptr [ %ptr.inc, %while.body.i ]
+ store ptr %ptr.inc.lcssa, ptr %loc
ret void
}
diff --git a/llvm/test/Transforms/IndVarSimplify/pr28705.ll b/llvm/test/Transforms/IndVarSimplify/pr28705.ll
index 8bf90eae02b52..e5c1c09f80b1b 100644
--- a/llvm/test/Transforms/IndVarSimplify/pr28705.ll
+++ b/llvm/test/Transforms/IndVarSimplify/pr28705.ll
@@ -6,7 +6,7 @@
; "%inc.i.i" with "%.sroa.speculated + 1" because it is not profitable.
;
;
-define void @foo(i32 %sub.ptr.div.i, i8* %ref.i1174) local_unnamed_addr {
+define void @foo(i32 %sub.ptr.div.i, ptr %ref.i1174) local_unnamed_addr {
; CHECK-LABEL: @foo(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP_I1137:%.*]] = icmp ugt i32 [[SUB_PTR_DIV_I:%.*]], 3
@@ -24,8 +24,8 @@ define void @foo(i32 %sub.ptr.div.i, i8* %ref.i1174) local_unnamed_addr {
; CHECK: for.body650:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[FOR_BODY650_LR_PH]] ], [ [[INC655:%.*]], [[FOR_BODY650]] ]
; CHECK-NEXT: [[IV2:%.*]] = phi i32 [ 1, [[FOR_BODY650_LR_PH]] ], [ [[INC_I_I]], [[FOR_BODY650]] ]
-; CHECK-NEXT: [[ARRAYIDX_I_I1105:%.*]] = getelementptr inbounds i8, i8* [[REF_I1174:%.*]], i32 [[IV2]]
-; CHECK-NEXT: store i8 7, i8* [[ARRAYIDX_I_I1105]], align 1
+; CHECK-NEXT: [[ARRAYIDX_I_I1105:%.*]] = getelementptr inbounds i8, ptr [[REF_I1174:%.*]], i32 [[IV2]]
+; CHECK-NEXT: store i8 7, ptr [[ARRAYIDX_I_I1105]], align 1
; CHECK-NEXT: [[INC_I_I]] = add nuw nsw i32 [[IV2]], 1
; CHECK-NEXT: [[INC655]] = add nuw nsw i32 [[IV]], 1
; CHECK-NEXT: [[CMP648:%.*]] = icmp eq i32 [[INC655]], [[DOTSROA_SPECULATED]]
@@ -53,8 +53,8 @@ XZ.exit:
for.body650:
%iv = phi i32 [ 0, %for.body650.lr.ph ], [ %inc655, %for.body650 ]
%iv2 = phi i32 [ 1, %for.body650.lr.ph ], [ %inc.i.i, %for.body650 ]
- %arrayidx.i.i1105 = getelementptr inbounds i8, i8* %ref.i1174, i32 %iv2
- store i8 7, i8* %arrayidx.i.i1105, align 1
+ %arrayidx.i.i1105 = getelementptr inbounds i8, ptr %ref.i1174, i32 %iv2
+ store i8 7, ptr %arrayidx.i.i1105, align 1
%inc.i.i = add i32 %iv2, 1
%inc655 = add i32 %iv, 1
%cmp648 = icmp eq i32 %inc655, %.sroa.speculated
diff --git a/llvm/test/Transforms/IndVarSimplify/pr45835.ll b/llvm/test/Transforms/IndVarSimplify/pr45835.ll
index 9a973462b81cb..b03c08cc371b0 100644
--- a/llvm/test/Transforms/IndVarSimplify/pr45835.ll
+++ b/llvm/test/Transforms/IndVarSimplify/pr45835.ll
@@ -9,12 +9,12 @@ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16
@a = common global i8 0, align 1
-define internal fastcc void @d(i8* %c) unnamed_addr #0 {
+define internal fastcc void @d(ptr %c) unnamed_addr #0 {
; ALWAYS-LABEL: @d(
; ALWAYS-NEXT: entry:
-; ALWAYS-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[C:%.*]], i64 -65535
-; ALWAYS-NEXT: [[TMP0:%.*]] = icmp ugt i8* [[C]], @a
-; ALWAYS-NEXT: [[UMAX:%.*]] = select i1 [[TMP0]], i8* [[C]], i8* @a
+; ALWAYS-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, ptr [[C:%.*]], i64 -65535
+; ALWAYS-NEXT: [[TMP0:%.*]] = icmp ugt ptr [[C]], @a
+; ALWAYS-NEXT: [[UMAX:%.*]] = select i1 [[TMP0]], ptr [[C]], ptr @a
; ALWAYS-NEXT: br label [[WHILE_COND:%.*]]
; ALWAYS: while.cond:
; ALWAYS-NEXT: br i1 false, label [[CONT:%.*]], label [[WHILE_END_LOOPEXIT:%.*]]
@@ -24,8 +24,8 @@ define internal fastcc void @d(i8* %c) unnamed_addr #0 {
; ALWAYS-NEXT: i64 0, label [[HANDLER_POINTER_OVERFLOW_I]]
; ALWAYS-NEXT: ]
; ALWAYS: handler.pointer_overflow.i:
-; ALWAYS-NEXT: [[A_MUX_LCSSA4:%.*]] = phi i8* [ [[UMAX]], [[CONT]] ], [ [[UMAX]], [[CONT]] ]
-; ALWAYS-NEXT: [[X5:%.*]] = ptrtoint i8* [[A_MUX_LCSSA4]] to i64
+; ALWAYS-NEXT: [[A_MUX_LCSSA4:%.*]] = phi ptr [ [[UMAX]], [[CONT]] ], [ [[UMAX]], [[CONT]] ]
+; ALWAYS-NEXT: [[X5:%.*]] = ptrtoint ptr [[A_MUX_LCSSA4]] to i64
; ALWAYS-NEXT: br label [[WHILE_END:%.*]]
; ALWAYS: while.end.loopexit:
; ALWAYS-NEXT: br label [[WHILE_END]]
@@ -34,20 +34,20 @@ define internal fastcc void @d(i8* %c) unnamed_addr #0 {
;
; NEVER-LABEL: @d(
; NEVER-NEXT: entry:
-; NEVER-NEXT: [[CMP:%.*]] = icmp ule i8* [[C:%.*]], @a
-; NEVER-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[C]], i64 -65535
+; NEVER-NEXT: [[CMP:%.*]] = icmp ule ptr [[C:%.*]], @a
+; NEVER-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, ptr [[C]], i64 -65535
; NEVER-NEXT: br label [[WHILE_COND:%.*]]
; NEVER: while.cond:
; NEVER-NEXT: br i1 false, label [[CONT:%.*]], label [[WHILE_END_LOOPEXIT:%.*]]
; NEVER: cont:
-; NEVER-NEXT: [[A_MUX:%.*]] = select i1 [[CMP]], i8* @a, i8* [[C]]
+; NEVER-NEXT: [[A_MUX:%.*]] = select i1 [[CMP]], ptr @a, ptr [[C]]
; NEVER-NEXT: switch i64 0, label [[WHILE_COND]] [
; NEVER-NEXT: i64 -1, label [[HANDLER_POINTER_OVERFLOW_I:%.*]]
; NEVER-NEXT: i64 0, label [[HANDLER_POINTER_OVERFLOW_I]]
; NEVER-NEXT: ]
; NEVER: handler.pointer_overflow.i:
-; NEVER-NEXT: [[A_MUX_LCSSA4:%.*]] = phi i8* [ [[A_MUX]], [[CONT]] ], [ [[A_MUX]], [[CONT]] ]
-; NEVER-NEXT: [[X5:%.*]] = ptrtoint i8* [[A_MUX_LCSSA4]] to i64
+; NEVER-NEXT: [[A_MUX_LCSSA4:%.*]] = phi ptr [ [[A_MUX]], [[CONT]] ], [ [[A_MUX]], [[CONT]] ]
+; NEVER-NEXT: [[X5:%.*]] = ptrtoint ptr [[A_MUX_LCSSA4]] to i64
; NEVER-NEXT: br label [[WHILE_END:%.*]]
; NEVER: while.end.loopexit:
; NEVER-NEXT: br label [[WHILE_END]]
@@ -56,20 +56,20 @@ define internal fastcc void @d(i8* %c) unnamed_addr #0 {
;
; CHEAP-LABEL: @d(
; CHEAP-NEXT: entry:
-; CHEAP-NEXT: [[CMP:%.*]] = icmp ule i8* [[C:%.*]], @a
-; CHEAP-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[C]], i64 -65535
+; CHEAP-NEXT: [[CMP:%.*]] = icmp ule ptr [[C:%.*]], @a
+; CHEAP-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, ptr [[C]], i64 -65535
; CHEAP-NEXT: br label [[WHILE_COND:%.*]]
; CHEAP: while.cond:
; CHEAP-NEXT: br i1 false, label [[CONT:%.*]], label [[WHILE_END_LOOPEXIT:%.*]]
; CHEAP: cont:
-; CHEAP-NEXT: [[A_MUX:%.*]] = select i1 [[CMP]], i8* @a, i8* [[C]]
+; CHEAP-NEXT: [[A_MUX:%.*]] = select i1 [[CMP]], ptr @a, ptr [[C]]
; CHEAP-NEXT: switch i64 0, label [[WHILE_COND]] [
; CHEAP-NEXT: i64 -1, label [[HANDLER_POINTER_OVERFLOW_I:%.*]]
; CHEAP-NEXT: i64 0, label [[HANDLER_POINTER_OVERFLOW_I]]
; CHEAP-NEXT: ]
; CHEAP: handler.pointer_overflow.i:
-; CHEAP-NEXT: [[A_MUX_LCSSA4:%.*]] = phi i8* [ [[A_MUX]], [[CONT]] ], [ [[A_MUX]], [[CONT]] ]
-; CHEAP-NEXT: [[X5:%.*]] = ptrtoint i8* [[A_MUX_LCSSA4]] to i64
+; CHEAP-NEXT: [[A_MUX_LCSSA4:%.*]] = phi ptr [ [[A_MUX]], [[CONT]] ], [ [[A_MUX]], [[CONT]] ]
+; CHEAP-NEXT: [[X5:%.*]] = ptrtoint ptr [[A_MUX_LCSSA4]] to i64
; CHEAP-NEXT: br label [[WHILE_END:%.*]]
; CHEAP: while.end.loopexit:
; CHEAP-NEXT: br label [[WHILE_END]]
@@ -77,23 +77,23 @@ define internal fastcc void @d(i8* %c) unnamed_addr #0 {
; CHEAP-NEXT: ret void
;
entry:
- %cmp = icmp ule i8* %c, @a
- %add.ptr = getelementptr inbounds i8, i8* %c, i64 -65535
+ %cmp = icmp ule ptr %c, @a
+ %add.ptr = getelementptr inbounds i8, ptr %c, i64 -65535
br label %while.cond
while.cond:
br i1 icmp ne (i8 0, i8 0), label %cont, label %while.end
cont:
- %a.mux = select i1 %cmp, i8* @a, i8* %c
+ %a.mux = select i1 %cmp, ptr @a, ptr %c
switch i64 0, label %while.cond [
i64 -1, label %handler.pointer_overflow.i
i64 0, label %handler.pointer_overflow.i
]
handler.pointer_overflow.i:
- %a.mux.lcssa4 = phi i8* [ %a.mux, %cont ], [ %a.mux, %cont ]
- %x5 = ptrtoint i8* %a.mux.lcssa4 to i64
+ %a.mux.lcssa4 = phi ptr [ %a.mux, %cont ], [ %a.mux, %cont ]
+ %x5 = ptrtoint ptr %a.mux.lcssa4 to i64
br label %while.end
while.end:
diff --git a/llvm/test/Transforms/IndVarSimplify/predicated_ranges.ll b/llvm/test/Transforms/IndVarSimplify/predicated_ranges.ll
index d8083891dc510..abaf72ea85e63 100644
--- a/llvm/test/Transforms/IndVarSimplify/predicated_ranges.ll
+++ b/llvm/test/Transforms/IndVarSimplify/predicated_ranges.ll
@@ -9,10 +9,10 @@
; 1 <= iv <= len [3];
; 4. iv.next = iv - 1 and [3], therefore
; 0 <= iv.next < len.
-define void @test_predicated_simple_unsigned(i32* %p, i32* %arr) {
+define void @test_predicated_simple_unsigned(ptr %p, ptr %arr) {
; CHECK-LABEL: @test_predicated_simple_unsigned(
; CHECK-NEXT: preheader:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG0:!range !.*]]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, [[RNG0:!range !.*]]
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[PREHEADER:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
@@ -22,8 +22,8 @@ define void @test_predicated_simple_unsigned(i32* %p, i32* %arr) {
; CHECK-NEXT: [[IV_NEXT]] = sub i32 [[IV]], 1
; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAIL:%.*]]
; CHECK: backedge:
-; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, i32* [[P]], i32 [[IV]]
-; CHECK-NEXT: [[EL:%.*]] = load i32, i32* [[EL_PTR]], align 4
+; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, ptr [[P]], i32 [[IV]]
+; CHECK-NEXT: [[EL:%.*]] = load i32, ptr [[EL_PTR]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[EL]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -32,7 +32,7 @@ define void @test_predicated_simple_unsigned(i32* %p, i32* %arr) {
; CHECK-NEXT: unreachable
;
preheader:
- %len = load i32, i32* %p, !range !0
+ %len = load i32, ptr %p, !range !0
br label %loop
loop:
@@ -46,8 +46,8 @@ range_check_block:
br i1 %range_check, label %backedge, label %fail
backedge:
- %el.ptr = getelementptr i32, i32* %p, i32 %iv
- %el = load i32, i32* %el.ptr
+ %el.ptr = getelementptr i32, ptr %p, i32 %iv
+ %el = load i32, ptr %el.ptr
%loop.cond = icmp eq i32 %el, 0
br i1 %loop.cond, label %loop, label %exit
@@ -58,10 +58,10 @@ fail:
unreachable
}
-define void @test_predicated_simple_signed(i32* %p, i32* %arr) {
+define void @test_predicated_simple_signed(ptr %p, ptr %arr) {
; CHECK-LABEL: @test_predicated_simple_signed(
; CHECK-NEXT: preheader:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4, [[RNG0]]
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4, [[RNG0]]
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[PREHEADER:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
@@ -71,8 +71,8 @@ define void @test_predicated_simple_signed(i32* %p, i32* %arr) {
; CHECK-NEXT: [[IV_NEXT]] = sub i32 [[IV]], 1
; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAIL:%.*]]
; CHECK: backedge:
-; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, i32* [[P]], i32 [[IV]]
-; CHECK-NEXT: [[EL:%.*]] = load i32, i32* [[EL_PTR]], align 4
+; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, ptr [[P]], i32 [[IV]]
+; CHECK-NEXT: [[EL:%.*]] = load i32, ptr [[EL_PTR]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[EL]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -81,7 +81,7 @@ define void @test_predicated_simple_signed(i32* %p, i32* %arr) {
; CHECK-NEXT: unreachable
;
preheader:
- %len = load i32, i32* %p, !range !0
+ %len = load i32, ptr %p, !range !0
br label %loop
loop:
@@ -95,8 +95,8 @@ range_check_block:
br i1 %range_check, label %backedge, label %fail
backedge:
- %el.ptr = getelementptr i32, i32* %p, i32 %iv
- %el = load i32, i32* %el.ptr
+ %el.ptr = getelementptr i32, ptr %p, i32 %iv
+ %el = load i32, ptr %el.ptr
%loop.cond = icmp eq i32 %el, 0
br i1 %loop.cond, label %loop, label %exit
@@ -465,10 +465,10 @@ exit:
ret void
}
-define void @test_can_predicate_simple_unsigned(i32* %p, i32* %arr) {
+define void @test_can_predicate_simple_unsigned(ptr %p, ptr %arr) {
; CHECK-LABEL: @test_can_predicate_simple_unsigned(
; CHECK-NEXT: preheader:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LEN]], -1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
@@ -480,8 +480,8 @@ define void @test_can_predicate_simple_unsigned(i32* %p, i32* %arr) {
; CHECK-NEXT: [[RANGE_CHECK1:%.*]] = icmp ult i32 [[TMP0]], [[LEN]]
; CHECK-NEXT: br i1 [[RANGE_CHECK1]], label [[BACKEDGE]], label [[FAIL:%.*]]
; CHECK: backedge:
-; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, i32* [[P]], i32 [[IV]]
-; CHECK-NEXT: [[EL:%.*]] = load i32, i32* [[EL_PTR]], align 4
+; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, ptr [[P]], i32 [[IV]]
+; CHECK-NEXT: [[EL:%.*]] = load i32, ptr [[EL_PTR]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[EL]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -490,7 +490,7 @@ define void @test_can_predicate_simple_unsigned(i32* %p, i32* %arr) {
; CHECK-NEXT: unreachable
;
preheader:
- %len = load i32, i32* %p
+ %len = load i32, ptr %p
br label %loop
loop:
@@ -504,8 +504,8 @@ range_check_block:
br i1 %range_check, label %backedge, label %fail
backedge:
- %el.ptr = getelementptr i32, i32* %p, i32 %iv
- %el = load i32, i32* %el.ptr
+ %el.ptr = getelementptr i32, ptr %p, i32 %iv
+ %el = load i32, ptr %el.ptr
%loop.cond = icmp eq i32 %el, 0
br i1 %loop.cond, label %loop, label %exit
@@ -516,10 +516,10 @@ fail:
unreachable
}
-define void @test_can_predicate_simple_unsigned_inverted(i32* %p, i32* %arr) {
+define void @test_can_predicate_simple_unsigned_inverted(ptr %p, ptr %arr) {
; CHECK-LABEL: @test_can_predicate_simple_unsigned_inverted(
; CHECK-NEXT: preheader:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LEN]], -1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
@@ -531,8 +531,8 @@ define void @test_can_predicate_simple_unsigned_inverted(i32* %p, i32* %arr) {
; CHECK-NEXT: [[RANGE_CHECK1:%.*]] = icmp uge i32 [[TMP0]], [[LEN]]
; CHECK-NEXT: br i1 [[RANGE_CHECK1]], label [[FAIL:%.*]], label [[BACKEDGE]]
; CHECK: backedge:
-; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, i32* [[P]], i32 [[IV]]
-; CHECK-NEXT: [[EL:%.*]] = load i32, i32* [[EL_PTR]], align 4
+; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, ptr [[P]], i32 [[IV]]
+; CHECK-NEXT: [[EL:%.*]] = load i32, ptr [[EL_PTR]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[EL]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -541,7 +541,7 @@ define void @test_can_predicate_simple_unsigned_inverted(i32* %p, i32* %arr) {
; CHECK-NEXT: unreachable
;
preheader:
- %len = load i32, i32* %p
+ %len = load i32, ptr %p
br label %loop
loop:
@@ -555,8 +555,8 @@ range_check_block:
br i1 %range_check, label %fail, label %backedge
backedge:
- %el.ptr = getelementptr i32, i32* %p, i32 %iv
- %el = load i32, i32* %el.ptr
+ %el.ptr = getelementptr i32, ptr %p, i32 %iv
+ %el = load i32, ptr %el.ptr
%loop.cond = icmp eq i32 %el, 0
br i1 %loop.cond, label %loop, label %exit
@@ -568,10 +568,10 @@ fail:
}
-define void @test_can_predicate_simple_signed(i32* %p, i32* %arr) {
+define void @test_can_predicate_simple_signed(ptr %p, ptr %arr) {
; CHECK-LABEL: @test_can_predicate_simple_signed(
; CHECK-NEXT: preheader:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[LEN]], [[PREHEADER:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
@@ -582,8 +582,8 @@ define void @test_can_predicate_simple_signed(i32* %p, i32* %arr) {
; CHECK-NEXT: [[RANGE_CHECK:%.*]] = icmp slt i32 [[IV_NEXT]], [[LEN]]
; CHECK-NEXT: br i1 [[RANGE_CHECK]], label [[BACKEDGE]], label [[FAIL:%.*]]
; CHECK: backedge:
-; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, i32* [[P]], i32 [[IV]]
-; CHECK-NEXT: [[EL:%.*]] = load i32, i32* [[EL_PTR]], align 4
+; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, ptr [[P]], i32 [[IV]]
+; CHECK-NEXT: [[EL:%.*]] = load i32, ptr [[EL_PTR]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[EL]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -592,7 +592,7 @@ define void @test_can_predicate_simple_signed(i32* %p, i32* %arr) {
; CHECK-NEXT: unreachable
;
preheader:
- %len = load i32, i32* %p
+ %len = load i32, ptr %p
br label %loop
loop:
@@ -606,8 +606,8 @@ range_check_block:
br i1 %range_check, label %backedge, label %fail
backedge:
- %el.ptr = getelementptr i32, i32* %p, i32 %iv
- %el = load i32, i32* %el.ptr
+ %el.ptr = getelementptr i32, ptr %p, i32 %iv
+ %el = load i32, ptr %el.ptr
%loop.cond = icmp eq i32 %el, 0
br i1 %loop.cond, label %loop, label %exit
@@ -618,10 +618,10 @@ fail:
unreachable
}
-define void @test_can_predicate_trunc_unsigned(i32* %p, i32* %arr) {
+define void @test_can_predicate_trunc_unsigned(ptr %p, ptr %arr) {
; CHECK-LABEL: @test_can_predicate_trunc_unsigned(
; CHECK-NEXT: preheader:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[START:%.*]] = zext i32 [[LEN]] to i64
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LEN]], -1
; CHECK-NEXT: br label [[LOOP:%.*]]
@@ -634,8 +634,8 @@ define void @test_can_predicate_trunc_unsigned(i32* %p, i32* %arr) {
; CHECK-NEXT: [[RANGE_CHECK1:%.*]] = icmp ult i32 [[TMP0]], [[LEN]]
; CHECK-NEXT: br i1 [[RANGE_CHECK1]], label [[BACKEDGE]], label [[FAIL:%.*]]
; CHECK: backedge:
-; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, i32* [[ARR:%.*]], i64 [[IV]]
-; CHECK-NEXT: [[EL:%.*]] = load i32, i32* [[EL_PTR]], align 4
+; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, ptr [[ARR:%.*]], i64 [[IV]]
+; CHECK-NEXT: [[EL:%.*]] = load i32, ptr [[EL_PTR]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[EL]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -644,7 +644,7 @@ define void @test_can_predicate_trunc_unsigned(i32* %p, i32* %arr) {
; CHECK-NEXT: unreachable
;
preheader:
- %len = load i32, i32* %p
+ %len = load i32, ptr %p
%start = zext i32 %len to i64
br label %loop
@@ -660,8 +660,8 @@ range_check_block:
br i1 %range_check, label %backedge, label %fail
backedge:
- %el.ptr = getelementptr i32, i32* %arr, i64 %iv
- %el = load i32, i32* %el.ptr
+ %el.ptr = getelementptr i32, ptr %arr, i64 %iv
+ %el = load i32, ptr %el.ptr
%loop.cond = icmp eq i32 %el, 0
br i1 %loop.cond, label %loop, label %exit
@@ -672,10 +672,10 @@ fail:
unreachable
}
-define void @test_can_predicate_trunc_unsigned_inverted(i32* %p, i32* %arr) {
+define void @test_can_predicate_trunc_unsigned_inverted(ptr %p, ptr %arr) {
; CHECK-LABEL: @test_can_predicate_trunc_unsigned_inverted(
; CHECK-NEXT: preheader:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[START:%.*]] = zext i32 [[LEN]] to i64
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[LEN]], -1
; CHECK-NEXT: br label [[LOOP:%.*]]
@@ -688,8 +688,8 @@ define void @test_can_predicate_trunc_unsigned_inverted(i32* %p, i32* %arr) {
; CHECK-NEXT: [[RANGE_CHECK1:%.*]] = icmp uge i32 [[TMP0]], [[LEN]]
; CHECK-NEXT: br i1 [[RANGE_CHECK1]], label [[FAIL:%.*]], label [[BACKEDGE]]
; CHECK: backedge:
-; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, i32* [[ARR:%.*]], i64 [[IV]]
-; CHECK-NEXT: [[EL:%.*]] = load i32, i32* [[EL_PTR]], align 4
+; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, ptr [[ARR:%.*]], i64 [[IV]]
+; CHECK-NEXT: [[EL:%.*]] = load i32, ptr [[EL_PTR]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[EL]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -698,7 +698,7 @@ define void @test_can_predicate_trunc_unsigned_inverted(i32* %p, i32* %arr) {
; CHECK-NEXT: unreachable
;
preheader:
- %len = load i32, i32* %p
+ %len = load i32, ptr %p
%start = zext i32 %len to i64
br label %loop
@@ -714,8 +714,8 @@ range_check_block:
br i1 %range_check, label %fail, label %backedge
backedge:
- %el.ptr = getelementptr i32, i32* %arr, i64 %iv
- %el = load i32, i32* %el.ptr
+ %el.ptr = getelementptr i32, ptr %arr, i64 %iv
+ %el = load i32, ptr %el.ptr
%loop.cond = icmp eq i32 %el, 0
br i1 %loop.cond, label %loop, label %exit
@@ -726,10 +726,10 @@ fail:
unreachable
}
-define void @test_can_predicate_trunc_unsigned_
diff erent_start_and_len(i32* %p, i64 %start, i32* %arr) {
+define void @test_can_predicate_trunc_unsigned_
diff erent_start_and_len(ptr %p, i64 %start, ptr %arr) {
; CHECK-LABEL: @test_can_predicate_trunc_unsigned_
diff erent_start_and_len(
; CHECK-NEXT: preheader:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[START:%.*]], [[PREHEADER:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
@@ -741,8 +741,8 @@ define void @test_can_predicate_trunc_unsigned_
diff erent_start_and_len(i32* %p,
; CHECK-NEXT: [[RANGE_CHECK:%.*]] = icmp ult i32 [[NARROW]], [[LEN]]
; CHECK-NEXT: br i1 [[RANGE_CHECK]], label [[BACKEDGE]], label [[FAIL:%.*]]
; CHECK: backedge:
-; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, i32* [[ARR:%.*]], i64 [[IV]]
-; CHECK-NEXT: [[EL:%.*]] = load i32, i32* [[EL_PTR]], align 4
+; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, ptr [[ARR:%.*]], i64 [[IV]]
+; CHECK-NEXT: [[EL:%.*]] = load i32, ptr [[EL_PTR]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[EL]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -751,7 +751,7 @@ define void @test_can_predicate_trunc_unsigned_
diff erent_start_and_len(i32* %p,
; CHECK-NEXT: unreachable
;
preheader:
- %len = load i32, i32* %p
+ %len = load i32, ptr %p
br label %loop
loop:
@@ -766,8 +766,8 @@ range_check_block:
br i1 %range_check, label %backedge, label %fail
backedge:
- %el.ptr = getelementptr i32, i32* %arr, i64 %iv
- %el = load i32, i32* %el.ptr
+ %el.ptr = getelementptr i32, ptr %arr, i64 %iv
+ %el = load i32, ptr %el.ptr
%loop.cond = icmp eq i32 %el, 0
br i1 %loop.cond, label %loop, label %exit
@@ -778,10 +778,10 @@ fail:
unreachable
}
-define void @test_can_predicate_trunc_unsigned_
diff erent_start_and_len_inverted(i32* %p, i64 %start, i32* %arr) {
+define void @test_can_predicate_trunc_unsigned_
diff erent_start_and_len_inverted(ptr %p, i64 %start, ptr %arr) {
; CHECK-LABEL: @test_can_predicate_trunc_unsigned_
diff erent_start_and_len_inverted(
; CHECK-NEXT: preheader:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[START:%.*]], [[PREHEADER:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
@@ -793,8 +793,8 @@ define void @test_can_predicate_trunc_unsigned_
diff erent_start_and_len_inverted(
; CHECK-NEXT: [[RANGE_CHECK:%.*]] = icmp uge i32 [[NARROW]], [[LEN]]
; CHECK-NEXT: br i1 [[RANGE_CHECK]], label [[FAIL:%.*]], label [[BACKEDGE]]
; CHECK: backedge:
-; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, i32* [[ARR:%.*]], i64 [[IV]]
-; CHECK-NEXT: [[EL:%.*]] = load i32, i32* [[EL_PTR]], align 4
+; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, ptr [[ARR:%.*]], i64 [[IV]]
+; CHECK-NEXT: [[EL:%.*]] = load i32, ptr [[EL_PTR]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[EL]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -803,7 +803,7 @@ define void @test_can_predicate_trunc_unsigned_
diff erent_start_and_len_inverted(
; CHECK-NEXT: unreachable
;
preheader:
- %len = load i32, i32* %p
+ %len = load i32, ptr %p
br label %loop
loop:
@@ -818,8 +818,8 @@ range_check_block:
br i1 %range_check, label %fail, label %backedge
backedge:
- %el.ptr = getelementptr i32, i32* %arr, i64 %iv
- %el = load i32, i32* %el.ptr
+ %el.ptr = getelementptr i32, ptr %arr, i64 %iv
+ %el = load i32, ptr %el.ptr
%loop.cond = icmp eq i32 %el, 0
br i1 %loop.cond, label %loop, label %exit
@@ -830,10 +830,10 @@ fail:
unreachable
}
-define void @test_can_predicate_simple_unsigned_
diff erent_start(i32 %start, i32* %p, i32* %arr) {
+define void @test_can_predicate_simple_unsigned_
diff erent_start(i32 %start, ptr %p, ptr %arr) {
; CHECK-LABEL: @test_can_predicate_simple_unsigned_
diff erent_start(
; CHECK-NEXT: preheader:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[START:%.*]], -1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
@@ -845,8 +845,8 @@ define void @test_can_predicate_simple_unsigned_
diff erent_start(i32 %start, i32*
; CHECK-NEXT: [[RANGE_CHECK1:%.*]] = icmp ult i32 [[TMP0]], [[LEN]]
; CHECK-NEXT: br i1 [[RANGE_CHECK1]], label [[BACKEDGE]], label [[FAIL:%.*]]
; CHECK: backedge:
-; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, i32* [[P]], i32 [[IV]]
-; CHECK-NEXT: [[EL:%.*]] = load i32, i32* [[EL_PTR]], align 4
+; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, ptr [[P]], i32 [[IV]]
+; CHECK-NEXT: [[EL:%.*]] = load i32, ptr [[EL_PTR]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[EL]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -855,7 +855,7 @@ define void @test_can_predicate_simple_unsigned_
diff erent_start(i32 %start, i32*
; CHECK-NEXT: unreachable
;
preheader:
- %len = load i32, i32* %p
+ %len = load i32, ptr %p
br label %loop
loop:
@@ -869,8 +869,8 @@ range_check_block:
br i1 %range_check, label %backedge, label %fail
backedge:
- %el.ptr = getelementptr i32, i32* %p, i32 %iv
- %el = load i32, i32* %el.ptr
+ %el.ptr = getelementptr i32, ptr %p, i32 %iv
+ %el = load i32, ptr %el.ptr
%loop.cond = icmp eq i32 %el, 0
br i1 %loop.cond, label %loop, label %exit
@@ -881,10 +881,10 @@ fail:
unreachable
}
-define void @test_can_predicate_simple_unsigned_inverted_
diff erent_start(i32 %start, i32* %p, i32* %arr) {
+define void @test_can_predicate_simple_unsigned_inverted_
diff erent_start(i32 %start, ptr %p, ptr %arr) {
; CHECK-LABEL: @test_can_predicate_simple_unsigned_inverted_
diff erent_start(
; CHECK-NEXT: preheader:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[START:%.*]], -1
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
@@ -896,8 +896,8 @@ define void @test_can_predicate_simple_unsigned_inverted_
diff erent_start(i32 %st
; CHECK-NEXT: [[RANGE_CHECK1:%.*]] = icmp uge i32 [[TMP0]], [[LEN]]
; CHECK-NEXT: br i1 [[RANGE_CHECK1]], label [[FAIL:%.*]], label [[BACKEDGE]]
; CHECK: backedge:
-; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, i32* [[P]], i32 [[IV]]
-; CHECK-NEXT: [[EL:%.*]] = load i32, i32* [[EL_PTR]], align 4
+; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, ptr [[P]], i32 [[IV]]
+; CHECK-NEXT: [[EL:%.*]] = load i32, ptr [[EL_PTR]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[EL]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -906,7 +906,7 @@ define void @test_can_predicate_simple_unsigned_inverted_
diff erent_start(i32 %st
; CHECK-NEXT: unreachable
;
preheader:
- %len = load i32, i32* %p
+ %len = load i32, ptr %p
br label %loop
loop:
@@ -920,8 +920,8 @@ range_check_block:
br i1 %range_check, label %fail, label %backedge
backedge:
- %el.ptr = getelementptr i32, i32* %p, i32 %iv
- %el = load i32, i32* %el.ptr
+ %el.ptr = getelementptr i32, ptr %p, i32 %iv
+ %el = load i32, ptr %el.ptr
%loop.cond = icmp eq i32 %el, 0
br i1 %loop.cond, label %loop, label %exit
@@ -933,10 +933,10 @@ fail:
}
-define void @test_can_predicate_simple_signed_
diff erent_start(i32 %start, i32* %p, i32* %arr) {
+define void @test_can_predicate_simple_signed_
diff erent_start(i32 %start, ptr %p, ptr %arr) {
; CHECK-LABEL: @test_can_predicate_simple_signed_
diff erent_start(
; CHECK-NEXT: preheader:
-; CHECK-NEXT: [[LEN:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: [[LEN:%.*]] = load i32, ptr [[P:%.*]], align 4
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START:%.*]], [[PREHEADER:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
@@ -947,8 +947,8 @@ define void @test_can_predicate_simple_signed_
diff erent_start(i32 %start, i32* %
; CHECK-NEXT: [[RANGE_CHECK:%.*]] = icmp slt i32 [[IV_NEXT]], [[LEN]]
; CHECK-NEXT: br i1 [[RANGE_CHECK]], label [[BACKEDGE]], label [[FAIL:%.*]]
; CHECK: backedge:
-; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, i32* [[P]], i32 [[IV]]
-; CHECK-NEXT: [[EL:%.*]] = load i32, i32* [[EL_PTR]], align 4
+; CHECK-NEXT: [[EL_PTR:%.*]] = getelementptr i32, ptr [[P]], i32 [[IV]]
+; CHECK-NEXT: [[EL:%.*]] = load i32, ptr [[EL_PTR]], align 4
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i32 [[EL]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -957,7 +957,7 @@ define void @test_can_predicate_simple_signed_
diff erent_start(i32 %start, i32* %
; CHECK-NEXT: unreachable
;
preheader:
- %len = load i32, i32* %p
+ %len = load i32, ptr %p
br label %loop
loop:
@@ -971,8 +971,8 @@ range_check_block:
br i1 %range_check, label %backedge, label %fail
backedge:
- %el.ptr = getelementptr i32, i32* %p, i32 %iv
- %el = load i32, i32* %el.ptr
+ %el.ptr = getelementptr i32, ptr %p, i32 %iv
+ %el = load i32, ptr %el.ptr
%loop.cond = icmp eq i32 %el, 0
br i1 %loop.cond, label %loop, label %exit
diff --git a/llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-values-phi.ll b/llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-values-phi.ll
index e6465647a523d..c99ce9f2873a4 100644
--- a/llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-values-phi.ll
+++ b/llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-values-phi.ll
@@ -33,7 +33,7 @@ inner: ; preds = %inner, %header
%j = phi i64 [ %j.next, %inner ], [ %n, %header ]
%i.next = add nsw i64 %i, 1
%j.next = add nsw i64 %j, 1
- store i64 undef, i64* @ptr
+ store i64 undef, ptr @ptr
%cond1 = icmp slt i64 %j, %idx
br i1 %cond1, label %inner, label %inner_exit
diff --git a/llvm/test/Transforms/IndVarSimplify/scev-expander-preserve-lcssa.ll b/llvm/test/Transforms/IndVarSimplify/scev-expander-preserve-lcssa.ll
index 0a6c36aecf7ca..14e06fe06b412 100644
--- a/llvm/test/Transforms/IndVarSimplify/scev-expander-preserve-lcssa.ll
+++ b/llvm/test/Transforms/IndVarSimplify/scev-expander-preserve-lcssa.ll
@@ -7,7 +7,7 @@
declare i1 @cond() readnone
-define void @test1(i8 %x, [512 x i8]* %ptr) {
+define void @test1(i8 %x, ptr %ptr) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LAND_LHS_TRUE:%.*]]
@@ -34,7 +34,7 @@ define void @test1(i8 %x, [512 x i8]* %ptr) {
; CHECK-NEXT: [[I_8_IN:%.*]] = phi i32 [ [[I_8:%.*]], [[WHILE_COND215]] ], [ [[I_1107]], [[WHILE_COND215_PREHEADER]] ]
; CHECK-NEXT: [[I_8]] = add nsw i32 [[I_8_IN]], 1
; CHECK-NEXT: [[IDXPROM216:%.*]] = sext i32 [[I_8]] to i64
-; CHECK-NEXT: [[ARRAYIDX217:%.*]] = getelementptr inbounds [512 x i8], [512 x i8]* [[PTR:%.*]], i64 0, i64 [[IDXPROM216]]
+; CHECK-NEXT: [[ARRAYIDX217:%.*]] = getelementptr inbounds [512 x i8], ptr [[PTR:%.*]], i64 0, i64 [[IDXPROM216]]
; CHECK-NEXT: [[C_2:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C_2]], label [[WHILE_COND215]], label [[IF_END224_LOOPEXIT:%.*]]
; CHECK: if.end224.loopexit:
@@ -81,7 +81,7 @@ while.cond215: ; preds = %while.cond215, %whi
%i.8.in = phi i32 [ %i.8, %while.cond215 ], [ %i.7, %while.cond192 ]
%i.8 = add nsw i32 %i.8.in, 1
%idxprom216 = sext i32 %i.8 to i64
- %arrayidx217 = getelementptr inbounds [512 x i8], [512 x i8]* %ptr, i64 0, i64 %idxprom216
+ %arrayidx217 = getelementptr inbounds [512 x i8], ptr %ptr, i64 0, i64 %idxprom216
%c.2 = call i1 @cond()
br i1 %c.2, label %while.cond215, label %if.end224
@@ -156,7 +156,7 @@ return: ; preds = %if.end106, %for.bod
declare i32 @get.i32() readnone
-define void @test3(i32* %ptr) {
+define void @test3(ptr %ptr) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
@@ -178,7 +178,7 @@ define void @test3(i32* %ptr) {
; CHECK-NEXT: br label [[FOR_COND1390]]
; CHECK: for.end1469:
; CHECK-NEXT: [[M_2_IN_LCSSA:%.*]] = phi i32 [ [[M_2_IN]], [[FOR_COND1390]] ]
-; CHECK-NEXT: store i32 [[M_2_IN_LCSSA]], i32* [[PTR:%.*]], align 4
+; CHECK-NEXT: store i32 [[M_2_IN_LCSSA]], ptr [[PTR:%.*]], align 4
; CHECK-NEXT: br label [[WHILE_BODY]]
; CHECK: for.inc1498:
; CHECK-NEXT: [[INC1499]] = add nuw nsw i32 [[M_0804]], 1
@@ -208,7 +208,7 @@ for.body1394: ; preds = %for.cond1390
br label %for.cond1390
for.end1469: ; preds = %for.cond1390
- store i32 %m.2.in, i32* %ptr, align 4
+ store i32 %m.2.in, ptr %ptr, align 4
br label %while.body
for.inc1498: ; preds = %for.body1208
@@ -216,7 +216,7 @@ for.inc1498: ; preds = %for.body1208
br label %for.body1208
}
-define void @test4(i32* %ptr) {
+define void @test4(ptr %ptr) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
@@ -233,7 +233,7 @@ define void @test4(i32* %ptr) {
; CHECK-NEXT: [[IDXPROM1212:%.*]] = zext i32 [[M_0804]] to i64
; CHECK-NEXT: [[V:%.*]] = call i32 @get.i32()
; CHECK-NEXT: [[CMP1215:%.*]] = icmp eq i32 0, [[V]]
-; CHECK-NEXT: [[YPOS1223:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 [[IDXPROM1212]]
+; CHECK-NEXT: [[YPOS1223:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 [[IDXPROM1212]]
; CHECK-NEXT: br i1 [[CMP1215]], label [[IF_THEN1217:%.*]], label [[IF_ELSE1351:%.*]]
; CHECK: if.then1217:
; CHECK-NEXT: [[M_0804_LCSSA:%.*]] = phi i32 [ [[M_0804]], [[FOR_BODY1208]] ]
@@ -244,7 +244,7 @@ define void @test4(i32* %ptr) {
; CHECK-NEXT: br label [[FOR_BODY1251:%.*]]
; CHECK: for.body1251:
; CHECK-NEXT: [[IDXPROM1255:%.*]] = zext i32 [[M_1]] to i64
-; CHECK-NEXT: [[XPOS1257:%.*]] = getelementptr inbounds i32, i32* [[PTR]], i64 [[IDXPROM1255]]
+; CHECK-NEXT: [[XPOS1257:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[IDXPROM1255]]
; CHECK-NEXT: [[C_2:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C_2]], label [[IF_THEN1260]], label [[FOR_END1326:%.*]]
; CHECK: if.then1260:
@@ -262,7 +262,7 @@ define void @test4(i32* %ptr) {
; CHECK-NEXT: unreachable
; CHECK: for.inc1498:
; CHECK-NEXT: [[INC1499]] = add nuw nsw i32 [[M_0804]], 1
-; CHECK-NEXT: [[TMP1]] = load i32, i32* [[PTR]], align 8
+; CHECK-NEXT: [[TMP1]] = load i32, ptr [[PTR]], align 8
; CHECK-NEXT: br label [[FOR_BODY1208]]
; CHECK: if.then1504:
; CHECK-NEXT: unreachable
@@ -288,7 +288,7 @@ for.body1208: ; preds = %for.inc1498, %for.b
%idxprom1212 = zext i32 %m.0804 to i64
%v = call i32 @get.i32()
%cmp1215 = icmp eq i32 0, %v
- %ypos1223 = getelementptr inbounds i32, i32* %ptr , i64 %idxprom1212
+ %ypos1223 = getelementptr inbounds i32, ptr %ptr , i64 %idxprom1212
br i1 %cmp1215, label %if.then1217, label %if.else1351
if.then1217: ; preds = %for.body1208
@@ -302,7 +302,7 @@ for.cond1247: ; preds = %if.then1260, %if.th
for.body1251: ; preds = %for.cond1247
%idxprom1255 = zext i32 %m.1 to i64
- %xpos1257 = getelementptr inbounds i32, i32* %ptr, i64 %idxprom1255
+ %xpos1257 = getelementptr inbounds i32, ptr %ptr, i64 %idxprom1255
%c.2 = call i1 @cond()
br i1 %c.2, label %if.then1260, label %for.end1326
@@ -323,7 +323,7 @@ if.then1360: ; preds = %if.else1351
for.inc1498: ; preds = %if.else1351
%inc1499 = add nuw nsw i32 %m.0804, 1
- %1 = load i32, i32* %ptr, align 8
+ %1 = load i32, ptr %ptr, align 8
br label %for.body1208
if.then1504: ; preds = %for.cond1204.preheader
@@ -333,7 +333,7 @@ if.end1824: ; preds = %for.end1326
br label %while.body
}
-define void @test5(i8* %header, i32 %conv, i8 %n) {
+define void @test5(ptr %header, i32 %conv, i8 %n) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
@@ -439,7 +439,7 @@ define void @test6(i8 %x) {
; CHECK-NEXT: [[I_8_IN:%.*]] = phi i32 [ [[I_8:%.*]], [[WHILE_COND215]] ], [ [[I_7_LCSSA]], [[WHILE_COND215_PREHEADER]] ]
; CHECK-NEXT: [[I_8]] = add nuw nsw i32 [[I_8_IN]], 1
; CHECK-NEXT: [[IDXPROM216:%.*]] = sext i32 [[I_8]] to i64
-; CHECK-NEXT: [[ARRAYIDX217:%.*]] = getelementptr inbounds [512 x i8], [512 x i8]* null, i64 0, i64 [[IDXPROM216]]
+; CHECK-NEXT: [[ARRAYIDX217:%.*]] = getelementptr inbounds [512 x i8], ptr null, i64 0, i64 [[IDXPROM216]]
; CHECK-NEXT: br label [[WHILE_COND215]]
; CHECK: if.end224:
; CHECK-NEXT: [[C_2:%.*]] = call i1 @cond()
@@ -474,7 +474,7 @@ while.cond215: ; preds = %while.cond215, %whi
%i.8.in = phi i32 [ %i.8, %while.cond215 ], [ %i.7, %while.cond192 ]
%i.8 = add nsw i32 %i.8.in, 1
%idxprom216 = sext i32 %i.8 to i64
- %arrayidx217 = getelementptr inbounds [512 x i8], [512 x i8]* null, i64 0, i64 %idxprom216
+ %arrayidx217 = getelementptr inbounds [512 x i8], ptr null, i64 0, i64 %idxprom216
br label %while.cond215
if.end224: ; preds = %while.cond192
@@ -488,7 +488,7 @@ while.end316: ; preds = %entry
ret void
}
-define void @test7(i32* %ptr) {
+define void @test7(ptr %ptr) {
; CHECK-LABEL: @test7(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
@@ -498,7 +498,7 @@ define void @test7(i32* %ptr) {
; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ undef, [[WHILE_BODY]] ], [ [[TMP1:%.*]], [[FOR_INC1498:%.*]] ]
; CHECK-NEXT: [[M_048:%.*]] = phi i32 [ 1, [[WHILE_BODY]] ], [ [[INC1499:%.*]], [[FOR_INC1498]] ]
; CHECK-NEXT: [[IDXPROM1212:%.*]] = zext i32 [[M_048]] to i64
-; CHECK-NEXT: [[XPOS1214:%.*]] = getelementptr inbounds i32, i32* [[PTR:%.*]], i64 [[IDXPROM1212]]
+; CHECK-NEXT: [[XPOS1214:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 [[IDXPROM1212]]
; CHECK-NEXT: [[V_1:%.*]] = call i32 @get.i32()
; CHECK-NEXT: [[CMP1215:%.*]] = icmp eq i32 0, [[V_1]]
; CHECK-NEXT: br i1 [[CMP1215]], label [[IF_THEN1217:%.*]], label [[IF_ELSE1351:%.*]]
@@ -519,14 +519,14 @@ define void @test7(i32* %ptr) {
; CHECK-NEXT: [[IDXPROM1398:%.*]] = zext i32 [[M_2]] to i64
; CHECK-NEXT: br label [[IF_THEN1403]]
; CHECK: if.then1403:
-; CHECK-NEXT: [[XPOS1409:%.*]] = getelementptr inbounds i32, i32* [[PTR]], i64 [[IDXPROM1398]]
+; CHECK-NEXT: [[XPOS1409:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[IDXPROM1398]]
; CHECK-NEXT: [[C_1:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[C_1]], label [[FOR_COND1390]], label [[FOR_END1469:%.*]]
; CHECK: for.end1469:
; CHECK-NEXT: br label [[IF_END1824:%.*]]
; CHECK: for.inc1498:
; CHECK-NEXT: [[INC1499]] = add nuw nsw i32 [[M_048]], 1
-; CHECK-NEXT: [[TMP1]] = load i32, i32* undef, align 8
+; CHECK-NEXT: [[TMP1]] = load i32, ptr undef, align 8
; CHECK-NEXT: br label [[FOR_BODY1208]]
; CHECK: if.end1824:
; CHECK-NEXT: br label [[WHILE_BODY]]
@@ -541,7 +541,7 @@ for.body1208: ; preds = %for.inc1498, %while
%0 = phi i32 [ undef, %while.body ], [ %1, %for.inc1498 ]
%m.048 = phi i32 [ 1, %while.body ], [ %inc1499, %for.inc1498 ]
%idxprom1212 = zext i32 %m.048 to i64
- %xpos1214 = getelementptr inbounds i32, i32* %ptr, i64 %idxprom1212
+ %xpos1214 = getelementptr inbounds i32, ptr %ptr, i64 %idxprom1212
%v.1 = call i32 @get.i32()
%cmp1215 = icmp eq i32 0, %v.1
br i1 %cmp1215, label %if.then1217, label %if.else1351
@@ -565,7 +565,7 @@ for.cond1390: ; preds = %if.then1403, %if.th
br label %if.then1403
if.then1403: ; preds = %for.cond1390
- %xpos1409 = getelementptr inbounds i32, i32* %ptr, i64 %idxprom1398
+ %xpos1409 = getelementptr inbounds i32, ptr %ptr, i64 %idxprom1398
%c.1 = call i1 @cond()
br i1 %c.1, label %for.cond1390, label %for.end1469
@@ -574,7 +574,7 @@ for.end1469: ; preds = %if.then1403
for.inc1498: ; preds = %if.else1351
%inc1499 = add nuw nsw i32 %m.048, 1
- %1 = load i32, i32* undef, align 8
+ %1 = load i32, ptr undef, align 8
br label %for.body1208
if.end1824: ; preds = %for.end1469
diff --git a/llvm/test/Transforms/IndVarSimplify/widen-i32-i8ptr.ll b/llvm/test/Transforms/IndVarSimplify/widen-i32-i8ptr.ll
index f31bc4290fd33..17ce13d834878 100644
--- a/llvm/test/Transforms/IndVarSimplify/widen-i32-i8ptr.ll
+++ b/llvm/test/Transforms/IndVarSimplify/widen-i32-i8ptr.ll
@@ -6,32 +6,30 @@ target datalayout = "e-m:e-i64:64-n32:64"
define dso_local void @Widen_i32_i8ptr() local_unnamed_addr {
; CHECK-LABEL: @Widen_i32_i8ptr(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[PTRIDS:%.*]] = alloca [15 x i8*], align 8
-; CHECK-NEXT: [[ARRAYDECAY2032:%.*]] = getelementptr inbounds [15 x i8*], [15 x i8*]* [[PTRIDS]], i64 0, i64 0
-; CHECK-NEXT: store i8** [[ARRAYDECAY2032]], i8*** inttoptr (i64 8 to i8***), align 8
+; CHECK-NEXT: [[PTRIDS:%.*]] = alloca [15 x ptr], align 8
+; CHECK-NEXT: store ptr [[PTRIDS]], ptr inttoptr (i64 8 to ptr), align 8
; CHECK-NEXT: br label [[FOR_COND2106:%.*]]
; CHECK: for.cond2106:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_COND2106]] ], [ 0, [[ENTRY:%.*]] ]
-; CHECK-NEXT: [[GID_0:%.*]] = phi i8* [ null, [[ENTRY]] ], [ [[INCDEC_PTR:%.*]], [[FOR_COND2106]] ]
-; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, i8* [[GID_0]], i64 1
-; CHECK-NEXT: [[ARRAYIDX2115:%.*]] = getelementptr inbounds [15 x i8*], [15 x i8*]* [[PTRIDS]], i64 0, i64 [[INDVARS_IV]]
-; CHECK-NEXT: store i8* [[GID_0]], i8** [[ARRAYIDX2115]], align 8
+; CHECK-NEXT: [[GID_0:%.*]] = phi ptr [ null, [[ENTRY]] ], [ [[INCDEC_PTR:%.*]], [[FOR_COND2106]] ]
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr [[GID_0]], i64 1
+; CHECK-NEXT: [[ARRAYIDX2115:%.*]] = getelementptr inbounds [15 x ptr], ptr [[PTRIDS]], i64 0, i64 [[INDVARS_IV]]
+; CHECK-NEXT: store ptr [[GID_0]], ptr [[ARRAYIDX2115]], align 8
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: br label [[FOR_COND2106]]
;
entry:
- %ptrids = alloca [15 x i8*], align 8
- %arraydecay2032 = getelementptr inbounds [15 x i8*], [15 x i8*]* %ptrids, i64 0, i64 0
- store i8** %arraydecay2032, i8*** inttoptr (i64 8 to i8***), align 8
+ %ptrids = alloca [15 x ptr], align 8
+ store ptr %ptrids, ptr inttoptr (i64 8 to ptr), align 8
br label %for.cond2106
for.cond2106: ; preds = %for.cond2106, %entry
- %gid.0 = phi i8* [ null, %entry ], [ %incdec.ptr, %for.cond2106 ]
+ %gid.0 = phi ptr [ null, %entry ], [ %incdec.ptr, %for.cond2106 ]
%i.0 = phi i32 [ 0, %entry ], [ %inc2117, %for.cond2106 ]
- %incdec.ptr = getelementptr inbounds i8, i8* %gid.0, i64 1
+ %incdec.ptr = getelementptr inbounds i8, ptr %gid.0, i64 1
%idxprom2114 = zext i32 %i.0 to i64
- %arrayidx2115 = getelementptr inbounds [15 x i8*], [15 x i8*]* %ptrids, i64 0, i64 %idxprom2114
- store i8* %gid.0, i8** %arrayidx2115, align 8
+ %arrayidx2115 = getelementptr inbounds [15 x ptr], ptr %ptrids, i64 0, i64 %idxprom2114
+ store ptr %gid.0, ptr %arrayidx2115, align 8
%inc2117 = add nuw nsw i32 %i.0, 1
br label %for.cond2106
}
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